A Survey On Reconfigurable Architecture Based On Fpga For Ofdm Transmitter
A Survey On Reconfigurable Architecture Based On Fpga For Ofdm Transmitter
A Survey On Reconfigurable Architecture Based On Fpga For Ofdm Transmitter
OFDM TRANSMITTER
1,2
Department of Electronics and Telecommunication Engineering,
IV LITERATURE SURVEY
In literature, the problem and the previous techniques of reconfigurable architecture is described
Revanna et.al In this paper the scalable radix-2 N-point novel FFT processor architecture based
on a reasonable balance between performance, power, area, flexibility and scalability parameters
was proposed. The versatile FFT processor was outlined, executed utilizing VHDL, simulated
utilizing ModelSim and integrated on an Altera Stratix V FPGA gadget 5SGSMD5K2F40C2.
The FFT processor fulfills the prerequisites as far as speed, control, territory, adaptability and
versatility required by wide scope of numerous remote norms, for example, IEEE 802.11a/g,
IEEE 802.16e, 3GPP-LTE, DAB and DVB. Thus, the FFT processor engineering can be received
in SDR stages supporting indicated different remote guidelines. The proposed engineering beats
the current settled and variable length FFT processors as far as speed, power, region, adaptability
and versatility. In addition, the processor architecture can also be adopted in any other
applications where a reasonable balance between specified design parameters is essential.[1]
Bautista-Contreras et.al [2] in this paper, architecture for a reconfigurable computerized
baseband transmitter under the SDR worldview was displayed. It has the capacity of select on-
the-fly from three diverse plan of preparing: ST, DDST and express; seven distinctive sorts of
balance: 4/16/64 QAM, BPSK, DBPSK, OQPSK, DQPSK and bolster for up to 32 sorts; the
waveform of the beat forming channel; the length of the drive reaction of such channel; the
upsampling component; the recurrence operation of the clock base and the information rate.
Comes about demonstrate that it accomplished couple of assets of the focused on FPGA (< 1% of
the total resources) at a frequency operation adequate its use in practical communication
standards [2]
Zhang, B. et.al [3] It has been presented that the entire outline can fit for OFDM modulators of
various remote wireless standards with different IFFT length, sub-carrier index, cyclic prefix and
guard interval, whose resource consumption is quite low as well. Additionally, executing this
work on FPGA demonstrates that the SDR idea can be acknowledged on current customary
gadgets like Twister IV arrangement. Reducing repetitive work makes the system design more
convenient and efficient.[3]
This work was performed utilizing abnormal state apparatuses like System Generator and
displaying devices as MatLab and Simulink that encourage this undertaking. The outcome
displayed demonstrated that is conceivable to actualize an OFDM modulator for IEEE Std.
802.11a utilizing an accessible gadget like Virtex 2 (utilizing around 10 % of the accessible
assets). These outcomes demonstrate that genuine gadgets could bolster the SDR idea at IF
preparing level even at high number juggling requesting benchmarks or prepare. It is achievable
to decrease more assets utilizing VHDL improving procedures like the work introduced by M.
Canet . However that optimization would require much more time than using a high level tool.[4]
Zhang, B.et.al [5] . It has been introduced that the entire plan can fit for OFDM modulators of
various remote norms with various IFFT length, sub-bearer file, cyclic prefix and protect interim,
whose asset utilization is very low too. Additionally, executing this work on FPGA demonstrates
that the SDR idea can be acknowledged on current common gadgets like Cyclone IV
arrangement. Diminishing redundant work makes the framework plan more helpful and
proficient [5].
Garcia, J. et.al [6] second International Conference on, 2005. It has been introduced the entire
plan, approval and usage of an OFDM modulator consistent with the Std. IEEE 802.11a. This
work was performed utilizing abnormal state instruments like System Generator and
demonstrating devices as MatLab and Simulink that encourage this assignment. The outcome
exhibited demonstrated that is conceivable to actualize an OFDM modulator for IEEE Std.
802.11a utilizing an accessible gadget like Virtex 2 (utilizing around 10 % of the accessible
assets). These outcomes demonstrate that real gadgets could bolster the SDR idea at IF handling
level even at high number-crunching requesting benchmarks or process [6].
Mr. Rahul et.al [7] The primary reason for this project is that, they can move the flag from low
recurrence to the high recurrence and from high recurrence to low recurrence i.e.vice-versa. So
that a same flag can be utilized as a part of two or more recurrence extents. It implies that if one
recurrence range is not accessible then they can move it on another scope of recurrence. It is
been implemented using OFDM model. At the same time they are going to find the Bit Error
Rate (BER) & Peak to Average Power Ratio (PAPR).[7]
Meghana Shetty et.al [8] an architecture for DS-CDMA/CI transmitter utilizing Cordic
Algorithm. As the framework generator configuration show sets aside more range and
opportunity to play out the operation, it is thusly actualized utilizing the FPGA to lessen the
range furthermore, control. The design utilizes CORDIC Square to create transporter and to keep
away from utilization of complex augmentations the stage counterbalance equal to spreading
code is added to the stage generator yield. Code selector piece adds runtime re-configurability to
the model. At that point these modules are actualized in SPARTAN3 FPGA by utilizing Xilinx
ISE 13.4 and mimicked in modalism 6.3f. The Chip scope master Analyzer is utilized to see the
execution after effects of FPGA.[8]
V. PROPOSED SYSTEM
VI. CONCLUSION
Orthogonal Frequency Division Multiplexing (OFDM) has been studied by researchers all over
the world, which makes a great difference in modern modulate techniques. It has been presented
that the complete design can fit for OFDM modulators of different wireless standards with
different IFFT length, sub-carrier index, cyclic prefix and guard interval, whose resource
consumption is quite low as well. In this paper, a reconfigurable OFDM transmitter architecture
for 4G-LTE applications was presented. It has the capability of selecting on-the-fly from five
different transmission modes: 1.4, 3, 5, 10, and 20 MHz; three modulations: 4/16/64 QAM,
frame size, OFDM symbols/slot, and the assembly configuration parameters of each OFDM
symbol, such as the number of null carriers, the CP size, the pilot inclusion, etc. The proposed
architecture outperforms the existing fixed and variable length FFT processors in terms of speed,
power, area, flexibility and scalability. In addition, the processor architecture can also be adopted
in any other applications where a reasonable balance between specified design parameters is
essential.
VII. REFERRENCES
[1] Revanna, D. and Anjum, O. and Cucchi, M. and Airoldi, R. and Nurmi, J. A scalable FFT
processor architecture for OFDM based communication systems. Embedded Computer Systems:
Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference on,
2013
[3] Zhang, B. and Guo, X. A Novel Reconfigurable Architecture for Generic OFDM Modulator
Based on FPGA. In Advanced Communication Technology (ICACT), 2014 16th International
Conference on, pages 851-854. IEEE, 2014.
[4] Garcia, J. And Cumplido, R. On The Design Of An Fpga-Based Ofdm Modulator For Ieee
802.11a. Electrical And Electronics Engineering, 2005 2nd International Conference On, 2005.
[5] Zhang, B. What's More, Guo, X. A Novel Reconfigurable Architecture For Generic Ofdm
Modulator Based On Fpga. In Advanced Communication Technology (Icact), 2014 Sixteenth
International Conference On, Pages 851-854. Ieee, 2014.
[6] Garcia, J. What's More, Cumplido, R. On The Outline Of A Fpga-Based Ofdm Modulator
For Ieee 802.11a. Electrical And Electronics Engineering, 2005 Second International Conference
On, 2005
[7] Mr. Rahul S. Bilwane ; Prof. Amit G. Fulsunge Literature Review On Design Of Ofdm
Model International Journal Of Research Available At
Http://Internationaljournalofresearch.Org/ P-Issn: 2348-6848 E-Issn: 2348-795x Volume 02 Issue
03 April 2015 Available Online: Http://Internationaljournalofresearch.Org/ P A G E | 348 - 351
[8] Meghana Shetty , Yuvraj , Praveen , Raghavengra Rao A Novel Architecture For A
Dscdma-Ci Transmitter Using Cordic And Its Fpga Implementation International Journal Of
Innovative Research In Electrical, Electronics, Instrumentation And Control Engineering And
National Conference On Advanced Innovation In Engineering And Technology Vol. 3, Special
Issue 1, April 2015 Doi 10.17148/Ijireeice