Gates Institute of Technology:: Gooty Digital Circuits and Systems 2 Marks With Answers
Gates Institute of Technology:: Gooty Digital Circuits and Systems 2 Marks With Answers
Gates Institute of Technology:: Gooty Digital Circuits and Systems 2 Marks With Answers
Bipolar Unipolar
5. Which gates are called as the universal gates? What are its advantages?
The NAND and NOR gates are called as the universal gates. These gates are used to
perform any type of logic application.
21. How schottky transistors are formed and state its use?
A schottky diode is formed by the combination of metal and semiconductor. The
presence of schottky diode between the base and the collector prevents the transistor from going
into saturation. The resulting transistor is called as schottky transistor.
The use of schottky transistor in TTL decreases the propagation delay without a sacrifice
of power dissipation.
Disadv:
Wired output capability is possible only with tristate and open collector type
Special circuits in Circuit layout and system design are required.
25. When does the noise margin allow digital circuits to function properly.
When noise voltages are within the limits of VNA(High State Noise Margin) and VNK for
a particular logic family.
26. What happens to output when a tristate circuit is selected for high impedance.
Output is disconnected from rest of the circuits by internal circuitry.
4. Define Decoder?
A decoder is a multiple - input multiple output logic circuit that converts coded
inputs into coded outputs where the input and output codes are different.
6. Define Encoder?
An encoder has 2n input lines and n output lines. In encoder the output lines generate the
binary code corresponding to the input value.
8. Define multiplexer?
Multiplexer is a digital switch. If allows digital information from several sources to be
routed onto a single output line.
2. Explain ROM
A read only memory(ROM) is a device that includes both the decoder and the OR gates
within a single IC package. It consists of n input lines and m output lines. Each bit combination
of the input variables is called an address. Each bit combination that comes out of the output
lines is called a word. The number of distinct addresses possible with n input variables is 2 n.
24. Give the comparison between combinational circuits and sequential circuits.
Combinational circuits Sequential circuits
Memory unit is not required Memory unity is required
Parallel adder is a combinational circuit Serial adder is a sequential circuit
Here the latch input has to be pulsed momentarily to cause a change in the latch output state,
and the output will remain in that new state even after the input pulse is over.
6. The t pd for each flip-flop is 50 ns. Determine the maximum operating frequency for
MOD - 32 ripple counter
f max (ripple) = 5 x 50 ns = 4 MHZ
17.What are the steps for the design of asynchronous sequential circuit?
-construction of primitive flow table
-reduction of flow table
-state assignment is made
-realization of primitive flow table
18.What is hazard?
-unwanted switching transients
30.What are the steps for the design of asynchronous sequential circuit?
1. Construction of a primitive flow table from the problem statement.
2. Primitive flow table is reduced by eliminating redundant states using the state
reduction
3. State assignment is made
4. The primitive flow table is realized using appropriate logic elements.
33 Give the comparison between state Assignment Synchronous circuit and state
assignment asynchronous circuit.
In synchronous circuit, the state assignments are made with the objective of circuit
reduction. In asynchronous circuits, the objective of state assignment is to avoid critical races.
42. A pulse mode asynchronous machine has two inputs. If produces an output whenever
two consecutive pulses occur on one input line only. The output remains at 1 until a pulse
has occurred on the other input line. Write down the state table for the machine.
43. What is fundamental mode.
A transition from one stable state to another occurs only in response to a change in
the input state. After a change in one input has occurred, no other change in any input
occurs until the circuit enters a stable state. Such a mode of operation is referred to as a
fundamental mode.
Part B
Unit-I
Unit-II
8.Design and explain a comparator to compare two identical words. Two numbers
represented by A = A3A2A1A0 & B = B3B2B1B0 If two numbers equal P = Ai Bi
Obtain the logic Expression . Obtain the logic
diagram.
9.Explain in detail the look ahead carry generator. Block diagram
Explanation Logic diagram
Unit-III
10. Design a logic circuit to convert the BCD code to Excess 3 code. Truth Table for
BCD to Excess 3 conversion.
K-map simplification
Logic circuit implementing the Boolean Expression 11.Explain in
detail about PLA and PAL.
Logic difference between Prom & PLA Logic diagram
implementing a function Logic difference between Prom
& PAL Logic diagram implementing a function
15.Design a sequential detector which produces an output 1 every time the input sequence
1011 is detected.
Construct state diagram
Obtain the flow table
Obtain the flow table & output table
Transition table
Select flip flop
Excitation table
Logic diagram
Unit-V
17.Explain with neat diagram the different hazards and the way to eliminate them.
Classification of hazards
Static hazard & Dynamic hazard definitions
K map for selected functions
Method of elimination
Essential hazards
18.State with a neat example the method for the minimization of primitive flow table.
Consider a state diagram
Obtain the flow table
Using implication table reduce the flow table Using
merger graph obtain maximal compatibles Verify closed
& covered conditions
Plot the reduced flow table
19.Design a asynchronous sequential circuit with 2 inputs T and C. The output attains a value of 1
when T = 1 & c moves from 1 to 0. Otherwise the output is 0.
Obtain the state diagram
Obtain the flow table
Using implication table reduce the flow table Using
merger graph obtain maximal compatibles Verify closed
& covered conditions
Plot the reduced flow table
Obtain transition table Excitation
table
Logic diagram