Updated Simulation Model of Active Front End Converter: Project Memo AN 01.12.97
Updated Simulation Model of Active Front End Converter: Project Memo AN 01.12.97
Updated Simulation Model of Active Front End Converter: Project Memo AN 01.12.97
97
I_R
I_PWM Filter Point of common Power Grid
connection
I_S
0.02
T1 D1 T3 D3 T5 D5
I_T
2 2 2 Ph F V
g_Rp g_Sp g_Tp VRS
V_DC
6600 .0
I_R A A I_mains_R A
V_DC_P
V_R_G 0.053 0.0014 VR 0.0003 0.0003 0.05
V_R_0 VRS
I_S B B I_mains_S B
0.053 0.0014 VST VS 0.0003 0.0003
6600 .0
I_T C C I_mains_T C
V_DC_N
I_DC 0.053 0.0014 VT 0.0003 0.0003
VTR
I_C_R
I_C_S
I_C_T
VCC_R
T4 D4 T6 D6 T2 D2
VCC_S
VCC_T
0.02
2 2 2
0.001 66.0
0.001 66.0
0.001 66.0
g_Rm g_Sm g_Tm
A
Power
I_C_R VR I_mains_R
P
Power calculation Short circuit detection
* VS I_mains_S
V_DC V_DC_P 1E3
Save result to file for
* VT I_mains_T
* |X| Matlab analysis
I_DC 1E3 P_DC I_DC V_R_G I_PWM Short cir. PWM *
1E3
FFT-analysis result
V_DC I_PWM V_R_0 to file
In1 In6
Scale factor In1 V_R_G I_R
(from kV to per unit (pu))
I_R In2 In7
(1.0 pu = 230 V AC = 0.23kV) Scale factor In2 V_R_0 I_mains_R
Note: Peak values (from kA to per unit (pu)) 0.0
In3
(1.0 pu = 28 A = 0.028kA) In3 FFT
* VR
3.074 Note: Peak values ! 0.0
VRS In4
* In4 VRS
1 0.0
VST 3.074 * In5
2
* I_R 25.2 In5 VCC_R
3 0.0 Write Store
VTR 3.074 VAC_mea Phase Theta * file result
locked 1 trigger
loop (PLL) I_S 25.2 trigger
2 On
*
3
I_T 25.2 g_Rp
PWM g_Rp
g_Rm Result to file
Scale factor Write Store results
g_Rm
(from kV to per unit (pu)) g_Sp -- Trigg OFF ON
(1.0 pu = 400 V DC = 0.4kV) Theta g_Sp lagreres.f
g_Sm
* I_react I_m ea g_Sm
DC
V_DC 2.5 VDC_mea Generation of g_Tp 0 0
Voltage V_ref
Controller I_act curr. references I_ref Current V_ref g_Tp
Controller
* I_amp g_Tm
I_ref
2.5 VDC_ref g_Tm
File ny_frontend_11
Dir J:\DOK\12\MO\Prosjekt\Sip 12X127\EMTDC\Frontend
+0.03
Convert.
+0.01 currents
-0.01
before
filtering
-0.03
-0.05
0.05 0.07 0.09 0.11 0.13 0.15
no name
I mains R I mains S I mains T
+0.05
+0.03
Convert.
+0.01 currents
-0.01
after
filtering
-0.03
-0.05
0.05 0.07 0.09 0.11 0.13 0.15
Time (sec)
Stability
0
Amplitude (dB)
analysis of −6
the phase
locked
Frequency (Hz)
loop
− 180
Phase angle (degree)
(Mathcad) − 135
Frequency (Hz)
0.02
Current in
IR
0
filter
-0.02 inductor
-0.04
0.17 0.175 0.18 0.185 0.19 0.195
Time (500 ks/s ) (RMS:0.023189 )
File:./ex03.emt/resultat
Harmonics
6
in % of
4 fundamental
IR
2
x 104 Hz on
0
x-axis
0 0.5 1 1.5 2 2.5
Frequency (Hz) (500 ks/s Delta freq. :50 Hz ) (%THD=6.9015 RMS=0.023189 ) 4
x 10
12X127 Olve.Mo@energy.sintef.no 64
DIVISION LOCATION LOCAL FAX
SUMMARY
This memo is a continuation and systematisation of previous work on mains integrated converters.
It is a part of the result of the Strategic Institute Programme (SIP) “Power electronics and energy
storage technologies for cost- and energy efficient power systems” funded by The Research
Council of Norway.
A complete dynamic model of an active front-end converter is presented in this memo. The model
is implemented in the PSCAD/EMTDC simulation software and includes both the power circuit
and the control loops.
The memo also shows how MatLab can be used for calculation of harmonics and how MatCad
can be used for investigation of converter stability analysis and also for determination of possible
AC-filter resonance frequencies. The simulation examples clearly show that the filter design is a
very important part of an active front-end converter.
The memo shows that SINTEF Energy Research now have models and analysis tools well suited
for design and verification of active front-end converters. The established model and the analysis
tools are also well suited for further investigation on problems related to interfacing of alternative
energy sources and energy storage devices to the power grid or to an autonomous power system.
· Define and describe design criteria for the controllers of the active front-end converter in
different power system applications.
· Thorough investigation of AC-filter design for active front-end converters.
12X127 AN011297
2
Energy Research
TABLE OF CONTENTS
Page
SUMMARY ............................................................................................................................................................ 1
1 INTRODUCTION........................................................................................................................................ 3
1.1 Active front-end converter ............................................................................................................. 3
1.2 About this memo ............................................................................................................................ 3
2 MODELLING .............................................................................................................................................. 4
2.1 The model (file: ny_frontend_11.psc) ............................................................................................ 4
2.2 The power circuit ........................................................................................................................... 6
2.2.1 Power grid ..................................................................................................................... 6
2.2.2 Converter filter and power meter................................................................................... 7
2.2.3 The converter................................................................................................................. 7
2.3 Controller loops.............................................................................................................................. 8
2.3.1 The DC-voltage controller............................................................................................. 9
2.3.2 The phase locked loop (PLL) ...................................................................................... 10
2.3.3 Generation of three phase current references .............................................................. 11
2.3.4 Current controller ........................................................................................................ 13
2.3.5 Pulse width modulation (PWM) of gate pulses ........................................................... 14
2.4 Online result analysis (FFT)......................................................................................................... 16
2.5 Saving results for analysis in Matlab............................................................................................ 16
2.6 Parameters for the simulation model ............................................................................................ 17
8 REFERENCES........................................................................................................................................... 45
12X127 AN011297