Electronic Identification Systems BIS Processor BIS C-60 - 2 Profibus DP
Electronic Identification Systems BIS Processor BIS C-60 - 2 Profibus DP
Electronic Identification Systems BIS Processor BIS C-60 - 2 Profibus DP
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Manual
Balluff GmbH
Schurwaldstrasse 9
73765 Neuhausen a.d.F.
Germany
Phone +49 7158 173-0
Fax +49 7158 5010
balluff@balluff.de www.balluff.com
C60_2-019_818217_0806-e.p65
Contents
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Safety Considerations
Approved Operation Series BIS C-60_2 processors along with the other BIS C system components comprise an
identification system and may only be used for this purpose in an industrial environment in
conformity with Class A of the EMC Law.
Installation and Installation and operation should be carried out by trained personnel only. Unauthorized work
Operation and improper use will void the warranty and liability.
When installing the processor, follow the chapters containing the wiring diagrams closely.
Special care is required when connecting the processor to external controllers, in particular
with respect to selection and polarity of the signals and power supply.
Only approved power supplies may be used for powering the processor. See chapter 'Techni-
cal Data' for details.
Use and Checking Prevailing safety regulations must be adhered to when using the identification system. In par-
ticular, steps must be taken to ensure that a failure of or defect in the identification system
does not result in hazards to persons or equipment.
This includes maintaining the specified ambient conditions and regular testing for functionality
of the identification system including all its associated components.
Fault Conditions Should there ever be indications that the identification system is not working properly, it
should be taken out of commission and secured from unauthorized use.
Scope This manual applies to processors in the series BIS C-6002-019-...-03-... and
BIS C-6022-019-050-03-....
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Introduction
BIS C Identification Systems
This manual is designed to assist the user in setting up the control program and installing and
starting up the components of the BIS C Identification System, and to assure rapid, trouble-
free operation.
☞ If 2 read/write heads are connected to a BIS C-60_2 processor, both heads can be operated
independently of each other. This means for example that you can read a Data carrier from one
head while writing to another Data carrier at the other head.
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Introduction
BIS C Identification Systems
System Components The main components of the BIS C Identification Systems are:
– Processor,
– Read/Write Heads and
– Data carriers
with with
adapter BIS C-670 adapter BIS C-650
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Introduction
BIS C Identification Systems
1)
BIS C-3_ _ BIS C-3_ _ Read/write heads BIS C-3_ _ BIS C-3_ _
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Selecting System The BIS C-6002 processor has a plastic housing. Depending on the version, connections are
Components made either through a terminal strip, with the cable secured using a PG fitting, or via round
connectors. A single read/write head from BIS C-65_ series can be directly mounted to the
processor, which creates a compact unit. If the BIS C-650 adapter is attached instead of the
BIS C-65_ read/write head, two read/write heads may be cable connected. If the BIS C-670
adapter is attached, one read/write head may be cable connected.
The BIS C-6022 processor has a metal housing. Connection is made through round connec-
tors. Two read/write heads can be cable connected to the BIS C-6022 processor.
Series BIS C-60_2 processors have in addition a digital input. The input has various functions
depending on the configuration (see Parametering).
Whether the compact version of the processor with integrated read/write head makes sense
or whether the external solution is preferred depends primarily on the spatial arrangement of
the components. There are no functional limitations. All read/write heads are suitable for both
static and dynamic reading. Distance and relative velocity are based on which Data carrier is
selected. Additional information on the read/write heads in series BIS C-65_ and series
BIS C-3_ _ including all the possible Data carrier/read-write head combinations can be found
in the manuals for the respective read/write heads.
The system components are electrically supplied by the processor. The Data carrier repre-
sents an free-standing unit and needs no line-carried power. It receives its energy from the
read/write head. The latter constantly sends out a carrier signal which supplies the code head
as soon as the required distance between the two is reached. The read/write operation takes
place during this phase. Reading and writing may be dynamic or static.
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Control Function The processor writes data from the host system to the Data carrier or reads data from the
tag through the read/write head and prepares it for the host system. Host systems may
include:
– a host computer (e.g. industrial PC) or
– a programmable logic controller (PLC)
Data checking
When sending data between the read/write head and the Data carrier a procedure is re-
quired for recognizing whether the data were correctly read or written.
The processor is supplied with standard Balluff procedure of double reading and compar-
ing. In addition to this procedure a second alternative is available: CRC_16 data checking.
Here a test code is written to the Data carrier, allowing data to be checked for validity at
any time or location.
Advantages of CRC_16 Advantages of double reading
Data checking even during the non-active phase No bytes on the data carrier need to be
(CT outside read/write head zone). reserved for storing a check code.
Shorter read times since each page is read only Shorter write times since no CRC needs to be
once. written.
Since both variations have their advantages depending on the application, the user is free
to select which method of data checking he wishes to use (see Parametering on 26).
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PROFIBUS-DP Communication between the BIS C-60_2 processor and the host system is via PROFIBUS-DP.
The PROFIBUS-DP system consists of the components:
– the bus master and
– the bus modules/slaves (here the BIS C-60_2 processor).
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Unit's Master Data For the correct parametering of the bus master as per type, a diskette, containing the unit’s
master data in the form of a GSD file is included with the BIS C-60_2 processor.
Station Address The Processor BIS C-60_2 is delivered with the station address 126. This has to be set indi-
vidually before using in a bus system. See information on 12.
Input/Output Buffer An input buffer and an output buffer are used for the data exchange with the control system.
The size of these buffers has to be configured via the master.
☞ The possible settings are entered in the GSD file (and Type file). A minimum of 4 and a maxi-
mum of 128 bytes can be accommodated. However, it must be an even number.
Parametering Bytes Besides, in the case of the BIS C-60_2 processor, there are 6 further bytes (User-Parameter
User-Parameter Bytes Bytes) which have to be set while parametering. The significance of the 6 bytes for para-
metering is described starting from 25.
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Station Address The station address under which the unit is accessed on the bus can be assigned through the
setting slide switch S1. Each address shall be assigned only once.
The slide switch S1 is binary coded. The setting of the station address is carried out according
to the scheme shown in the table. Switch position: no = left, yes = right.
The address 85 is set in the following figure.
Slide switch S1
Station
7 6 5 4 3 2 1
Address
26 25 24 23 22 21 20
0 not allowed
➪
1 no no no no no no yes
2 no no no no no yes no
3 no no no no no yes yes
no yes 4 no no no no yes no no
5 no no no no yes no yes
...
85 yes no yes no yes no yes
...
123 yes yes yes yes no yes yes
124 yes yes yes yes yes no no
125 yes yes yes yes yes no yes
126 yes yes yes yes yes yes no
Slide switch S1 127 not allowed
(with cover removed)
To open the cover of the processor, see 58 for BIS C-6002 or 76 for BIS C-6022.
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Setting compatibility Slide switch S1 is used to set compatibility with the BIS C-602 and BIS C-622 processors.
☞ If the BIS C-60_2 processor is set to be compatible with the BIS C-602 or BIS C-622, all set-
tings for data exchange must be made as described in the sections on parametering, function
description, protocol sequence and LED display in the user’s manual for the BIS C-6_2 proces-
sor! This user’s manual can be mailed on request, or you may download it from the Internet at
www.balluff.de.
➪ no yes
8
yes
Slide switch S1
compatible with
BIS C-6_2
no BIS C-60_2
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Function Description
Communication with the processor
Basic Procedure Communication between the host system and the processor takes place using a fixed proto-
col sequence. Data integrity from the control to the processor and vice-versa is indicated by a
control bit. This bit is used to implement a handshake between the control and the processor.
Following is a simplified representation of the sequence of a job sent from the control to the
processor:
1. The control sends a command designator to the processor together with the associated
command parameters and sets a bit (AV bit). This bit indicates to the processor that the
transmitted data are valid and that the job is now beginning.
2. The processor takes the job and sets a bit (AA bit), which indicates this to the control.
3. If an additional exchange of data between the control and the processor is required to
carry out the job, each uses a bit (TI bit and TO bit) to indicate that the control / processor
is now ready for additional data exchange or has accepted the received data.
4. Once the processor has carried out the job correctly, it sets a bit (AE bit).
5. Once the control has accepted all the important data, it indicates this to the processor by
resetting the bit that was set at the beginning (AV bit).
6. The processor now in turn sets all the control bits that were set during the sequence
(AA bit, AE bit) and is ready for the next job.
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Function Description
Input and Output Buffers
Input and Output In order to transmit commands and data between the BIS C-60_2 and the host system, the
Buffers latter must prepare two fields. These two fields are:
– the output buffer
for the control commands which are sent to the BIS Identification System and
for the data to be written.
– the input buffer
for the data to be read and
for the designators and error codes which come from the BIS Identification System.
The possible setting values are stored in the GSD file.
The buffer size can be selected between 4 and 128 bytes in steps of 2 bytes. This must be
given by the master during parametering. The total buffer size is divided into 2 ranges:
Buffer range 1 for Read/Write Head 1; size is specified in paramter byte 6.
Buffer range 2 for Read/Write Head 2; size = total buffer size – buffer size of Read/Write
Head 1. See 16 for example.
☞ If a buffer size of less than 6 bytes (8 bytes with double bit header) is set for a read/write head, a
read/write request can be carried out without specifying the start address and the number of
bytes. Automatic reading for Codetag-Present (see 30) remains active. This permits fast
reading of small data quantities without placing an unnecessary load on the bus.
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Function Description
Input and Output Buffers
Input and Output Example: The 82 bytes for the total buffer need to be distributed. An input/output buffer of
Buffers 46 bytes is assigned to Read/Write Head 1. This results in an input/output buffer of 36 bytes
(continued) for Read/Write Head 2.
Procedure: The buffer size for Read/Write Head 1 is set to 46 bytes. This means using the
parameter byte 6 to enter Hex value 2E (corresponds to 46 decimal), which corresponds to
binary 00101110.
PLC Organisation: The buffer range starts at input byte IB 32 and output byte OB 32.
Result: IB 0 / OB 0
Read/Write Head 1: Subaddress 00 IB 32 and OB 32 PLC buffer
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Function Description
Output buffer, configuration and explanation
Configuration of the The last byte can be arranged as a 2nd bit header through parametering (default).
output buffer for one Bit No. 7 6 5 4 3 2 1 0
(1) read/write head
Subaddress
00Hex = Bit Header CT TI HD GR AV Bit Name
01Hex Command Designator or Data
02Hex Start Address (Low Byte) or Program No. or Data
03Hex Start Address (High Byte) or Data
04Hex No. of Bytes (Low Byte) or Data
05Hex No. of Bytes (High Byte) or Data
06Hex Data
... Data
Last Byte 2nd Bit Header (as above) or Data
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Function Description
Output buffer, configuration and explanation
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Function Description
Output buffer, configuration and explanation
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Function Description
Output buffer, configuration and explanation
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Function Description
Input buffer, configuration and explanation
Configuration of the The last byte can be arranged as a 2nd bit header through parametering (default).
input buffer for one
(1) read/write head Bit No. 7 6 5 4 3 2 1 0
Subaddress
00Hex = Bit Header BB HF TO IN/KN AF AE AA CP Bit Name
01Hex Error Code or Data
02Hex Data
03Hex Data
04Hex Data
05Hex Data
06Hex Data
... Data
2nd Bit Header
Last byte or Data
(as above)
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Function Description
Input buffer, configuration and explanation
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Function Description
Input buffer, configuration and explanation
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Function Description
Input buffer, configuration and explanation
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Function Description
Parametering the BIS C-60_2 processor
Parameters, There are 6 user parameter bytes stored on the Profibus master that can be used to activate
Overview and deactivate various functions. Setting is done directly by linking a device to the Profibus
master. The parameter default settings are stored in the GSD file.
– CRC_16 data check:
If this function is activated, the correctness of the read or written data is ensured by a
CRC_16 data check (see 9).
– Simultaneous data transmission for both read/write heads:
With simultaneous data transmission shorter read/write times can be achieved depending
on the amount of data to be read/written and the type of controller.
– Dynamic operation on read/write head 1 or 2:
If dynamic operation is parametered, a read/write job can be sent even though there is no
Data carrier in the active zone of the head. As soon as a Data carrier passes by the head,
the command is immediately carried out.
– "Auto-Read” for read/write head 1 or 2:
If this function is activated, the processor reads out the first (max. 31) bytes from the Data
carrier starting at a defined start address as soon as the tag enters the active zone of the
read/write head. The start address must first have been stored in the processor’s EEPROM
with the command ID 07Hex.
– 2nd bit header at end of in- and output buffer:
The 2nd bit header (factory setting) prevents data from being accepted by the bus as long
as it is not fully updated.
– Display state of the digital input in the bit header of the input buffer:
If this function is activated, the IN-bit displays the state of the digital input of the processor:
Please note the IN = 0 → digital input low; IN = 1 → digital input high
basic procedure on
14 and 29...35 – Reset BIS C-60_2 processor through the digital input:
and the examples on If this function is activated, the processor is reset when the digital input is set to high.
pages 36...53.
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Function Description
Parametering, Parametering Bytes
Parametering Bytes
For parametering all 6 bytes must always be transferred in Hex. Only the bits mentioned
User-Parameter Bytes may be changed. No guaranty will be given for the proper functioning of the
BIS C-60_2 if any of the other bits are changed.
☞ If this function is selected, then the minimum size of both buffers is 4 words (8 bytes) each.
Please note the basic procedure on 14 and 29...35 and the examples on pages 36...53.
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Function Description
Parametering, Parametering Bytes
Parametering Bytes 4th byte, bit 7 Display state of the digital input in the bit header of the input buffers:
User-Parameter Bytes 0 = no Input is Low: "IN" in the bit header of the input buffers = 0.
(continued) 1 = yes Input is High: "IN" in the bit header of the input buffers = 1.
Important: „KN“ and „IN“ use the same bit in the bit header.
If the BIS C-655 adapter is connected for 2 x 2 heads, you must select 0 = no.
Important: If 4th byte, bit 6 is set to 1 = yes, the setting 4th byte, bit 7 must be set to
0 = no.
4th byte, bit 2 Reset the BIS C-60_2 processor through the digital input:
0 = no Input is Low: Do not reset.
1 = yes Input is High: Reset.
5th byte, bit 8 Activate simultaneous data transmission for both read/write heads
Bit state: 0 = no 5th byte, bit 5 Dynamic mode on read/write head 2
1 = yes (for effects on read/write times, see 54/55)
5th byte, bit 4 Activate Auto-Read function for Head 2 starting at specified address
after CT-Present (the number of bytes read depends on the selected
buffer size minus bit headers for Head 2)
6th byte, bit 1...8 No. of bytes in input and output buffer which shall be used for
read/write head 1, see example on 16
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Function Description
Parametering, Parametering Bytes
Parametering Bytes The specification for the input and output buffer on the Master applies to both read/write
User-Parameter Bytes heads, i.e. this buffer must be divided for both heads. The specification is done in Hex
(continued) format and must be in a range between 02Hex and 80Hex (128 dec.).
☞ If only one read/write head (Head 1) will be used, you may enter the same value here as for the
total buffer size. An entry of less than 2 bytes results in an undefined state.
Please note the basic procedure on 14 and 29...35 and the examples on pages 36...53.
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Function Description
Processing data carriers
Reading and writing To carry out a read or write job, the Data carrier must be located in the active zone of the read/
write head.
A read/write job has the following sequence (see examples on 38ff):
1. The host sends to the output buffer:
– the command designator to subaddress 01Hex,
– the start address for reading or writing to subaddress 02HEX/03HEX,
– the number of bytes for reading or writing to subaddress 04HEX/05HEX,
– the CT bit in the bit header according to the Data carrier type (block size),
– and sets the AV bit in the bit header to high.
2. The processor:
– takes the request (AA bit in the bit header of the input buffer to high),
– begins to transport the data;
read = from data carrier to input buffer,
write = from output buffer to data carrier.
Larger data quantities are sent in blocks
(block size with 2nd bit header = buffer size – 2),
block size without 2nd bit header = buffer size – 1).
The toggle bits in the two bit headers are used as a kind of handshaking between the
host and the BIS C-60_2 processor.
3. The processor has processed the command correctly (AE bit in the bit header of the input
buffer). If an error occurred during execution of the command, an error number will be
written to subaddress 01Hex of the input buffer and the AF bit in the bit header of the input
buffer will be set.
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Function Description
Processing data carriers
Codetag Present As soon as the data carrier enters the active one of the read/write head, the processor indi-
cates this by setting the CP bit (Codetag Present).
☞ To accelerate the reading of small amounts of data, the ID system makes the first bytes of the
data carrier available in the input buffer of the respective read/write head as soon as the tag is
detected (30 bytes with 2nd bit header, 31 bites without 2nd bit header, or less if the buffer
size has been set smaller).
The data are only valid after the rising edge of the CP bit in the bit header of the input buffer.
They remain valid until the falling edge of the CP bit, or until the controller issues a new job.
Special To adjust the read/write functions to the numerous possible applications, a few unique fea-
characteristics tures have been implemented that the user can select and set when parametering or program-
ming the processor. These are as follows:
Auto-Read If the Auto-Read function is activated, the data are read as soon as a data carrier is recog-
nized. No command from the controller is required. Since there is an in- and output buffer for
each read/write head, the start address must be specified for each head using the command
designator 07Hex. The start addresses may be different. The number of bytes read is deter-
mined by the selected size of the input buffer, which is distributed over both heads when 2 are
used.
This distinguishes the Auto-Read function from the standard setting for automatic reading,
which always starts at Address 0 and includes a maximum number of 30 bytes with 2nd bit
header or 31 bytes without 2nd bit header (or les if the buffer size has been set smaller).
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Function Description
Processing data carriers
Reading and writing In normal operation a read/write job is rejected by the BIS C-60_2 processor by setting the AF
in dynamic mode bit and an error number if there is no data carrier in the active zone of the read/write head. If
dynamic mode is configured, the processor accepts the read/write job and stores it. When a
data carrier is recognized, the stored job is carried out.
Reading and writing Reading without simultaneous data transmission: In the case of a read job the proces-
with simultaneous sor first reads our all requested data from the data carrier after receiving the start address
data transmission and the desired number of bytes, and then sets the AE bit. Then the data read from the
data carrier are written to the input buffer. In the case of larger data amounts this is done in
blocks, controlled by the handshake with the toggle bits as described on 29.
Reading with simultaneous data transmission: In the case of a read job the processor
begins by transmitting the data into the input buffer as soon as the first 30 bytes (with 2nd
bit header, or 31 bytes without 2nd bit header, or less if the buffer size was set smaller)
have been read from the data carrier beginning with the start address, and indicates this
by inverting the TO bit. As soon as the controller inverts the TI bit, the processor sends the
data, which have in the meantime been read, to the input buffer. This is repeated until the
processor has read out all the desired data from the data carrier. Now the processor sets
the AE bit and outputs the remaining data on the input buffer.
Writing without simultaneous data transmission: In the case of a write job the proces-
sor waits until it has received all the data that need to be written from the controller. Only
then are the data written to the data carrier as described on 29.
Writing with simultaneous data transmission: In the case of a write job the processor
begins to write the data to the data carrier as soon as it has received the first data to be
written from the controller’s output buffer. Once all the data have been written to the data
carrier, the AE bit is set.
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Function Description
Processing data carriers
Mixed Data Access Small read/write programs can be stored in the BIS C-60_2 processor’s EEPROM.
The Mixed Data Access function is useful when the required information is stored on the
data carrier at various addresses. This function makes it possible to read out this “mixed”,
i.e. non-contiguously stored data from the data carrier in a single procedure and using just
one command.
Up to 10 programs with up to 25 instructions can be stored. Each program instruction con-
tains a “start address” and a “number of bytes” specification. The amount of data for reading
may not exceed 2 kB.
Storing a program:
The command identifier 06Hex is used to send the read/write program to the BIS C-60_2 pro-
cessor. One program per command can be stored. All 25 program records plus an additional
2 bytes with FFHexFFHex as a terminator must always be sent. This means a total of 104 bytes
of information per program must be sent (including the command identifier and program num-
ber).
☞ The individual program records must all be contiguous. They must be sent one after the other
and be terminated with 2 bytes FF HexFF Hex as a terminator. It is recommended that the remaining,
unused memory sector be filled with FFHexFF Hex.
If an address range is selected twice, the data will also be output twice.
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Function Description
Processing data carriers
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Function Description
Processing data carriers
Read from data The command identifier 21Hex can be used to read out the program records stored in the pro-
carrier, with program gram from the data carrier. The user must document exactly which data are to be read from
Mixed Data Access where and with what number of bytes for the respective program (see example 11 on 51).
Write to data carrier, The command identifier 22Hex can be used to write the program records stored in the pro-
with program Mixed gram to the data carrier. The user must document exactly which data are to be written from
Data Access where and with what number of bytes for the respective program (see example 12 on 52).
Copying from For a copy command there must be a data carrier in front of both read/write heads (even if
Head 1 to Head 2 dynamic mode is configured). Simultaneous data transmission is used to read (even if si-
multaneous data transmission is not configured). The total process is controlled with the
bit header(s) for Head 1. The start address and number of bytes applies both to reading at
Head 1 and to writing at Head 2. The copy command is in principle the same as reading
with simultaneous data transmission. In addition, the data which are placed in the input
buffer are written at the same time to the data carrier at Head 2.
The AE bit is not set until the write procedure at Head 2 has finished successfully. If the
GR bit is set during a started copy command, both read/write heads are placed in the
base state and the pending job is aborted (see example 8 on 45).
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Function Description
Processing data carriers
CRC initialization To be able to use the CRC check, the data carrier must first be initialized with the com-
mand identifier 12Hex (see 36). The CRC initialization is used like a normal write job. The
latter is rejected (with an error message) if the processor recognizes that the data carrier
does not contain the correct CRC. Data carriers as shipped from the factory (all data are 0)
can immediately be programmed with a CRC check.
If CRC_16 data checking is activated, a special error message is output to the interface
whenever a CRC error is detected.
If the error message is not caused by a failed write request, it may be assumed that one
or more memory cells on the data carrier is defective. That data carrier must then be re-
placed.
If the CRC error is however due to a failed write request, you must reinitialize the data car-
rier in order to continue using it.
The checksum is written to the data carrier as a 2-byte wide datum. Two bytes per page
are 'lost', i.e., the page size becomes 30 bytes or 62 bytes depending on data carrier type
(setup of page size see 17). This means that the actual usable number of bytes is re-
duced:
Data carrier type Usable bytes
128 bytes = 120 bytes
256 bytes = 240 bytes
511 bytes *) = 450 bytes
1023 bytes *) = 930 bytes
2047 bytes *) = 1922 bytes
2048 bytes = 1984 bytes
*) The last data carrier page for these EEPROM-
8192 bytes = 7936 bytes based data carriers is not available.
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Function Description
Examples for protocol sequence
Example No. 1 Initializing the Data carrier for the CRC_16 data checking
The processing of this command is similar to a write command. Start address and number
For configuring with of bytes have to correspond to the maximum number of data to be used.
double bit header In this example the complete memory range of a Data carrier with 128 bytes shall be used
and 8-byte buffer (BIS C-1_ _-03/L with 32 byte block size). Because 2 bytes are used for the CRC only
size! 120 bytes can be used as data bytes, hence: start address = 0, number of bytes = 120.
3.) Process subaddresses of the output buffer: 4.) Process subaddresses of the output buffer:
01...06 Hex Enter first 6 bytes of data 01...06 Hex Copy first 6 data bytes
00Hex /07Hex Invert TI-Bit Process subaddress of the input buffer:
00Hex /07Hex Invert TO-Bit
5.) Process subaddresses of the output buffer: 6.) Process subaddresses of the output buffer:
...To be continued 01...06 Hex Enter the second 6 data bytes 01...06 Hex Copy second 6 data bytes
until the complete 00Hex /07Hex Invert TI-Bit Process subaddress of the input buffer:
memory range is
00Hex /07Hex Invert TO-Bit
written. See next .
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Function Description
Examples for protocol sequence
01...06 Hex Enter the remaining data byte 01...06 Hex Copy the remaining data byte
For configuring with
double bit header 00Hex /07Hex Invert TI-Bit Process subaddress of the input buffer:
and 8-byte buffer 00Hex /07Hex Set AE-Bit
size!
9.) Process subaddresses of the output buffer: 10.)Process subaddresses of the input buffer:
00Hex /07Hex Reset AV-Bit 00Hex /07Hex Reset AA-Bit and AE-Bit
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Function Description
Examples for protocol sequence
Example No. 2 Read 17 bytes starting at data carrier address 10 (Data carrier type with 32 byte block size):
Host: BIS C-60_2 Identification System:
For configuring with
1.) Process subaddresses of the output buffer in the 2.) Process subaddresses of the input buffer in the
double bit header order shown: order shown:
and 8-byte buffer
01Hex Command designator 01Hex 00Hex /07Hex Set AA-Bit
size!
02Hex Start address Low Byte 0AHex 01...06 Hex Enter first 6 bytes of data
03Hex Start address High Byte 00Hex 00Hex /07Hex Set AE-Bit
04Hex No. of bytes Low Byte 11Hex
05Hex No. of bytes High Byte 00Hex
00Hex /07Hex CT-Bit to 0 (32 Byte block size),
set AV-Bit
3.) Process subaddresses of the input buffer: 4.) Process subaddresses of the input buffer:
01...06 Hex Copy first 6 data bytes 01...06 Hex Enter the second 6 data bytes
Process subaddress of the output buffer: 00Hex /07Hex Invert TO-Bit
00Hex /07Hex Invert TI-Bit
5.) Process subaddresses of the input buffer: 6.) Process subaddresses of the input buffer:
01...06 Hex Copy second 6 data bytes 01...05 Hex Enter the remaining 5 data bytes
Process subaddress of the output buffer: 00Hex /07Hex Invert TO-Bit
00Hex /07Hex Invert TI-Bit
7.) Process subaddresses of the input buffer: 8.) Process subaddresses of the input buffer:
01...05 Hex Copy the remaining 5 data bytes 00Hex /07Hex Reset AA-Bit and AE-Bit
Process subaddress of the output buffer:
00Hex /07Hex Reset AV-Bit
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Function Description
Examples for protocol sequence
Example No. 3 Read 17 bytes starting at data carrier address 10, with simultaneous data transmission
(like 2nd example (data carrier type with 32 byte block size):
but with
While the read job is being carried out and as soon as the input buffer is filled, the first data
simultaneous data
are sent. The AE bit is not set until the “Read” operation is completed by the processor.
transmission)
The reply “Job End” = AE bit is reliably set no later than before the last data are sent. The
For configuring with exact time depends on the requested data amount, the input buffer size and the timing of the
double bit header controller. This is indicated in the following by the note Set AE-Bit (in italics).
and 8-byte buffer
size! Host: BIS C-60_2 Identification System:
1.) Process subaddresses of the output buffer in the 2.) Process subaddresses of the input buffer in the
order shown: order shown:
01Hex Command designator 01Hex 00Hex /07Hex Set AA-Bit
02Hex Start address Low Byte 0AHex 01...06 Hex Enter first 6 bytes of data
03Hex Start address High Byte 00Hex 00Hex /07Hex Invert TO-Bit
04Hex No. of bytes Low Byte 11Hex 00Hex /07Hex Set AE-Bit
05Hex No. of bytes High Byte 00Hex
00Hex /07Hex CT-Bit to 0 (32 Byte block size),
set AV-Bit
3.) Process subaddresses of the input buffer: 4.) Process subaddresses of the input buffer:
01...06 Hex Copy first 6 data bytes 01...06 Hex Enter the second 6 data bytes
Process subaddress of the output buffer: 00Hex /07Hex Invert TO-Bit
00Hex /07Hex Invert TI-Bit 00Hex /07Hex Set AE-Bit
Continued on next .
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Function Description
Examples for protocol sequence
For configuring with 7.) Process subaddresses of the input buffer: 8.) Process subaddresses of the input buffer:
double bit header 01...05 Hex Copy the remaining 5 data bytes 00Hex /07Hex Reset AA-Bit and AE-Bit
and 8-byte buffer Process subaddress of the output buffer:
size!
00Hex /07Hex Reset AV-Bit
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Function Description
Examples for protocol sequence
Example No. 4 Read 30 bytes starting at data carrier address 10 with read error
(data carrier type with 64 byte block size):
For configuring with Host: BIS C-60_2 Identification System:
double bit header
and 8-byte buffer 1.) Process subaddresses of the output buffer in the 2.) Process subaddresses of the input buffer in the
size! order shown: order shown:
If an error occurs right away:
01Hex Command designator 01Hex
02Hex Start address Low Byte 0AHex 00Hex/07Hex Set AA-Bit
03Hex Start address High Byte 00Hex 01Hex Enter error number
04Hex No. of bytes Low Byte 1EHex 00Hex/07Hex Set AF-Bit
05Hex No. of bytes High Byte 00Hex
00Hex /07Hex Set CT-Bit to 1 (64 Byte block size),
set AV-Bit
3.) Process subaddress of the input buffer: 4.) Process subaddresses of the input buffer:
01Hex Copy error number 00Hex/07Hex Reset AA-Bit and AF-Bit
Process subaddress of the output buffer:
00Hex /07Hex Reset AV-Bit
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Function Description
Examples for protocol sequence
Example No. 5 Read 30 bytes starting at data carrier address 10, with read error and simultaneous data
(like 4th example transmission (data carrier type with 64 byte block size):
but with
simultaneous data If an error occurs, the AF bit is set instead of the AE-Bit, with a corresponding error number.
transmission) When the AF-BIT is set the job is interrupted and declared to be ended.
3.) Process subaddress of the input buffer: 4.) Process subaddresses of the input buffer:
☞ An error can also occur after the data have already been sent (see 6th example on the next ).
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Function Description
Examples for protocol sequence
Example No. 6 Read 30 bytes starting at data carrier address 10, with read error and simultaneous data
(with simultaneous transmission (data carrier type with 64 byte block size):
data transmission)
If an error occurs after data have started to be sent, the AF-Bit is set instead of the AE-Bit along
For configuring with with the corresponding error number. The error message AF is dominant. It cannot be specified
double bit header which data are incorrect. When the AF-Bit is set the job is interrupted and declared to be ended.
and 8-byte buffer
size! Host: BIS C-60_2 Identification System:
1.) Process subaddresses of the output buffer in the 2.) Process subaddresses of the input buffer in the
order shown: order shown:
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Function Description
Examples for protocol sequence
Example No. 7 Write 16 bytes starting at data carrier address 20 (data carrier type with 32 byte block size):
Host: BIS C-60_2 Identification System:
For configuring with
1.) Process subaddresses of the output buffer in the 2.) Process subaddresses of the input buffer in the
double bit header order shown: order shown:
and 8-byte buffer
size! 01Hex Command designator 02Hex 00Hex /07Hex Set AA-Bit, invert TO-Bit
02Hex /03Hex Start address 14 Hex / 00Hex
04Hex /05Hex No. of bytes 10Hex / 00 Hex
00Hex /07Hex CT-Bit to 0 (32 Byte block size),
set AV-Bit
3.) Process subaddresses of the output buffer: 4.) Process subaddresses of the output buffer:
01...06 Hex Enter the first 6 data bytes 01...06 Hex Copy the first 6 data bytes
00Hex /07Hex Invert TI-Bit Process subaddress of the input buffer:
00Hex /07Hex Invert TO-Bit
5.) Process subaddresses of the output buffer: 6.) Process subaddresses of the output buffer:
01...06 Hex Enter the second 6 data bytes 01...06 Hex Copy the second 6 data bytes
00Hex /07Hex Invert TI-Bit Process subaddress of the input buffer:
00Hex /07Hex Invert TO-Bit
7.) Process subaddresses of the output buffer: 8.) Process subaddresses of the output buffer:
01...04 Hex Enter the remaining 4 data bytes 01...04 Hex Copy the remaining 4 data bytes
00Hex /07Hex Invert TI-Bit Process subaddress of the input buffer:
00Hex /07Hex Set AE-Bit
9.) Process subaddresses of the output buffer: 10.)Process subaddresses of the input buffer:
00Hex /07Hex Reset AV-Bit 00Hex /07Hex Reset AA-Bit and AE-Bit
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Function Description
Examples for protocol sequence
3.) Process subaddresses of the input buffer: 4.) Process subaddresses of the input buffer:
01...06 Hex Copy the first 6 data bytes 01...06 Hex Enter the second 6 data bytes
Process subaddresses of the output buffer: 00Hex /07Hex Invert TO-Bit
00Hex /07Hex Invert TI-Bit
Continued on next .
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Function Description
Examples for protocol sequence
Example No. 8 5.) Process subaddresses of the input buffer: 6.) Process subaddresses of the input buffer:
(continued) 01...06 Hex Copy the second 6 data bytes 01...05 Hex Enter the remaining 5 data bytes
Process subaddresses of the input buffer: 00Hex /07Hex Invert TO-Bit
For configuring with 00Hex /07Hex Invert TI-Bit
double bit header!
7.) Process subaddresses of the input buffer: 8.) Process subaddresses of the input buffer:
01...05 Hex Copy the remaining 5 data bytes 00Hex /07Hex Set AE-Bit
Process subaddresses of the output buffer:
00Hex /07Hex Invert TI-Bit
9.) Process subaddresses of the output buffer: 10.)Process subaddresses of the input buffer:
00Hex /07Hex Reset AV-Bit 00Hex /07Hex Reset AA-Bit and AE-Bit
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Function Description
Examples for protocol sequence
Example No. 9 Programming start address 75 (data carrier type with 32 byte block size):
Address assignment
for the Auto-Read Host: BIS C-60_2 Identification System:
function 1.) Process subaddresses of the output buffer in the 2.) Process subaddresses of the input buffer:
order shown:
For configuring with 01Hex Command designator 06Hex 00Hex /07Hex Set AA-Bit and AE-Bit
double bit header
02Hex Start address Low Byte 488ex
and 8-byte buffer
size! 03Hex Start address High Byte 008ex
00Hex /07Hex CT-Bit to 0 (32 byte block size),
set AV-Bit
3.) Process subaddresses of the output buffer: 4.) Process subaddresses of the input buffer:
00Hex /07Hex Reset AV-Bit 00Hex /07Hex Reset AA-Bit and AE-Bit
☞ To ensure correct data output, use command identifier 07Hex for each distributed buffer Head 1
and/or Head 2.
If the Auto-Read function is not activated, the processor runs in standard mode and sends
starting with data carrier address 0 until the buffer is filled, but a maximum of 30 bytes for
double bit header or 31 bytes for a single bit header.
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Function Description
Examples for protocol sequence
01Hex Command designator 06Hex 00 Hex/07 Hex Set AA-Bit, invert TO-Bit
02Hex Program number 01Hex
00Hex /07Hex CT-Bit to 0 or 1
(depending on block size),
set AV-Bit
3.) Process subaddresses of the output buffer: 4.) Process subaddresses of the input buffer:
01Hex 1st start address (Low Byte) 05 Hex 00 Hex/07 Hex Invert TO-Bit
02Hex (High Byte) 00 Hex
03Hex 1st number of (Low Byte) 07 Hex
04Hex bytes (High Byte) 00 Hex
05Hex 2nd start address (Low Byte) 4B Hex
06Hex (High Byte) 00 Hex
00Hex /07Hex Invert TI-Bit
Continued on next .
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Function Description
Examples for protocol sequence
7.) Process subaddresses of the output buffer: 8.) Process subaddresses of the input buffer:
Fill all unused start addresses and number of bytes with FFHex ! Continued on next .
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Function Description
Examples for protocol sequence
00Hex /07Hex Reset AV-Bit 00Hex /07Hex Reset AA-Bit and AE-Bit
☞ We recommend that you carefully document which parameters are used for start addresses and
number of bytes for writing/reading the desired data records.
The data are sequenced in the exact order specified in the program.
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Function Description
Examples for protocol sequence
Example No. 11 Read data carrier using Program No. 1 (data carrier type with 32 byte block size):
Use Mixed Data
Access program Host: BIS C-60_2 Identification System:
1.) Process subaddresses of the output buffer in the 2.) Process subaddresses of the input buffer in the
order shown: order shown:
For configuring with
01Hex Command designator 21Hex 00Hex /07Hex Set AA-Bit
double bit header
and 8-byte buffer 02Hex Program number 01Hex 01...06 Hex Enter first 6 bytes of data
size! 00Hex /07Hex CT-Bit to 0 (32 byte block size), 00Hex /07Hex Set AE-Bit
set AV-Bit
3.) Process subaddresses of the input buffer: 4.) Process subaddresses of the output buffer:
01...06 Hex Copy first 6 data bytes 01...06 Hex Enter the second 6 data bytes
Process subaddress of the output buffer: 00Hex /07Hex Invert TO-Bit
00Hex /07Hex Invert TI-Bit
☞ Dynamic mode is turned off while the Mixed Data Access program is being run.
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Function Description
Examples for protocol sequence
Example No. 12 Write data carrier using Program No. 1 (data carrier type with 32 byte block size):
Use Mixed Data
Access program Host: BIS C-60_2 Identification System:
1.) Process subaddresses of the output buffer in 2.) Process subaddresses of the input buffer in the
the order shown: order shown:
For configuring with
double bit header 01Hex Command designator 22Hex 00Hex /07Hex Set AA-Bit, invert TO-Bit
and 8-byte buffer 02Hex Program number 01Hex
size! 00Hex /07Hex CT-Bit to 0 (32 byte block size),
set AV-Bit
3.) Process subaddresses of the output buffer: 4.) Process subaddresses of the output buffer:
01...06 Hex Enter first 6 bytes of data 01...06 Hex Copy the first 6 data bytes
00Hex /07Hex Invert TI-Bit Process subaddress of the input buffer:
00Hex /07Hex Invert TO-Bit
☞ Dynamic mode is turned off while the Mixed Data Access program is being run.
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Function Description
Examples for protocol sequence
Example No. 13 Put the relevant read/write head into ground state:
Both read/write heads can be independently set to the ground state.
3.) Process subaddresses of the output buffer: 4.) Process subaddresses of the input buffer:
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Read/Write Times
Example: 17 bytes from address 187 have to be written. Data carrier with 32 bytes per block.
The blocks 5 and 6 will be processed since the start address 187 is in block 5 and the end
address 203 in block 6.
t = 2 * 120 + 17 * 10 = 410 ms
☞ The indicated times apply after the Data carrier has been recognized. If the Data carrier is not
yet recognized, an additional 45 ms for building the required energy field until the Data carrier is
recognized must be added.
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Read/Write Times
Read times from Read times within the 1st block for dual read and compare:
Data carrier to
processor in The indicated times apply after the Data carrier has been recognized. If the Data carrier is not
dynamic mode yet recognized, an additional 45 ms for building the required energy field until the Data carrier is
(parametering: recognized must be added.
2nd byte, bit 5 = 1,
without CRC_16 data
check) Data carrier with 32 byte blocks Data carrier with 64 byte blocks
No. of bytes Read time [ms] No. of bytes Read time [ms]
from 0 to 3 14 from 0 to 3 14
for each additional for each additional
byte add 3.5 byte add 3.5
from 0 to 31 112 from 0 to 63 224
Formula: t = (m + 1) * 3.5 ms
Example: Read 11 bytes starting at address 9, i.e. the highest address to be read is 19.
This corresponds to 70 ms.
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LED Display
Function displays The BIS C-60_2 uses the three side-mounted LED's to indicate important conditions of the
on BIS C-60_2 identification system.
Status LED Meaning
If all three LED's are synchronously flashing, it means a hardware error. Return the unit to the factory.
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BIS C-6002
Mounting Head / Processor
Orientation of the Depending on model, the processor is equipped with a read/write head or the adapter for
read/write head or offset read/write heads. Both the read/write head and the adapter can be rotated by the user
adapter by + or –90 deg. to the desired
position (see drawing). Be sure Caution: wires inside!
that power is off first. Loosen
both screws (indicated with
arrows). Carefully pull the head
or adapter out towards the side
(direction of arrow, right draw-
ing).
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BIS C-6002
Opening the Processor
Opening the The BIS C-6002 processor must be opened to perform the following steps:
Processor
– Set PROFIBUS-DP address
BIS C-6002
– Activate/deactivate termination resistor
– Set/change compatibility mode
– Replace EEPROM
– Make electrical connections (supply voltage, in-/output,
PROFIBUS-DP connections).
Remove the 4 screws on the BIS C-6002 and lift off the
cover.
Perform the desired action. To make the electrical connec-
tions, push the cables through the fittings. For additional
wiring details, see the following .
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BIS C-6002-...-KL2
Installing the connection cables
Make connections The BIS C-6002 processor must be opened in order to make the connections for the supply
on the BIS C-6002 voltage, the digital input and the PROFIBUS connections (see 58).
processor
First be sure that the unit is disconnected from power.
Remove the 4 screws on the BIS C-6002 and lift off the cover.
Guide the two PROFIBUS cables through the PG 11 fittings (see 60). For additional infor-
mation on wiring, see the following .
Push the cable for supply voltage and for the digital input through the PG 9 fitting.
Close up the processor.
If the processor is equipped with an adapter:
– BIS C-650: Connect the read/write heads to terminals Head 1 and Head 2.
– BIS C-670: Connect the read/write head to terminal Head 1.
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BIS C-6002-...-KL2
Mounting the PG Connection for PROFIBUS-DP
Connecting the After connecting the (field) bus leads to the termional block, make sure that the shield has
shield of the proper connection to the PG housing.
PROFIBUS-DP cable
in the PG 11 housing
on the processor
BIS C-6002
Screw socket
Inside O-ring
Screw the
swivel nut
with a torque
of 4.17 Nm
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BIS C-6002-...-KL2
Interface Information / Wiring Diagrams
Remote bus cable To insert BIS C-6002 processor into the serial PROFIBUS, terminals 1and 2 and 5 and 6 for
and interfaces for the PROFIBUS-DP interface are located on the terminal block ("incoming" and "outgoing").
PROFIBUS-DP Bus station BIS C-6002
Bus station Bus station
Terminal
block
green red
red green
In case the processor is the last bus module in the chain, then only the incoming cable is con-
nected. You can either use the connections 1 and 2 or 5 and 6.
The last bus module must terminate the bus with a resistor. In the case of the BIS C-6002, this
can be realized in two different ways:
1. In the device S2 Terminating resistor
by closing the switch S2 closed active
(factory standard is open) open passive
2. Outside the device in a plug. In this case the signals VP (terminal 4) and DGND (terminal 3)
should be brought out in order to connect the external resistor to the potential.
Note: In this case S2 has to be open!
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BIS C-6002-...-KL2
Interface Information / Wiring Diagrams
13 12 11 10 9 8
INPUT OUTPUT
01 = CT Present 1
02 = CT Present 2
Terminal 19 18 17 16 15 14
block
+VS –VS TxD RxD GND
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BIS C-6002-...-KL2
Interface Information / Wiring Diagrams
Wiring diagram
7 6 5 4 3 2 1
for BIS C-6002
processors with
DGND A B VP DGND A B
adapter BIS C-650
PROFIBUS-DP
13 12 11 10 9 8
INPUT OUTPUT
01 = CT Present 1
02 = CT Present 2
19 18 17 16 15 14
Terminal
+VS –VS TxD RxD GND
block
POWER RS 232
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BIS C-6002-...-KL2
Interface Information / Wiring Diagrams
13 12 11 10 9 8
INPUT OUTPUT
01 = CT Present 1
02 = CT Present 2
19 18 17 16 15 14
POWER RS 232
Terminal
block Terminal block connections
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BIS C-6002-...-ST11
Interface Information / Wiring Diagrams
Remote bus cable To insert BIS C-6002-...-ST11 processor into the serial PROFIBUS-DP, there are the terminal
for PROFIBUS-DP X2 for the PROFIBUS input and the terminal X3 for the PROFIBUS output.
Bus station Bus station BIS C-6002-...-ST11 Bus station
1 VP VP 1
green green
A 2A A 2 A
3 DGND DGND 3
red red
B 4B B 4 B
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BIS C-6002-...-ST11
Interface Information / Wiring Diagrams
Wiring diagram for Connection for Read/Write Head 1 X1, supply voltage, digital input
BIS C-6002-...-ST11 Connection for
processor with Read/Write Head 1 4 3
Pin Function
adapter BIS C-650
1 +Vs
5 2 –IN
3 –Vs
1 2 4 +IN
5 n.c.
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BIS C-6002-...-ST11
Interface Information / Wiring Diagrams
Wiring diagram for Connection for X1, supply voltage, digital input
BIS C-6002-...-ST11 Read/Write Head
processor with BIS C-355/...S92
adapter BIS C-654 4 3 Pin Function
1 +Vs
2 –IN
5
3 –Vs
4 +IN
1 2
5 n.c.
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BIS C-6002-019-655-03-ST11
Interface Information / Wiring Diagrams
Wiring diagram Connection for Read/Write Heads 1.1/1.2 X1, supply voltage, digital input
for BIS C-6002 Connection for
processors with Read/Write Heads 2.1/2.2
adapter BIS C-655 4 3 Pin Function
(2 × 2 heads) 1 +Vs
2 –IN
5
3 –Vs
4 +IN
1 2
5 n.c.
5 5 2 A
3 DGND
4 B
1 2 2 1
5 n.c.
Function ground
n.c. = do not connect
FE
Supply voltage,
☞
PROFIBUS-DP
digital input
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BIS C-6002
Changing the EEPROM
Changing the To replace the EEPROM, open up the processor as described on 58.
EEPROM in the
BIS C-6002
processor
Location of the
EEPROM
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BIS C-6002
Technical Data
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BIS C-6002
Technical Data
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BIS C-6002
Technical Data
The CE-Mark is your assurance that our products are in conformance with the
EU Directive
2004/108/EC (EMC-Guideline)
and the EMC Law. Testing in our EMC Laboratory, which is accredited by the DATech for
Testing of Electromagnetic Compatibility, has confirmed that Balluff products meet the
EMC requirements of the Generic Standard
EN 61000-6-4 (Emission) and EN 61000-6-2 (Noise Immunity).
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BIS C-6002
Ordering Information
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BIS C-6002
Ordering Information
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BIS C-6022
Mounting Processor
ca. 15
X1
X2
160
145
X3
ca. 15
X4
60 ca. 20 63
100
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BIS C-6022
Opening the processor / Interface information
Opening the To set the PROFIBUS-DP address, activate or deactivate the internal termination resistor, set
BIS C-6022 the compatibility mode or to change the EEPROM, you must open up the BIS C-6022 proces-
processor sor.
Remove the 4 screws on the BIS C-6022 and lift off the cover. See the following for addi-
tional information.
PROFIBUS-DP X2
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BIS C-6022
Interface Information / Wiring Diagrams
To insert BIS C-6022 processor into the serial PROFIBUS and to connect the supply voltage
and the digital input, the cables have to be connected to the terminals of the processor. For
more details regarding the wiring see the following . The read/write heads have to be con-
nected to the to terminals Head 1 and Head 2.
2. Outside the device in a connector. In this case the signal VP and DGND should be brought
out in order to connect the external resistor to the potential.
Note: In this case the S2 switch has to be open!
Connect cable for the supply voltage, the digital input, and the outputs to terminal X1.
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BIS C-6022
Interface Information / Wiring Diagrams
Remote bus cable To insert BIS C-6022 processor into the serial PROFIBUS-DP, there are the terminal X2 for the
for PROFIBUS-DP PROFIBUS output and the terminal X3 for the PROFIBUS input.
BIS C-6022-...-ST10
Bus station Bus station BIS C-6022-...-ST10 Bus station
green green
red red
BIS C-6022-...-ST14 Bus station Bus station BIS C-6022-...-ST14 Bus station
1 VP VP 1
green green
A 2A A 2 A
3 DGND DGND 3
red red
B 4B B 4 B
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BIS C-6022-...-ST10
Interface Information / Wiring Diagrams
Wiring diagram for Head 2 Head 1 X1, supply voltage, digital input, and
BIS C-6022-...-ST10 CT Present outputs
processor Pin Function
1 +Vs
2 CT Present 2
1
3 –Vs
2
3
4 +IN
X1 4
5
6
7
8 5 CT Present 1
S1
Head 1
X2, PROFIBUS output Pin Function
X3, PROFIBUS input 1 DGND
X2 2 A
Head 2
3 n.c.
4 B
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
5 n.c.
S2
X3 6 VP
7 +24 V
8 GND
9
10 ... 12 n.c.
X4, Service interface
X4
4
☞
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BIS C-6022-...-ST14
Interface Information / Wiring Diagrams
Wiring diagram for Head 2 Head 1 X1, supply voltage, digital input
BIS C-6022-...-ST14
processor 4 3 Pin Function
1 +Vs
2 –IN
5
3 –Vs
1
2
3 4 +IN
X1 4
5
6
7
1 2
5 n.c.
8
S1
Head 1
X2, PROFIBUS X3, PROFIBUS
X2 input (male) output (female)
Head 2
4 3 3 4 Pin Function
1 VP
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
S2 5 5 2 A
X3 3 DGND
4 B
1 2 2 1
5 n.c.
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BIS C-6022
Changing the EEPROM
Changing the To change the EEPROM, open the processor as described on 76.
EEPROM in the
BIS C-6022
processor
Be sure before opening that the unit is
disconnected from power. Head 2 Head 1
S1
Head 1
X2
Head 2
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
S2
X3
Location of the
EEPROM X4
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BIS C-6022
Technical Data
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BIS C-6022
Technical Data
The CE-Mark is your assurance that our products are in conformance with the
EU Directive
2004/108/EC (EMC-Guideline)
and the EMC Law. Testing in our EMC Laboratory, which is accredited by the DATech for
Testing of Electromagnetic Compatibility, has confirmed that Balluff products meet the
EMC requirements of the Generic Standard
EN 61000-6-4 (Emission) and EN 61000-6-2 (Noise Immunity).
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BIS C-6022
Ordering Information
Accessory Type Ordering code for ST10 Ordering code for ST14
(optional,
not included) Mating connector for X1 BKS-S 79-00 BKS-S 79-00
for X2 BKS-S 86-00 BKS-S103-00
for X3 BKS-S 86-00 BKS-S105-00
for X4 BKS-S 10-3 BKS-S 10-3
Protective cap for Head_, X4 BES 12-SM-2 BES 12-SM-2
Protective cap 115 475 for X2 BKS 12-CS-01 for X3
Termination BKS-S105-R01 for X3
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