Protection Control Journal: Capacitor Bank
Protection Control Journal: Capacitor Bank
Protection Control Journal: Capacitor Bank
Protection
35 Implementation and Performance of Synchrophasor
Function within Microprocessor Based Relays
Page 19 47 Application of Modern Relays to
Dual-Breaker Line Terminals
D90Plus
- Advanced Line Distance Protection
C70
- Dedicated Capacitor Bank Protection
g Multilin www.GEMultilin.com
Protection
Contents
& Control Journal December 2007
Pg 7
Transmission Line Protection Principles
Pg 19
Fundamentals of Adaptive Protection of Large
Capacitor Banks
Pg 35
Implementation and Performance of Synchrophasor
Function within Microprocessor Based Relays
Pg 47
Application of Modern Relays to Dual-Breaker Line Terminals
Pg 61
A Utility’s Experience in the Implementation of
Substation Automation Projects
Pg 69
Wireless Radio Application Guide
Pg 79
Protection Basics: Symmetrical Components
Pg 82
Industry Innovations
Pg 87
Upcoming Events
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Copyright © 2007 GE Multilin. All rights reserved.
ISSN 1718-3189
unmatched...
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1. Introduction
Transmission lines are a vital part of the electrical distribution
system, as they provide the path to transfer power between
generation and load. Transmission lines operate at voltage levels
from 69kV to 765kV, and are ideally tightly interconnected for
reliable operation.
There are two methods to account for the phase shift between The other common issue is pulse asymmetry of the carrier signal.
line terminals due to the communications channel delay. One Carrier sets may extend, either the mark (on) or space (off) signals
method is to measure the round-trip channel delay, and shift at the receiving end compared with the originally sent signal.
the local current phase by an angle equal to ½ of the round-trip This difference is measured during commissioning by using
delay time. This method is simple to implement, but creates a oscillography data, and simply entered as a setting in the phase
transient error when the communications channel is switched. comparison element.
In addition, the differential element will be temporarily blocked
when the communications channel switches, or noise in the In addition, the L60 supports some other methods to improve
communications channel causes communications packet loss. the reliability of protection communications. For short lines with
negligible charging current, the channel delay measurement can
The L90 Line Differential Relay employs a different method, be automated by running a loop-back test during normal system
using synchronous sampling by internally synchronizing the conditions and measuring the difference between the sent and
clocks on each L90. This method achieves high reliability, as the received pulses. The L60 also supports automated check-back of
round-trip channel delay is not vitally important. The differential the carrier system. Under normal conditions, the relay can initiate
element successfully operates during channel switching or after transmission of and modulate the analog signal to exchange small
packet loss, because the communications packets are precisely amounts of information. This automatic loop-back can replace
synchronized. the carrier guard signal, and more importantly, verifies the entire
communications path, including the relays on both ends.
In the L90, synchronization is accomplished by synchronizing the
clocks to each other rather than to a master clock. Each relay 3.3 Security for Dual-Breaker Terminals
compares the phase of its clock to the phase of the other clocks
and compares the frequency of its clock to the power system Dual-breaker terminal line terminals, such as breaker-and-a-half
frequency and makes appropriate adjustments. The frequency and ring bus terminals, are a common design for transmission
and phase tracking algorithm keeps the measurements at lines. The standard practice is to sum the currents from each
all relays within a plus or minus 25 microsecond error during circuit breaker externally by paralleling the CTs, and using this
normal conditions for a 2 or 3 terminal system. In all cases, an external sum as the line current for protection relays. This practice
estimate of phase error is computed and used to automatically
adapt the restraint region of the differential element. The time
synchronization algorithm can also use a GPS satellite clock to Relay 1 Relay 2
f f
compensate for channel asymmetry. The use of a GPS clock is not +
System
Frequency +
normally required, except in applications such as a SONET ring
where the communications channel delay may be asymmetric. Compute
Frequency
- - Compute
Frequency
f - f1 Deviation f1 f2 Deviation f - f2
When current flows through a dual-breaker line terminal, the line The dual-breaker line terminal supervisory logic essentially
current measured by a relay using external summation matches determines if the current flow through each breaker is either
the actual line current only if the two CTs are accurate. The most forward or reverse. Both currents should be forward for an internal
significant relaying problem is CT saturation in either CT. The current fault, and one current should be forward and one reverse for an
measured by the relay may contain a large error current, which external line fault. The supervisory logic uses, on a per-phase
can result in the relay operating due to an incorrect magnitude or basis, a high-set fault detector (FDH), typically set at 2-3 times the
direction decision. This incorrect operation may also occur if the nominal rating of the CT, and a directional element for each CT
linear error current of the CTs due to accuracy class is close to the input to declare a forward fault, for each breaker. The logic also
through current level. These errors appear in the measured phase uses, on a per-phase basis, a low-set fault detector (FDL), typically
currents. As a result, relays that calculate the negative sequence set at 1.5-2 times the nominal rating of the CT, and a directional
and zero sequence currents from the measured phase currents element to declare a reverse fault, for each breaker.
may also see errors.
Tripping is permitted during all forward faults, even with weak
Distance: Distance relays applied at dual-breaker line terminals infeed at the dual-breaker terminal. Tripping is blocked for all
are vulnerable to mis-operation on external faults. During a close- reverse faults when one breaker sees forward current and one
in reverse external fault, the voltage is depressed to a very low breaker sees reverse current. During an evolving external-to-
level, and the security of the relay is maintained by directional internal fault, tripping is initially blocked, but when the second
supervision. If one of the line CTs saturates, the current measured fault appears in the forward direction, the block is lifted to permit
by the relay may increase in magnitude, and be in the opposite tripping.
direction of the actual fault current, leading to an incorrect
operation of the forward distance element for an external fault. Line Differential: Line differential protection is prone to tripping
due to poor CT performance on dual-breaker terminals, as the
The D90Plus Line Protection System and the D60 Line Distance error current from the CTs is directly translated into a differential
Relay handles the challenge of dual-breaker line terminals by current. The only possible solution for traditional line differential
supporting two three-phase current inputs to support breaker relays is to decrease the sensitivity of the differential element,
failure, overcurrent protection, and metering for each circuit which limits the ability of the differential element to detect low
breaker. The relays then mathematically add these currents magnitude faults, such as highly resistive faults.
together to form the total line current used for distance and
directional overcurrent relaying. The L90 Line Differential Relay supports up to four three-phase
current inputs for breaker failure, overcurrent protection, and
Directly measuring the currents from both circuit breakers allows metering for each circuit breaker. The relay then uses these
the use of supervisory logic to prevent the distance element individual currents to form the differential and restraint currents
and directional overcurrent elements from operating incorrectly for the differential protection element.
for reverse faults due to CT error. This supervisory logic does
CT 1 saturates
i2 is reduced 10 - 15 pu
i2 i
IF + ILine IF + ILine
2 >0.1 pu error with
> 0.1 pu error
CT 1 CT 1 iLine shows incorret
magnitude, direction
iLine iLine Id > 0.2 pu
52 52 52 >0.2 pu error 52
Ir = 10 - 15 pu
Relay Relay Relay L90 NO TRIP
ILine ILine
10 - 15 pu 10 - 15 pu
Id > 0.2 pu
IF IF Ir > 0.2 pu
52 52 52 503 TRIP 52 503
10 - 15 pu
with
CT 2 CT 2 > 0.1 pu error
i1 i1 >0.1 pu error
Figure 3. Figure 4.
Impact of CT saturation on two-breaker line applications Sensitivity of line differential system for dual-breaker applications.
a) Accurate CTs preserve the reverse line current direction under weak
remote feed.
b) Saturation of the CT carries the reverse current may invert the line
current as measured from the externally summated CTs.
The information sent by one L90 to the other L90s on the line is I DIFF I LOC I REMOTE 1 I REMOTE 2
the local differential and restraint currents. The local differential
current is the sum of all the local currents on a per-phase basis. I REST 2 I LOC _ RESTRAINT 2 I REM 1 _ RESTRAINT 2 I REM 2 _ RESTRAINT 2
One L90 can accept up to 4 current measurements, but only 2
currents are used for a dual-breaker application. Considering the worst case external fault with CT saturation, the
differential current IDIFF will increase due to the CT error that
I LOC I 1 I 2 I 3 I 4 appears in ILOC. However, the restraint current IREST will increase
more significantly, as the ILOC_RESTRAINT uses the maximum of
The local restraint current is defined by the following equation for the local currents, that is increased based on the estimation of CT
each phase. errors and presence of CT saturation. The end result is a correct
restraining of the differential element.
I LOC _ RESTRAINT I LOC _ REST _ TRAD MULT I
2
LOC _ ADA 2
Phase Comparison: The L60 Line Phase Comparison Relay
supports two three-phase current inputs for breaker failure,
The starting point for the restraint is the locally measured overcurrent protection, and metering for each circuit breaker. The
current with the largest magnitude. This ensures the restraint is relay then uses these individual currents to form the local phase
based on one of the measured currents for all fault events, and angle information for use in the phase comparison scheme.
increases the level of restraint as the fault magnitude increases.
A phase comparison relay operates by comparing the relative
ILOC_REST_TRAD is this maximum current magnitude applied
phase angles of the current from each end of the transmission line.
against the actual differential characteristic settings. ILOC_ADA is
When the measured current exceeds the level of a fault detector,
the sum of the squares estimate of the measurement error in the
and the phase angles from each end of the line are in phase, the
current, and is used to increase the restraint as the uncertainty of
phase comparison relay operates. For a dual-breaker application
actual measurement increases, such as during high magnitude
using an external sum, the saturation of one CT may cause the
fault events and CT saturation. MULT is an additional factor that
relay current to increase high enough to operate the fault detector.
increases the error adjustment of the restraint current based
Because the current from the unsaturated CT predominates in this
on the severity of the fault event and the likelihood the fault is
waveform, the phase angle of the relay current may change. If the
an external fault, when CT saturation is most likely to cause an
phase angle of the relay current is in phase with the relay current
incorrect operation.
at the remote end of the line, the relay will trip.
CT 1 CT 1
52 52
52 52
CT 2 CT 2
Figure 5.
Redundancy Requirements - Alternate main protection possibilities from GE Multilin.
Alternative D30-N00-HCH-F8L-H6P-MXX-PXX-UXX-WXX
V S
3Y 67P 67N 25 79
2
V S
Alternative D60-N00-HCH-F8L-H6P-MXX-PXX-UXX-WXX
21P 21G 67P 67N 50BF D90P-A-E-S-S-01-S-S-S-X-H-X-A-X-A-X-X-01-X
3 3 + Additional functions Included in typical
V S 25 79 No 50BF in D30
+ Synchrophasors D60-N06-HCH-F8L-H6P-MXX-PXX-UXX-WXX
D90P-A-E-S-S-01-P-S-S-X-H-X-A-X-A-X-X-01-X
Synchrophasors
52
Phasor Measurement Unit
+ Synchrophasors D90P-A-E-S-S-01-P-S-S-X-H-X-A-X-A-X-X-01-X
D60-N06-HCH-F8L-H6P-MXX-PXX-UXX-WXX
G.703 D60-N00-HCH-F8L-H6P-M8L-PXX-UXX-W7S
C37.94 D60-N00-HCH-F8L-H6P-M8L-PXX-UXX-W77
+ Synchrophasors D90P-A-E-S-S-01-P-S-S-X-H-X-A-X-A-X-X-01-X
3Y 21P 21G 67P 67N 50BF D60-N06-HCH-F8L-H6P-M8L-PXX-UXX-WXX
3 3 2 External electrical sum of D60-N00-HCH-F8L-H6P- MXX-PXX-UXX-WXX
V S 25 79 85 breaker currents (traditional
2 method)
G.703 D60-N00-HCH-F8L-H6P-M8L-PXX-UXX-W7S
C37.94 D60-N00-HCH-F8L-H6P-M8L-PXX-UXX-W77
+ Synchrophasors L90-N00-HCH-F8L-H6P-LXX-NXX-SXX-UXX-W7K
G.703 L90-N00-HCH-F8L-H6P-LXX-NXX-SXX-UXX-W7S
C37.94 L90-N00-HCH-F8L-H6P-LXX-NXX-SXX-UXX-W77
+ Synchrophasors
52 L90-N08-HCH-F8L-H6P-LXX-NXX-SXX-UXX-W7W
52
87
3Y PC 67P 67N 50BF
Identical relay
2
on other line
21P 21G 25 79 85 terminals
3 3
0925-v5
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From the protective relaying perspective, however, capacitor banks The presented methods also facilitate auto-setting and self-
are historically considered a relatively low-volume market, and tuning applications. Auto-setting is an operation of calculating
therefore, did not encourage development of advanced protective new accurate relay constants to account for the inherent bank
relays dedicated to capacitor banks. Quite often protection unbalances following the bank repair, and is performed in response
for SCBs is provided by general-purpose multi-function relays, to the user’s request and under user supervision. Self-tuning is an
with only a very few products on the market offering protection operation of constantly self-adjusting the balancing constants in
functions specifically tailored to capacitor bank protection. order to maintain optimum sensitivity of protection when the bank
The utility relay engineer has generally needed to combine the reactances change slowly in response to seasonal temperature
functionality of multiple relays and customize their programming variations and other conditions. The self-tuning applications
to provide the necessary protective system that will avoid false require monitoring the total changes in the balancing constants
tripping for system disturbances and obtain the sensitivity for in order to detect slow failure modes, and account for a series of
detecting capacitor CAN faults and minimizing damage. small changes that do not trigger alarms on their own.
The SCBs are assembled out of individual cans that are highly
repairable. The need for advanced protection functions is 2. Capacitors
particularly visible when SCBs are operated under conditions
where one or more capacitor cans are temporarily removed but Protection engineering for shunt capacitor banks requires
the bank is returned to service pending completion of repairs. knowledge of the capabilities and limitations of the capacitor unit
However, continuous operation and repairs if needed can be done and associated electrical equipment including individual capacitor
only if the bank is protected by a reliable and sensitive relay. This in unit, bank switching devices, fuses, location and type of voltage
turn, can be accomplished by deploying protection principles that and current instrument transformers.
are developed assuming an inherent unbalance in the protected
bank.
An individual fuse, externally mounted between the capacitor unit The fuseless design is usually applied for applications at or above
and the capacitor bank fuse bus, protects each capacitor unit. 34.5kV where each string has more than 10 elements in series to
The capacitor unit can be designed for a relatively high voltage ensure the remaining elements do not exceed 110% rating if an
because the external fuse is capable of interrupting a high-voltage element in the string shorts.
fault. However, the kilovar rating of the individual capacitor unit is
usually smaller because a minimum number of parallel units are 2.4 Unfused Capacitors
required to allow the bank to remain in service with a capacitor
can out of service. A SCB using fused capacitors is configured Contrary to the fuseless configuration, where the units are
using one or more series groups of parallel-connected capacitor connected in series, the unfused shunt capacitor bank uses a
units per phase, as shown in Figure 2. series/parallel connection of the capacitor units. The unfused
approach would normally be used on banks below 34.5kV, where
2.2 Internally Fused Capacitors series strings of capacitor units are not practical, or on higher
voltage banks with modest parallel energy. This design does not
Each capacitor element is fused inside the capacitor unit. A require as many capacitor units in parallel as an externally fused
“simplified” fuse is a piece of wire sized to melt under the fault bank.
current, and encapsulated in a wrapper able to withstand the
heat produced by the arc during the current interruption. Upon the
capacitor failure, the fuse removes the affected element only. The 3. Configurations of Shunt Capacitor
other elements, connected in parallel in the same group, remain in
service but with a slightly higher voltage across them. Banks
Figure 3 illustrates a typical capacitor bank utilizing internally Protection of shunt capacitor banks requires an understanding
fused capacitor units. In general, banks employing internally of the basics of capacitor bank design and capacitor unit
Figure 1. Figure 2.
Capacitor unit. Externally fused shunt capacitor bank and capacitor unit.
Figure 3. Figure 4.
Internally fused shunt capacitor bank and capacitor unit. Fuseless shunt capacitor bank and series string.
VOP ( §§A) V
V (¨
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for ungrounded banks © (1d) C ¹
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22 Fundamentals of Adaptive Protection of Large
n 2 n
V V k nVT VT 2 V V nVTX VTX k 1
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VOP ( A) VOP ( A) V1 A k A VT21
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Figure 6.
two taps can be compared between two parallel banks, etc.
Compensated bank neutral overvoltage application.
§ 1 1 1 · VA VB VC
VX ¨¨ ¸¸ 0
Z
© A Z B Z C ¹ Z A Z B Z C
Fundamentals of Adaptive Protection of Large Capacitor Banks 23
A ¨©
V X ¨V ¸¸ ¹ 0
© Z2 AA Z B Z C ¹ Z A Z A Z A Z B Z A Z C Z A
§ Z Z · § Z · § Z ·
VVXVA ¨¨ 1§¨VX1 AV1B VA1X¸¸·¸3V1CV0VVVXBV ¨¨1V AV¸¸ §¨V1C ¨¨11·¸ AV ¸¸ §¨ 01 1 ·¸ 0
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B ¹ ¨ Z B © Z A ¸Z C ¹ ¨ Z C
B the inherent C saturation ¸of the relay input – the function shall be blocked in this
bankZunbalance: © ¹ ZA ¹
B C ¹ C ©case under external faults either by time delay or explicit logic in
order to cope with the spurious unbalance caused by saturation
§ ZZ ZX · Z § ZXA · § Z · of the VX measurement. In any case, one shall observe the thermal
k XAB ¨¨1 § A1A |
V 10 ·VB V¨¨A1A|
A1A¸¸ , 3k VAC VA¸¸B VCV C¨¨1 A ¸¸ 0 (4) withstand rating of the relay input when selecting relatively low-
¨
V©X ¨Z BB XC B¹
Z Z ¸
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Z
ratio VT for the measurement of the VX signal.
© ZA ZB ZC ¹ ZA ZB ZC
allows Zre-writing
X the balance
Z A Xequation (3e) into the following When written for secondary voltages the key operating equation
k 1A | A , k AC | A
§B 1 B AB 1 C· xVCA V0B BVC VBAB VB C V 1 k ACV becomes:
VAB Z signal:
operating
OP 1X k k Z VX 3 V V 1 k V
1 AC
VX ¨¨3 ¸¸ C• When
C
0
measuring the 3 • V0 internally and expressing the
1© A Z Z B Z C ¹ Z A Z A Z A Z B Z A Z C Z
operating
A signal in secondary volts of the bus voltage:
VOP
V 1 k AB k AC Vx 3 V0 VB 1 k AB VC 1 k AC
OP 3V X V0
3 n VT
compensatedVTfor in order to increase sensitivity VTn
VT of the function. Im ^1 k AB k AC V X nCT 3 V0 VB 1 k AB VC 1 k AC ` 0
This protection element is founded on the following theory. I OP ( A) I DIF ( A) k A I
^ I OP`( A) 0 I DIF ( A) k A InAnCTCTDIF A (11)
ReIm ^ 1
Re ^parallel
1
k k
1 k ABbanks
k k V V
VunderX 3 V0 0VB 1
3 V V B k AB
1 k V
V 1 k 1 ` k 0
B 1 and VC 1 k AC OP` ( A0) DIF ( A) ZA n Z
k AC V0 Vvoltage, k AB therefore: I I k I
X 3identical
AB AB AC AC X AB C C AC AC
Both work A
I V
DIF ( A ) relations BANK (apply A)
1 A CT DIF 2A
TheZcurrent
1 A Z dividers
X(k) Xindividually I N 2 I A 2 I B 2 I C 2 VA VX YA2 VB VX YB 2 VC VX
• 2A 1 Aare 2A set per phase.
I A I A1 I A2 V A V X YA1 YA 2 (15a)
• Both auto-setting and self-tuning applications of this method
IIDIF IIN 1 IIN 2 V I A VXV YAV1 YAY2 VV B V V
X Y BY1 YB2V
VVC X
I DIF I N 1 I N 2 VA VX YA1 YA 2 VB VX (15b) YB1 YB 2 V
N2 A2 B2 C2 A X A2 B X B2 C
I OPare I DIF ( AProvision
( A ) possible. ) k A Icould
A be made to calculate factors k I B I B1 I B 2 VB V X YB1 YB 2
automatically under manual supervision of the user, either IIA I A1I IA2 I V A VV XV YA1 YYA 2 Y V V Y Y
locally or remotely (auto-setting), or constantly in a slow
adjusting loop (self-setting).
IIDIF
A II
N1
I
A1 IA 2
N2
V
V
A V
A
V X YY
X
A1 YAY2 A2
A1
B X
(15c)
B1 B2
phase of each bank: are equalI1 and phases C are equal, the operating equation (18)
IkˆOP I DIF
simplifies I DIF k1 I1 overcurrent condition for the measured
to astraight
1
I1
II A1 VV AA VV XX YYAA11 ;; II AA22 VVAA VVXX YYAA22 (14a)
neutral differential current.
I AA11 V A V X YA1 ; I A2 VA VX YA2 I OP I I DIF
nCT
k A I A k B I B kC I C
kˆ1 DIF nCT DIF
II B1 V V YBB11 ;; II BB 22 VVBB VVXX YYBB 22 n
I OP II1 DIF CT k A I A k B I B kC I C
I BB11 V VBBB V V XXX Y
(14b)
YB1 ; I B 2 VB V X YB 2 n DIF
VOP V1 k SET CT V2
III C1 V V
V XXX Y YCC11 ; I CC 222 V
V V V V
Y ; YI C1 ;; V II C V YVCC V XX Y Y
A1
I CC11 VCCC
A X A1 A2 A
VC V
X
V X YCCC 222
A2
(14c)
I OP VI DIF
n
VCT k A I A k B I B kC I C
V k
II A1 A VV VV YY ;; II VV VV YY
X A1 A2 A X A2
OP 1 nCT DIF
SET 2
III NN 11 sumIII AAof11 the II BB11two IIneutral VVcurrents V VXX can YAA11be
Y derived
VBB V X Ythe
Vfrom YBB11 VVCC VVXX YYCC11
B1 B X B1 B2 B X B2
A V
1 IYB1; II C1 VV X YA1 VB V X YB1 VC V X YC1
The C
C11 A X
Iabove N 1 V AV AV V Y
I B1 B Vequations:
V Y ; I
X B1 B2 V V YB X B2
C1 C X C1 C2 C X C2
V V k SET V2
IIII N 22 V I IAAV22 III CC 22 V V
YII BB 22; V V
VY XX Y
YAA22 V VBB V VXX Y V
YBB 22 VCCOP
V VXX 1 Y
Y
C1
N1 I N 2 I A 2 I B 2 I C 2 VA VX YA2 VB VX YB 2 VC VX YCCC 222
N C
A1 I I X
B1 I C1
C1 V V
C2
A
X
V
Y
A
A
C VA1
X V
C2
B Y VX V Y B1 C X C1
II
I VI V I Y I; I VVVV YY V V Y V V Y(14d)
III DIF I IINI1 III N 2 VV VAV V V YXX Y Y YAA Y22
VV
VBB VXX Y Y
V V YBB11
Y YBB 22
VVCC VVXX Y
YCC11
YYCC 22
A1 A X A1 A2 A X A2
N1 A1 B1 C1 A X A1 V A1 VY B X B1 C X C1
IIcurrents.
IB IB1 I I VBBVVVV(14e)
The differential current is a vectorial difference between the two
YYYVBB11V(14d)
Y V obtains:
IIIBB I II IBB11I I
B
A2
N
B1
A21
A BA
B2
22
I IIBBsubtracting
By 22I V VV
B2V V
C2
B
AVB Y VXXXYYY from
X
A X X
B1 YB1 YY BBBY222 one
AA12
B2
A
B2 X V Y
B2 C X C2
V V YC1 YC 2
B B1 B2 B X B1 B2
C 22 Neutral current balance application.
C C1
I
C2
I C I IC1 V C 2V Y C Y X
C
C X C1 C2
(14f)
I CA IA1C1 AI2YC 2 AYVCX V XA1Y YAC21
Y YC 2 YC1 YC 2
II DIFI II A VA1 YV A2Y Y IBY B1 B 2 Y IC Y YCC11 YCC 22
B
III DIF
B1
I
B2 Y B Y
IY A
Y
Y
X
B1 Y
A1 Y AA12 Y A 2YB
A 1 A 2
I YB 2 Y
A 2YB1 YBB 2 B1 YY
B2
1
I B Y B
B11 YY B2
C 1B C2 I
2 Y
B2YC2 I C
Y
YC1 Y YC 2
DIF I YA1V
I C1IAIC 2 A VY
A AA12
IY
Y I Y
BA12 YC 2 B Y BI 1C Y
Y IC Y
C
Y C 11 YCC 22
YC1 Y
II DIFDIF A1 C 1
C A1 X YC
B22
YA1 YYAA12 YYAA12 Y YBA1 2YBY1B2 YB 2 YB1YC1YCY1YBC2Y2 C 2 YC 2
C A 2 B1 B C
kA ; kB ; kC
YI A1 YA1YAY2 A2 I YYB1B1 YBY2 YC1 YYCC21 YC 2
I DIF Y AY
A1Y Y2 kAA 22B YYBB1 1YBY2BB22Y
2YA;Y
AAY11A YI;CBB11k Y YYYBBCC2221 YC 2 Y
C1 Y Y Y YCC 22
26 kkA Y
kk AA YA1YAY1 A2 YAB2 ;;; YkkkB1BB YB 2YB1 C YFundamentals
A 1
Y
; k C YCCCof111
B 2 ; Yk C YC 2 Protection of Large Capacitor Banks
Adaptive
I OPA Y IY YDIF kY
YA1 Y AA YI2A Yk BB I B Y YkYBC1 I Y
YCYB 2
C 1 ; kC Y
C 2
YC1 Y YC 2
k A1 YA1 ;k YA 2
A2 B1 B2
;k YB1 YB 2C1 C2
YC1 YC 2
IINI1B2YAI1NV2BYAV2VXA IYVB1XY
IIBIDIF IB1 B1YYAY1 B2 YA2 VCB1 VCX2 YB1 YI BN22 IVAC2 VI BX2 IYCC21 YVC A2 VX YA2 VB VX YB 2 VC V
BV VB2 Y ICV
I NDIF I XYC 2YB 2 VC VX YC 2
A I I
2 A 2 Y AB
1 2 Y AC 22 AYB1 X YB 2 A 2 YBC1 V
VCA V X YCA1 YCA2
I N 1 I N 2 VA VX YA1 YA2 VB VX YB1 YB 2
I CA I CA1 I CA2 I DIF
ItIisDIF YIA1Nto
justified 1 assume
YAI2N 2 theVbalancing
AY
BV1 X Yconstants,
Y YAk,2 are
B 2 A1 YC1real
VBYnumbers.
V YB1 5.
C2 X
YSensitivity
B 2 VC V X to YInternal
C1 YC 2 Bank Failures
k A this leaves
Still, k B equation
the ;balance (18) k C 3 unknowns.
; with These
IB IB1Y
IB2YYAAbe
VBYA 2VX Y
12calculated
BY1 YBB2on
BY1B1Y 2YB 2severalYCmeasurements
Y1 Y CY2 TheI Akey equations
I A1 I A2defining
VA
Voutlined
X Y A1 Y A 2
unknowns A1 can
IIDIF under
taken I I A I
unbalanced V I B based
V
conditions. Y Y I C C1 C 2 the capacitor bank protection
methods ((1), (5), (11) and (18)) allow not only proper compensation
A A1 YAA12 YA2A X Y A
B1
1 Y A2
B2 Y C1 Y C2
I COP I CI1 DIF
Alternatively,
Iequation
C2 kA V
VkXBmay
ICA(18)
IYB Cbe1 YCI2C
k Cre-written from phase
for the inherent bank unbalance, but also facilitate analysis of
IB IB1 of
protection.
IB2 VB VX YB1 YB2
IB IBY1
coordinates, IBinto
2Y sequence
VB VX Y
YB1 Y YB2
components:
Y Y
sensitivity
kA A1
YA1 k; YkABI2 Yk IYYB1 k Y
A2 B1 B2
; kC C1 C2
Y C1Y YC 2(19)
Each of the four methods as described in this paper is founded on
I OP YAI1 DIF
II DIF Y I B Y Y I C BI2
Y I C I Cequation
a balance 1 IC2
thatVassumes:
C V X YC1 YC 2
C I CI1A YI C 2 YVC V
A2 0 0
X Y C
B11 1 B 2 2
1 Y C2 Y
2 C1
YC 2
C2
A1 A2 B1 B2 C1 First, that the bank is intact in terms of experiencing a ground or
It is justified to assume that the positive-sequence current would
IIOP
leakOP into the
I DIF operating
kk1 A I1I Aquantity
YAand
k B I Bmore
k Cconsiderably
IC
YC1Ycompared
YC 2
phase fault. Y Y Y Y Y Y
1 Y YYB1 YBcomponents. I I I I
A1 A2 B1 B2 C1 C2
Ik DIF AI1A A 2 ; k I BB1 B 2 ; k I Y
with Y
the
zeroY A2 Y
negative-sequence 2
C C1 Therefore
C2
DIF
Second, thatA the
YA1 inherent
B
YA2 unbalance
YB1 Ybetween
C
YCcapacitor
the
1 YC 2
only
Y Y
Y A1 Y A 2
A the positive-sequence B leakage
Y YYB1 YB 2
can be Celiminated
Y YC1to
Y YC 2
improve phases does not change.
B2
IˆOP I DIF
sensitivity.
k1
IA1DIF 2k I yields
ThisAapproach
0 0 k B1 I a
1 1
Bk
slightly
2 2
2 I simplified
C1 form C 2 of the
A ground or phase fault violating the first assumption results
mathematically accurate equations (18) and (19): YA1 YA 2 in the Yoperating
B1 YB 2 equations,YC1 YC 2
YIA11 YA 2 Y Y Y Y in ksevere unbalance ; kB ; kC and leads to
I OP
k I DIF k;A k IB A kBB1 I BB2 k; CkCI C C1 C 2 (20) A
YAoperation
I OPA I k I protection 1 YA 2 YB1 YThis
as expected. B 2 aspect Y YC 2 is
ofC1operation
YADIF
1 YA 2
1 1 YB1 YB 2 YC1 YC 2 backed-up by overcurrent protection, and therefore is of secondary
nCT importance.
I OP IWith kunknown
DIF one kbalancing
0 I 0 k1A I 1 A k 2 B I2IB(k1)
I kfactor IC
kC auto-setting
the I I k I k I k I
OP
I DIF
nkCTA DIF as:
kIˆ1OP I DIF procedures I A can
kbe I B k C I C simply
B implemented
OP DIF
or self-tuning
DIF A short or open in a AsingleA B B
or several C
cans C
violates the second
I1 assumption, causes a minor unbalance in the operating equations,
I OP I DIF k1 I1 (under no-fault conditions)
V
I OP VI1DIF k 0 V I20 k1 I1 k 2 I 2
kSET
(21)
the OP
I 0 k1 I1 k 2 I 2
and results in operation of protection set sensitive enough given
I size of the
I DIFinternal
k 0 failure.
OP
n
IˆOP I DIF I DIF CT kthis
Unlike in previous methods,
A I A k B I B kC I C
compensating coefficient may be This latter way of responding to internal failures is critical for
I OP ofI DIF
analysis k1 I1sensitivity. For this purpose one could
protection
akcomplex number.
I 1OP II DIF kn1CT IDIF 1 assume nominal system voltages and resulting currents, and use
1
Operating signal (18) or (19) implements proper compensation the operating equations to determine the amount of the operating
for the inherent unbalance of the bank. Equation (20) is a good
VˆOP I V
practical 1 k SET V2
approximation.
ˆ inI DIF
signals
k1
response to any given unbalance in the bank.
k1 DIF
n I1
I OP I(18)
Equation I1 DIFholds k Acurrents,
forCTprimary I A kwhen
B I applied
B k C to C
Isecondary 5.1 Sensitivity of the Voltage Differential
n CT DIF
amperes, it takes the following form: Function
nCT on the application to grounded banks.
n ForI simplicity
I DIFletus focus k A I A k B I B kC I C
VI OP VI1DIF V2 k A I A k B I B kC I C
kSET CT (22) OP
Neglecting the phase nCTindex, the operating signal in this method is
nCT DIF (equation (1a):
DIF
for sensitive but secure operation (provision for a restraint k FAIL Z TAPGND ZTAP GND C BUS TAP
signal). 1
V2 V1 1 (23b)
• Several independent thresholds shall be provided that can be VOP VV1 1 k1FAILk
V 2 SET
freely used for alarming and tripping. k FAILk FAIL
and the operating signal becomes:
• The positive-sequence compensating factor k1 shall be a k
setting. VOP
V V1 k1 k SET
VOP
OP
k100
1V1 1SET FAIL %
SET
(23c)
• Provision could be made to calculate the k-factor V1 k FAIL k FAIL
automatically under manual supervision of the user, either
locally or remotely (auto-setting), or continuously in a slow V
'VOP
k
'k FAIL C%
'full bus voltage 'CTAP
% 1 100
adjusting loop (self-tuning). As aOP
percentage of% the
SET the operating signal is:
VVOP kkSET BUS TAP % GND %
1 1 FAIL 100%
V1 1 k FAIL
VOP 1 k AB k AC Vx 3 V0 VB 1 k AB VC 1 k AC
'VOP %3 'k FAIL % 'C BUS TAP % 'CTAPGND %
'VOP % 'k FAIL % 'C BUS TAP % 'CTAPGND %
1 Capacitor Banks
Fundamentals of Adaptive Protection of Large 27
VOP 1 1 k k Vx
VOP 31 1 kABAB AC
k AC Vx 3 V0 VB 1 k AB VC 1 k AC
kTAP GND TAP GND BUS TAP
V1 OP % k FAIL
FAIL
FAIL % BUS TAP % TAP GND %
VOP V1 1 SET
1
'VOP %1 1' k FAIL
k AB% k'ACCBUS 3%V0'CVTAP B 1 k AB VC 1 k AC
k FAIL V VxTAP GND %
1 V OP
31 1k k k V
V2 V1 VOP 3 '1kSET k AB%100 k'% CBUS VxTAP %3 V0'CVTAP 1 %k AB VC 1 k AC
B GND
OP AB AC x
' OPOP %1
V
k FAIL AsV both 1 3
the k FAIL
k-values
AC
are close to unity, the abovesimplifies to:
VOP k SET V 1
1 1 k
FAIL k V 3 V V 1 k VC 1 k AC
1 100% 3V 1 k AB k AC Vx
(24d) OP AB AC x 0 B AB
VVOP |
V1 k FAIL 311 x1 k k V 3 V V 1 k (26b)
1kFAIL VxxTAP % 0'CTAP VC 1 k AC
OP
k SET V
'V V ' kAB k'AC C BUS
VOP V1 1 OP
OP OP %
133
AB % AC B GND % AB
VBx11 Vx
k FAIL Equation (3e) helps calculating the amount of the neutral point
V k system k ACzero-sequence
AB VC 1 k AC
Equation (24d) yields a proportional relationship between kFAIL and
' V ' k ' C
the operating voltage: a change by 1% in the k-value, yields an
OP FAIL BUS TAP ' C TAP GND V OP | V
voltage.
OP 3 Assuming k AB voltage nil, the equation
% % % %
Vx be re-arranged
1
OP | Vx1 k VVxx 3 V0 VB 1 k AB VC 1 k AC
can to calculate the value of Vx:
extra 1% of nominal in the operating signal. VVOP OP 11kkABAB AB
k kkAC AC AC
VOP 1 k SET 3
What is more 1 1interesting,
V the bus-tap
inVOP k and 100
k ABtap-ground %
AC Vcapacitances
khowever, x 3 V0 V B the k AB VinC 1 V
is the relation between changes
1 increase VOPk AC|VVBx1 k AB VC 1 k AC (27a)
1 3 FAIL
the operating voltage. Given equation (23a) one can write:
and
V
VVOP
x
B a1 V 2
B
V1 A
1, k
V k
| Vx1 k AB k AC Vx
AB C Va k
C
V1
A , k AC a 1 120 0
V AB AC
3 B 1 1kABkAB VCk1AC k AC
OP
x
V
'VOP %1 '
V kFAIL
k % k'CBUS V 'CTAPGND % (25) Vx
OP
3
1 AB AC TAP %
x
Assuming
V V 1
k
k1CABkVaABkAC
a balanced bus voltage:
VB a 2 VAa,12 V
VA ,a a1 k1
1 k 0
AC120
VVOP x | V B AB
a 2Ax VA , VC1 ak AB
C
V
AC
a 11200
A , k AC
The above signifies that a 1% change in either of the bus-to-tap xB
(27b)
1 1 k k
V | 3Vx1 voltage. AB k AC V x 3 V0 VB 1 k AB VC 1
k capacitances VBk AC a 2 VAa,2 V
or tap-to-ground would yield 1% of bus nominal in
VOP
the OP operating Vx simplifies
One VA further:
1CAB k AB a VA a, 1a k1AC
AC
120 0
V 1 ak2 11kVkAB 1 akkAC AC13 k AC 0
Depending on the serial/parallel arrangement of the cans, it will VVBxx aV21BAV 1A ,2kAB V k aC AB
V , j a k1 AC k AB
120
1 1 amount
take a certain
VVOP V B AB k
AB k AC
C Vx AC
ofVshorted/opened
1 k cans to cause a single Vx
Vx V A
2a1 ABk1AB
C
1kABAC
k AB
AC
A
a k 12
AC k AC (27c)
percentage 3 change in the capacitance and an equivalent increase
x V 1a 1 k AB 1 1
k k k k
in the operating1voltage. k AB The k ACfinal assessment of sensitivity has to
take into account the actual arrangement of the capacitor bank. VVVBxx aV21AV 2A1,k AB
A 2
VC kaAB
,aj ACa13kk1
AC V
AB AC
AC k0AB
AC 120
2 3
kj AC k AC and using
A
V | V Observing 1 k
the k-values 1are
k kACABreal numbers ktoABunity
close
An OP x
a 2 VA , question
VB interesting VC ais Vthe , optimum
a 1 0
location
120 of the tap. VVAx
properties of 12
the
AB
a-operand 1 k AB kthe
yields 23 following:
11 a 2k AB ACk aj k31 kk AC k AB
AC
31 1kk1AB
A
Regardless of the number of parallel cans, the longer the string,
VV
the higher the impedance. If so a single can failure would cause a VVxxA VA 12 j k ABj 2AC 3k
AC
smaller V B 1 2k ABchange VC in1the AC impedance/capacitance.
koverall V 1 k AB 1kACkABAB j kACAC k AC kk1AB
2 2 1 2 k k 2
Vx percentage
a
Vx bestVZsensitivity
1 k a 1 k V
VxA
A
x
2 2
1 kZboth 3 2 1 k 2k
AB AC
For
A AB k ACportions
the (bus-tap and tap-ground)
Z BUS TAP CTAPGND 1 3 (27d)
k FAIL be kept
shall as short
BUS TAP
1as
TAP
kpossible
GND
1 k as measured 1 in the number of V j 1 kk j k k
cans. In reality, ZTAP the
AB
number of cans
AC
ZTAPisnot C BUS Within
GND a variable. this VAx 21 1 23 21
AB
233
AC k 1
k
GND TAP
1 j k k k jj k k
restriction,
VVxAx 12 2 AB 232 AC2kk1AB
2 half of the total length is the smallest0possible length.
VB a VA , VC a VA , a 1120 23 2 12AC k
1 1 of3the j
actual k jequation
operating k (5)2compensates
V2 V1 1the
Therefore
Vx of view exact k ABmiddle
k FAIL2of sensitivity.
j the
k ACposition mid-tap AB
tapis koptimum
k AC from the
VVVAxA bank
Because
inherent
the
2 unbalance, 2 21 2kitk isABfurther
k2ACjustified k 1k
to assume the
for the
ratios
point Under 2 both the portions 1 3 1 3
(bus-tap and Z a 2
tap-ground)1
k
Z
are a
protected1 k Z
with the same C
sensitivity ofV the
Vx ratio
impedances j to2
be kka j
perfect k
unity 2
(say
k 1
kk ), and treat the
kVFAIL TAP 1 k AB k AC1 BUS TAP 1 TAPGND other A
V xA
measured VAinBUSthe number of cans.
AB
TAP GND AC
2 as a variable
2 2(kAC correspondingly): 2
AB
VVAA 1 k
k AB k 2k
Neutral Voltage2 Unbalance AC
Function
'VOP % 'k FAIL % k SET 'C BUS TAP % 'CTAPGND % The above equations means that only 1/3rd of the percentage
VOPanalysis
The V1 shall
1 start with the full operating equation (5): change in the ratio of impedances between any two phases will
k FAIL be seen as a percentage of nominal bus voltage:
1
VOP 11 k AB 3k AC 1Vx 3 V03 VB 1 k AB VC 1 k AC
Vx 3 2 j 2 2 k j 2 k k 1 'VOP %
1
'k%
1
'C% (28)
VOP k SET
inVwhich 1 100 % 3 3
1 k k Vk
1 the following2 assumptions k
can be 2 made:
VVA OP1 FAIL
AB AC x
- 3 1-k terms can be neglected for simplicity.
The For example it will take 3% in the drop of the phase A impedance,
C% nominal
to see 1% of'bus VBUS voltage as the Vx signal, and thus the
V'OPVOP
n
- |The% 'k FAIL
Vxsystem % 'C BUS voltage
zero-sequence TAP % 'Cbe
can considered zero
TAP GND %
VTX
operating3signal
3 of
V the function.
(the system is practically always strong enough to maintain SEC ( MIN )
the balance at the bus despite few cans affected within the The operating signal has an arbitrary factor 1/3rd to comply
VB11itself).
k AB VC 1 k AC with the common understanding of this method (equation (6)).
V bank
VxOP 11kk ABk k AC Vx 3 V0 VB 1 k AB VC 1
0.01 345kV
k ACmicroprocessor-based
Using relay technology this scaling is not
3 to the following
AB AC nVTX 1328
This leads relationship: important 3as any
3 0scaling
.5V can be handled accurately. What is
important is the 1:3 ratio between the measured neutral point
VB a2 1
VA , VC a VA , a 11200 voltage and changes in the capacitor impedance.
VOP 1 k AB k AC Vx (26a) I OP I DIF k SET I
3
a 1 k AB a 1 k AC
2
Vx VA
1 k AB k AC 'I OP 1
VOP | Vx 'k%
I 100
1
1 k AB k AC j 3 k ACFundamentals
k
28 Vx VB21 k AB VC 12 k AC AB of Adaptive Protection of Large Capacitor Banks
X1 X 2
Vx
V 1 k AB k AC k
A
IOP % 3100 V )%
3'C3% 0 V .5(MIN
%SEC
nVTX 3BUS
3 3 VSEC ( MIN )
X 1I0.01 'X C%2345 kV
nkInVTX
OP DIF k VSET
BUS I 1328
This reinforces using low-ratio VTs for measuring the neutral-point Again,Xthe
VTX
13 X332V 0SEC
3above .5V
observation may be used to select the ratio of
0.01 345 kV) target accuracy allows calculating the
( MIN
voltage. then'VTXI
split-phase CT:
1 3 0operating
the 1328
Relation (28) can also be used to calculate the required ratio.
minimum
I OPOP I0DIF 3
primary
1.01 345kVk ' SETk .
%1
5
V
I signal; the minimum relay sensitivity
For example, assuming target sensitivity for the function, one
allows
' kI% determining
nVTX 100 'X % the minimum C% accurately measured secondary
'1328
signal; the32ratio 0.5V2 the maximum CT ratio that can be applied
3 dictates
calculates the effective operating signal as percentage of the bus I'OP I DIF
in I OP case:
this 1 k SET I
voltage. Using relay accuracy claim, one determines the minimum X X '2 k%
1 that is1required for the proper operation of the
secondary voltage kI OPI I1DIF 100
' C k I I
'VCombining
relay. OP % k%two requirements
'the 'C% allows calculating the ratio n'DIF X 1 X%2 SETNOM (31)
3 3 I OP 2 1I
for the VT: ' (kMIN )
X 1X 2 SEC
k'IIOP 1 100
%
1 1 1 'k% 1
'VOP % '' Ck%% VBUS'C% 5.4 X 1 100
'kI%Sensitivity X2
'XZ% of ' theC%Neutral Current Balance
nVTX 3 3 (29)
2 1 A 2Z 2 A
3 3 VSEC ( MIN ) ItI DIF (XA )1 IXA 2 that this method
noticing 0
k is worth
current X1 1 X 2 Z1approach
balance A1
is a derivative of the phase
Z 2 A (60P), and as such it has identical
C% V k
'k% 1 ' %2 X X 'C%
Forn example,'with the BUStarget sensitivity of 1% of impedance sensitivity. X 1 'C X2 I 2
change VTX
on30a.01 3V
345kV 345 bus, kVand the minimum relay voltage of 0.5V nDIF 2 % NOM
nVTX the maximum
secondary,
SEC ( MIN )
1328is:
VT ratio The balance Z1(BMIN
2 Iequations )Zfor all three phases per the 60P protection
3 3 0.5V I DIF ( B ) ' 1 1CI B SEC
are: I 1 1 2B 0
' ' k
principle
k '
nDIF%% 2 % %1B 2 2%B % ' X
% X Z NOM ' ZC ' C
0.01 345kV 22 I 2
nVTX 1328 SEC Z( MIN) Z (32a)
I OP I3DIF 3 k 0SET .5V I I DIF ( A) I A Z1 A Z2 A 0
1 1 InDIF ''CC I%C%Z ZI NOM
1C Z 2 C
1IANOM
Z 2 A2 A 0
1 A
With 'Vthis OP %ratio, under 'k% SLG fault 'C%on the bus, the secondary voltage InDIFDIF ( C )
DIF
2
( A ) 2 AII
I Z 1C ) Z 2 C 0
would I'OPI OPbe I150V. 3 k SETis Iwell
DIF1This
3 within the range of modern relays. SEC ( MIN
Z
SEC ( MIN Z)
Assuming a relay' k% Z1 A1B Z2 A2 B (32b)
I 100 conversion range of 260VRMS, the ratio can be I DIF ( B ) I BZ Z 0
lowered to 1328*150/260 '1 C V 1 = 766, yielding the operating signal of II DIF ( A) I I A1Z1A I A22Z ,A I DIF I I , I I C1 I C 2
A ZZ 1B ZZ 2B 0 (B) B1 B2 DIF ( C )
'V I OP 1 'at
n' 'kk%1% 'C%in the capacitor impedance.
% BUS DIF ( A )
0.87V VTX secondary
OP % change IDIF I
DIF((BA)) I BA 1 A
Z 1B1 A Z 2 B2 A
0 0
I X1 3
100 3 3 V
X 2 SEC ( MIN % 3 ) ZZ1B1 AZZ
2A
B 2 I C 2 I I
'k%I DIF2 'IXN%SEC Y1 A Y2 A Y Y Y Y2C
2 1
2N 2 A1 B1 C1 A2
DIF A I B 1B 2 B I C 1C 0
I DIF I N 1 I N 2 I A1 I B1 I C1 I A 2 I B 2 I C 2 Y 1 A Y 2 A Y 1 B Y 2 B Y 1C Y 2 C
Z
Equations
nDIF I
I DIF
capacitance A'
DIF (( B
CI%mean
'))I(30)
AC
IZ
I%BAone
1 of
I NOM
2 ofthe
11B
IZANOM
AthatZ
ZIfor 22 B
Bparallel I Cthere
0B 2banks, 2 be increase in
A each % of change in the impedance/
1 I0 1 IC will
I2A1 ISEC Z n ACTUAL nIDEAL b, b 1 0.0050.30
2 I 1B) by 2 I C 1 I C 2
n
theDIF differential Z
I A(2MIN
current1 A Z
I B210.5%
2 B I Bof
A the total bank current.
SEC ( MIN )
I DIF I DIF ( A) I DIF ( B ) I DIF ( C )
ZZ11BCIDIF ZZ2Z(A2B2BC) I0DIF (C )
I DIF II DIF
I
I II B(ZA1) A 00 VOP ( A) V1 A k A VT 2 V2 A
n
A CZ1ZA ZZ
DIF ( B ) DIF
DIF
( A()C )
I DIF ( A) I A Z1ZA11BC Z 2ZA22BC 0 2 A nVT 1
Z1 A Z 2 A
Z11Z1CI Z 2C Fundamentals of Adaptive Protection of Large Capacitor Banks 29
II DIF
I DIFDIF ( A ) II A
( C) I CZ
B AZ2 ,2 BI DIF ( B0)
Z 2ZB 0
I B1 I B 2 , I DIF ( C ) I C1 I C 2
VOP ( A) V1 A k A b
nVT 2
V2 A
(B) B 1ZB
IIIDIF I Z11AA Z22AAI BII B Z11BB Z22BB IC IIC Z1C1C Z2C2C0 0
DIF IIAAA Y Y
YY1n1AAYY2 A2 Ab, bBY1YYB1B Y2Y
Y.13C Y
YC1C0Y Y
A I B Z11B1 BB
DIF
nI DIF IA Z
ACTUAL A Z22A
A
11IDEAL B
Y0BZ22.2005
B
I Z1C1C02CYZ22CC2C 0
C
Y1 A Y2 A Y1B Y2 B Y1C Y2C
Z1 A Z 2 A Z Z B Z Z C n n b, b 1 0.0050.30
I DIF I A the
Observing I B 1B the2impedance
relationbetween I C 1C and 2admittance nACTUAL
Now assume YnIDEAL b,nequation
Ythe
that bY1B 1was
Y20Bperfectly
.005 Y10Cbalanced
.3 Y2C making 0
Z1 A Z 2 A Z1B Z 2 B Z1C Z 2C I DIF I A V1 Asignal
ACTUAL IDEAL2A
I B2a perfect
VT Ibut 0
one can re-write the above into: VnOP
the operating
( A)
ACTUAL n k
Y11AAIDEAL
b ,
above b V
Y2AA n Y1B 2A Y2 B1 0 .
005
zero, 0 .
C one of
Y1C 30Y2the
C
VTs, say
the tap VT (#2), works with
n VT2 1an error of b. If so, the operating signal
Y1 A Y2 A Y Y Y Y2C V
becomes V k VT
non-zero: nVT 2 V
I DIF I A I B 1B 2 B I C 1C 0 (34b) V OP ( A )
n OP ( A) V1n1AA kAAb,nnVT 1b V 2A
12A 0.0050.30
Y1 A Y2 A Y1B Y2 B Y1C Y2C n
VOP ( A) V1 A k A VTn1VT V
ACTUAL IDEAL VT 2
VOP ( A) V1 A k A bnVT 1 2 2AV2 A (35a)
nVT 1
Which
n is precisely
n b, b 1 0.0050.3
the 60N balance equation as
0 derived in section
n
n 2VT 2 V
4.4ACTUAL
(equationIDEAL (18)). VVOPOP (( AA))
V
V11AA kkAA b VT nVTV2 A 2 A
VOP ( A) aVperfect
Assuming 1 A k Abalance, nbVTn1VT nnVT1 equation V2 A (1c) can be solved for the
The above proves, that neglecting CT and relay accuracy the 60P
n 2 V
tap OPvoltage:
A V A nk A b VT 1 V
2
n
VOP (60N
and V1 A k Ahave
functions V2 A sensitivity. Specifically, per each
VT identical
( ) 1
0 V1 A k A VT 2 V2nAVTo 1
k2AA VT 2 V2 A V1 A
nnVTVT2 1 nVT 2 nVTn2VT 1
A)
percent of change innVT the
1 impedance/capacitance of one of the
banks, the differential CT would see an increase of 0.5% of the V 0OP (V A)1 A V k A
1 A nnA k b V 2 A o k
V V
2 A n nVT 2 2 A
A V1 A (35b)
total bank current. 0 V 1A k A n VT
VT 2
1 V n 2VT A1 o k A n VT 1 V 2A V1 A
VOP (phase Vvariant
nVT 2 V0OP (V A )1 A Vk 1 AA nbVT VTV 1 1AV Vo
2
2 A 1A k A
1 nbVTVT 1 V
2
V1 A
1 A k Aof bthe
method V2 A(60P) is easier to compensate for 2A
The A) Substituting (35b) n into (35a) yields: n
n V V 1A n b
VTV 1 V 1 b VT 1
the inherent bank unbalance. VT 1 The neutral variant of the method OP ( A ) 1A 1A n
(60N) requires 1 CT and relay input, compared with 3 sets for the 0V V1 A Vk A VT
V b
2
V V2 A o V k A 1 VTb2 V2 A V1 A (35c)
phase version (60P). If applied concurrently on one relay, the two
OP ( A
OP ( A ) )
1
1
A
b nVT100 1 %
1 A 1 A nVT 1
n 2 n V
VOP V b V V 1 b
0 V1 A may
functions k A beVTtreated V2 A o k A VT 2 redundant
as partially V2 A V1 Ausing different V1((AAA)) 1 1 Athe
OP
Or expressing b 100
error%
1A 1A
as a proportion of the bus voltage:
nVT 1 nVT 1
VVOP
CTs and relay inputs. VOP1 A( A) V b V
11 A b 100 1 A % V1 A 1 b
VV ( A)
VOP ( A)
1 b 100% (35d)
V1(AA) 1 1 0.0050.03 100% 0.72%
1A
VOPSensitivity
6. ( A) V1 A b V1 to A V1 A 1 b
Instrumentation Errors V
OP ( A) 0
VOPV1(AA) 1 1 0.0050.3 100% 0.72%
OP
V 1 b 100%
This section analyses impact of finite accuracy of Instrument V
ForV
VOP ( A)
Transformers (ITs) and the relay on the four protection methods.
1 b 100% VV
OP1 A( A )
1example,
A 1 with 1 negative 0.005 0.5%0.30magnitude
100% error 0.72and % 0.3 deg
angleOP ( A error,
)
11 1 0.0050.3 100% 0.72%
the spurious operating voltage
0 would read:
It V nVTX 1 k AB k AC Vx nVT VA k AB nVT VB k
1A
is1 Aimportant to notice that errors of instrument transformers VOPV 1
V VOPOP1(AA ) 3 nVT nVTX 1 k AB 0k AC Vx nVT V A k AB nVT VB k AC
3 n1VT 1 0.0050.3 100% 0.72%
and the relay can be accounted for when tuning the coefficients.
IfVthe tuning coefficients (k) are implemented as real numbers, the V1 A 1
1 0can be VOP 1n nVTX 1 k AB k AC Vx nVT VA k AB nVT VB k
OP ( A ) 0
magnitude1errors .005 0.3 100and
eliminated, % the 0.72 % of angular
impact
31VVencroaches Vthenx VTtargeted
V 3 1
VOPerror is1atVTthennlevel k AB n kAC nVT Vsensitivity
errors1 A could be reduced. If the coefficients are implemented as
V VTX that A k AB nVT VB k
x VAVA nVTwould VBVaccommodate
B nVTnVTVC VC
The on
complex numbers, both magnitude and angle errors can be V OP
3 1nnVT however,
3Note,
nVTX VTX 3
x this nVTVTmethod
nVTVT nVTX 1 k AB k AC Vx nVT VA k AB nVT VB k AC
settings.
OP that
accounted for. VOP of3the
1 some 3 n1VTerror in the matching factor k, leaving only a small
VOP n 1 k AB k AC Vx nVT VA k AB nVT VB variable kVAC n fraction
OP VT 1C
V nofVTXthis Vx unaccounted
3error nVT VA nfor. VT VB nVT VC
Assuming 0.15%
However, 3 nthe ITVTXand relay errors will slightly change with the
V 3 1n
1 VT n 3 V nVTn VAV nVTn VB0.2deg nVTnangle
V
VTX b VBnoperating
VT magnitude error for both the ITs and the relay, and
magnitude of the signal and /or other factors such as residual flux
V VOP
error
OP
OP gives 3 1 n0.38% n nVTX
VTXof b
bus 3 Vx V
3voltage x nVT
read
VT V as AanVT
spurious
VTV VCCVC
VT VT
or temperature. Even if tuned at one particular operating point, 3 n
VOP 3 nVTVT nVTX 3 Vx nVT VA nVT VB nVT VC
signal.
VT x A B
the method 1 will show some errors at different operating point due 3 n1VT
VOP nVTX 3 Vx nVT VA nVT VB nVT VC
to the IT3and nVTrelay inaccuracies. It is important to realize, though, ItVOPis important 1n nto nVTX b 3 Vxthat
understand nVT the Vmethod
A nVTcompares VB nVTtwo VC
that these errors occur regardless of the protection principle. By n
VVTX
voltages. 33 3
VV
Bothxx errors
n
nVTVT V V
AbA play n
3VT n V V
VVTax role.
n n
B nB VTThey V
VVTAmay V
C n VB mutually,
nVT VC
VTX will cancel
VTX VT VT C VT
3 1nVT n b 3 V n V n V n V
OP
compensating for bank inherent unbalance, and partially for IT and or add up.
relay errors, 1Z the methods
V OP VTX x VT A VT B VT C
VOP Z b2A3 presented
nAVTX Zn1VTB in
VAZthis
2 Bnpaper VBare
Z1Cnalready
ZVC2Cless 31VnVT n V n V n V
I DIF 3I nAVT to 1instrumentation VIx Berrors. Ianalysis n 3 1
bb1of 1n Instrumentation
VVA AVV VCVC b bErrors
susceptible Detailed VT VTfollows.
Z1 A Z 2 A Z1B Z 2 B
C
Z1C Z 2C 6.2
VOP VTX Impact x VT A
B B
VT B VT
11V0 V0on the
C
nVTX
OP 3 V
33 VT V A nVT VB nVT VC
Magnitude and angle errors of ITs and the relay can be modeled as Compensated
nVTX 3 Vx nVT Bank
x
VA nNeutral Voltage Unbalance
ancomplex multiplier applied for the analysis purposes to the ideal 1 VT VB nVT VC
3 V n V n V n V
VTX
transformation
x VT
Y1 A ratio
A
Y2 Aof a given
VT B
Y1Bsignal.
VT C
Y2 B For example, Y1C Ya2Cnegative VOP 1 b 1 VA VB VC b 1 V0
Function
1 b illustrated1 VA inVthe VC subsection
I I I I 0 VOPapproach 3 b 1 V0applies to this
0.5%DIF magnitude A error combined with a 0.3 Cdeg angle error can The B previous
1 Z11AAYZ2 A2 A B Y1ZB1
Yas: B Y2ZB 2 B Y1CZ1CY2CZ 2C V 3 method
b 1 as VAwell. VBExamining VC the b key V0
1 operating
beI
VOP modeled
DIF IAb 1 VA VB BVC b 1 V0 C
I I protection
OP
3
equation
3 Z1 A Z 2 A Z1B Z 2 B Z1C Z 2C for secondary voltages (7) leads to a conclusion that during
n ACTUAL nIDEAL b, b 1 0.0050.30
normal system conditions four voltage components, each of a
very small or zero magnitude, are added as vectors: neutral point
Y1 A Y2 A Y1B Y2 B Y1C Y2C bank voltage, system neutral voltage and two phase voltages
I DIF I A IB IC 0 – the latter two with very small multipliers.
6.1 Impact Y1 Aof YInstrumentation
2 A nVT 2 Y1B Y2 B Errors Y1C onY2the
C
VOP ( A) V1 A k A V2 A These four voltages are delivered by four VTs: (A,B,C,X) in case of
Voltage Differential nVT 1Function implementation (7a) with internally derived system zero-sequence
n ACTUAL
For simplicity nIDEAL
consider b 1 0.005
b, applications 0.3 banks. The voltage; and (0,X,B,C) in case of implementation (7b) with externally
on grounded
0
operating signal in secondary volts is (equation (1c)): supplied system zero-sequence voltage. For the purpose of error
n analysis, each of the VTs shall be represented with its own ratio,
VOP ( A) V1 A k A bn VT 2 V2 A potentially slightly different than the nominal value.
VOP ( A) V1 A k A VTn2VT V
1 2A
nVT 1
n n
0 V1 A k A VT 2 V2nA o k A VT 2 V2 A V1 A
VOP ( A) V1 A nkVTA 1 b VT 2 V2 A nVT 1
30 nVT 1 Fundamentals of Adaptive Protection of Large Capacitor Banks
V0OP ( A)V V1 Akb V1 AnVT V nVT 2
OP ( A ) 1A 1A 1A
2 1A 1 b
1A A n V o k
2A A n V2 A V1 A
0 V1 A k A nVTVT1 2 V2 A o k AnVT 1VT 2 V2 A V1 A
VVOPOP nVT nVT
0 ( A)( V 1 A b1k
A ) 1
VT 12 V
Ab% 100%
100 2A o kA
VT 12 V
2A V1 A
V1 A
V deriving theVTsystem n n
VOP1(AA)
When V1 A b V1 A 1 V1 A 1 b
zero-sequence
VT 1 voltage internally the In other words, 1/3rd of the bus voltage “leaks” as a spurious
three
VOPOP( A)( Aphase Vvoltages
b Vare added
V1 A as 1vectors
b – small errors could operating signal due to errors in the measurement. For example,
V
yield 1 1 A0.005significant
a) 1 relatively 1A
0.30 100% spurious
0.72% system zero-sequence assume 0.3% magnitude error and 0.2 deg angle error. These
VVVOP Vfollowing
1 A b Vderivative V1 Aof0 1equation
b (7a) is useful:
11 b1100% 0.3 100%
voltage.
1 A ( A)) The
OP 1A errors in the A-phase voltage with all the other measurements
( A) 0.005 0.72% intact, i.e. with errors not adding and not canceling, would yield
VVVOP1 A( A)1
VOP 1 A n1VTXb1 100
k AB % according to equation (37c) 0.18% of bus voltage as an error in the
k AC Vx nVT VA k AB nVT VB k AC nVT VC
VV OP (3A)nVT operating signal of this protection method.
1A 1 b 100% (36a)
V V 1
V
VOP
OP
OP
1( AA ) 1
1 1n
VTX 0 .
0051 k 0
AB .
3 0k
100
nVTX 3 Vx nVT VA nVT VB nVT VC
AC
% V x 0 n. 72
VT
% V A k AB nVT VBWhen k ACusing
nVT externally
VC derived system zero-sequence voltage
For the
VVunity, 3 3
n n
purpose VT of error analysis, the k-factors can be assumed to (equation (7b)), requirements for the bank and system neutral
beOP
VV
1 A( A ) VT
and 1
therefore:
1 0 . 005 0 . 3 0
100 % 0 .72 % voltage measurements are relaxed, and the accuracy of
' Vx V0 ! P
I OP b 1 I DIF b 1 k I VREST 0.2 pu00 0.17 pu50 0.37 pu
' I DIF ! P
' Vx V0 ! P V0 0.05 pu00 , Vx 0.05 pu0 0 0.02 pu1800 0.07 pu
1
V'OPI 1 k AB k AC Vx 3Fundamentals
V0 VB 1 ofkAdaptive
AB VC 1 k ACV
Protection of Large Capacitor 0Banks 31
DIF 3! P OP 0.07 pu0 0.05 pu0 0 0.02 pu
nn
VVTX
VTX V1
33 x VbxnVT n V
1 VVTB V nVT VCnVT nVTVC VA nVT VA
OP AB
nVTX 3 Vx nVT VB nVT VC nVT VA 1 3 1
VOP 1 1 VOP
VOP
13b 1 VA
k AB 3bkAC1 VV A
x 3 V0 VB 1 k AB VC 1 k AC
7. Comparison with Traditional Methods V I OP
In other3b b111 1the
words, Voperating
InDIF A 3 bV 1 nk isIba vectorial
signal difference of two
1 V
V OP 3 n V x n b V
V AI n
n V n
VC
VBB penalizing
nVT
VOP b 1 VA 3 VT VC
OP
voltages. In orderI VTX
to b 1
better Icope VT
b
with 1 k
errors andVT
avoid
OP 33 nnVT OP VTX xDIF VT A VT
3 either a given function is desensitized to account
Traditionally, V
Isensitivity
OPOP b 1xanV V
IVTDIFoptimized
0 b 1 krestraining
I signal can be created as
for inherent bank unbalances and instrumentation errors. Or, a follows:
I OP x b 0 1!'PIVDIF
'V V x V0 ! P
b 1 k I
3 V0 V !x P VT V B n V VA
historical value of the non-zero operating quantity is subtracted n n n
I OP b 1before
(D-changes) I DIFcomparing
b 1 with
k aIpickup threshold (P) resulting ' n
VVTX V
VTX x 3 V V
x x VTn V0 B nVT
V VT VC
C nVT VT VA (40b)
REST
in the rate-of-change mode of operation: ' I ! P
' 'IVI xDIF!1VP!0 P! P DIF
OP 3
' I DIF ! P (phase or neutral current unbalance) (39b) VInOP 3 Vb30 x .21npu VB 00nVT
VT I 0bVV.C17
1 npuVT k
VA5I0
0.034 pu
IToOPOP
b 1 V I V b 1 k I works, consider external
VTX
understand better DIF
OP
DIF how x this
0 approach
Vfault V1 x V0
The rate-of-change approach improves sensitivity to some extent
but has 1
V OP and
VOP OP 1 Vinternal
b
1 Vk0 ABbank
x 1 V
kfailure.
0 AC
Vx 3 V0 VB 1 k AB VC 1 k AC
1 k AB k AC Vx 3 V0 VB 1 k AB VC 1 VVAssume
limitations. OP
VOP ' k V 3 3Van 0 .
! 2VP
externalpuA
REST 0 V
fault x 0V.017 pu50
producing 20% of system pu
0.37zero-sequence
'RESTVx VVx0 !V0P
REST
AC x 0
First, it is3an approximation. As derived in section 4, the “leaking” voltage. Assume further, the bank neutral point voltage is
values are proportional to present values of some other signals VI OP
measured
REST b
OP V01xV as .20Vpu
0V
xI DIF 00b010 while
k I0the pu50 zero-sequence voltage
.17system
VOP toVxthe
related Vbank
0
(example: differential current in the phase 0V
is'
' IIpu
.20measured
DIF 0.005
!
! P
Ppu as 0.017 ,puVx 5 due 0
0.05topu finite
0
0accuracy 0.02ofpuinstrument1800 0.07 pu0
balance method proportional to the total bank current). When DIF
transformers and the relay, transients, etc. If so, the function even
V2x pu
'perfectly V 0 !
0P VOP 0.2 pu00 00.17 pu50 0.034 pu
the currents do not change, the delta method works satisfactory. if0
V .
VOPREST 0.2 pux0 0 0.17 0
V 0V
compensated 0 . 17 pu
for
pu5 05
the bank inherent unbalance would
0.034 pu
But
VRESTwhen the Vx currents
V0 change, such as during close-in external V V
see an operating 110.07 pusignal 00k of:0.05 pu0 0 0.02 pu
I DIF !3P1 VREST
1 k pu V 0xx 03
V 0 V 50BB 1
10.37k AB VC 1 k AC
AB VC 1 k AC
OP
faults, subtracting an old value will not compensate correctly. V'OP OP k AB
AB 0k.2AC
AC V 0
3.17 V pu
0 V kpu
Time delay or other inhibit method may be needed to ride through V0 VREST 2 pu
.OP 300.02.2pupu
0 00 0
0
0
0..17
17 0pu.pu
17 5pu0 0 0
505.37 pu0.034 pu
such conditions.
0.2 pu00 0.17 pu50 VREST 1 0.07 V pu0 .050
0
pu 00.05 0
Vxpu0 00pu000.120.pu pu180 0 0
V VIf used to V 1
trip k V 0 k
instantaneously V 3
,without
V V
.a05
restraint the02
B 1 k AB 0VC 1 k AC 0
function will 0.07 pu0
1
Second, the nrate-of-change
V approach will not provide for a V
Vhave OP
OP 0to
OP
.05 V
3 bepu
x V
0above
AB00
0, Vx 0 this
AC 00
0.05 pu0 00.020 pu180 0.07 pu0 .
x
VTX 3 Vx nVT b V A nVT VB nVT VC
xset
OP
sustained3 nVToperating0 signal. When 0the delta-t window slides V0OP REST 0.0 2.pu2 pu 0 00 0level..017 .17 pupu 5 5 0.0034 .37pu pu
VOP into
entirely 0.2the pufault,
0 the .17 pusignal
0operating 5 will reset.pu
0.034 This creates a
VOP 0.07 pu00 0.05 pu0 0 0.02 pu
Calculate
VOP 0V.07 x
the V0 proposed restraining signal:
V V
VOPREST V
Vpu x 0V0 0 0.05 pu0 0 0.02 pu
x V0 0 0
problem when time-delayed operation is assumed.
nVTX 3 Vx nVT VB nVT VC nVT VA REST 0 0 0
1 VREST 0 0.050.pu 2Vpu00, 0V.07 x 0pu 0.05
.17 0pu0 pu
0.5 050pu 000.037
.02pu 0pu
.12 pu180 0.07 pu
Methods
VREST for
0 .inherent
2 pu 0 bank
0
0compensation
. 17 pu 5 0 presented in section 4
0 . 37 pu V V V REST
n 3 V n b V n V n V V REST
00..22 pu 0 . 07
x
0 pu 0
0 0
0 . 05 pu 0 0
0 0 . 12 pu
identify1 the ntrue cause 000 applied00definition 17 pu
..17 pu of55the
OP VTX of thexunbalance, VT andA as such
VT are B accurate
VT C REST
b3
0
V
under system 1VT VA
balanced conditions, minor unbalances, and major
Note puthatthe 0
restraint practically doubles
0
OP
3
system events such0 as close-in faults. Their
V
the0 .0OP 0.05
2 pu
two 0 00
.
involved07 pu
pu0 , Vx 0.05 pu0slope
0
. 0
17 0
signals.pu
50 0
. 05
Assuming pu
a 0 0 is00 .02pu
.02
used for 1800 it 0.07 pu0
putripping,
0 operating signals 0are 0
V0 0.05 pu 0 , Vx delayed 0.05 pu0 and 0.02 pu180 with no 0.07
will
V putake 00.034/0.37 . pu0=00 9.2% of slope to restrain the operation.
0.17 pu500 0
VOP 0 0..2 034 pu
0..034
sustainable
n 3 V allowing n Vtime n V alarmingn V tripping
I OPVTX b 1x I DIFVT b B 1 kVT I
restrictions. C VT A
VOP
OP 2 pu
0.2anpuinternal 0 0 0.17 0pu5
.17 pufailure
0 0bank 5 under pu of system unbalance
0.0345% pu
Consider
0 0
V
(system
OP 0.007.07pupu
REST zero-sequence 000voltage).
0
0.005 pu
.05 pu
0 000further,
Assume 0.002 pupu
.12
the bank failure
VOP system
Major 0.07 pu 0 0is.05
unbalance an pu 0.02 pu to consider.
0 condition
important
V01 ! Passume a close in ground fault elevating both the
0 0
' Vxexample, V
VREST
V 0
changes the
0.0 . 2 pu 00point
neutral
2 .pu
2 0 0
pu
pu0 00.17 . 17 0pu
voltage
0.175 pu
by52%0 of0bus
. 37
37 pu 0.37 pu
0.5 pu
voltage at the
VOP
For b 1 VA REST
angle
REST of 180 deg (worst case):
3
system zero-sequence voltage and the bank neutral point voltage.
VREST 0.07 pu0 0 0.05 pu00 0.12 pu
VREST
The
' I DIF ! P0.07 pu
compensated 0 0
neutral unbalance 00 is0based
0.05 pumethod .12 puon equation
00 ,0V00x , V0.05 pu
V0 0.05 pupu 0 0pu
0.02 0pu180 0 pu000 . .07 pu0
0.07180
(5): V
V00 00..05 0 , Vxx 00..05
05 pu 05 pu00 0 02 pu
00..02 pu1800 0 0.07 pu0
I OP b 1 I DIF b 1 k I The operating signal is:
1 VOP 0.07 pu00 0.05 pu0 0 0.02 pu
VOP 1 k AB k AC Vx 3 V0 VB 1 k AB VC 1 k AC 0 0
3 V
VOP 07 pu
00..07 000
pu 05 pu
00..05 00 0
pu 02 pu
00..02 pu
' Vx the
During
V0outlined
! P ground fault event, V and V assume significant
OP
0 0
VRESTrestraining
The 0.07 pusignal
0 is:0.05 pu0 0.12 pu
V
values
OP V
and V0 balance perfectly as long
x will
x 0
as the relay uses proper 0 0
settings for the inherent bank unbalance compensation (k-values) VREST
V 00..07 pu
07 pu00
00..05
0 pu
05 pu000 00..12 pu
12 pu
' I DIF
and the V!P
instrumentation errors are low enough compared with REST
V REST x V0
the applied setting. The other two voltage components are of Assume a 10% slope setting is applied. The ratio between the
secondary importance as they use small multipliers. operate and restraining signals is 0.02/0.12 = 17% allowing for
0V.2 pu010 1 k0.17puk 50 V 3 V V 1 k V 1 k AC operation given the slope of 10%.
sensitive
Simplifying
OP one canAB write the
AC following
x balance
0 B equation
ABfor this
C
function:
3
Change in the voltage at 180 degrees is the worst case. Under the
VOP 0.2 pu00 0.17 pu50 0.034 pu
best case scenario one obtains 0.08pu of restraint, or 0.02/0.08 =
VOP Vx V0 (40a) 25% of the operate-to-restraint ratio.
0 0
VREST 0.2 pu0 0.17 pu5 0.37 pu Careful application of restraint allows further improvement of
VREST Vx V0 security while maintaining good sensitivity of the capacitor bank
V0 0.05 pu00 , Vx 0.05 pu0 0 0.02 pu1800 0.07 pu0 . protection functions.
0
0.2 pu0
VOP
00 0.17 pu50
.07 pu00 0.05 pu0 0 0.02 pu
0 0
VVREST
OP 2 pu
00..07 000 0.005.17
pu pu0
pu 0 5
pu.034 pu
0.12 0
As can be seen from key equations (1), (5), (11), and (18) the proper
way of balancing the bank (or banks) involves instantaneous
9. References
values of currents or voltages. Subtracting the residual unbalance [1] IEEE Std. C37.99-2000: “Guide for the Protection of Shunt
as a time-delayed signal (a historical, or a constant value), and Capacitor Banks”, June 2000.
responding to the delta changes does not constitute a proper,
sensitive and secure operating equation for protective relaying [2] Kasztenny B., Brunello G., Wester C.: “Capacitor Bank
purposes. Fundamentals and Protection”, Proceedings of the 56th Annual
Conference for Protective Relay Engineers, College Station, TX,
The methods presented in this paper compensate for both bank
April 8-11, 2003.
and system unbalances. Therefore they are insensitive to major
system events such as close-in faults. Presently used relaying [3] Capacitor Bank Protection and Control Relay, Instruction
techniques might misoperate on such system conditions, as they Manual, General Electric Publication, 2006.
typically disregard system unbalances and compensate for the
bank unbalance assuming no, or minor system unbalances.
The exact balance equations developed in this paper open a chance
to perform manual, or automated adjusting of the operating logic
in order to accommodate the inherent unbalance of the bank either
due to un-repaired failures, temperature or seasonal changes, or
changes due to removing, shorting, or repairing the cans. This can
be done as auto-setting, i.e. one time adjustment after the repair
and under user supervision, or as self-tuning, i.e. a continuous
tracing of the slightly changing capacitor reactances in order
to maintain optimum sensitivity to internal failures, and security
during system unbalances.
0925-v4
Fundamentals of Adaptive Protection of Large Capacitor Banks 33
Implementation and Performance of
Synchrophasor Function within
Microprocessor Based Relays
Bogdan Kasztenny Mark Adamiak
GE Multilin GE Multilin
To minimize this error, a dithering algorithm is applied yielding a high The former is about adjusting the length of the data window so
accuracy of timing for the synchrophasor interrupts. An internal that it covers pre-selected multiplies of power cycles; the latter is
variable is used to count the time with a nanosecond accuracy, about positioning of this data window so that the measurement
while the interrupts are generated with a 0.25 microsecond complies with the C37.118 angle convention.
resolution. The device keeps track of the error accumulated due Both can be controlled independently with no major obstacles.
to the finite resolution of the oscillator. Once the error reaches half One may think about these two processes as having two
the resolution period, the synchrophasor interrupt is moved by controllers: one positions the center of the data window to align it
one resolution period. In this way the error is kept below half the precisely with the synchrophasor interrupts; the other controls the
period of the oscillator, and never accumulates. sampling rate to keep the length of the data window in relation to
The discussion on timing presented in this section is an excellent the slightly changing system frequency.
illustration of issues and challenges faced when implementing Although the samples must be correlate-able to absolute time,
synchrophasors on existing relay platforms or traditionally they can be taken at any time instant. Figure 2 presents a solution
designed new relay platforms. The solutions outlined in this section in which the samples are collected asynchronously with respect to
are elegant and avoid any changes to the existing relay hardware, absolute time. The platform applies frequency tracking to keep the
thus minimizing the risk and avoiding expensive internal oscillator number of samples constant in the actual period of the waveform
upgrades. The “time keeping” is implemented in software based a as the period changes [4]. When the synchrophasor interrupt is
on carefully crafted algorithm. asserted, the device locks the sample index and collects half its
data window from the samples that follow the interrupt and half
– from the samples preceding the interrupt. In this way, without
5. Sampling for protection and altering the sampling process the device gets a data window that
synchrophasors is placed very closely with respect to the required reporting point
in time.
Protective relays typically do not sample synchronously with
respect to the absolute time. In-stead, they sample based on a
free-running sample and hold timer and often apply frequency
tracking or compensation so that the measurement calculations
retain accuracy even if the system frequency departs from the
nominal value. It is a common misconception that measuring
synchrophasors requires sampling synchronously to absolute
time.
Figure 7.
Correction for the Analog Filter.
Assume again the 5.67kbps data rate from the previous example, The communication protocol runs at up to 60 times a second,
and consider a system event recorded for 10 minutes. The required and therefore is relatively lean as well. The same applies to the
storage space is in the range of: integrated PMU recorder.
10 (minutes) x 60 (seconds / min) x 5.67kbps » 3402kb, or 3.402/8 In our approach, the processing power required to provide for
MB » 0.42MB. the PMU function even when reporting at the rate of 60 phasors
a second, is at the level similar to calculations required to run
Modern relay may provide for tens of MB of data storage, allowing one zone of distance protection. We consider it moderate and
records as long as few tens of minutes even at very high recording acceptable. No protection functions are suspended or delayed as a
rates. result of synchrophasor activities/calculations. No synchrophasor
functions are suspended or delayed as a result of protection
events or activities.
The last trace shown in Figure 9 is the operand of the 87L function.
As expected, the integrity of this key function is not jeopardized by
either the external fault, off nominal frequency, or PMU function
operational on the same IED platform. Similarly other protection
functions respond correctly. For example, the neutral directional
reverse-looking overcurrent element picks up during the fault and
stays operated for the entire duration of the fault.
Figure 9.
Sample record of a line-current differential relay containing both oscillography data (samples) and PMU data (synchrophasors).
For comparison the “3403 Vag Mag” trace is the voltage magnitude
as measured for protection purposes. The synchrophasor version
(PMU1 Va Mag) and the relaying version (3403 Vag Mag) are
better shown in Figure 10. The synchrophasor measurement is
implemented using an algorithm optimized for accuracy. As such
this trace does not show the ripple distinctive for the off nominal
frequency situation, and is accurate to within 1% of TVE. The
protection measurement is affected by the off nominal frequency
(visible ripple and the average value slightly off). This is because
the relay was configured with frequency tracking disabled for the
purpose of the test. Even with tracking disabled this particular
relay shows only 2-3% of error in voltage for every Hz of frequency
difference.
Figure 12.
Phase C voltage decays after the breaker opens. The PMU measurement
tracks the dynamic of this signal. The measured frequency registers the
actual 50.3Hz resonant frequency between the line and its shunt reactors.
Figure 10.
Synchrophasor and protection measurements on the same voltage signal
in the record of Figure 9.
The phase A voltage registers small values coupled via the shunt
Figure 11 shows and internal fault occurring under off nominal reactors after the breaker is opened and the fault removed. It is
frequency (59Hz while the re-lay intentionally tracked to 60Hz). worth observing the phase angle of this voltage as measured
The fault is cleared by the 87L function as expected. Other via the synchrophasor algorithm. Figure 13 displays the phase A
protection, such as zone 2 shown in the Figure, operate as voltage angle. Before the fault the angle changes at the rate of
expected and stay picked up for the en-tire duration of the fault. 360deg/sec because it is reported at 60 times a second while the
signal is of 59Hz ((60-59)*360deg/sec). When the voltage is driven
This test was done as a closed loop test resulting in opening the by the 50.3Hz resonant fre-\quency on the disconnected line, the
breaker. Once the breaker opened, the line-side VTs measure angle changes much faster at (60-50.3)*360deg/sec = 3500deg/
the voltage oscillating between the line capacitance and shunt sec, or one full revolution every in less than 100ms.
reactors. The phase C voltage decays exponentially and the
frequency measured by the relay changes from 59Hz in the pre- Examples presented in this section demonstrate the power of
and fault periods, to about 50.3Hz being the resonating frequency synchronized measurements to post-mortem analysis, including
between the line and its shunt reactors (Figure 12). faults. Also, they depict secure co-existence of protection and
PMU functions on the same IED platform.
13. Testing Recommendations for PMUs of frequency change. Increased demand on PMU accuracy
under abnormal frequency conditions may result in shifting
integrated with Protective Relays the design targets - potentially impacting performance of the
core protection functions of the device.
Protection and control platforms integrating PMU functions should
be tested in both protection and PMU modes of operation. • PMU functionality shall be checked under fault conditions. This
The protection functionality shall be tested given specific includes any impact on accuracy after the fault is cleared, as
evaluation and approval philosophy for protection and control well as integrity during the fault condition. For example, are all
relays. During those tests the PMU functions should be enabled data frames produced during the fault or some of them may
and configured in a way representative for a typical or worst- be lost? Is the post-fault steady state accuracy as expected
case future application. Similarly, the PMU functionality should be or is the disturbance is having a long lasting impact on the
tested with a set of protection functions enabled and configured accuracy of subsequent measurements?
to reflect typical or worst-case future applications.
• Integrity of both protection and PMU functions shall be
Having both sets of functions enabled and configured allows checked under periods of simultaneous activity. For example,
identifying any natural or unintended interactions between the a command frame can be issued toward the IED just before a
two functionalities. fault is applied – response to the fault should be checked as
well as response to the command frame.
While the above general rules are followed, a few specific tests are
worth recommending as follows: • Integrity of protection functions should be checked under
impairments of IRIG-B input signal. Having to correlate
• Speed of response of key protection function shall be measurements with the absolute time, IEDs implementing
checked during PMU-related activities. This includes normal PMU functions may become affected by impairments of the
PMU operation and extra activities such as coincidence of a IRIG-B timing signal. Adding noise, particularly to generate
system fault with a PMU command issued towards the IED spurious 1pps patterns, or invalidating the time and date
from the PDC, local recording being initiated or in progress, code is a meaningful check when overlaid on fault conditions.
retrieval of local records, and so on. Step changes in time and date generated at the IRIG-B clock,
or leap seconds, are good tests as well. Overall integrity of
• Accuracy and integrity of key protection functions shall be protection – both speed and selectivity – should be verified
checked during increased PMU activity. under such abnormal activities of the IRIG-B input.
• Accuracy and speed of response of key protection functions • Communication impairments related to the PMU-PDC data
shall be checked during off-nominal frequencies. This includes exchange should be tested with respect to integrity of key
steady state frequency deviations as well as frequency ramps. protection functions. Classical channel impairments such
Modern protective relays are typically designed to retain full as bit error rates corrupting the packets, multiple requests,
functionality under steady state off nominal frequencies, and invalid requests, etc. should be placed simultaneously with
exhibit only slightly degraded performance under frequency fault conditions. Selectivity and speed of protection should
ramps, with the extent of degradation depending on the rate not be compromised.
0925-v3
Compact and Cost Effective, the RTT is the ideal too for every power engineer’s desktop!
g Multilin
The paper looks at the above applications from the point of view
of a modern micro-processor-based relay. New generation of line
relays support dual CT inputs to monitor both breakers individually,
and three voltage points to provide for the main line protection,
and synchrocheck across both breakers. These relays often
include two breaker failure, two synchrocheck, and dual-breaker
autoreclose functions. This allows integrating protection, breaker Figure 1.
failure and reclose functions into a single relay. The paper points to Modern dual-breaker line IEDs.
advantages and disadvantages of such integration, and provides
some guidance regarding dual-breaker line applications.
In addition to the required AC inputs these IED are designed to This danger can be alleviated while integrating the BF functions
support enough binary inputs (breaker status, external breaker fail but at price of increased complexity.
initiate) and output contacts (trip for both breakers, reclose per Figure (c) shows a crosscheck scheme. Each fault detection function
breaker, breaker fail re-trip and trip, etc.) to facilitate protection initiates its own BF function. This BF function is placed on the other
and control of a dual-breaker line terminal from a single IED. relay so that a crosscheck is made between detecting the fault
and detecting the BF condition. This scheme calls for wiring the
BFI signals, and cross-monitoring of relay fail safe outputs so that
3. Breaker Failure Considerations upon the failure of one of the relays the other relay could switch to
its own internal BF function.
Being a backup function, the BF protection may be required to
use a different CT core, an independent current path, independent Figure (d) presents a solution with a single BF allocated statically
relay hardware, and a separate tripping path. This requirement is to one of the relays.
naturally met when using a stand-alone BF relay, but can as well
be accomplished on multi-function relays without a separate BF Figure (e) shows an integrated and single BF but in a switchover
device, at the expense of extra signaling between the relays. scheme. Normally both relays initiate the same integrated BF (one
internally and one externally). Upon the failure of the relay that
Figure 2 presents four approaches to distributing the Fault normally performs the BF function, the other relay switches to its
Detection (FD) and BF functions between multiple relays. own integrated BF element.
Figure (a) is a traditional scheme with a dedicated BF relay. The configuration of a stand-alone BF relay (Figure 2a) fits
naturally the past protection practice with external summation of
Figure (b) presents a simple scheme with an integrated BF function
CTs for the line relay. Traditional line relays did not measure the
per each fault detection function. No external BFI signals are
two currents individually and could not integrate the BF function
used.
for both the breakers anyway.
Dependability is directly proportional, while security is adversely
proportional, to the number of operational copies of a given
Figure 2.
Allocations of the fault detection (FD) and BF functions between relays.
Figure 3.
Selected BF schemes of Figure 2 as applied to dual-breaker line terminals.
• IOC 1 to respond to forward current of CT-1. The element As shown in Figure 6c, the blocking action is established if any of
shall be set at 2-3 times the nominal of CT-1, and is used to the three phases shows a through current flowing outside of the
unblock the relay on external-to-internal evolving faults. zone, either through CB-1 or CB-2.
During internal fault conditions with very weak feed from the local
6.2 Supervisory Logic terminal, the current is not elevated and may appear in the reverse
A reverse direction for CB-1 (Figure 6a) is declared if both currents direction as dominated by the load – permission is maintained as
are elevated (IOC2 and IOC4) and the directional element sees none of the IOCs picks up.
a reverse direction (PHS DIR 1 BLK). Similar logic is implemented
During high current internal faults, none of the directional elements
for CB-2, and phases B and C. The reverse direction flags will
operates in the re-verse direction, and the trip permission is
be asserted only if an elevated current is flowing through the
maintained.
diameter, and the direction is re-verse in one of the breakers.
During external faults with one breaker opened, the blocking
action is not established, but it is not needed either.
Figure 6.
Supervisory logic to cope with CT errors in the dual-breaker configuration.
The presented solution targets communications channels of The digitally pre-filtered currents are converted into phasors
64kbps. The baud-rate of the channel imposes certain limitation by applying half-cycle Fourier algorithm. The half-cycle values
for the packet size. Application to dual-breaker configurations calls are either used as calculated, or two consecutive half-cycle
for producing a proper restraining signal out of all the currents of measurements are combined into an equivalent full-cycle
the zone. For example, in three-terminal applications with each of measurement. The operation of switching from full- to half-cycle
the terminals being breaker-and-a-half or ring-bus, 6 three-phase upon detecting disturbance in currents is referred to as “window
currents surround the line differential zone. Exchanging all these resizing” and is implemented to speed up operation of the relay.
currents between the terminals would increase the packet size. The differential system transmits half-cycle values, and the resizing
is done independently at each terminal of the line.
The following design targets have been stated for the line current
differential function capable of secure operation at multi-breaker Half-cycle magnitudes are also calculated and transmitted in
terminals: order to reflect properly through fault conditions at each terminal
of the line.
• The packet size should remain unchanged. A total of 9
numbers must represent currents at each terminal in terms In addition “a goodness of it” factor is calculated for each current in
of phasors (real, imaginary) and static and dynamic restraint order to measure the error between the waveform and its Fourier-
factors. estimated phasor [7]. The goodness of fit factor is further used to
produce an extra restraint to countermeasure the estimation error,
• Window resizing shall be applied for fast relay operation. and increase security of the relay. Conceptually, the goodness of
fit factor is proportional to the following value:
• Proper restraint shall be produced to secure the differential
system on external faults through the local terminal’s
breakers. (1)
Figure 7. Figure 8.
External Fault. Phase-to-phase fault through the diameter causes enough External-to-Internal Evolving Fault Example. The relay trips single-pole the
CT error to operate spuriously the Neutral Directional OC function. The CT correct phase despite the pre-existing external fault. The CT logic unblocks
logic blocks in 0.5 cycle. in 0.75 of a cycle.
Equation (2) is applies to up to four local current inputs and holds (4c)
true for both real and imaginary parts, in all three phases. Equation Else
(2) is not a differential current, but a portion of the differential
current that involves the local currents only.
(4d)
Second, the measure of a through fault current is estimated
locally using magnitudes of all the local currents via the following
The adaptive portion of the restraint is a geometrical sum of
equation:
errors derived from equation (1) and a measure of the clock
synchronization error [5-6]. The traditional and adaptive restraints
(3) are combined geometrically using a concept of an extra arbitrary
multiplier:
Equation (3) selects, on a per phase basis, the largest among the
local currents to be a measure of the local restraint.
(6)
Before the data is used, a decision is made to either use the full-
or half-cycle measurements. The half-cycle data is used one time
after detecting a fault. After such half-cycle window is used, the
relay switches back to the full-cycle version when proceeding into
the fault. Also, when a packet is lost, the next packet that arrives
triggers window resizing. This is simply to enable protection using
the latest packet even though the previous packet required to
calculate the full-cycle quantities is lost due to the communication
Figure 9. channel impairments.
The differential current is created from partial sums of all the local currents
(a). The restraining current is created based on the maximum local current
(b).
(7b) (11a)
(11b)
(11c)
If (12a)
(8b)
And applies the so-called fault severity equation in order to decide Then (12b)
if the line should not should not be tripped [5-6]:
Then (12c)
(9)
The relay (87L function) operates if the fault severity, S, is positive. else (12d)
P is the pickup of the characteristic (the slopes and breakpoints
were already accommodated before sending the data in equations (12e)
Else
(4)).
Under such circumstances the following needs to be assured: 1 is applied at the remote end under the circumstances.
In three-terminal applications or with tapped loads, it may
• The stub bus zone between the two breakers and the opened happen that the remote end will “see” the fault in the stub bus
disconnect is properly protected. In single-breaker application zone despite the opened disconnect (Figure 16). This creates
a simple overcurrent function supervised with the “disconnect security problems if permanent permission or an echo
opened” signal is sufficient. In dual-breaker applications such scheme is used. If the fault current closes through the third line
simple solution would face security problems under through terminal, no permission will be sent from that terminal. But if
fault conditions and saturated CTs as explained in section 5. the line closes via an unmonitored tapped load, the problem
Either a differential-type stub bus protection is implemented remains. Avoiding too sensitive overreaching functions at the
with the use of proper restraint to counterbalance the impact remote end solves the problem.
of saturated CTs, or the supervisory logic presented in section
6 is adopted for trip-ping. • Under the circumstances blocking directional comparison
schemes are practically equivalent to permissive schemes
• When tripping on stub bus faults, no DTT is to be sent to the with permanent permission or echo as described above.
remote end(s) as they are already isolated from the fault by Making sure the overreaching forward looking fault detectors
the opened disconnect switch. Upon failure of one of the never pickup for faults in the stub bus zone soles the
breakers, no BF trip is to be sent to the remote ends either. problem.
• A fault in the stub bus zone must not result in tripping the • With the respect of the stub bus protection and application
remote line terminals. Solutions to this requirement depend phase comparison relays can be dealt with as the same way
on the applied protection principle, as explained below. as direction comparison schemes.
• Permissive directional comparison schemes typically do not • Line current differential schemes require the relay under the
have a problem. A permanent permission is keyed under the stub bus condition to transmit zero currents regardless of its
circumstances (disconnect opened while the breakers are actual measurements. In this way under the stub bus fault, the
closed); an echo scheme is used; or an overreaching zone 87L function will not trip the line at the remote terminal(s).
Figure 13.
Illustration of the dual-breaker logic: permissive, dual-comparison scheme, through fault condition (relay [3]
COMTRADE record).
0925-v4
1. Introduction 2. History
eThekwini Electricity has embarked on substation automation Prior to 2000, eThekwini Electricity substations were designed
projects since the early introduction of substation specific with the protection and control arrangement shown in
communications standards and is presently in the process of Figure 1.
implementing substation automation projects based on the
IEC61850 standard at eight new substations. All signals were transmitted between the primary plant and the
protection and control system by means of hard-wired secondary
This paper describes actual substation projects to illustrate the cabling. Protection and control panels located in control rooms
evolution of the introduction of substation automation in terms of were equipped with protection relays, panel mimics and control
objectives, applicable standards and specification methodology. switches. The primary plant and protection and control panels
Positive and negative outcomes of the various evolutionary were hard-wired to a supervisory remote terminal unit (RTU)
phases are highlighted. via a supervisory junction board. The RTU was networked to
eThekwini Electricity’s supervisory control and data acquisition
The positive and negative outcomes of the use of substation (SCADA) system. After the introduction of microprocessor based
automation solutions for the various projects are discussed and protection relays with communications facilities, simple multi-
compared with the initial objectives. The paper concludes with drop networks were included to permit remote protection setting
the envisaged adoption of the full IEC61850 model for substation and engineering.
automation.
The protection and control system was normally included with
one of the primary plant contracts and the secondary cabling and
testing carried out by the applicable primary plant contractor.
During the 1990’s bay controllers and protection relays with inherent
bay control functionality became available. These products could
provide SCADA functionality by being networked with an RTU
master, which could act as a data concentrating SCADA RTU. The
main drawback of these systems was that they predominantly
used proprietary communications protocols that were limited to
the “master/slave” topography. Each manufacturer’s system was
Figure 1. unique with the result that utilities would either be locked into the
Legacy protection and control automation. use of one manufacturer’s product or would need to have the
resources to maintain many unique solutions, each of which could
only be extended by that particular manufacturer’s products.
3. Pilot Project 1 : A new Protection And Control specification was drawn up from
scratch for this project. An arrangement similar to that shown in
Figure 2 was specified.
3.1 Quarry 132kV Switchyard
The specification called for a Human Machine Interface (HMI)
In 2000, a tender was advertised for a 132 kV switchyard consisting
computer to provide substation control of primary plant and
of eight 132kV feeder bays. The protection and control aspect of the
a SCADA Gateway to facilitate remote control. The HMI and the
specification was based on a non-networked, hardwired (“legacy”)
SCADA Gateway were required to communicate with protection
system and “legacy” wiring schematics were used to indicate the
relays over an Ethernet physical layer. As the IEC61850 standard
requirements. Tenderers were requested to offer a UCA2.0 based
had not yet been published, the HMI was specified to make use
solution and to rationalise the “legacy” arrangement accordingly.
of the UCA2.0 protocol and the SCADA Gateway was specified
The solution provided made use of a combination of the UCA2.0 to make use of the DNP3.0 protocol. The protection relays were
and DNP3.0 protocols. UCA2.0 was used to implement peer-to- required to handle these protocols simultaneously over Ethernet.
peer messaging (UCA GOOSE or GSSE) for interlocking and tripping
UCA2.0 was also specified to provide peer-to-peer messaging
purposes. The Ethernet physical layer for UCA2.0 was also used
(UCA GOOSE or GSSE) for interlocking and indication. Peer-to-peer
for protection setting and engineering. A DNP3.0 master/slave
messaging was not used for protection tripping due to the lessons
network over RS485 was used for SCADA purposes. The solution
learnt in Pilot Project 1. Protection setting and engineering were
did not make use of a human machine interface (HMI) computer.
required to be carried out over the Ethernet physical layer.
A traditional mimic and control switches were provided as part of
the protection panels. Due to the dramatic reduction in secondary cabling, the
Transformer Protection and Tap Change Control schemes were
While the solution provided the required functions perfectly,
specified to be accommodated in one physical panel.
several important lessons were learned from this pilot project:
In an attempt to reduce the cost of protection relays and the
• The use of “legacy” protection and control specifications communications network, the use of one protection relay to
and drawings resulted in requirements being misinterpreted provide protection and control for more than one 11kV feeder was
and philosophy decisions needing to be made by the system allowed. A multi-feeder system comprising one relay for three 11
integrator. kV feeders was offered and accepted.
• The SCADA RTU selected for this project was provided by the
existing SCADA Master Station supplier and did not have a
means of communicating with the protection relays using
TCP/IP over Ethernet. Although the relays were capable of
communicating using UCA2.0 or DNP3.0 over Ethernet, the
final solution used DNP3.0 over RS485. There were products
from other manufacturers available that could have used
DNP3.0 over Ethernet and so minimized wiring.
The lessons learned from this pilot project were: Logic schematics showed how inputs and protection functions
were to be marshalled through logic gates, latches and timers
• The HMI hardware failed shortly after commissioning to operate virtual and contact outputs. These schematics also
apparently due to over-heating. This was despite the indicated which logical nodes need to be linked to the HMI and the
specification calling for an “industrial grade” PC. The hardware SCADA Gateway and which were to be available for peer-to-peer
was replaced but concerns remain over its expected lifespan in links (GOOSE messages).
comparison with the remainder of the equipment supplied.
Issuing logic schematics with the specification proved to be
• A conventional office/home operating system or a UNIX based invaluable when addressing queries and approving protection
operating system were specified as options for the HMI. The designs.
conventional home/office operating system was offered and
accepted. This operating system has proved unreliable.
substation automation project based on Time synchronisation was to be achieved using a separate IRIG-B
time synchronisation network. Other options are available that
IEC61850 achieve this using the Ethernet network.
During 2005, a specification was developed for Protection And
Control equipment for eight new substations. The specification for
Pilot Project 2 was used as a basis, but was modified to conform 8. The SCADA RTU
to the IEC61850 standard and to eliminate problems identified in
The existing eThekwini Electricity SCADA Master Station uses the
the pilot projects. The main features and philosophies are detailed
DNP3.0 protocol for communication with substation SCADA RTU’s.
below:
The SCADA Gateway was therefore required to provide a DNP3.0
database that could be polled by the Master Station. In previous
specifications the SCADA Gateway communicated with protection
6. Scheme Drawings relays on a substation DNP3.0 network.
Traditionally, tender drawings showed proposed wiring schematics This network was over an RS485 physical layer for Pilot Project 1
with discrete functional devices to convey protection and control and over Ethernet for Pilot Project 2.
philosophy. These drawings were used by suppliers to develop
protection and control schemes using their products. With the introduction of IEC61850, several manufacturers
produced devices capable of populating a DNP3.0 database
With the introduction of microprocessor based relays, much of the by communicating with protection relays using the IEC61850
protection scheme functionality was programmed into the relays protocol. This functionality was specified for the SCADA Gateway.
instead of being implemented with discrete wired components.
With modern substation automation systems virtually all of the
scheme functionality is programmed into the relays and only
inputs and output contacts are physically wired. Scheme drawings
were thus split into wiring schematics and logic schematics.
Figure 3.
Envisaged process bus protection and control arrangement.
0920-v5
g GE Multilin
MDS
Table 1.
Access Point Radio: The radio that connects the remote radios
together to form the wireless network. The access point radio
usually connects to a wired network, and can relay data between
the remote radios and devices on the wired network. Sometimes it
is referred to as the Wireless Access Point (or WAP).
1. Connect the computer to the access point radio via the serial
transceiver configuration cable and then launch a terminal
emulation program such as HyperTerminal with the following
communication port settings:
Figure 7.
Figure 5.
Protocol: IEC61850 GSSE • Percentage of messages with a round trip time between 20 to
30 milliseconds: 98.79% (29303)
2.2.1 Configuration: • Percentage of messages with a round trip time between 30 to
1. To improve performance, modifications to the default 40 milliseconds: 0.43% (127 messages)
radio configuration settings are required. From the main
• Percentage of messages with a round trip time between 40
configuration screen type C to select the Radio Configuration
and 80 milliseconds: 0.03% (10).
Menu shown in Figure 10. Set the Beacon Period to Slow and
the Dwell Time to 32.8 milliseconds as shown. • Percentage of messages with a round trip time greater then
80 milliseconds 0% (0).
Figure 10.
• Interface or other required cabling • Polarization of the antenna is important. Most systems
use a vertically polarized omni-directional antenna at the
• Antenna location that provides an unobstructed transmission master station. Therefore, the remote antennas must also be
path in the direction of the associated station(s) often referred vertically polarized (elements perpendicular to the horizon).
to as “a line of sight path” were the access points antenna Cross-polarization between stations can cause a signal loss
has a clear path to the remote location(s). The next section of 20 decibels (dB) or more.
expands further on this point.
The choice of feedline used with the antenna should be carefully Antenna System Gain Maximum Power Maximum Power EIRP
(Antenna Gain in dBI2 Setting Setting (In dBm)
considered. Poor-quality coaxial cables should be avoided, as
minus Feedline Loss (PWR Command) (PWR Command)
they will degrade system performance for both transmission in dBt) iNET Radio iNET-II Radio
and reception. The cable should be kept as short as possible to
minimize signal loss. For cable runs of less than 20 feet (6 meters), Omni 6 (or less) 30 28 36
or for short-range transmission, an inexpensive feedline such as Omni 9 27 26 36
Type RG-8A/U are acceptable. Otherwise, we recommend using a Yagi 12 24 23 36
low-loss cable type suited for 900 MHz, such as Heliax®
Yagi 14 22 Not allowable 36
Length vs. Loss in Coaxial Cable at 900 MHz Yagi 16 20 Not allowable 36
Cable Type 10 Feet 50 Feet 100 Feet 500 Feet (152.4 M)
(3.05 m) (15.24 m) (30.48 m)
Table 3.
enter MODE M to set the radio to master. This radio’s port will
be connected to the computer with the SCADA software and
4.2 Configuration: so the radio port should be set to RS232. We will be using the
Universal Relays configuration software to talk to a Universal
Relay which has one of its RS485 ports set to 9600 baud, 8,
no parity and one stop bit. Therefore this radio’s port baud
rate, data bits, parity and stop bits must be set to 9600, 8, no
parity and one stop bit respectively. Figure 16 shows these
settings.
Figure 14.
Figure 16.
Figure 15.
Figure 20.
Figure 18.
- Cyber Security
Setting Parameter
Digital Counter 1 Function Enabled
Digital Counter 1 Name Trip < 20ms
Digital Counter 1 Units
Digital Counter 1 Preset 0
Digital Counter 1 Compare 0
Digital Counter 1 Up Vrt Op 10 On (V010)
Digital Counter 1 Down OFF
Digital Counter 1 Block OFF
Digital Counter 1 Set To Preset OFF
Digital Counter 1 Reset CONTROL PUSHBUTTON 1 ON
Digital Counter 1 Freeze/Reset OFF
Digital Counter 1 Freeze/Count OFF
Digital Counter 2 Function Enabled
Digital Counter 2 Name Trip < 30ms
Digital Counter 2 Units
Digital Counter 2 Preset 0
Digital Counter 2 Compare 0
Digital Counter 2 Up T<20ms 11 On (V011)
Digital Counter 2 Down OFF
Digital Counter 2 Block OFF
Digital Counter 2 Set to Preset OFF
Digital Counter 2 Reset CONTROL PUSHBUTTON 1 ON
Digital Counter 2 Freeze/Reset OFF
Digital Counter 3 Freeze/Count OFF
Digital Counter 3 Function Enabled
Digital Counter 3 Name Trip < 40ms
Digital Counter 3 Units
Digital Counter 3 Preset 0
Digital Counter 3 Compare 0
Digital Counter 3 Up 30 <T>40ms 12 On (V012)
Digital Counter 3 Down OFF
Digital Counter 3 Block OFF
Digital Counter 3 Set To Preset OFF
Digital Counter 3 Reset CONTROL PUSHBUTTON 1 ON
Digital Counter 3 Freeze/reset OFF
Digital Counter 3 Freeze/Count OFF
Figure 23.
1005-v10
1. Introduction
Symmetrical components is the name given to a methodology,
which was discovered in 1913 by Charles Legeyt Fortescue
who later presented a paper on his findings entitled, “Method of
Symmetrical Co-ordinates Applied to the Solution of Polyphase
Networks.” Fortescue demonstrated that any set of unbalanced
three-phase quantities could be expressed as the sum of three Figure 3.
symmetrical sets of balanced phasors. Using this tool, unbalanced Zero Sequence Components
system conditions, like those caused by common fault types may
be visualized and analyzed. Additionally, most microprocessor- 3. Introduction to Symmetrical
based relays operate from symmetrical component quantities
and so the importance of a good understanding of this tool is Components
self-evident.
The symmetrical components can be used to determine any
unbalanced current or voltage (Ia, Ib, Ic or Va, Vb, Vc which
reference unbalanced line-to-neutral phasors) as follows:
2. Positive, Negative and Zero Sequence
Ia = I1 + I2 + I0 Va = V1 + V2 + V0
Components
Ib = a2I1 + aI2 + I0 Vb = a2V1 + aV2 + V0
According to Fortescue’s methodology, there are three sets of
independent components in a three-phase system: positive, Ic = aI1 + a2I2 + I0 Vc = aV1 + a2V2 + V0
negative and zero for both current and voltage. Positive sequence
voltages (Figure 1) are supplied by generators within the system The sequence currents or voltages from a three-phase unbalanced
and are always present. A second set of balanced phasors are set can be calculated using the following equations:
also equal in magnitude and displaced 120 degrees apart, but
Zero Sequence Component:
display a counter-clockwise rotation sequence of A-C-B (Figure 2),
which represents a negative sequence. The final set of balanced I0 = ⅓ (Ia + Ib + Ic) V0 = ⅓ (Va + Vb + Vc)
phasors is equal in magnitude and in phase with each other,
however since there is no rotation sequence (Figure 3) this is Positive Sequence Component:
known as a zero sequence.
I1 = ⅓ (Ia + aIb + a2Ic) V1 = ⅓ (Va + aVb + a2Vc)
4. Summary
Under a no fault condition, the power system is considered to
be essentially a symmetrical system and therefore only positive
sequence currents and voltages exist. At the time of a fault, Figure 5.
positive, negative and possibly zero sequence currents and Open-Phase Unbalanced / Non-Symmetrical System
voltages exist. Using real world phase voltages and currents
along with Fortescue’s formulas, all positive, negative and zero
sequence currents can be calculated. Protective relays use these
sequence components along with phase current and/or voltage
data as the input to protective elements.
Figure 4.
Three-Phase Balanced / Symmetrical System
Figure 6.
Single Phase-Ground Fault Unbalanced / Non-Symmetrical System
Remote control
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Industry Innovations
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Industry Innovations
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Relay your Faults
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The Energy 21C conference addresses the current and future issues facing the electricity and gas,
transmission and distribution sectors, as well as allied product and service industries. It is focussed
on stimulating debate and innovation, providing solutions for the changing needs of the 21st century.
Energy 21C is a conference organized by industry, for industry.
www.e21c.com.au
Product Demonstration
• CSE-Uniserve will be showcasing GE Multilin products and services
The International WorkBoat Show is the largest commercial marine tradeshow in North America serving
people and businesses working on the coastal, inland and offshore waters. 1,000 exhibitors will display
products and services for commercial vessels and the companies that build, service and operate them.
www.workboatshow.com
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Upcoming Events
2007 Power-Gen December 11 - 13 New Orleans, Louisiana, United States
Join more than 17,000 industry professionals in New Orleans at the world’s largest power
generation event. This dynamic 3-day, multi-track conference program covers the most
important issues and trends impacting the industry, including:
• Power Industry Trends • Gas Turbine Technologies
• Competitive Power Generation • Renewable Emerging Technologies
• Environmental Issues • On-site Power
• Fossil Technologies • Plant Performance Issues
http://www.power-gen.com
Entering its 18th year, DistribuTECH provides more of the current resources, new
industry technologies and fast-track networking opportunities than any other
event in the industry. The Leading Annual T&D Event, DistribuTECH encompasses
automation and control systems, IT, T&D engineering, power delivery equipment and
water utility technology.
http://dt08.events.pennnet.com/fl/index.cfm
Product Demonstration
• Visit GE Multilin at Booth #3401
0904-v2
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Advanced Training
GE Multilin 2008 Course Calendar
Comprehensive Training Solutions for
Protection, Control and Automation
All North American courses are located in Markham, Ontario, Canada unless otherwise stated
*Tuition quoted in US dollars
Fundamentals of Modern
$2,400 2.8 2-5 15-18
Protective Relaying
All European courses are located in Bilbao, Spain unless otherwise stated
*Tuition quoted in US dollars
Course dates are subject to change. Please visit our website at www.GEMultilin.com/training for the most up-to-date schedule.
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Content Index
Articles Product Listings
Transmission Line Protection Principles 7 D90Plus Line Distance Protection System 82
GE Multilin
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