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74LS244 Octal 3-STATE Buffer/Line Driver/Line Receiver: General Description Features

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74LS244

Octal 3-STATE Buffer/Line Driver/Line Receiver


General Description Features
These buffers/line drivers are designed to improve both the ■ 3-STATE outputs drive bus lines directly
performance and PC board density of 3-STATE buffers/ ■ PNP inputs reduce DC loading on bus lines
drivers employed as memory-address drivers, clock driv-
■ Hysteresis at data inputs improves noise margins
ers, and bus-oriented transmitters/receivers. Featuring 400
mV of hysteresis at each low current PNP data line input, ■ Typical IOL (sink current) 24 mA
they provide improved noise rejection and high fanout out- ■ Typical IOH (source current) −15 mA
puts and can be used to drive terminated lines down to
■ Typical propagation delay times
133Ω.
Inverting 10.5 ns
Noninverting 12 ns
■ Typical enable/disable time 18 ns
■ Typical power dissipation (enabled)
Inverting 130 mW
Noninverting 135 mW

Ordering Code:
Order Number Package Number Package Description
DM74LS244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram Function Table


Inputs Output
G A Y
L L L
L H H
H X Z
L = LOW Logic Level
H = HIGH Logic Level
X = Either LOW or HIGH Logic Level
Z = High Impedance

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DM74LS244
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
Supply Voltage 7V the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Input Voltage 7V Characteristics tables are not guaranteed at the absolute maximum ratings.
Operating Free Air Temperature Range 0°C to +70°C The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Storage Temperature Range −65°C to +150°C

Recommended Operating Conditions


Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current −15 mA
IOL LOW Level Output Current 24 mA
TA Free Air Operating Temperature 0 70 °C

Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Min Typ Max
Symbol Parameter Conditions Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
HYS Hysteresis (VT+ − VT−) VCC = Min 0.2 0.4 V
Data Inputs Only
VOH HIGH Level Output Voltage VCC = Min, VIH = Min
2.7
VIL = Max, IOH = −1 mA
VCC = Min, VIH = Min
2.4 3.4 V
VIL = Max, IOH = −3 mA
VCC = Min, VIH = Min
2
VIL = 0.5V, IOH = Max
VOL LOW Level Output Voltage VCC = Min IOL = 12 mA 0.4
VIL = Max IOL = Max 0.5 V
VIH = Min
IOZH Off-State Output Current, VCC = Max VO = 2.7V 20 µA
HIGH Level Voltage Applied VIL = Max
IOZL Off-State Output Current, VIH = Min VO = 0.4V −20 µA
LOW Level Voltage Applied
II Input Current at Maximum VCC = Max VI = 7V 0.1 mA
Input Voltage
IIH HIGH Level Input Current VCC = Max VI = 2.7V 20 µA
IIL LOW Level Input Current VCC = Max V I = 0.4V −0.5 −200 µA
IOS Short Circuit Output Current VCC = Max (Note 3) −40 −225 mA
ICC Supply Current VCC = Max, Outputs HIGH 13 23
Outputs Open Outputs LOW 27 46 mA
Outputs Disabled 32 54
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.

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DM74LS244
Switching Characteristics
at VCC = 5V, TA = 25°C
Symbol Parameter Conditions Max Units

tPLH Propagation Delay Time CL = 45 pF


18 ns
LOW-to-HIGH Level Output RL = 667Ω
tPHL Propagation Delay Time CL = 45 pF
18 ns
HIGH-to-LOW Level Output RL = 667Ω
tPZL Output Enable Time to CL = 45 pF
30 ns
LOW Level RL = 667Ω
tPZH Output Enable Time to CL = 45 pF
23 ns
HIGH Level RL = 667Ω
tPLZ Output Disable Time CL = 5 pF
25 ns
from LOW Level RL = 667Ω
tPHZ Output Disable Time CL = 5 pF
18 ns
from HIGH Level RL = 667Ω
tPLH Propagation Delay Time CL = 150 pF
21 ns
LOW-to-HIGH Level Output RL = 667Ω
tPHL Propagation Delay Time CL = 150 pF
22 ns
HIGH-to-LOW Level Output RL = 667Ω
tPZL Output Enable Time to CL = 150 pF
33 ns
LOW Level RL = 667Ω
tPZH Output Enable Time to CL = 150 pF
26 ns
HIGH Level RL = 667Ω

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DM74LS244
Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B

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DM74LS244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D

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DM74LS244 Octal 3-STATE Buffer/Line Driver/Line Receiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide


Package Number N20A

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