12uyt PDF
12uyt PDF
12uyt PDF
VCC
RL
CL
Input
3
15 k
Cathode
9.0 mF
RP2 Go
Ref 10 M 1.0 mmho
Vref
1 1.78 V GM CP1
+ Rref RGM 20 pF CP2
500 k - 16 1.0 M RZ1 0.265 pF
8.25 k 15.9 k
Anode 2
TL431 OPEN-LOOP VOLTAGE GAIN VERSUS FREQUENCY Note that the transfer function now has an extra pole
60
formed by the load capacitance and load resistance.
Av, OPEN-LOOP VOLTAGE GAIN (dB)
0 60
-10
40
-20
101 102 103 104 105 106 107
f, FREQUENCY (Hz) 20
Figure 32. Example 1 Circuit Open Loop Gain Plot
Example 2. 0
IC = 7.5 mA, RL = 2.2 kW, CL = 0.01 mF. Cathode tied to
reference input pin. An examination of the data sheet -20
stability boundary curve (Figure 15) shows that this value of 101 102 103 104 105 106
load capacitance and cathode current is on the boundary. f, FREQUENCY (Hz)
Define the transfer gain. Figure 33. Example 2 Circuit Open Loop Gain Plot
The DC gain is: With three poles, this system is unstable. The only hope
GG R GoR for stabilizing this circuit is to add a zero. However, that can
M GM L
only be done by adding a series resistance to the output
(2.323)(1.0 M)(1.25 m)(2200) 6389 76 dB
capacitance, which will reduce its effectiveness as a noise
The resulting open loop Bode plot is shown in Figure 33.
filter. Therefore, practically, in reference voltage
The asymptotic plot may be expressed as the following
applications, the best solution appears to be to use a smaller
equation:
value of capacitance in low noise applications or a very
large value to provide noise filtering and a dominant pole
1 500jfkHz rolloff of the system.
Av 615
1 8.0jfkHz1 60 jfkHz1 7.2jfkHz
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