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Impedance Modeling and Analysis of Grid-Connected Voltage-Source Converters

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1254 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO.

3, MARCH 2014

Impedance Modeling and Analysis of


Grid-Connected Voltage-Source Converters
Mauricio Cespedes, Student Member, IEEE, and Jian Sun, Senior Member, IEEE

Abstract—This paper presents small-signal impedance modeling trol and the PLL-based grid synchronization introduce nonlin-
of grid-connected three-phase converters for wind and solar system earities which cannot be removed by reduced-order modeling
stability analysis. In the proposed approach, a converter is modeled techniques [10]. One method to deal with the control nonlinear-
by a positive-sequence and a negative-sequence impedance directly
in the phase domain. It is further demonstrated that the two se- ities is to transform the converter model into the dq reference
quence subsystems are decoupled under most conditions and can frame [11]. This method, however, has several limitations and
be studied independently from each other. The proposed models disadvantages, as discussed in [12]. The harmonic linearization
are verified by experimental measurements and their applications method [13] overcomes these limitations by modeling three-
are demonstrated in a system testbed. phase VSC impedance directly in the phase domain.
Index Terms—Converter stability, grid-connected converters, This paper applies the harmonic linearization technique
harmonic resonance, impedance modeling. to develop impedance models of three-phase VSCs with
PLL-based grid synchronization. A key step in the develop-
ment of the impedance models is the linearization of the grid-
I. INTRODUCTION
synchronization scheme. Since there exist several synchroniza-
HREE-PHASE voltage-source converters (VSCs) are the tion schemes [14], the approach taken here is to consider a basic
T basic building blocks for many applications in power sys-
tems, including grid integration of renewable energy [1] and
PLL, and show how it can be incorporated into the impedance
models. Possible variations are reviewed to highlight their mod-
energy storage [2], high-voltage dc transmission [3], as well eling approach. The rest of this paper is organized as follows:
as flexible ac transmission systems [4]. They are commonly Section II develops impedance models assuming perfect knowl-
referred to as grid-connected VSC in this paper. As for other edge of the grid voltage angle. Section III shows how to model
power electronic circuits, external behavior of such VSC can the PLL, and the approach to incorporate it into the impedance
be characterized by the impedances measured at the dc and the models. Section IV includes verifications of the proposed
ac terminals. Depending on the direction of power flow, the ac impedance models from both impedance measurements and
terminal impedance can be considered the input impedance (in their application in analysis of harmonic resonance. Section V
rectification mode) or the output impedance (in inversion mode), concludes this paper.
and will be simply referred to as the impedance in this study.
One important use of the impedance of a grid-connected VSC II. IMPEDANCE MODELING WITHOUT PLL
is in the analysis of stability and resonance between the converter The three-phase VSC considered in this paper is depicted
and the grid, including that with the filter of the converter [5]. In in Fig. 1. Phase voltages are denoted as va , vb , and vc , while
particular, it was shown in [6] that a grid-connected VSC used phase currents as ia , ib , and ic . Considering the large dc bus
for grid integration of renewable energy can be modeled as a capacitors, and the lower than fundamental frequency control
current source in parallel with an impedance, and the inverter- bandwidth of the dc bus voltage, Vdc is assumed constant in this
grid system stability can be determined by applying the Nyquist study. For the same reason, the active and reactive parts of the
stability criterion [7] to the ratio between the grid impedance current references (Idr and Iqr ) are assumed constant. In the
and the VSC impedance. time domain, the phase voltage with a small-signal perturbation
Most grid-connected VSCs use current control in a rotat- can be written as
ing (dq) reference frame [8], which is synchronized to the
va (t) = V1 cos (2πf1 t) + Vp cos (2πfp t + φvp )
fundamental component of the grid voltages by means of a (1)
phase-locked loop (PLL) [9]. Both the dq-domain current con- + Vn cos (2πfn t + φvn )

where V1 corresponds to the magnitude of the fundamental volt-


age at frequency f1 , Vp with φvp correspond to the magnitude
Manuscript received October 23, 2012; revised March 8, 2013; accepted and phase of the positive-sequence perturbation at frequency
April 10, 2013. Date of current version September 18, 2013. This work was
supported in part by GE Global Research Center and in part by the National
fp , and Vn with φvn correspond to the magnitude and phase of
Science Foundation under Award #1002265. Recommended for publication by the negative-sequence perturbation at frequency fn . Other phase
Associate Editor M. Liserre. voltages can be inferred from (1). In the frequency domain, (1)
The authors are with the Department of Electrical, Computer, and Systems
can be written as follows:
Engineering, Rensselaer Polytechnic Institute, Troy, NY 12180 USA (e-mail: ⎧
cespem@rpi.edu; jsun@rpi.edu). ⎨ V1 , f = ±f1
Color versions of one or more of the figures in this paper are available online
Va [f ] = Vp , f = ±fp (2)
at http://ieeexplore.ieee.org. ⎩
Digital Object Identifier 10.1109/TPEL.2013.2262473 Vn , f = ±fn
0885-8993 © 2013 IEEE
CESPEDES AND SUN: IMPEDANCE MODELING AND ANALYSIS OF GRID-CONNECTED VOLTAGE-SOURCE CONVERTERS 1255

ia ib ic PLL

iar
ca Hi(s) Idr

ibr dq
cb Hi(s)
– abc Iqr
icr
cc Hi(s)

Fig. 2. Block diagram of a phase-domain current controller.

A. Phase-Domain Current Control


Fig. 2 depicts a phase-domain current controller. To find
the frequency-domain response of the controller to the har-
monic perturbation, first neglect the PLL dynamics, such that
θPLL (t) = θ1 (t) ≡ 2πf1 t. Hence the reference currents iar , ibr ,
and icr are not affected by the perturbation. As a result, the se-
quence components in the modulating signals may be found as
follows:

−Hi (s) Gi (s) Ip + Kf (s) Gv (s) Vp , f = ±fp
Fig. 1. Block diagram of three-phase VSC for grid-connected applications. Ma [f ] =
−Hi (s) Gi (s) In + Kf (s) Gv (s) Vn , f = ±fn
(7)
where Vp = (Vp /2)e±j φ vp and others follow the same notation. where Hi (s) is a current control compensator, Kf (s) is a feed-
The current response to the voltage perturbation can be found forward gain, and
from the converter averaged model
⎡ ⎤ ⎡ ⎤ ⎡ ⎤ 1 − e−sT i 1
ia m̄a va Gi (s) = e−sT i (8)
d ⎢ ⎥ ⎢ sTi 1 + s/ωi
⎥ ⎢ ⎥
L ⎣ ib ⎦ = ⎣ m̄b ⎦ Km Vdc − ⎣ vb ⎦ (3)
dt models the current sampling delay, with Ti representing the
ic m̄c vc sampling interval and ωi its ADC prefilter cutoff frequency.
where ma , mb , and mc are the modulating (reference) signals for Similarly
the pulse width modulation (PWM), and Km is the modulator
1 − e−sT v 1 1
gain. The relationship between duty ratios and the modulating Gv (s) = e−sT v (9)
signal is taken as follows: sTv 1 + s/ωv 1 + s/ωtv

da1 = Km m̄a + 1/2 (4) models the voltage sampling delay, with Tv representing the
sampling interval, ωv its ADC prefilter cutoff frequency, and ωtv
da2 = 1 − da1 (5) its transducer delay. Since Vp does not result in any negative-
where da1 and da2 are the duty ratios of Sa1 and Sa2 , respectively. sequence response in Ma , and Vn does not result in any positive-
Other phases follow the same convention. sequence response either, sequence components are decoupled
In order to solve (3) for impedance in the frequency domain, from each other. Introducing (7) in the frequency-domain ver-
the sequence components in the modulating signals should be sion of (3), impedance models can be found as follows:
found as functions of the voltage and current perturbations. Km Vdc Hi (s) Gi (s) + sL
Then, positive-sequence impedance is defined as the ratio of Zp (s) = Zn (s) = (10)
1 − Km Vdc Kf (s) Gv (s)
Vp to −Ip , and negative-sequence impedance is defined as the
ratio of Vn to −In . Coupling should also be examined. Both where Zp (s) and Zn (s) denote positive-sequence and negative-
phase- and dq-domain current control strategies will be consid- sequence impedances, respectively.
ered here, which use Park’s transformation defined as follows:
⎡ ⎤
cos θ cos (θ − 2π/3) cos (θ + 2π/3) B. Dq-Domain Current Control
2⎢ ⎥
T (θ) = ⎣ − sin θ − sin (θ − 2π/3) − sin (θ + 2π/3) ⎦. Fig. 3 depicts a dq-domain current controller. Recall that
3
1/2 1/2 1/2 currents id and iq are outputs of a dq-domain transformation,
(6) which in the frequency domain involves a convolution of the
An inductive output filter is assumed in Fig. 1. Additional frequency components in the phase currents, with the frequency
filter elements (such as in the case when an LCL is used) can be components in Park’s transformation. Taking θPLL (t) = θ1 (t),
handled by simply modifying (3). the frequency components in Park’s transformation are easy to
1256 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

Fig. 4. Block diagram of a basic PLL.

III. IMPEDANCE MODELING WITH PLL

Fig. 3. Block diagram of a dq-domain current controller. A. Small-Signal Modeling of the PLL
Fig. 4 depicts a basic PLL, where HPLL (s) is the loop com-
TABLE I pensator. The first step to develop a small-signal model for this
FREQUENCY COMPONENTS IN dq-DOMAIN CURRENT CONTROLLER OUTPUT
NEGLECTING PLL DYNAMICS PLL is to model the response of vq (t) to the voltage perturbation
described by (1). In order to deal with the nonlinearity in Park’s
transformation, we break the transformation into two parts as
follows:
⎡ ⎤
cos (Δθ (t)) sin (Δθ (t)) 0
⎢ ⎥
T (θPLL (t)) = ⎣ − sin (Δθ (t)) cos (Δθ (t)) 0 ⎦T (θ1 (t))
0 0 1
(15)
where Δθ(t) = θPLL (t) − θ1 (t). Let vdv (t) and vqv (t) be de-
fined, respectively, as the d and q outputs of applying T(θ1 (t))
to (1), which in the frequency domain are easily found to be
derive, and the result of the convolution is as follows: ⎧
⎧ ⎪
⎨ V1 , dc

⎨ I1 cos φi1 , dc Vdv [f ] = Gv (s ± j2πf1 ) Vp , f = ±(fp − f1 ) (16)
Id [f ] = Gi (s ± j2πf1 ) Ip , f = ± (fp − f1 ) (11) ⎪


⎩ Gv (s ∓ j2πf1 ) Vn , f = ± (fn + f1 )
Gi (s ∓ j2πf1 ) In , f = ± (fn + f1 )
⎧ ∓jGv (s ± j2πf1 ) Vp , f = ± (fp − f1 )
⎪ Vqv [f ] = (17)
⎨ I1 sin φi1 , dc ±jGv (s ∓ j2πf1 ) Vn , f = ± (fn + f1 ) .
Iq [f ] = ∓jGi (s ± j2πf1 ) Ip , f = ± (fp − f1 ) (12)

⎩ For simplicity, we linearize the rotation matrix in (15) around
±jGi (s ∓ j2πf1 ) In , f = ± (fn + f1 )
the operating point Δθ0 = 0, which is possible for balanced,
where I1 and φi 1 correspond to the amplitude and phase of the nondistorted voltage conditions [9]. Then, vq (t) is given by
fundamental current. Sampling at the fundamental frequency vq (t) ≈ −Δθ (t) vdv (t) + vqv (t) . (18)
is neglected since Gi (±j2πf1 ) ≈ 1. From the control block
diagram, Cd and Cq can be obtained as linear combinations By the harmonic linearization principle, we can remove terms
of (11) and (12) using Hi (s) and the decoupling gain Kd . A proportional to second and higher-orders of the perturbation.
convolution of the frequency components in Cd and Cq with Hence, from (16) and the fact that Δθ0 = 0, we should only
the frequency components in the inverse Park’s transformation consider terms in Δθ(t) proportional to the first order of the
gives Ca , Cb , and Cc . Table I shows the possible combinations perturbation. Let
to consider in the convolution. Note that Vp does not result in
Gp (s) Gv (s ± j2πf1 ) Vp , f = ± (fp − f1 )
any negative-sequence response at fp , and Vn does not result Δθ [f ] =
in any positive-sequence response at fn , which means there Gn (s) Gv (s ∓ j2πf1 ) Vn , f = ± (fn + f1 )
is no impedance coupling. The nonlinear coupling at ±(fp − (19)
2f1 ) and ±(fn + 2f1 ) is neglected for impedance modeling where Gp (s) and Gn (s) are two transfer functions that need to
in the phase domain. Combining the controller output with the be determined. Then, the result of (18) is as follows:
voltage feedforward yields the modulating signals to introduce Vq [f ] =
in the frequency-domain version of (3), which can be solved for
sequence impedances as follows: [−Gp (s) V1 ∓ j] Gv (s ± j2πf1 ) Vp , f = ± (fp − f1 )
[−Gn (s) V1 ± j] Gv (s ∓ j2πf1 ) Vn , f = ± (fn + f1 )
Km Vdc [Hi (s − j2πf1 ) − jKd ] Gi (s) + sL
Zp (s) = (13) (20)
1 − Km Vdc Kf (s) Gv (s)
where terms proportional to second or higher order of the per-
Km Vdc [Hi (s + j2πf1 ) + jKd ] Gi (s) + sL
Zn (s) = . (14) turbations have been removed. Note that Δθ = HPLL (s)Vq
1 − Km Vdc Kf (s) Gv (s) except for f = ±f1 ; then, from (20), we can solve for Gp (s)
CESPEDES AND SUN: IMPEDANCE MODELING AND ANALYSIS OF GRID-CONNECTED VOLTAGE-SOURCE CONVERTERS 1257

Note that it is assumed that the actual converter current is


equal to its reference at the fundamental frequency, such that
I1 ≡ (I1 /2)e±j φ i 1 . The current regulator acts on the current ref-
erence and feedback to generate Ca . Including the feedforward
path and introducing the result in the frequency-domain version
of (3), impedance models can be found as follows:
Zp (s) = [Km Vdc Hi (s) Gi (s) + sL] · 1 − Km Vdc Kf (s) Gv (s)

   −1
I1 j φ i 1 Km Vdc
− Hi (s) e TPLL (s − j2πf1 ) Gv (s)
2 V1

(27)

Zn (s) = [Km Vdc Hi (s) Gi (s) + sL] · 1 − Km Vdc Kf (s) Gv (s)

   −1
Fig. 5. Frequency response of cosine of PLL angle to perturbation in phase I 1 −j φ i 1 Km Vdc
a voltage. Solid lines: model prediction; Dashed-dotted lines: experimental − Hi (s) e TPLL (s + j2πf1 ) Gv (s) .
measurements. 2 V1

(28)
and Gn (s) as follows:
C. Dq-Domain Current Control and PLL
Gp (s) = [∓jHPLL (s)] / [1 + V1 HPLL (s)] (21)
Due to the PLL, the current feedback after convolution
Gn (s) = [±jHPLL (s)] / [1 + V1 HPLL (s)] . (22) with Park’s transformation includes frequency components pro-
The final step is to obtain the response of cos(θPLL (t)) from portional to the voltage perturbation. Neglecting second-order
cos(Δθ(t) + θ1 (t)). The Laplace transform of cos(θPLL (t)) for terms, the convolution of phase currents with Park’s transfor-
a positive-sequence perturbation is obtained as follows: mation gives

1 HPLL (s − j2πf1 ) Gv (s) Id[±(fp − f1 )] = I1 sin φi1 Gp (±j2π (fp − f1 ))


L {cos (θPLL (t))} = Vp (s) .
2 1 + V1 HPLL (s − j2πf1 ) × Gv (±j2πfp ) Vp + Gi (±j2πfp ) Ip (29)
(23)
For a negative-sequence perturbation Id[±(fn + f1 )] = I1 sin φi1 Gn (±j2π (fn + f1 ))

1 HPLL (s + j2πf1 ) Gv (s) × Gv (±j2πfn ) Vn + Gi (±j2πfn ) In (30)


L {cos (θPLL (t))} = Vn (s) .
2 1 + V1 HPLL (s + j2πf1 ) Iq[±(fp − f1 )] = −I1 cos φi1 Gp (±j2π (fp − f1 ))
(24)
The proposed PLL model has been verified by experi- × Gv (±j2πfp ) Vp ∓ jGi (±j2πfp ) Ip (31)
ments. A sweep of the response in cos(θPLL (t)) to a super- Iq[±(fn + f1 )] = −I1 cos φi1 Gn (±j2π (fn + f1 ))
imposed perturbation in va is depicted in Fig. 5 for a 100-Hz
PLL bandwidth. The parameters of the experimental setup are × Gv (±j2πfn )Vn ± jGi (±j2πfn ) In . (32)

V1 = 120 2 V, f1 = 60 Hz, Tv = 50 μs, ωv = 2π·5 krad/s, The current regulator acts on the feedback currents to gener-
ωtv = 2π·5 krad/s, and HPLL (s) = (Kp +Ki /s)/s, where Kp = ate the dq-domain modulating signals. These signals are convo-
2.62 and Ki = 1650. For future reference, define the closed-loop luted with inverse Park’s transformation to generate their phase-
gain of the PLL as domain counterparts. Table II lists the resulting frequency terms
TPLL (s) = V1 HPLL (s) / [1 + V1 HPLL (s)] . (25) proportional to the first order of the perturbation, where non-
linear coupling should be neglected. Including the feedforward
path and introducing the result in the frequency-domain version
of (3), impedance models can be found as follows:
B. Phase-Domain Current Control and PLL
Zp (s) = {Km Vdc [Hi (s − j2πf1 ) − jKd ] Gi (s) + sL}
Due to the PLL, the current references contain a response to 
C1 j φ c 1
the perturbation as follows: · 1 − Km Vdc Kf (s) Gv (s) − e
⎧ 2

⎨I1 , f = ±f1 
I1 j φ i 1 I1 j φ i 1
Iar [f ] = [TPLL (s ∓ j2πf1 ) /V1 ] I1 Gv (s) Vp , f = ±fp + Hi (s − j2πf1 ) e −jKd e

⎩ 2 2
[TPLL (s ± j2πf1 ) /V1 ] I∗1 Gv (s) Vn , f = ±fn −1
(26) Km Vdc
× TPLL (s − j2πf1 ) Gv (s) (33)
where I∗1 is the complex conjugate of I1 = (1/2) (Idr ± j Iqr ). V1
1258 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

TABLE II
FREQUENCY COMPONENTS IN dq-DOMAIN CURRENT CONTROLLER OUTPUT
INCLUDING PLL DYNAMICS

Fig. 7. Magnitude plot of the frequency response of the SOGI-FLL. Solid


lines: model prediction; Dots: numerical simulation results.

TABLE III
CONVERTER CIRCUIT PARAMETERS

domain response in the synchronization signals can be found as


Fig. 6. Block diagram of the SOGI-FLL.
follows:
   
X1 (s) kω1 + γV12 s / s2 − ω12
= (36)
Vα (s) s + ω12 /s + kω1 + (γV12 s) / (s2 − ω12 )
Zn (s) = {Km Vdc [Hi (s + j2πf1 ) + jKd ] Gi (s) + sL}  2 
X2 (s) γV1 s / (2ω1 )
 =−
· 1 − Km Vdc Kf (s) Gv (s) −
C1 −j φ c 1
e Vα (s) s2 − ω12
2    
 kω1 + γV12 s / s2 − ω12
I1 I1 +
+ Hi (s + j2πf1 ) e−j φ i 1 +jKd e−j φ i 1 s + ω12 /s + kω1 + (γV12 s) / (s2 − ω12 )
2 2  
−1 ω1 γV12 s
× + . (37)
× TPLL (s + j2πf1 ) Gv (s)
Km Vdc
(34) s 2ω1 (s2 − ω12 )
V1
The harmonic linearization principle has been used to remove
where C 1 = Cd /2 ± jCq /2 = (C1 /2)e±j φ c 1 , taking Cd as the
frequency components in x1 , x2 , and x3 that are proportional to
dc component of Cd [f ], and Cq as the dc component of Cq [f ].
second or higher-order powers of the perturbation. The models
These dc components can be computed from
in (36) and (37) are compared against point-by-point numeri-
C1 = {j2πf1 L + V1 [1 − Km Vdc Kf (j2πf1 )]} / (Km Vdc ) . cal simulation of the filter frequency response in Fig. 7 (only
(35) magnitude plots are shown due to space limitations). The √ pa-
rameters used in simulations are as follows: V1 = 120 2 V,
ω1 = 2π · 60 rad/s, k = 1, and γ = 0.1. For the more com-
D. Other Grid Synchronization Methods plex three-phase application, positive- and negative-sequence
perturbations should be considered separately.
Some advanced PLL structures, such as the decoupled double-
synchronous PLL [15], use the same building block of Fig. 4 in
IV. IMPEDANCE MODEL VERIFICATIONS
multiple stages, such that the same modeling method is applica-
ble to them. Other forms of grid-synchronization, such as those A three-phase converter has been built and tested to verify
based on the second-order generalized integrator frequency- the proposed impedance models. The current controller was
locked loop (SOGI-FLL) [16], need slightly different treatment, implemented in a DE-2 FPGA from Altera, while the cur-
as outlined below. rent references were generated from a PLL implemented in a
Fig. 6 depicts the basic building block of the SOGI-FLL. In TMS320F28335 DSP from TI. Parameters for this experimental
three-phase systems, two filters can be used in the αβ-reference setup are provided in Table III. The converter
√ operating point is
frame to extract sequence components. The basic functionality described by Vdc = 550 V, V1 = 120 2 V, I1 = 10 A, φi 1 =
of the filter is to extract a sinusoidal component in phase with 0 rad, f1 = 60 Hz, and Km = 1/2.
vα in x1 , and a quadrature component in x2 that lags x1 by 90◦ . The converter is connected to a grid as depicted in Fig. 8.
Applying a superimposed perturbation in vα , the frequency- The grid impedance at the converter terminals is the same in the
CESPEDES AND SUN: IMPEDANCE MODELING AND ANALYSIS OF GRID-CONNECTED VOLTAGE-SOURCE CONVERTERS 1259

ia va TABLE IV
SAMPLING DELAYS WITH CURRENT CONTROL IN DSP

Utility Grid
ib vb
Vdc
ic vc

L Lg
VSC Rd

Cf

Fig. 8. Block diagram of converter connection to the grid.

Fig. 10. Impedance response with dq-domain current control and feedforward
decoupling. Solid lines: positive-sequence; Dashed lines: negative sequence;
Dots represent frequency response analyzer measurements.

Fig. 9. Impedance response with phase-domain current control. Solid lines: B. Dq-Domain Current Control
positive-sequence; Dashed lines: negative sequence; Dots represent frequency
response analyzer measurements. Due to the complexity of a dq-domain current controller, the
current controller has been moved to the DSP and only the
PWM stage is left in the FPGA. Since the PWM stage in this
positive- and the negative-sequence domain
case samples ma , mb , and mc , additional time delays should be
 −1   −1 −1 included. In order to include them, both sampling terms Gi (s)
Zg (s) = sLg + Rd + 1/ sCf (38)
and Gv (s) should be multiplied by
where Lg is the grid inductance, and Rd with Cf constitute a 1 − e−sT m 1
damped filter. The grid parameters used in the experiments are Gm (s) = e−sT m · (41)
sTm 1 + s/ωm
Lg = 3.75 mH, Rd = 1.87 Ω, and Cf = 22 μF.
where Tm is the sampling interval of the PWM and ωm is
its associated ADC prefilter cutoff frequency. In this case, the
A. Phase-Domain Current Control
parameters of the circuit stage are those listed in Table IV.
The additional time delays due to the sampling of the current For the dq-domain current controller, the compensator is se-
references from the DSP are neglected. In this case, the current lected as follows:
compensator transfer function is Ki
Hi (s) = Kp + (42)
Ki s s
Hi (s) = Kp + (39)
s2 + (2πf1 )2 where Kp = 0.04578 and Ki = 43.15. The decoupling gain is set
to Kd = 0.00411. The PLL design is the same as in Section IV-A.
where Kp = 0.118 and Ki = 776. The PLL compensator gain The controller outputs are Cd = 0 and Cq = 0.0411 for a
is feedforward gain given by Kf = (Km Vdc )−1 .
Measurements of sequence impedances are depicted in
HPLL (s) = (Kp + Ki /s) /s (40) Fig. 10. The feedforward decoupling has been used to increase
the magnitude of the inverter impedance, but it also reduces
where Kp = 0.262 and Ki = 16.5. The feedforward gain Kf is
damping, which may lead to resonance in weak grids.
set to zero.
Measurements of sequence impedances are depicted in Fig. 9.
C. Effects of Unbalance
At harmonic frequencies, the impedance responses resemble se-
ries CRL circuits due to the integral gain of the current controller, An unbalanced condition in the phase voltages causes a sec-
its proportional gain, and the converter inductance, respectively. ond harmonic oscillation of the dq-domain variables used in
1260 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 3, MARCH 2014

Fig. 11. Magnitude response in q-axis voltage for a positive-sequence per-


turbation in presence of unbalance: (a) response independent of unbalance; (b)
response due to unbalance. Solid lines: model prediction; Dashed-dotted lines:
numerical simulation.

Fig. 13. Harmonic resonance of the converter-grid system described in Fig. 10:
Fig. 12. Magnitude plot of the inverter admittance swept by numerical simu-
(a) Phase current waveforms; (b) sequence components.
lation when grid voltage has 5% negative-sequence voltage at 60 Hz. Solid lines:
balanced model prediction; Dashed-dotted lines: numerical simulation results.
The unbalanced voltage has 5% negative-sequence. The results
the PLL for grid synchronization. The second harmonic com- from sweeping the inverter admittances are depicted in Fig. 12
ponent in Δθ(t) can lead to coupling of sequence impedances. (only magnitude plots are shown), where the following defini-
Consider, for example, a positive-sequence perturbation of the tions are used:
     
PLL, while a small negative-sequence voltage V2 is also im- −Ip (s) Ypp (s) Ypn (s) Vp (s)
pressed on the phase voltages at the fundamental frequency. = . (45)
−In (s) Ynp (s) Ynn (s) Vn (s)
The voltage vq (t) in this case responds at two different frequen-
cies ±(fp −f1 ) and ±(fp +f1 ). The former is the characteristic
The off-diagonal admittances are significantly smaller above
PLL response to the perturbation, while the latter is due to V2 .
100 Hz, which verifies the fact that coupling terms can be ne-
These responses can be found as follows:
glected for conventional PLL designs not exceeding a few tens
   
 Vq [fp − f1 ]   −j  of hertz.
  = 
 Vp [fp ]   1 + V1 HPLL (j2π (fp − f1 )) 
D. Applications of the Models
≈ 1 ∀ (fp f1 ) (43)
   One application of the proposed impedance models is in the
 Vq [fp + f1 ]  
   analysis and mitigation of harmonic resonance problems. Be-
 Vp [fp ]  = − j [TPLL (j2πf1 ) − TPLL (j2π (fp − f1 ))]
cause of the decoupling between the two sequence subsystems,
  
V2 [f1 ]   V2 [f1 ]  the stability criterion presented in [6] for grid-connected con-
≈ ∀ (fp f1 ) . (44)
V1   V1 
verters can be applied to each sequence impedance separately
to determine overall converter-grid system stability. Addition-
Note that (44), responsible for any coupling of sequence com- ally, the analytical impedance models also provide a basis for
ponents, is directly proportional to the per-unit voltage unbal- modification of the converter control to mitigate any harmonic
ance. Thus, at harmonic frequencies, a 10% voltage unbalance resonance and other instability problems.
should result in a coupling term at least 20 dB below the char- As an example, consider the converter-grid systems described
acteristic PLL response. It is possible to verify (43) and (44) in by Fig. 9 and Fig. 10. The time-domain waveform corresponding
simulations, as depicted in Fig. 11 for a 100-Hz design. to Fig. 10 is shown in Fig. 13. At 440 Hz, the inverter positive-
To illustrate the coupling in the sequence impedances dur- sequence impedance intersects with the grid impedance and the
ing unbalance, a switching-circuit simulation model in Saber is phase difference is almost 180◦ . This explains the harmonic
used to sweep the inverter admittance, while a small grid voltage resonance in Fig. 13(a). Fourier analysis of the phase currents
unbalance is imposed at 60 Hz. The converter power stage and reveals a large positive-sequence component around the seventh
current control use the same parameters from the experimental harmonic [see Fig. 13(b)], which correlates to the impedance in-
setup with dq-domain current control, but the feedforward and tersection frequency. Based on the developed impedance mod-
time delays are removed. The PLL bandwidth is set to 100 Hz. els, the harmonic resonance can be eliminated by modifying the
CESPEDES AND SUN: IMPEDANCE MODELING AND ANALYSIS OF GRID-CONNECTED VOLTAGE-SOURCE CONVERTERS 1261

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loads,” Ph.D. dissertation, Purdue Univ., West Lafayette, IN, USA, 1997.
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Fig. 14. Phase current waveforms for the system described in Fig. 9.
2009.
[13] J. Sun, Z. Bing, and K. J. Karimi, “Input impedance modeling of multi-
inverter control to increase the phase margin at the frequency pulse rectifiers by harmonic linearization,” IEEE Trans. Power Electron.,
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the measured grid currents using the converter design corre- [14] S. Golestan, M. Monfared, and F. D. Freijedo, “Design-oriented study of
advanced synchronous reference frame phase-locked loops,” IEEE Trans.
sponding to the impedance plots in Fig. 9, which in this case Power Electron., vol. 28, no. 2, pp. 765–778, Feb. 2013.
eliminates the harmonic resonance problem. The phase-domain [15] P. Rodriguez, J. Pou, J. Bergas, J. I. Candela, R. P. Burgos, and
current controller in this case presents better impedance com- D. Boroyevich, “Decoupled double synchronous reference frame PLL for
power converters control,” IEEE Trans. Power Electron., vol. 22, no. 2,
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system impedances, phase differences are far from 180◦ . [16] P. Rodriguez, A. Luna, R. S. Muñoz-Aguilar, I. Etxeberria-Otadui,
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V. CONCLUSION der adverse grid conditions,” IEEE Trans. Power Electron., vol. 27, no. 1,
pp. 99–112, Jan. 2012.
Grid-connected VSC impedance models can be used to as-
sess system level converter-grid compatibility and power qual-
ity. Impedance modeling in the phase domain yields decoupled Mauricio Cespedes (S’08) received the B.S. degree
positive- and negative-sequence converter impedances, when from the University of Costa Rica in San Jose, Costa
Rica, and the M.S. degree from Rensselaer Polytech-
phase- or dq-domain current control systems are implemented. nic Institute, Troy, NY, where he is currently working
As a result, the contributions in this paper enable single-input toward the Ph.D. degree, all in electrical engineering.
single-output stability analysis of balanced three-phase con- His research interests include modeling and con-
trol of three-phase voltage-source converters, their
verter systems. For the kind of nonlinearity in Park’s transfor- integration to the electric grid, and system stability
mation, coupling of converter sequence impedances may occur analysis.
during unbalanced phase voltage conditions. For most practical
conditions with small voltage unbalance, the coupling can be
neglected. Jian Sun (M’95–SM’09) received the B.S. degree
from the Nanjing Institute of Aeronautics, Nanjing,
ACKNOWLEDGMENT China, the M.S. degree from the Beijing Univer-
sity of Aeronautics and Astronautics, Beijing, China,
The authors would like to thank Dr. Z. Jiang of GE Global and the Dr.Eng. (Ph.D.) degree from the University
Research Center for his technical inputs. of Paderborn, Paderborn, Germany, all in electrical
engineering.
REFERENCES He was a Postdoctoral Fellow with the School of
Electrical and Computer Engineering, Georgia Insti-
[1] F. Blaabjerg, C. Zhe, and S. B. Kjaer, “Power electronics as efficient tute of Technology, from 1996 to 1997. He worked
interface in dispersed power generation systems,” IEEE Trans. Power in the Advanced Technology Center of Rockwell
Electron., vol. 19, no. 5, pp. 1184–1194, Sep. 2004. Collins, Inc., from 1997 to 2002, where he led research on advanced power
[2] M. H. Ali, B. Wu, and R. A. Dougal, “An overview of SMES applications conversion for aerospace applications. In August 2002, he joined the Rensselaer
in power and energy systems,” IEEE Trans. Sustainable Energy, vol. 1, Polytechnic Institute, Troy, NY where he is currently a Professor and Director
no. 1, pp. 38–47, Apr. 2010. of the New York State Center for Future Energy Systems. His research interests
[3] N. Flourentzou, V. G. Agelidis, and G. D. Demetriades, “VSC-based are in the general area of power electronics and energy conversion, with a focus
HVDC power transmission systems: An overview,” IEEE Trans. Power on modeling, control, as well as applications in aerospace and renewable energy
Electron., vol. 24, no. 3, pp. 592–602, Mar. 2009. systems. He has published more than 160 journal and conference papers on
[4] J. Xia, X. Fang, J. H. Chow, A. Edris, E. Uzunovic, M. Parisi, and these subjects, and holds nine U.S. patents.
L. Hopkins, “A novel approach for modeling voltage-sourced converter- Dr. Sun is a Senior Member of the IEEE Power Electronics Society. He cur-
based FACTS controllers,” IEEE Trans. Power Del., vol. 23, no. 4, rently serves as the Editor-in-Chief of the IEEE POWER ELECTRONICS LETTERS
pp. 2591–2598, Oct. 2008. and was the Guest Editor for the IEEE TRANSACTIONS ON POWER ELECTRONICS
[5] J. He and Y. W. Li, “Generalized closed-loop control schemes with em- Special Issue on Modeling and Advanced Control published in 2009. He was
bedded virtual impedances for voltage source converters with LC or LCL the Chair of the IEEE Power Electronics Society’s Technical Committee on
filters,” IEEE Trans. Power Electron., vol. 27, no. 4, pp. 1850–1861, Apr. Power and Control Core Technologies until December 2012 and became the
2012. Treasurer of PELS in January 2013. He was the General Chair of IEEE COM-
[6] J. Sun, “Impedance-based stability criterion for grid-connected inverters,” PEL’06 Workshop and was involved in the organization of several other PELS
IEEE Trans. Power Electron., vol. 26, no. 11, pp. 3075–3078, Nov. 2011. conferences.

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