IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Received 11 November 2016; revised 26 December 2016; accepted 11 January 2017. Date of publication 17 January 2017;
date of current version 10 February 2017.
Digital Object Identifier 10.1109/JXCDC.2017.2654300

Nonboolean Pattern Recognition Using

Chains of Coupled CMOS Oscillators
as Discriminant Circuits
VAHNOOD POURAHMAD1,2 , SASIKANTH MANIPATRUNI3 (Member, IEEE),
DMITRI NIKONOV3 (Member, IEEE), IAN YOUNG3 (Fellow, IEEE),
and EHSAN AFSHARI1,2 (Senior Member, IEEE)
1 Department of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA
2 Department of Electrical and Computer Engineering, University of Michigan, Ann Arbor, MI, USA
3 Intel Corporation, Hillsboro, OR, USA

CORRESPONDING AUTHOR: V. Pourahmad (vp87@cornell.edu)

This work was supported by the MSR Intel program 2346.001 via Semiconductor Research Corporation. This paper has supplementary
downloadable material available at http://ieeexplore.ieee.org., provided by the author. This consists of a PDF file containing additional
information not included in the paper. This material is 2.14 MB in size.

ABSTRACT Networks of weakly coupled oscillators are special cases of Hopfield networks and as such
may be used in building physical systems capable of associative memory recall and pattern recognition.
However, the existing architectures are not suitable for hardware implementation mainly due to the complex-
ity of required couplings between the oscillators. In this paper, we propose an alternative way of using coupled
oscillators in what we call ‘‘discriminant circuits’’ in analogy to the concept of ‘‘discriminant functions’’
in the field of artificial intelligence and machine learning. The main advantage of our system is in the
simplicity of its architecture, which relies only on local couplings between adjacent oscillators. Using this
architecture, we design a network of coupled CMOS oscillators as the core of a physical non-Boolean pattern
recognition engine. The simplicity of the proposed circuit makes it readily implementable on any standard
CMOS technology.

INDEX TERMS Associative memory, CMOS integrated circuits, coupled oscillators, Hopfield neural net-
works, ring oscillators.

I. INTRODUCTION Hebbian learning rule [11], [13], which determines the

R ECENTLY, there has been a rise of interest in using

coupled oscillators as non-Boolean processors [1]–[6].
Non-Boolean processing refers to a set of computational tasks
coupling properties of the network and is formulated as
m
X (k) (k)
Cij = ξi ξj (1)
that are usually associated with the realm of artificial intelli-
k=1
gence and machine learning, such as pattern recognition and
associative memory recall. What these computational prob- where Cij is a complex number that determines the properties
lems have in common is the inefficiency, if not impossibil- (strength and inherent phase shift) of the coupling from the jth
ity, of developing algorithms based solely on combinational to the ith oscillator, ξ (k) denotes the kth pattern to be stored
(Boolean) logic for their solutions. in the network, and m is the total number of patterns to be
Networks of coupled oscillators have already been studied stored. A short derivation of Hebbian learning rule from the
as special examples of Hopfield [7]–[9] networks that are Kuramoto [15]–[17] model of weakly coupled oscillators is
famously capable of image reconstruction and associative presented in the Supplementary Material.
memory recall [10], [11], [13], [14]. However, it is diffi- Hoppensteadt et al. [11] proposed an elegant way of
cult to see how these theoretical considerations can be used bypassing the connectivity problem in the networks of cou-
to realize a physical associative memory engine. The main pled oscillators. In their approach, there are no direct connec-
reason for this is that in general, a network of n oscilla- tions between the oscillators and instead they are all coupled
tors requires n2 programmable connections between oscilla- through a shared medium. The shared medium, however,
tors [11], [12]. This can be easily seen from the well-known needs to be excited by a carefully constructed signal so that
2329-9231
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 IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

the final mathematical equations governing the dynamics of the greatest degree of flexibility, discriminant circuits would
oscillators are identical to that of the fully connected network offer much faster processing speeds. Convergence to the final
with coupling coefficients given by (1). This approach does steady state in the networks of coupled oscillators typically
not fully solve the connectivity problem and instead trades it takes a few hundred oscillation cycles. Therefore, faster pro-
with another, perhaps equally hard, problem of generating the cessing speeds are achieved if oscillators with higher free
required global signal that excites the shared medium [11]. running frequencies are used in forming the network. It is
Also the network design becomes complicated for larger n, also worth mentioning that while it is true that convergence to
making it difficult to realize large networks of coupled oscil- the steady state may take longer in longer chains of coupled
lators [11]. The possibility that oscillators will be connected oscillators, the average convergence time does not seem to
to the shared medium by wires of different lengths that will get impractically long. In fact, our numerical simulations
also have different signal delays is a reason for concern. showed that in changing the length of an oscillator chain from
In fact, a physical implementation of this idea as reported 25 to 50 to 100, the median of the (normalized) convergence
in [14] was limited to a network of eight oscillators and also time increased from 93.75 to 112.3 and 128.8 (normalized
required an off-chip signal generator for exciting the shared time units), respectively. That is to say, the median conver-
medium. gence time seems to rise sublinearly with the chain size.
In the Supplementary Material, we also show how the prob- The rest of this paper is organized as follows.
lem of spurious pattern storage [8], [9] naturally arises as a In Section II, we study the nonlinear dynamics of two
consequence of the Hebbian learning rule for weakly coupled coupled oscillators and show how arbitrary phase shifts
oscillators. The number of stored spurious patterns quickly can be enforced between them by controlling the ratio of
increases with the number of desired stored patterns [8], two different coupling channel strengths. Accurate circuit
imposing additional limitations on the storage capacity of simulation results using the device models of ST Bi-COMS
such networks. 130-nm technology show remarkable agreement between the
Alternatively, an effective and widely adopted approach for mathematical model and the simulated behavior of the circuit.
solving a variety of pattern recognition problems is to use In Section III, we present a simple chain of coupled oscillator
‘‘discriminant functions’’ or more generally ‘‘artificial neural with tunable coupling parameters as a discriminant circuit
networks’’ [18]–[20]. and show how it can be used to realize the core of a non-
The basic idea of discriminant function approach is to Boolean pattern recognition engine with CMOS oscillators.
start with a function with some free parameters and then The simplicity of the coupling structure makes the proposed
tune these parameters so that the function’s output mainly circuit design readily implementable in any standard CMOS
depends on the particular ‘‘class’’ to which its input belongs. technology. Finally, Section IV discusses future research
As an example, suppose we want to distinguish between input directions and concludes this paper.
patterns belonging to two classes, 1 , 2 , using a discrimi-
nant function approach. We show the discriminant function II. NONLINEAR DYNAMICS OF
by f (x, η) where η is a vector of the free parameters of the TWO COUPLED OSCILLATORS
function and x is the function’s input. To make f (x, η) a good In this section, we study the nonlinear dynamics of two
discriminant function, one possibility is to look for a vector η weakly coupled oscillators using the ‘‘phase-reduced,’’ or
such that perhaps better known ‘‘Kuramoto,’’ model [15]–[17]. In par-
f (x, η) > 0 if x ∈ 1 ticular, we analyze the case where two symmetric coupling
channels exist between the oscillators and show how by con-
f (x, η) < 0 if x ∈ 2 .
trolling the ratio of the two coupling mode strengths, arbitrary
The process of finding vector η in above-mentioned is called phase shifts are enforced between the oscillators.
the ‘‘training phase.’’ After training is complete, we can The celebrated Kuramoto’s approximation to the dynamics
reliably use f (x, η) as a discriminant function to classify input of two weakly coupled oscillators with a ‘‘symmetric’’ cou-
patterns to either class 1 or 2 by only looking at the sign pling gives [17]
of f (x, η).
Building upon the idea of discriminant functions, we pro- θ˙1 = k sin(θ2 − θ1 − ψ) (2)
pose to use the term ‘‘discriminant circuit’’ to describe any θ˙2 = k sin(θ1 − θ2 + ψ) (3)
physical circuit with some free control parameters that can be
used in pattern recognition applications. The control param- where, as shown in Fig. 1, θ1 and θ2 are the phase vari-
eters of a discriminant circuit should similarly be tuned such ables associated with the two oscillators, and k and ψ
that the circuit’s output depends mainly on some collective show the strength and inherent phase shift of the cou-
property of its input signals. The circuit’s output signal can pler, respectively. As a consequence of symmetric coupling
then be used to distinguish different input patterns from each assumption [13], [17], the inherent phase shift term ψ appears
other. in the first equation with a minus sign and in the second equa-
While complex software algorithms, enjoying access to tion with a plus sign, consistent with the reference direction
several layers of arbitrary discriminant functions, provide of coupling shown by the arrow in Fig. 1. With reference

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In order to get a final closed formula for ϕ, it is better to

rewrite E(ϕ) using Euler’s formula
a
E(ϕ) = − [ei(−ϕ+ψa ) + ei(ϕ−ψa ) ]
2
b
− [ei(−ϕ+ψb ) + ei(ϕ−ψb ) ].
2
FIGURE 1. Kuramoto model of two weakly coupled oscillators. Simple algebraic manipulation reveals that steady-state
condition, (dE/dϕ) = 0, gives
eiϕ (ae−iψa + be−iψb ) = e−iϕ (aeiψa + beiψb ).
Since the left- and right-hand sides of the above-mentioned
equation are complex conjugates of each other, they should
be purely real to be equal, that is
e−iϕ (aeiψa + beiψb ) ∈ R.
There are only two possibilities for ϕ to satisfy this
requirement
(
Arg(aeiψa + beiψb ) ± 2nπ
ϕ=
FIGURE 2. Bimodal, symmetric coupling of two oscillators.
Arg(aeiψa + beiψb ) ± (2n + 1)π.

On the other hand, the stability condition, (d 2 E/dϕ 2 ) > 0,

to Fig. 2, let us now assume that two symmetric coupling implies
channels with the strengths of a/2 and b/2 and inherent
phase shifts of ψa and ψb exist between two oscillators. The d 2E
> 0 ⇒ eiϕ (ae−iψa + be−iψb ) > 0.
Kuramoto model of this system is the sum of expressions for dϕ 2
each coupling channel1 Therefore, the stable steady-state phase shift between the
a b oscillators is
θ˙1 = sin(θ2 − θ1 − ψa ) + sin(θ2 − θ1 − ψb )
2 2
a b ϕ = Arg(aeiψa + beiψb ). (5)
θ2 = sin(θ1 − θ2 + ψa ) + sin(θ1 − θ2 + ψb ).
˙
2 2 The above-mentioned result has an interesting intuitive inter-
Therefore, the dynamics of the relative phase shift between pretation: if one considers the effect of each coupling channel
the oscillators, ϕ = θ2 − θ1 , is governed by in Fig. 2 separately, it is easy to see that the top coupling
ϕ̇ = a sin(−ϕ + ψa ) + b sin(−ϕ + ψb ). (4) pushes the relative phase shift between the two oscillators
to ψa , whereas the bottom coupler pulls it toward ψb .
We now proceed to find the steady-state solution of (4). First, In the presence of both coupling channels, the final phase shift
notice that a Lyapunov function [21] exists for this system, can be found from the weighted vector superposition shown
which guarantees convergence to steady state in Fig. 3.
E(ϕ) = −a cos(−ϕ + ψa ) − b cos(−ϕ + ψb )
⇒ Ė = −(ϕ̇)2 ≤ 0.
A stable steady-state solution of (4) necessarily corresponds
to a local minima of E(ϕ)
dE
= 0
dϕ
d
⇒ {a cos(−ϕ + ψa ) + b cos(−ϕ + ψb )} = 0
dϕ
d 2E
>0
dϕ 2
d2
⇒ {a cos(−ϕ + ψa ) + b cos(−ϕ + ψb )} < 0.
dϕ 2 FIGURE 3. Weighted superposition of two coupling channels.

1 This linear behavior is a consequence of approximating phase distur-

bances around the oscillator’s limit cycle with the gradient of its phase It is not difficult to realize different coupling channels
function, see [16], [17] for more details. between physical oscillators. In a three-stage CMOS ring

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 IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

FIGURE 4. Different coupling channels of two CMOS ring

oscillators.

oscillator shown in Fig. 4, adjacent inverter gate voltages

naturally have a phase shift of 2π/3 with respect to each other
and therefore depending on which points of two such oscilla-
tors are connected via a resistor, different coupling modes can
be realized. For example, if only the middle coupling in Fig. 4
is active, then θ2 + 2π/3 should eventually become equal
to θ1 to minimize the energy loss in the resistive connection
between the two oscillators. This condition is then consistent
with having ψ = 2π/3 in (2). Similarly, one can argue that
the leftmost and rightmost couplings shown in Fig. 4 have
inherent phase shifts of 0 and 4π/3, respectively.
The circuit level schematic of the coupled ring structure
is shown in Fig. 5. The three inverter gates in oscillators
(1) and (2) are labeled as 1A, 1B, and 1C and 2A, 2B, 2C,
respectively. The input terminals of the two couplers in the
middle are likewise labeled to imply connectivity to the
respective oscillator terminals without drawing explicit wire
connections. The couplers are CMOS transmission gates,
which are essentially resistors that can be digitally switched
ON or OFF by their gate control voltages, S1 and S2 . Since con-
ductance of transistors are to the first-order proportional to
their aspect ratios, (W /L), a discrete set of coupling strengths
FIGURE 5. Circuit level schematic of CMOS-coupled oscillators.
can be realized for each coupling channel by laying out a bank
of differently sized transmission gates on chip. The strength
of each coupling channel can then be digitally controlled by Fig. 7 shows a folded chain of 16 ring oscillators where two
activating the transmission gate with the desired size from this types of tunable couplers, ‘‘input’’ and ‘‘training’’ couplers,
available set. are available in each link. The system response is defined as
The circuit in Fig. 5 has been simulated using accu- the phase shift between the oscillators at the two ends of the
rate device models of ST BiCMOS 130-nm technology in chain, which is shown by ϕ. In a simply connected chain of
Cadence Virtuoso. As can be seen from Fig. 6, the simulated N oscillators, there are exactly l = N − 1 links and therefore
steady-state phase shifts of oscillators agree very well with l different instances of ‘‘input’’ and ‘‘training’’ couplers each.
what (5) predicts. For a practical implementation, it is best to fold the chain
into a rectangular configuration similar to what is shown
III. PATTERN RECOGNITION WITH COUPLED in Fig. 7 to make the actual layout as compact as possible.
OSCILLATOR CHAINS In the Supplementary Material, we outline the general way
In this section, we generalize the case of two coupled oscil- of constructing such folded chains for rectangular networks
lators to a chain of coupled oscillators and show how this of oscillators with even number of rows and columns.
structure can be used as a ‘‘discriminant circuit’’ in the sense The ‘‘input couplers’’ have zero inherent phase shift and
we explained in Section I. their strengths, ak , are determined by a given 2-D input

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be independently set to

ϕk = Arg(ak + bk ei2π/3 )

so as to minimize the total Lyapunov energy of the chain.

Consequently, a simple formula for the circuit output, ϕ, as a
function of the circuit coupling parameters exists
l
X
ϕ= Arg(ak + bk ei2π/3 ). (6)
k=1

If we had closed loops in the network, a constrained mini-

mization using Lagrange multipliers would be necessary to
ensure that sum of phase shifts around each loop would add
up to some multiple of 2π , and (6) would not necessarily be
valid. A more formal derivation of (6) can be found in the
FIGURE 6. Agreement between theoretical and simulation Supplementary Material.
results. It is perhaps best to explain the circuit’s operation with
the aid of an example: suppose we want to train a coupled
oscillator chain network to distinguish some alphabet letters
irrespective of their orientation. To be more specific, imagine
that we want to classify the 32, 20 × 20 pixel images of four
alphabet letters shown in Fig. 8.

FIGURE 8. Alphabet letter images used for network training.

As explained before, the input coupler strengths, ak , are

dictated by the input image. That is, we assign each ak to
one pixel in the input image and set its (normalized) value
to a minimum of say, 0.1, if the corresponding pixel is a
logical zero or a maximum of 1 if the corresponding pixel
is a logical one. Although we are assuming that the input
pattern is a binary image for simplicity in this example, this
FIGURE 7. Chain of oscillators with tunable couplings. is not essential to the circuit’s operation and, in general,
ak parameters can assume gray-scale values.
Our objective in the ‘‘training phase’’ is to find a good
pattern as explained in the Supplementary Material. The choice of training coupler strengths, bk , that would result
‘‘training couplers’’ on the other hand have an inherent phase in a discriminatory response of the circuit. For example,
shift of 2π/3 and their relative strengths, bk , will be deter- a good discriminatory circuit response happens when ϕ is
mined in the training phase. In other words, vectors a = concentrated around 0, 90o , 180o , 270o for the given samples
[a1 . . . ak ]T and b = [b1 . . . bl ]T are analogous to vectors x of A, B, C, D, respectively.
and η in the discriminant function f (η, x) formulation intro- A practical training algorithm should also be limited to a
duced in Section I. finite choice of bk parameters from some available set of cou-
Intuitively, we expect that since there are no closed loops pling strengths. We may thus define ‘‘training resolution’’ as
in the folded chain structure, the phase shifts in each link can the total number of bits allowed in specifying bk parameters.

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The system response to each input can be visually repre-

sented by placing a dot at an angle of ϕ on a unity circle where
ϕ is calculated by (6). This visual representation is used in
Fig. 9 to show constant improvement in the discriminatory
behavior of the circuit with finer resolutions allowed in the
training.

FIGURE 10. Behavior of a successfully trained network.

can be integrated with the circuit to determine whether ϕ

is within some designated range or not. The output of the
PFD block determines whether the circuit ‘‘recognizes’’ or
‘‘rejects’’ a pattern given to it for classification. Of course,
as shown in Fig. 10, a successful training should be able to
find a set of bk parameters that results in ϕ to be within the
designated range for all the samples used in training. It should
be noted, however, that different discriminant circuits do not
necessarily need to correspond to different physical instances
FIGURE 9. Effect of training on separation between different on a chip. A single discriminant circuit can be sequentially
alphabet letter images. loaded with the right training parameters developed for dif-
ferent objects to determine their presence in a given image.
The above-mentioned example is just meant to illustrate The general way of using chains of coupled oscillators for
the operation of coupled oscillator chain as a ‘‘discrimi- pattern classification can thus be summarized as follows.
nant circuit’’ and should not be considered a complete pat- Let us show the object2 we want the circuit to recognize
tern recognition system in itself. In particular, since there by ξ . We also assume that several examples of ξ , which we
is no ‘‘preprocessing’’ or ‘‘feature extraction’’ [18], [19] show by ξ (1) . . . ξ (m) , are given that can be used in ‘‘training.’’
steps involved, the system is prone to the infamous curse We pick a target value for the circuit’s output signal, ϕ = ϕ0 ,
of dimensionality problem [18], [19]. In other words, the load the network’s ak parameters with each of the patterns
network parameters may currently be overfitted to give per- ξ (1) . . . ξ (m) , and try to find a single set of bk parameters that
fect outputs for the given samples in the training set but would result in the circuit producing an output in the vicinity
that makes the system more vulnerable to noise and ran- of ϕ0 for every ξ (1) . . . ξ (m) . We store the above-mentioned set
dom distortions and degrades its ability to perform useful of bk parameters in some library as the ‘‘training template’’
‘‘generalizations’’ [18], [19]. for ξ and call it bξ for future reference.
While it is certainly more convenient to have only one Later, when an unidentified image, χ, is presented to the
discriminant circuit that classifies several different objects, system by loading the corresponding values of ak parame-
it is perhaps better to have a network of discriminant cir- ters, we use the set bξ from above-mentioned and see if ϕ
cuits where each circuit is specially trained in recognizing happens to fall into the vicinity of ϕ0 . That is, we now have
just one particular object. A collaborative network of such a testing method, which we may call the ‘‘recognize/reject’’
specialized, discriminant circuits would then become a more test for pattern ξ . If the result of the ‘‘recognize/reject’’ test
powerful pattern recognition engine. is positive, then χ is identified as another instance of ξ .
This strategy not only increases the total number of sam- Otherwise, χ is considered to be an object different than ξ
ples of each object that the system would be able to recognize and consequently the next training template in the library is
after training, but also has the added benefit of simplifying used to seek a match.
the final circuit block that is necessary to interpret different
2 By ‘‘object,’’ we mean some abstract concept, like ‘‘letter A’’ or ‘‘Cat,’’
values of ϕ for either positive or negative classifications. This
that carries some meaning. By ‘‘example/sample,’’ we mean actual images
is so because a simple ‘‘phase frequency detector’’ (PFD) associated with such concepts, like the image of a letter ‘‘A’’ or a picture of
found in standard ‘‘phase-locked loops’’ [22]–[24] designs a cat

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There still remains a couple of issues with our structure that

need to be addressed at this point. These are what we may call
the problems of ‘‘false’’ and ‘‘ambiguous ’’ classifications
and are analogous to the problem of ‘‘spurious storage’’ in
Hopfield networks.
False classification happens when a pattern not similar
to ξ (1) . . . ξ (m) is labeled as another example of ξ . This is
possible to happen, because bξ was developed during the
training phase to make sure that when input image happens
to be any one of ξ (1) . . . ξ (m) , then ϕ ≈ ϕ0 without neces-
sarily preventing other, perhaps unrelated, images to result in
producing the same values of ϕ.
Ambiguous classification is a consequence of false classi-
fication problem and happens when an input image, χ, can
be classified as an instance of more than on object, say both
ξ and λ, because with both bξ and bλ , the circuit output, ϕ, FIGURE 12. Chance of false classification versus number of
falls into the vicinity of ϕ0 . recognize/reject tests.
Fortunately, there is an easy fix to the problem of false clas-
sification in our system. As shown in Fig. 11, the solution is to however, we assume a more pessimistic situation where sam-
ξ ξ
find multiple, independent training templates, b(1) , b(2) , . . ., ple images used for training are totally uncorrelated to see
(1) (2) if the network can still be successfully trained. We leave
for different target values of ϕ0 , say ϕ0 , ϕ0 , . . . and require
the details of the training algorithm that is written as an
passing several ‘‘recognize/reject’’ tests using these templates
MATLAB code for the interested reader in the Supplementary
before an object is positively classified as ξ .
Material. Also a complete version of the MATLAB code used
for quantifying the network’s storage capacity is attached to
this paper. The result of these numerical experiments is shown
in Fig. 13 and can be summarized as follows.

FIGURE 11. Developing several training templates using different

target angles.

Numerical simulations confirm (see Fig. 12) that chances

of false classification decreases rapidly (the fitted curve is
an exponential) as more training templates are developed and FIGURE 13. Rate of successful training versus relative size of
consequently more ‘‘recognize/reject’’ tests are used for any training set.
positive classification.
As a final note, we investigate the storage capacity of a For each fixed size of the network, N , an increasing number
discriminant circuit, which can be defined as the maximum of uncorrelated patterns, m, are allowed for training. The
number of samples of a single object for which the network x-axis shows the ratio x = m/N . The y-axis is the ‘‘success’’
can be successfully trained (see Fig.10). In a realistic applica- rate in training the network for different values of N and m.
tion, different sample images used in training the network for The target value of ϕ0 is arbitrarily set to π/4 in these
identification of a particular object may be highly correlated experiments and an experiment is called successful if for all
with each other, which should make it easier to find a single the ξ (1) . . . ξ (m) patterns, we have |ϕ − ϕ0 | ≤ π/8. A total
training template that gives the desired circuit output for all of 1000 numerical experiments were carried on for each pair
of them. In quantifying the storage capacity of our network, of m and N .

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can be built with other physical components that would result
in even simpler and more compact designs. An example worth
VAHNOOD POURAHMAD received the B.S degree in civil engineering
considering would be a tunable RC network with R and C
from Sharif University of Technology, Tehran, Iran, in 2008 and M.S.
values acting as ‘‘input’’ and ‘‘training’’ parameters and the degrees in mechanical engineering and electrical engineering from Cornell
circuit’s cutoff frequency as the discriminant circuit’s output. University, Ithaca, NY, USA, in 2012 and 2016, respectively. He is currently
working toward his Ph.D. degree in electrical and computer engineering from
Cornell University.
REFERENCES
His current research interest is in the study of electrical coupled oscil-
[1] P. Maffezzoni, B. Bahr, Z. Zhang, and L. Daniel, ‘‘Oscillator array models lators and their various practical applications in engineering, specifically in
for associative memory and pattern recognition,’’ IEEE Trans. Circuits
designing non-Boolean/associative processors and phased array systems.
Syst. I, Reg. Papers, vol. 62, no. 6, pp. 1591–1598, Jun. 2015.
[2] D. E. Nikonov, ‘‘Coupled-oscillator associative memory array operation
for pattern recognition,’’ IEEE J. Exploratory Solid-State Comput. Devices SASIKANTH MANIPATRUNI (M’07) received the B.S. degree in electrical
Circuits, vol. 1, pp. 85–93, Nov. 2015. engineering from IIT Delhi, New Delhi, India, and the Ph.D. degree in
[3] T. Shibata, R. Zhang, S. P. Levitan, D. E. Nikonov, and G. I. Bourianoff, electrical and computer engineering from Cornell University, Ithaca, NY,
‘‘CMOS supporting circuitries for nano-oscillator-based associative USA.
memories,’’ in Proc. 13th Int. Workshop Cellular Nanoscale Netw. He is currently a Staff Scientist with the Exploratory Integrated Circuits
Appl. (CNNA), Aug. 2012, pp. 1–5.
Group, Components Research, Intel, Santa Clara, CA, USA, where he is
[4] S. P. Levitan, Y. Fang, D. H. Dash, T. Shibata, D. E. Nikonov, and
involved in beyond-CMOS devices and circuits. He was a co-inventor of
G. I. Bourianoff, ‘‘Non-Boolean associative architectures based on nano-
oscillators,’’ in Proc. 13th Int. Workshop Cellular Nanoscale Netw. several building blocks for silicon photonic devices, such as modulators,
Appl. (CNNA), Aug. 2012, pp. 1–5. switches, and WDM interconnects. He has authored 50 journal/conference
[5] M. J. Cotter, Y. Fang, S. P. Levitan, D. M. Chiarulli, and V. Narayanan, articles and has over 2000 citations in international journals. He has over 35
‘‘Computational architectures based on coupled oscillators,’’ in Proc. IEEE issued and pending patents in the fields of integrated photonics, spin devices,
Comput. Soc. Annu. Symp. VLSI (ISVLSI), Jul. 2014, pp. 130–135. and magnetic resonance imaging.
[6] Y. Fang, C. N. Gnegy, T. Shibata, D. Dash, D. M. Chiarulli, and
S. P. Levitan, ‘‘Non-Boolean associative processing: Circuits, system
DMITRI NIKONOV (M’99–SM’06) received the M.S. degree in aerome-
architecture, and algorithms,’’ IEEE J. Exploratory Solid-State Comput.
Devices Circuits, vol. 1, pp. 94–102, Dec. 2015. chanical engineering from the Moscow Institute of Physics and Technol-
[7] J. J. Hopfield, ‘‘Neural networks and physical systems with emergent ogy, Moscow, Russia, in 1992, and the Ph.D. degree in physics from
collective computational abilities,’’ Proc. Nat. Acad. Sci. USA, vol. 79, Texas A&M University at College Station, College Station, TX, USA,
no. 8, pp. 2554–2558, 1982. in 1996.
[8] R. Rojas, Neural Networks: A Systematic Introduction. Berlin, Germany: He joined Intel, Santa Clara, CA, USA, in 1998. He is currently a Principal
Springer-Verlag, 1996. Engineer with the Components Research Group, Hillsboro, OR, USA, doing
[9] J. Hertz, R. G. Palmer, and A. Krogh, Introduction to the Theory of Neural simulation and benchmarking of beyond-CMOS logic devices, and managing
Computation. Redwood City, CA, USA: Addison-Wesley, 1991. research programs with universities on nanotechnology.

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Pourahmad et al.: Nonboolean Pattern Recognition Using Chains of Coupled CMOS Oscillators as Discriminant Circuits

IAN YOUNG (M’78–SM’96–F’99) received the B.E.E. and M.Eng.Sc. EHSAN AFSHARI (S’98–M’07–SM’11) received the B.Sc. degree in elec-
degrees from the University of Melbourne, Melbourne, VIC, Australia, and tronics engineering from the Sharif University of Technology, Tehran, Iran,
the Ph.D. degree in electrical engineering from the University of California and the M.S. and Ph.D. degrees in electrical engineering from the California
at Berkeley, Berkeley, CA, USA. Institute of Technology, Pasadena, CA, USA, in 2003 and 2006, respectively.
He is currently a Senior Fellow and the Director of the Exploratory In 2006, he joined the Faculty of Electrical and Computer Engineering,
Integrated Circuits with the Technology and Manufacturing Group, Intel Cornell University, Ithaca, NY, USA, as an Assistant Professor and was
Corporation, Hillsboro, OR, USA. He leads a research group exploring the promoted to an Associate Professor in 2012. In 2016, he joined the Electrical
future options for the integrated circuit in the beyond-CMOS era. Engineering and Computer Science Department, University of Michigan,
Dr. Young is currently the Editor-in-Chief of the IEEE Journal of Ann Arbor, MI, USA, as an Associate Professor. His current research inter-
Exploratory Solid-State Computational Devices and Circuits. ests are mm-wave and terahertz electronics and low-noise integrated circuits
for applications in communication systems, sensing, and biomedical devices.

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