HVDC LCC Modelling: Digsilent Powerfactory

HVDC LCC Modelling
DIgSILENT PowerFactory ∗
Abstract calculation performed, the user may observe

that approximately 1000 MW flows through
the DC link. The rectifiers set the DC current
This paper discusses the modelling of High- to 2 kA and the inverters set the DC voltage
Voltage Direct Current (HVDC) Transmis- to 99%. The converter models include com-
sion Systems, in particular line-commutated mutation transformers, which provide the 30
(LCC) technology, for the purpose of load degree phase shift in AC voltage between
flow and time-domain simulation. the upper and lower converters. The trans-
formers include tap changers, which, initially,
have fixed positions of 1.01 on the rectifier
side and 0.989 on the inverter side. The re-
1 Content sulting voltage ratio leads to a firing angle of
α = 15.2◦ on the rectifier side and γ = 14.6◦
on the inverters side. The overlap angle on
This document presents a model of a HVDC the inverter side is 23.6◦ . The model also in-
system. A few simulations are performed cludes harmonic filters. In the load-flow cal-
and the results are discussed. The simu- culation these harmonic filters can be seen
lations show the steady-state effect of tap to compensate the reactive power consump-
changing commutation transformers, as well tion of the converters.
as the transient response to faults in the AC
network on both sides of the HVDC system. The study case ”1 TapControl” can be acti-
vated to demonstrate the effect of automatic
tap changers (installed in the commutation
transformers) on the steady-state operation.
2 Model for steady-state The settings of the tap changers can be seen
operation under the load flow tab of the converters’ dia-
logue windows. The tap positions on the rec-
tifier side are set so that the firing angle is α
The model is based on the IEEE benchmark = 15◦ . The tap positions on the inverter side
model [1]. It has been constructed in DIgSI- are set so as to lead to an extinction angle of
LENT PowerFactory version 15.0 and is con- γ = 20◦ . For the purpose of testing the tap
tained in the file ”HVDC Example.pfd”. The changers the initial tap positions have been
single line diagram of the system as imple- set to 0.95 on all converters.
mented in PowerFactory is shown in Figure
1.
The system has twelve-pulse thyristor con- 3 Model for time-domain

verters on both the rectifier and inverter side.
The 500 kV DC line has a length of 500
simulation
km and is rated at 2 kA. If the study case
”0 BaseCase” is activated and a load flow The converter model used for the EMT-
∗ DIgSILENT
GmbH, Heinrich-Hertz-Str. 9, 72810 simulation reproduces the transients due to
Gomaringen, Germany, www.digsilent.de the six thyristor switches and their snubber
DIgSILENT PowerFactory, r996 1

HVDC LCC Modelling
circuits. Either a built-in firing controller or AC system on the inverter side using a time-
a user-defined firing controller can be used. domain simulation (EMT).
The built-in firing controller represents EPC
(equidistant firing control). The firing angle After running the EMT simulation the sim-
is measured relative to an internal synchro- ulation plots appear in the graphics named
nising angle ”phiref”, which varies at the rate ”§. . . ”. The inverter phase currents in the
of the frequency signal that is connected to graphic ”AC Waveforms” display thyristor
the converter model. The frequency is mea- commutation failures (see Figure 2). The
sured by a phase-locked loop (PLL). The graphic ”§Rec Ctrl” shows that the VDCOL is
model requires the commutation reactance activated during the fault due to the reduction
to be entered correctly so that the internal in the DC voltage. The rectifier controller re-
angle ”phiref” can be initialised correctly. duces the DC current and alleviates the com-
mutation problems on the inverter side.
When either the study case ”2. . . ” or ”3. . . ” is
activated then the variations ”HVDC Control”
and ”Lower SCR” are activated. The for-
mer links dynamic controllers to the con-
verter models and the latter modifies the 5 Fault at the rectifier side
short-circuit levels of the external AC grid el-
ements.
The study case ”3 Fault Rectifier Side” is
The graphic ”HVDC Controls” provides
used to study the response of the HVDC sys-
an overview of the controls. It shows
tem to a three-phase short circuit in the AC
how the converter models are linked with
system on the rectifier side. The response
the dynamic controller models, phase-
is studied using a time-domain simulation
measurement devices and voltage & current
(EMT).
measurement devices.
After running the EMT simulation the plots
The graphic ”Rect Controller” shows the dy-
appear in the graphics named ”§. . . ”. The
namic model of the rectifier controller. Un-
firing angle on the rectifier side reduces to
der normal conditions, this controller regu-
the minimum value of 5 degrees, but the rec-
lates the DC current to the reference ”Id ref”,
tifier controller is unable to regulate the cur-
which is calculated from the load flow so-
rent to its set-point. The inverter controller
lution. In the event of a severe drop
switches to current control mode (see Figure
in the DC voltage the current reference
3). The inverter controller has a reference
is reduced through the VDCOL (voltage-
current equal to 90% (the initial 100% less
dependent current-order limiter).
a 10% margin). The inverter controller pre-
The graphic ”Inv Controller” shows the dy- vents the HVDC system from running down.
namic model of the inverter controller. Un- When the fault clears the rectifier controller
der normal conditions the controller regu- takes over current control again. After some
lates the extinction angle γ to gamma min, time the inverter controller switches back to
which is obtained from the load flow solu- extinction-angle control.
tion. In the event of a severe reduction in DC
voltage the controller can switch to current-
control mode. In this case the inverter regu-
lates the DC current (to the initial current less
the margin, Im). References
[1] M. Szechtman, T. Wess, and C.V. Thio.

4 Fault at the inverter side A benchmark model for HVDC system
studies. In International Conference on
AC and DC Power Transmission, pages
The study case ”2 Fault InverterSide” is 374–378. IET, 1991.
used to study the response of the HVDC
system to a three-phase short circuit in the

HVDC LCC Modelling
Figure 1: Single line diagram for the HVDC system as modelled in PowerFactory
Figure 2: Commutation failure
Figure 3: Current control at the inverter

HVDC LCC Modelling: Digsilent Powerfactory

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HVDC LCC Modelling

Abstract calculation performed, the user may observe

The system has twelve-pulse thyristor con- 3 Model for time-domain

DIgSILENT PowerFactory, r996 1

[1] M. Szechtman, T. Wess, and C.V. Thio.

DIgSILENT PowerFactory, r996 2

Figure 2: Commutation failure

Figure 3: Current control at the inverter

DIgSILENT PowerFactory, r996 3

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