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Model Engineering College, Thrikkakara Cs 431 Compiler Design Lab

The document outlines exercises for a compiler design lab divided into 5 cycles, including implementing lexical analysis, parsing expressions with YACC, converting between automata, writing parsers, and code generation.

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RONIN T
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0% found this document useful (0 votes)
151 views

Model Engineering College, Thrikkakara Cs 431 Compiler Design Lab

The document outlines exercises for a compiler design lab divided into 5 cycles, including implementing lexical analysis, parsing expressions with YACC, converting between automata, writing parsers, and code generation.

Uploaded by

RONIN T
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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MODEL ENGINEERING COLLEGE, THRIKKAKARA

CS 431 COMPILER DESIGN LAB


List of Exercises/Experiments :

Cycle I (3 slots)
1. Design and implement a lexical analyzer for given language using C language and the lexical
analyzer should ignore redundant spaces, tabs and new lines.
2. Implementation of Lexical Analyzer using Lex Tool
3. Generate YACC specification for a few syntactic categories. (any one)
a) Program to recognize a valid arithmetic expression that uses operator +, –, * and /.
b) Program to recognize a valid variable which starts with a letter followed by any number of
letters or digits.
c) Implementation of Calculator using LEX and YACC
d) Convert the BNF rules into YACC form and write code to generate abstract syntax tree
Cycle II (2 slots)
4. Write program to find ε – closure of all states of any given NFA with ε transition.
5. Write program to convert NFA with ε transition to NFA without ε transition.
6. Write program to convert NFA to DFA
7. Write program to minimize any given DFA.

Cycle III (2 slots)


8. Develop an operator precedence parser for a given language.
9. Write program to simulate FIRST and FOLLOW of any given grammar.
10. Construct a recursive descent parser for an expression.
11. Construct a Shift Reduce Parser for a given language.

Cycle IV (2 slots)
12. Write a program to perform loop unrolling.
13. Write a program to perform constant propagation.
14. Implement Intermediate code generation for simple expressions.

Cycle V (1 slot)
15. Implement the back end of the compiler which takes the three address code and produces the
8086 assembly language instructions that can be assembled and run using an 8086
assembler. The target assembly instructions can be simple move, add, sub, jump etc.
Slot Date Cycle Evaluation Date of Completion

1 05/08/2019 CE
08/08/2019
2 19/08/2019 CE 26/08/2019
Cycle I
22/08/2019 29/08/2019
3 26/08/2019 CE/VIVA
29/08/2019
4 02/09/2019 CE
05/09/2019 16/09/2019
Cycle II
5 16/09/2019 CE/VIVA 19/09/2019
19/09/2019
6 23/09/2019 CE
26/09/2019 30/09/2019
Cycle III
7 30/09/2019 CE/VIVA 03/10/2019
03/10/2019
8 10/10/2019 CE
14/10/2019 17/10/2019
Cycle IV
9 17/10/2019 CE/VIVA 20/10/2019
20/10/2019
10 24/10/2019 CE/VIVA 24/10/2019
27/10/2019 Cycle V
27/10/2019

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