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    Memory Expansion

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    Rubal Sharma
    This document discusses the history and evolution of logic families. It begins by describing the invention of the transistor in 1947 and the development of integrated circuits in the late 1950s. It then covers various logic families including DL, DTL, RTL, TTL, ECL, MOS, and CMOS. Key concepts covered are voltage parameters, noise margins, fanout, power requirements, and speed-power products. The document concludes by discussing interfacing different logic families and issues around voltage and current.

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    Memory Expansion

    Uploaded by

    Rubal Sharma
    20 views19 pages
    This document discusses the history and evolution of logic families. It begins by describing the invention of the transistor in 1947 and the development of integrated circuits in the late 1950s. It then covers various logic families including DL, DTL, RTL, TTL, ECL, MOS, and CMOS. Key concepts covered are voltage parameters, noise margins, fanout, power requirements, and speed-power products. The document concludes by discussing interfacing different logic families and issues around voltage and current.

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    This document discusses the history and evolution of logic families. It begins by describing the invention of the transistor in 1947 and the development of integrated circuits in the late 1950s. It then covers various logic families including DL, DTL, RTL, TTL, ECL, MOS, and CMOS. Key concepts covered are voltage parameters, noise margins, fanout, power requirements, and speed-power products. The document concludes by discussing interfacing different logic families and issues around voltage and current.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    20 views19 pages

    Memory Expansion

    Uploaded by

    Rubal Sharma
    This document discusses the history and evolution of logic families. It begins by describing the invention of the transistor in 1947 and the development of integrated circuits in the late 1950s. It then covers various logic families including DL, DTL, RTL, TTL, ECL, MOS, and CMOS. Key concepts covered are voltage parameters, noise margins, fanout, power requirements, and speed-power products. The document concludes by discussing interfacing different logic families and issues around voltage and current.

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    of 19

    UNIT IV

    Memory Types & Logic Families


    By Dr. Dhobale J V
    Associate Professor
    School of Engineering & Technology
    RNB Global University, Bikaner

    Course Code - 19004000 RNB Global University, Bikaner. 1


    Logic Families - History
    l The first transistors were fabricated in 1947 at
    Bell Laboratories (Bell Labs) by Brattain with
    Bardeen providing the theoretical background
    and Shockley managed the activity.
    l – The trio received a Nobel Prize in Physics
    for their work in 1956.
    l The transistor was called a point-contact
    transistor and was a type of bipolar junction
    transistor (BJT).

    Course Code - 19004000 RNB Global University, Bikaner. 33


    Logic Families - History
    l The theory on field effect transistors (FETs)
    was developed much earlier than our
    understanding of BJTs .
    – First patent on FETs dates from 1925
    • Julius Edgar Lilienfeld, an Austro-Hungarian
    physicist.
    l However, the quality of the semiconductor and
    the oxide materials were barriers to developing
    good working devices.
    – The first FET was not invented until 1959
    • Dawon Kahng and Martin M. (John) Atalla of Bell Labs
    Course Code - 19004000 RNB Global University, Bikaner. 34
    Logic Families - History
    l Integrated circuits (ICs) are chips, pieces of
    semiconductor material, that contain all of the
    transistors, resistors, and capacitors
    necessary to create a digital circuit or system.
    l The first ICs were fabricated using Ge BJTs in
    1958.
    l Jack Kirby of Texas Instruments, Nobel Prize in
    2000
    l Robert Noyes of Fairchild Semiconductors
    fabricated the first Si ICs in 1959.

    Course Code - 19004000 RNB Global University, Bikaner. 35


    Logic Families - History
    l Integration Level:
    l SSI Small scale integration - 12 gates/chip
    l MSI Medium scale integration - 100 gates/chip
    l LSI Large scale integration - 1K gates/chip
    l VLSI Very large scale integration - 10K gates/chip

    l ULSI Ultra large scale integration - 100K gates/chip.

    Course Code - 19004000 RNB Global University, Bikaner. 36


    Logic Families - History
    l Moore’s law:
    lA prediction made by Moore (a co-founder of
    Intel) in 1965: “… a number of transistors to
    double every 2 years”.

    Course Code - 19004000 RNB Global University, Bikaner. 37


    Logic Families
    l Logic families are sets of chips that may
    implement different logical functions, but use
    the same type of transistors and voltage levels
    for logical levels and for the power supplies.

    l These families vary by speed, power


    consumption, cost, voltage & current levels.

    Course Code - 19004000 RNB Global University, Bikaner. 38


    Logic Families
    l IC digital logic families.
    Ø DL (Diode- logic)
    Ø DTL (Diode-transistor logic ）
    Ø RTL (Resistor-transistor logic ）
    Ø TTL (Transistor -transistor logic ）
    Ø ECL (Emitter-coupled logic ）
    Ø MOS ( Metal-oxide semiconductor ）
    Ø CMOS (Complementary Metal-oxide
    semiconductor ）

    Course Code - 19004000 RNB Global University, Bikaner. 39


    Logic Families
    l Digital IC Terminology: Voltage Parameters
    Ø VIH(min): high-level input voltage, the minimum
    voltage level required for a logic 1 at an input.

    Ø VIL(max): low-level input voltage

    Ø VOH(min): high-level output voltage

    Ø VOL(max): low-level output voltage


    Course Code - 19004000 RNB Global University, Bikaner. 40
    Logic Families
    l Digital IC Terminology: Voltage Parameters
    l For proper operation the input voltage levels to a logic
    must be kept outside the indeterminate range.
    l Lower than VIL(max) and higher than VIH(min).

    Course Code - 19004000 RNB Global University, Bikaner. 41


    Logic Families
    l Digital IC Terminology: Noise Margin
    l Noise is present in all real systems.
    l This adds random fluctuations to voltages
    representing logic levels.
    l To cope with noise, the voltage ranges defining the
    logic levels are more tightly constrained at the output
    of a gate than at the input.
    l Thus small amounts of noise will not affect the circuit.
    l The maximum noise voltage that can be tolerated by a
    circuit is termed its noise immunity (noise Margin).

    Course Code - 19004000 RNB Global University, Bikaner. 42


    Logic Families
    l Digital IC Terminology: fanout –

    l The maximum number of standard logic inputs


    that an output can drive reliably.

    l Also known as the loading factor.

    Course Code - 19004000 RNB Global University, Bikaner. 43


    Logic Families
    l Digital IC Terminology: Power Requirements –

    l Every IC needs a certain amount of electrical


    power to operate.
    l Vcc (TTL)
    l VDD(MOS)

    Course Code - 19004000 RNB Global University, Bikaner. 44


    Logic Families
    l Digital IC Terminology: Speed-Power Product
    l Desirable properties:
    l Short propagation delays (high speed).
    l Low power dissipation

    l Speed-power product measures the combined


    effect.

    Course Code - 19004000 RNB Global University, Bikaner. 45


    Logic Families
    l Interfacing logic families:

    Course Code - 19004000 RNB Global University, Bikaner. 46


    Logic Families
    l Interfacinglogic families: Voltage
    l In some interfacing situations, a HIGH output
    pin may produce a voltage that is too low to be
    recognized as a HIGH by the input pin it’s
    connected to.

    l The solution in such cases is to use a pull-up


    resistor.

    Course Code - 19004000 RNB Global University, Bikaner. 47


    Logic Families
    l Interfacinglogic families: Voltage
    l Example: TTL to CMOS
    Ø A TTL HIGH output may be as low as 2.4 V.
    Ø But a CMOS input expects HIGHs to be at least 3.33 V

    Course Code - 19004000 RNB Global University, Bikaner. 48


    Logic Families
    l Interfacing logic families: Current
    l In some interfacing situations, either a HIGH
    output pin may not source enough current to
    drive the input pin it’s connected to, or a LOW
    output pin may not sink enough current to
    drive the input pin it’s connected to.

    l The solution in such cases is to use a buffer.

    Course Code - 19004000 RNB Global University, Bikaner. 49


    Logic Families
    l Interfacing
    logic families: Current
    l Example: CMOS to TTL
    l A CMOS LOW output can only sink 0.51 mA.
    l But as much as 1.6 mA may flow out of a TTL LOW
    input.
    l It can also be used for increasing the fanout.

    Course Code - 19004000 RNB Global University, Bikaner. 50

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