UNIT 5: INPUT /OUTPUT ORGANISATION

1. INTRODUCTION

The computer will be of no use if it is not communicating with the external world. Thus, a computer must
have a system to receive information from outside world must be able to communicate results to external
world. Thus, a computer consists of an I/O system. This system include two basic components, one is the
I/O devices and another called I/O module, which not only connects an I/O device with the system bus, but
plays a very crucial role in between. A device which is connected to an I/O module of computer called a
peripheral.

2. INPUT/OUTPUT DEVICES (PERIPHERALS)

Let us discuss few Input/output devices in this section and we will discuss about I/O module in the
subsequent section..

2.1 Input Devices

Input technologies are rapidly developing. These, as the name suggests, are used for transferring user
command of choice or data to the computer.

Keyboard

The keyboard is one of the most common input device for computers. The layout of the keyboard is like that
of the traditional QWERTY typewriter, although there are some extra command and function keys Provided
for. Substantial, development has taken place in the ergonomics of keyboard design to ensure that operator
strain is minimal.

Key-to-tape, key-to-disk and key-to-diskette

These are stand alone data entry stations. These units usually have a small processor attached to a keyboard
and a visual display unit. The Processor checks for the accuracy of data at the time of entry. The screen
displays what is being entered. These facilities are highly desirable for a data processing centre. Hence most
of the data Processing centres am switching over from punched card input to data entry stations.

Pointing Devices

The keyboard provides facility to input data and commands to computer in text form find that, while
working with a display based packages, we are mostly pointing to some area in the display to select an
option and move across on the screen to select subsequent option For such cases pointing devices are very
useful. There are several pointing devices, some of them are:

a. Mouse: Mouse is a handy device which can be moved on a smooth surface to simulate the movement of
cursor that is desired on the display screen. Mouse could be optical; offering quiet and reliable operation,
or mechanical which is cheaper but noisier. User can move the mouse, stop it at a point where the pointer
is to be located and, with the help of buttons, make selection of choices.

b. Light Pen: This is a pen shaped device allowing natural movement on the screen. The pen contains the
light receptor and is activated by pressing the pen against the display screen. Receptor is the scanning
beam which helps in locating the pen's position. Suitable system software is provided to initiate
necessary action when we locate an area on the display surface with the help of the light pen.

There are a few other pointing devices known as track balls and joy sticks which are used more or
entertainment usage like games. We will not discuss them in this section.
Voice/Speech Input

One of the most exciting areas of research is in recognising human voices/speech so that this could form
input to computer directly. Ibis approach will eliminate the need for keying in data and will facilitate casual
users to use the computers very easily. There are several problem areas for research since speech recognition
system should be able to identify who is speaking and what the message is. Voice recognition techniques
along with several other techniques to convert the voice signals to appropriate words and derive the correct
meaning of words are required for a commercially viable comprehensive speech recognition system. We
have found limited success in this area and today devices are available commercially to recognise and
interpret human voices within limited scope of operation.

Scanners

Scanners facilitate capturing of the information and storing them in graphic format for displaying back on
the graphical screen. Scanner consists of two components, the first one to illuminate the page so that the
optical image can be captured and the other to convert the optical image into digital format for storage by
computer.

The graphic images scanned can now be seen and processed directly by the computer. Substantial research
work is going on to establish methods by which the scanned image can he automatically converted into
equivalent text for further processing.

Source data automation

Most recent trends for data input is towards source data automation. The equipments used for source data
automation capture data as a by-product of a business activity thereby completely eliminating manual input
of data. Some examples are:

1. Magnetic Ink Character Recognition (MICR) devices arc generally used by the banking industry to
read the account numbers on cheques directly and do the necessary processing.

2. Optical Mark Recognition (OMR) devices can sense marks on computer readable papers. This kind
of device is used by academic and testing institutions to grade aptitude tests where candidates mark
the correct alternatives on a special sheet of paper. These answer sheets are then directly read by the
optical mark recognition devices and the information sent to a computer for processing. Your
entrance test and some of the assignments are being marked by OMR.

3. Optical Bar Code Reader (OBR) can scan a set of vertical bars of different widths for specific data
and are used to read tags and merchandise in stores, medical records, library books, etc. These are
available as hand held devices.

2.2 Output Devices

The output normally can be produced in two ways; either on a display unit/device or on a paper. Other kinds
of output such as speech output, mechanical output is also being used in certain applications. In this section,
we will discuss only the display and printing output devices.

Display Devices: One of the most important peripherals in computer is the graphic display device.
Conventional computer display terminals known as alphanumeric terminals, display characters (images)
from a multi-dot array (normally 5 x 7 or 7 x 9). These are used to read text information displayed on the
screen. However, there are increasing demands for display of graphs, diagrams and pictures to make the
visual presentation of information more effective for user interaction and decision making.

Graphic display is made up of a series of dots called 'pixels'(picture elements) whose pattern produces the
image. Each dot on the screen is defined as a separate unit which can be directly addressed. Since each dot
can be controlled individually there is much greater flexibility in drawing pictures. There are three
categories of display screen technology:

1. Cathode Ray Tube (CRT)

2. Liquid Crystal Display
3. Projection Displays

CRT Displays

The main components of a CRT terminal are the electron gun, the electron beam controlled by an
electromagnetic field and a phosphor coated display screen.

The electron gun emits an electron bean which is directed towards Lhe phosphor coated display by the
electromagnetic field in order to create an image. There are two types of CRT displays.

a. Vector CRT displays in which the electron beam is directed only to the places where the image is to
be created.

b. Raster scan displays in which the image is projected on to the screen by directing the electron beam
across each row Of Picture elements from the top to the bottom of the screen. This type of display
Provides a high dynamic capability since image is continuously refreshed and it allows for continual
user input and output it offers full colour display at a relatively low cost and is becoming very
popular.

The quality of display is indicated by the resolution of the display device. Resolution is determined by die
number of pixels horizontally and vertically. Typical resolution in graphic display ranges from (768 x 640)
pixels to (1024 x 1024) pixels.

Liquid Crystal Displays (LCD)

First introduced in watches and clocks in 1970s, LCD is now applied to display terminals. The major
advantage of LCD is the. low energy consumption. The CRT (Cathode Ray tube) is replaced by liquid
crystal to produce the image. This does not have colour capability and the image quality is relatively poor.
These are commonly used in portable devices bemuse of compactness and low energy requirements.

Projection Displays

The personal size screen of the previous displays is replaced by a large screen upon which images are
projected. These are normally used for large group presentation. These systems can be connected to
computer and whatever appears on the computer terminal gets enlarged and projected on a large screen.
Another popular method is to connect computer to an LCD flat screen and to project the LCD image using
Overhead Projector. These are popularly used for seminars, class rooms. marketing presentations. etc.

Terminals

Terminals have become very popular interactive input and output units. A terminal, when connected to a
CPU, sends data and instructions directly into the computer. Terminals can be classified into two types,
namely hard copy terminals and soft copy terminals. A hard copy terminal provides a print-out on paper
whereas a soft copy terminal provides a visual display on a screen. A soft copy terminal is also known as a
CRT (Cathode Ray Tube) terminal. Terminals are also classified as dumb terminals or intelligent terminals
depending upon provision for any intelligence or otherwise at the terminal. Current technology has brought
about a low price differential between intelligent and dumb terminals. Ibis encourages increasing use of
intelligent terminals.

Graphic Display Terminal

A graphic display terminal displays information in both character and graphic forms. Are extensively used
for CAD/CAM (Computer Aided Design/Computer Aided Manufacture) applications.

Printers

Printers are used for producing output on paper. There are a large variety of printing devices which can be
classified according to the print quality and the printing speeds. Current estimates indicate that about 1500
types of printers are commercially available conforming to about 15 different printing technologies. The
following categories of printers are identified.

(a) Printing Technology- impact printers vs. non-impact printers

Impact printers use variations of standard typewriter printing mechanism where a hammer strikes paper
through inked ribbon. Non-impact printer uses chemical. heat or electrical signals to etch or induce symbols
on paper. Many of these require special coated or treated paper.

(b) Character form -fully formed characters vs. dot matrix

Fully formed characters are constructed from solid lines and curves like the characters of typewriter whereas
a dot matrix character is made up from a carefully arranged sequence of dots packed very close to each
other. Obviously print quality of a dot matrix character will be poorer compared to that from fully formed
characters.

(c) Printing sequence - serial vs. line vs. page

This indicates the amount of information a printer can output within a single cycle of operation. SCM
printing is done character by character whereas line printing forms an entire line and prints A fine at a dm
whereas a page printer outputs a whole page of characters and images simultaneously during one cycle.
Clearly the speed of output will depend upon the printing sequence incorporated in the printing device. We
will now look at two of the most popular printers:

Dot Matrix Printers

This is one of the most popular printers used for personal computing systems. These printers are relatively
cheaper compared to other technologies. This uses impact technology and a print head containing banks of
wires moving at high speeds against inked ribbon and paper. Characters are produced in matrix format. The
speeds range from 40 characters per second (CPS) to about 1,000 cps. A disadvantage of this technology is
that the print quality is low.

Laser Printers

This is a high quality, high speed. high volume technology which works in non-impact fashion on plain
paper or pre-printed forms. Printing is achieved by deflecting laser beam on to the photo sensitive surface of
a drum and the latent image attracts the toner to the image areas. The toner is then electrostatistically
transferred to the paper and fixed into a permanent image. Speeds can range from 10 pages a minute to about
200 pages per minute. This technology is relatively expensive but is becoming very popular because of the
quality, speed and noiseless operations.

Plotters:

To produce graphical output on paper the plotters are used.

After discussing so much about the I/O devices, let us come back to one of the basic question: How does I/O
devices are connected to computers? We will try to answer the question in the next section.
Check Your Progress 1

1. State true or false

a.
In cases where graphical user interfaces are common mouse should not be used.
b. Keyboard is one of the most common input device.
c. Scanners are devices used for outputting pictures.
d. Projection displays can be used for classroom teaching.
e. Keyboard, VDU and printers are essential for computers.

Question2: Differentiate between the CRT display and LCD display.

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Question 3: Compare and contrast the laser and Dot Matrix Printers.

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Question4: Define the term "Source Data Automation”. Give two examples for it.

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3 INPUT/OUTPUT MODULE

The input/output module (I/O module) is normally connected to the system Bus of the system on one end and
one or more Input/Output devices on the other Normally. an I/O module can control one or more peripheral
devices.

Is the I/O module mere a connector of Input/Output (I/O) devices to system bus?

No it performs additional functions such as communicating with the CPU as well as with the peripherals.
But why to use I/O module at all why not connect a peripheral directly to the system bus? Well there are
three main reasons for this:

a. Diversity and variety of I/O devices makes it difficult to incorporate all the peripheral device logic
(i.e. its control commands, data format etc.) into CPU. Ibis in turn will also reduce flexibility of
using any new development.

b. The I/O devices are normally slower than that of memory and CPU, therefore, it is suggested not to
use them on high speed bus directly for communication purposes.

c. The data format and word length used by the peripheral may be quite different than that of a CPU.

3.1 Functions of I/O Module

An I/O module is a mediator between the processor and an I/O device/devices. It controls the data exchange
between the external devices and main memory; or external devices and CPU registers. Therefore, an I/O
module provide an interface internal to the computer which connect it to CPU and main memory and an
interface external to the computer connecting it to external device or peripheral. The I/O module should not
only communicate the information from CPU to I/O device, but it should also coordinate these two. In
addition, since there are speed differences between CPU and I/O devices, the I/O module should have
facilities like buffer (storage area) and error detection mechanism. Therefore, the functional requirements of
an I/O module are:

a. It should be able to provide control and timing signals.

The need of I/O from various I/O devices by the CPU is quite unpredictable. In fact it depends on I/O
needs of particular programs and normally do not follow any pattern. Since, the I/O module also
share system Bus and memory for data Input/Output. Therefore, control and timing are needed to
coordinate the flow of data from/to external devices to/from CPU or memory. A typical control cycle
for transfer of data from I/O device to CPU is:

Enquire status of an attached device from I/O module. The status can he busy, ready or out of order.

I/O module responds back with the status of the device.

If device its ready, CPU commands I/O module to transfer data from the I/O device.

I/O module accept data from the I/O device.

The data is then transferred from I/O module to the CPU.

b. It should communicate with the CPU.

The example given above clearly specifies the need of communication between the CPU and I/O
module. This communication can be: commands such as READ SECTOR, WRITE SECTOR, SEEK
track number (which are issued by CPU to I/O module); or Data (which may be required by the CPU
or transferred out); or Status information such as BUSY or READY or any error condition from I/O
modules. The status recognition is necessary because of the speed gap between the CPU and I/O
device. An I/O device might be busy in doing the I/O of previous instruction when it is needed again.

Another important communication from the CPU is the unique address of the peripheral from which
I/O is expected or is to be controlled.

c. It should communicate with the I/O device.

Communication between I/O module and I/O device is needed to complete the I/O operation. This
communication involves commands, status or data.

d. It should hare a provision for data buffering.

Data buffering is quite useful for the purpose of smoothing out the gaps in speed of CPU and I/O
devices. The data buffers are registers which hold the I/O information temporarily. The I/O is
performed in short bursts in which data is stored in buffer area while the device can take its own time
to accept it on the I/O device to CPU transfer data is first transferred to the buffer and then passed on
to CPU from these buffer registers. Thus, the I/O operation does not tie up bus for the slower I/O
devices.
e. Error detection mechanism should be in built the error detection mechanism may involve checking
the mechanical as well as data communication errors. These errors should be reported to the CPU.
The examples of the kind of mechanical errors that can occur in devices are paper jam in printer,
mechanical failure, electrical failure etc. The data communication errors may be checked by using
parity bit.

3.2 Structure of I/O Module

Let us now focus our attention towards the question: What should be the structure of an I/O module?
Although, there is no standard structure of I/O module, but let us try to visualise certain general
characteristics of the structure.

There is a need of I/O logic which should interpret and execute the dialogue between the CPU and I/O
module. Therefore, there need to be control lines between CPU and this I/O module. In addition, the
address lines are needed to recognise the address of the I/O module and its specific device.

The data lines connecting I/O module to system bus must exist. These lines serve the purpose of data
transfer.

Data registers may act as buffer between CPU and I/O module.

The interface of I/O module with the device should have interface logic to control the device, to get the
status information and transfer of data.

Figure 1 shows the diagram of a typical I/O module which in addition to all the above have
status/control registers which might be used to pass on the status information or can store
control information.

Figure 1: The general structure of I/O Module

The data is stored or buffered in data registers. The status registers are used to indicate the current state of a
device eg. the device is busy, the system BUS is busy. the device is out of order etc.

If an I/O module takes more processing burden then it is termed as I/O channel or processor. The primitive
I/O modules which require detailed control by processor am called I/O controller or device controller. These
I/O controllers are normally used in micro-computers while I/O processors are mainly used for Mainframes
because the I/O work for micro- computer is normally limited to single user's job, therefore, we do not
expect a very huge amount of I/O to justify the investment in I/O processors, which are expensive. Once we
have defined a general structure for an I/O module, the next question is how actually the I/O operational are
performed? The next section tries to answer this basic query in a general way.

Check Your Progress 2

1. State true or false

a. The devices are normally connected directly to system bus.

b. Input/output Module is needed only for slower I/O devices.
c. Data bufferi-ng is helpful for smoothing out the speed differences between CPU and input/output
devices.

Q 2: What is device controller?

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4 INPUT/OUTPUT TECHNIQUES

The Input/ Output operations can be performed by three basic techniques. These are:

 Programmed Input/output
 Interrupt driven Input/Output
 Direct Memory Access

Figure 2 give an overview of these three techniques.

Interrupt I/O module to/from

Required Memory transfer
Programmed I/O No Through CPU
Interrupt driven I/O Yes Through CPU
Direct Memory Access No Through I/O Module

Figure 2: Overview of the three Input/Output Techniques

In programmed I/O the I/O operations am completely controlled by the CPU. The CPU executes programs
that initiate, directs and terminate an I/O operation. It requires a little special I/O hardware, but is quite time
consuming for the CPU, since CPU has to wait for slower I/O operations to complete.

Another technique suggest to reduce the waiting by CPU is interrupt driven I/O. The CPU issues the I/O
command to I/O module and starts doing other work which may be execution of a separate program. When
the I/O operation is complete, I/O module interrupts CPU by informing the CPU that I/O has finished. CPU,
then, may proceed execution of this program.

In both programmed I/O and interrupt driven I/O CPU is responsible for extracting data from the memory
for Output and storing data in memory for input. Such a requirement does not exist in DMA where the
memory can be accessed directly by I/O module. Thus, the I/O module can store or extract data in/from the
memory. We will discuss these in greater details in this section.
Figure 3: Three techniques of Input/Output

In case the I/O is solely looked after by a separate dedicated processor. Then this is referred to as I/O
channel or I/O processor. The basic advantage of these devices are that they free CPU of the burden of
Input/Output Thus, during this rime CPU can do other work. therefore, effectively increasing the CPU
utilisation. We will discuss about I/O channel and I/O processors in the next section.

4.1 Programmed Input/Output

Programmed input/output are useful I/O method for computers where hardware costs need to be minimised.
The Input or Output operation in such cases may involve:

Transfer of data from I/O device to the CPU registers.

Transfer of data from CPU registers to memory.

In addition, in a programmed I/O method the responsibility of CPU is to constantly check the status of the
I/O device to check whether it has become free (in case output is desired) or it has finished inputting the
current series of data (in case input is going on). Thus, Programmed I/O is a very time consuming method
where CPU wastes lot of time for checking and verifying the status of an I/O device. Let us now try to focus
how this Input- Output is performed. Figure 3(a) gives the block diagram of transferring a Block of data
word by word using programmed I/O technique.

I/O Instructions: To carry out input/output CPU issues I/O related instruction. These instructions consist of
two components:

the address of the Input/Output device specifying the I/O device and I/O module; and

an Input/output command.

There are four types Of I/O Commands which can be classified as.

Control, test, read and write.

Control commands are device specific and are used to control the specific instructions to the device e.g. a
magnetic tape requires rewinding or moving forward by a block. Test commands checks the status such as, if
a device is ready or not or is in error condition. The read command is used for input of data from input
device and write command is used for output of data to output device.

The other part of I/O instruction is the address of the I/O device. In systems with programmed I/O the I/O
module, the main memory and the CPU normally share the system bus. Thus, each I/O module should
interpret the address lines to determine if the command is for itself. Or in other words: How does CPU
specifies which device to access? There are two methods of doing so. These are called memory mapped I/O
and I/O-mapped I/O.

If we use the single address space for memory locations and I/O devices, i.e. the CPU treats the status and
data registers of I/O module as memory locations, then memory and I/O devices can be accessed using the
same instructions. This is referred to as memory mapped I/O. For a memory mapped I/O only a single
READ and a single WRITE line are needed for memory or I/O module read or write operations. These lines
are activated by CPU for either memory access or I/O device access. Figure 4 shows the memory mapped
I/O system structure. This scheme is used in Motorola 68000.

In I/O-mapped I/O the I/O devices and memory are addressed separately (Refer Figure 5). There are
separate control lines for memory and I/O device read or write operations, thus, a memory reference
instruction do not affect an I/O device. Here separate Input/Output instructions are needed which cause data
transfer between addressed I/O module and CPU. This structure is used in Intel 8085 & 8086 series.
Figure 4: Structure of Memory Mapped I/O

Figure 5: Structure of I/O Mapped I/O or Isolated I/O Scheme

Please note the difference of requirements as in the case of memory mapped I/O the READ instruction may
bring data to or from memory or I/O module, while in I/O -mapped I/O we need to have separate instruction
for Input/Output.

4.2 Interrupt Driven Input/Output

What are the basic drawback of programmed I/O ? The speed of I/O devices is much slower in comparison
to that of CPU and because the CPU has to repeatedly check whether a device is free; or wait till the
completion of I/O, therefore, the performance of CPU in programmed I/O goes down tremendously. What is
the solution? What about CPU going back to do other useful work without waiting for the I/O device to
complete or get freed up. But how will CPU be intimated about the completion of I/O or a device is ready
for I/O? A well designed mechanism was conceived for this which is referred to as Interrupt driven I/O . In
this mechanism, provisions of interruption of CPU work, once I/O device has finished the I/O or when it is
ready for the I/O, has been provided.

The interrupt driven I/O mechanism for transferring a block of data is shown in figure 3(b). Please note that
after issuing a READ command (for input) the CPU goes off to do other useful work (it may be execution of
a different program) while I/O module proceeds for reading of data from associated device. At the
completion of an instruction cycle (already discussed in Unit 1 of this block) the CPU checks for interrupts
(which will occur when data is in data register of I/O module and it now needs CPU's attention).

Now CPU saves the important register and processor status of the executing program in a stack and request
I/O device to provide its data which is placed on data bus by I/O device. After taking the required action
with the data. the CPU can go back to the program it was executing before the interrupt.

Interrupt: As discussed in unit 1, The term interrupt loosely is used for any exceptional event that causes
temporary transfer of control of CPU from one program to the other which is causing the interrupt.
Interrupts are primarily issued on:

initiation of Input/Output operation

completion of an Input/Output operation

occurrence of hardware or software errors.

Interrupts can he generated by various sources internal external to the CPU. An interrupt generated internally
by CPU is sometimes termed as Traps. The traps are normally result of programming errors such as division
by zero while execution of a program.

The two key issues in Interrupt driven Input/Output are:

to determine the device which has issued an interrupt

in case of occurrence of multiple interrupts which one to be processed first

There are several solution to these problems. The simplest of them is to provide multiple interrupt lines
which will result in immediate recognition of the interrupting device. The priorities can be assigned to
various interrupts and the interrupt with highest priority should be selected for service in case multiple
interrupt occurs. But providing multiple interrupt lines is an impractical approach because only a few lines
of the system bus can be devoted for the interrupt Other methods for this are software poll, daisy chaining
and bus arbitration.

Software Poll: In this scheme on occurrence of an interrupt. CPU starts executing an software routine
termed as interrupt service program or routine which poll to each I/O module to determine which I/O
module has caused the interrupt This may be achieved by reading the status register of the I/O modules. The
priority here can he implemented easily by defining the polling sequence, since the device polled first will
have higher priority. Please note that after identifying the device the next set of instructions to be executed
will be the device service routines of that device, resulting in the desired input or output.

As far as daisy chaining is concerned, we have one Interrupt Acknowledge line which is chained through
various interrupt devices. (The mechanism is similar as we have discussed in Unit 2). There is just one
Interrupt Request line. On receiving an Interrupt Request the Interrupt Acknowledge line is activated which
in turn passes this signal device by device. The first device which has made the interrupt request thus graps
the signal and responds by putting a word which is normally an address of interrupt servicing program or a
unique identifier on the data lines. This word is also referred to as interrupt vector. This address or identifier
in turn is used for selecting an appropriate interrupt servicing program. The daisy chaining has an in-built
priority scheme which is determined by the sequence. of devices on interrupt acknowledge line.
In bus arbitation technique, the I/O module first need to control the bus and only after that it can request
for an interrupt. In this scheme, since only one of the module can control the bus, therefore, only one request
can be made at a time. The interrupt request is acknowledged by the CPU on response of which I/O module
places the interrupt vector on the data lines.

You can refer to further readings for more details on some typical interrupt structures of interrupt controllers.

4.3 Direct Memory Access (DMA)

When large amount of data is to be transferred from CPU, a DMA module can be used. But why? In both
Interrupt driven and programs I/O the CPU is fled up in executing input/output instructions while DMA acts
as if it has taken over control from the CPU. The DMA operates in the following way:

when an I/O is requested. the CPU instructs the DMA module about the operation by providing the
information:
which operation (Read or Write) to be performed.
the address of I/O device which is to be used.
the starting location on the memory where the information will be read or written to.
the number of words to be written or to be read.

The DMA module transfers the requested block byte by byte directly to the memory without intervening the
CPU. On completion of the request DMA module sends an interrupt signal to the CPU. Thus, in DMA the
CPU involvement can be restricted at the beginning and end of the transfer. But what do CPU do while
DMA is doing Input/Output, it may execute another program or may be another part of the same program.
Figure 6 shows registers of a general DMA module. Please note that it contains additional registers for
counting the data bytes. Please note that address register and data count registers are fed with the data lines.

Figure 6: The Registers on DMA Module

Let us now see how this DMA mechanism works. Since, DMA module share the system Bus, therefore, it
need to have some way to take control of the bus such that the data is transferred to/from memory from/to
the DMA module. A DMA module transfers an entire block of data or one word at a time directly to/from
memory. But when should the DMA take control of the bus?

For this we will recall the phenomena of execution of an instruction by the CPU. Figure 7 shows the five
cycles for an instruction execution. The figure also shows the five points where a DMA request can be
respond and a point where the interrupt request can be responded. Please note that an interrupt request is
acknowledged only at one point of an instruction cycle.

Figure 7: DMA and Interrupt Breakpoints

Let us now discuss the data transfer modes of DA1A. The first mode is the block transfer of data after taking
control of the bus. CPU may not use the bus during this time. In such mode a complete block of data, for
example a complete sector in a disk is transferred, in a single continuous burst. During this transfer the DMA
controller/module remain master of the bus. Such a transfer is quite useful in cases where we have fast
secondary memory such as magnetic disk where a delay of one or two pulse may result in a delay by a
notation, thus. the burst of data is preferred through DMA. The drawback in such scheme is that the CPU
has to wait for the bus for quite some time.

Alternatively, instead of transferring a complete block, a few words or a single word is transferred through
system bus to the memory through DMA. In this mode the DMA forces the CPU to suspend its operation
temporarily. After this transfer the control is returned back to the CPU. This technique is called cycle
stealing. In this scheme although the rate of I/O by DMA goes down but on the other hand it reduces the
interference caused by the DMA to CPU operation.

It is possible to minimize this interference of CPU by DMA controller such that the cycles are stolen only
when CPU is not using system bus. This is termed as transparent DMA.

Finally let us discuss how DMA can be configured? Well, there are many ways we will discuss some of
them.

The simplest possibility is to allow DMA, I/O and all the modules to share the system bus. This structure is
shown in Figure 8(a). In this kind of configuration DMA may act as a supportive processor and can use
programmed I/O for exchanging data between memory and I/O module through DMA module. But once
again this spoils the basic advantage of DMA of not using extra cycles for transferring information from
memory to/from DMA and DMA from/to I/O module.

The Figure 8(b) configuration suggest a clear cut advantages over the one shown in figure 8(a). In these
system's a path is provided between I/O module and DMA module which does not include system bus. The
DMA logic may become pan of an I/O module and can control one or more I/O module. In an extended
concept an I/O bus can be connected to this DMA module. Such a configuration (shown in Figure 8(C)) is
quite flexible and can be extended very easily. In both these configurations the added advantage is that the
data between I/O module and DMA module is transferred off the system bus. Thus, eliminately the
disadvantage we have witnessed for the first configuration.

Figure 8: Some of the DMA Configurations

5 INPUT/OUTPUT PROCESSORS

Before discussing about I/O Processors, let us briefly recapitulate the development in the arm of
Input/output functions. These can be summarised as:

Step 1: Direct control of CPU on I/O device. Limited number of I/O devices.

Step 2: Introduction of I/O controller or I/O module. Use of programmed I/O. CPU was separated
from the details of external I/O interfaces.

Step 3: Contained use of I/O controllers but with interrupts. CPU need not wait for I/O operation to
complete (increased efficiency).

Step 4: Direct access of I/O module to the memory via DMA. CPU involvement reduced to at the
beginning and at the end of DMA operation.

The concept of I/O processor is an extension of the concept of DMA. The I/O processor can execute
specialised I/O program residing in the memory without intervention of the CPU. Thus, CPU only needs to
specify a sequence of I/O activity to I/O processor. The I/O processor then executes the necessary I/O
instructions which are required for the task; and interrupt the CPU only after the entire sequence of I/O
activity as specified by CPU have been completed. An advanced I/O processor can have its own memory,
enabling a large set of I/O devices to be controlled without much involvement from the CPU. Thus, an I/O
processor has the additional ability to execute I/O instructions which provide it a complete control on I/O
operations. Thus, I/O processor are much more powerful than DMA which provides only a limited control of
I/O device. For example, if an I/O device is busy then DMA will only interrupt the CPU and will inform the
CPU again when the device is free while I/O processor responsibility will be to keep on checking the status
of the I/O device and once it has found to be free go ahead with I/O and when I/O finishes, communicate it
to the CPU. The communication between I/O processor and CPU can be achieved by writing message in the
memory area shared by hot the processors. CPU instructs I/O processor to execute an I/O program in the
memory. The program will then specify the device or devices and the area of the memory where the I/O data
is stored or to be stored. In addition this program also contains what actions are to be taken in case of errors
or what priority is to be given to various I/O devices.

In computer system which have IOPs the CPU normally do not execute I/O data transfer instruction. I/O
instructions are stored in memory and are executed by IOPs. The IOP can be provided with die direct access
to the memory and can control the system bus. An IOP can execute a sequence of data transfer instruction
involving different memory regions and different devices without intervention of die CPU. The I/O
processor is termed as channel in IBM machines.

Later on the term channel is used by several other computers also. The earlier channels did not have any
memory but the present channels may have large cache memory which may be used for data buffering. The
Control Data Corporation (CDC) computers and some other computers use a relatively sophisticated I/O
systems. These are called Peripheral processing units (PPUs). These PPUs also perform the job of I/O
processor PPUs in itself are complete, simple computers with their own memory. In addition to I/O they are
capable of performing some additional data manipulations which include data formatting, character
translation and buffering.

Let us now discuss two common types of I/O channels. For high speed devices a selector channel is used.
This channel can transfer data from one high speed device at a time. Each of these high speed devices can in
turn be handled by I/O modules. Thus, we effectively have an I/O processor taking the place of CPU in
controlling various I/O module.

Figure 9(a) shows the selector channel.

The second type of channels are multiplexer channel, which can handle input/output with a number of
devices at the same time. If the devices are slow then byte multiplexing is used. Let us explain this with an
example. If we have three slow devices which need to send individual bytes as:

B1 B2 B3 B4 B5 .....
Y1 Y2 Y3 Y4 Y5 .....
T1 T2 T3 T4 T5 .....

then on a byte multiplexer channel they may sent the bytes as B1 Y1 T1 B2 Y2 T2 B3 Y3 T3 ...... For high
speed devices blocks of data from several devices is interleaved. These are called block multiplexer
channels.

We are not including example of an Input/Output processor here. but you are is advised to look into these
examples after you have completed first two block, from the further readings..
Figure 9: Architecture for Input/output Channel

6 EXTERNAL INTERFACE

Our discussion on I/O system will not be complete if we do not discuss about external interfaces. The
external interface is the interface between the I/O module and the peripheral devices. This interface can be
characterised into two main categories (a) parallel interface (b) serial interface. Figure 10 gives a block
diagram for these two interfaces.
Figure 10 Parallel and Serial Interface

In parallel interface multiple bits can be transferred simultaneously. The parallel interface are normally used
for high speed peripherals such as tapes and disks. The dialogues that takes place across the interface include
the exchange of control information and data. A common parallel interface is centronics.

In serial interface only one line is used to transmit data, therefore, only one bit is transferred at a time. Serial
interface is used for serial printers and terminals. The most common serial interface is RS-232C.

Irrespective of the type of interface the I/O module has to communicate with the peripheral in the following
way for a read or write operation.

A control signal is sent by I/O module to the peripheral requesting the permission to send (for write
operation) or receive (for read operation) data.

The peripheral device acknowledges this request for data transfer.

The data is transferred from I/O module to peripheral (for write) or from peripheral to I/O module (for read).

The acknowledgement of receipt of data is issued by the receiver of data.

Both serial and parallel transmission can be in two mode synchronous and asynchronous. In synchronous
mode several characters are transmitted in a single transmission while in asychronous mode only few bits
are transmitted at a time.

Check Your Progress 3

State true or false

Q1. I/O mapped I/O scheme require no additional line from CPU to I/O device except for system bus.
Q2. Memory mapped I/0 scheme uses a separate instruction for data transfer from/to memory; and from/to
I/O module.
Q3. The advantages of interrupt driven I/O over programmed I/O is that in interrupt driven I/O the
interrupt mechanisms free I/O devices quickly.
Q4. In the Transparent DMA the cycles are stolen only when CPU is not using the bus.
Q5. Most of the I/O processors have its own memory while a DMA module does not have its own memory
except for register or a simple buffer area.
Q6. Parallel interfaces are commonly used for connecting printers to a computer.

MODEL ANSWERS
Check Your Progress 1
1. (a) False
(b) True
(c) False
(d) True
(e) True

2.
CRT LCD
LCD is harmless as for as radiations
(i) CRT produces radiations
is concerned
(ii) CRT is bulky LCD is compact
It is still is development through
(iii) CRT has coloured facility
plasma display.
(iv) High energy requirement Low energy requirement
(v) Normally high resolution graphics Low resolution

3.
laser printer Dot Matrix Printer (DMP)
Both can be used with Personal Computers
(i) High cost Low cost
(ii) Form Characters using laser beam User Dot Matirx to print characters
(iii) Non-impact printer Impact printer
(iv) High quality output Output is of low quality
(v) Noiseless operation Noisy

4. Refer to section 2.1

Check Your Progress 2

1. (a) False
(b) False
(c) True
2.A device controller is an I/O module which interacts with the I/O devices as per the
instructions provided to it by the CPU.

Check Your Progress 3

1. False
2. False
3. False
4. True
5. True
6. True