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Quad 2-Input and Gate: Order Codes

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74ACT08

QUAD 2-INPUT AND GATE

■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V


■ LOW POWER DISSIPATION:
ICC = 2µA(MAX.) at TA=25°C
■ COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.), V IL = 0.8V (MAX.)
■ 50Ω TRANSMISSION LINE DRIVING
CAPABILITY DIP SOP TSSOP
■ SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN)
■ BALANCED PROPAGATION DELAYS: ORDER CODES
tPLH ≅ tPHL PACKAGE TUBE T&R
■ OPERATING VOLTAGE RANGE:
DIP 74ACT08B
VCC (OPR) = 4.5V to 5.5V
SOP 74ACT08M 74ACT08MTR
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 08 TSSOP 74ACT08TTR
■ IMPROVED LATCH-UP IMMUNITY
The device is designed to interface directly High
DESCRIPTION Speed CMOS systems with TTL, NMOS and
The 74ACT08 is an advanced high-speed CMOS CMOS output voltage levels.
QUAD 2-INPUT AND GATE fabricated with All inputs and outputs are equipped with protec-
sub-micron silicon gate and double-layer metal tion circuits against static discharge, giving them
wiring C2MOS tecnology. 2KV ESD immunity and transient excess voltage.
The internal circuit is composed of 2 stages
including buffer output, which enables high noise
immunity and stable output.

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001 1/8

This datasheet has been downloaded from http://www.digchip.com at this page


74ACT08

INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

PIN No SYMBOL NAME AND FUNCTION


1, 4, 9, 12 1A to 4A Data Inputs
2, 5, 10, 13 1B to 4B Data Inputs
3, 6, 8, 11 1Y to 4Y Data Outputs
7 GND Ground (0V)
14 VCC Positive Supply Voltage

TRUTH TABLE

A B Y
L L L
L H L
H L L
H H H

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit


VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Current ± 50 mA
ICC or IGND DC VCC or Ground Current ± 200 mA
Tstg Storage Temperature -65 to +150 °C
TL Lead Temperature (10 sec) 300 °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit


VCC Supply Voltage 4.5 to 5.5 V
VI Input Voltage 0 to VCC V
VO Output Voltage 0 to VCC V
Top Operating Temperature -55 to 125 °C
dt/dv Input Rise and Fall Time VCC = 4.5 or 5.5V (note 1) 8 ns/V
1) VIN from 0.8V to 2.0V

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74ACT08

DC SPECIFICATIONS
Test Condition Value

Symbol Parameter TA = 25°C -40 to 85°C -55 to 125°C Unit


VCC
(V) Min. Typ. Max. Min. Max. Min. Max.
VIH High Level Input 4.5 VO = 0.1 V or 2.0 1.5 2.0 2.0
Voltage 5.5 VCC-0.1V 2.0 1.5 2.0 2.0 V
VIL Low Level Input 4.5 VO = 0.1 V or 1.5 0.8 0.8 0.8
Voltage 5.5 VCC-0.1V 1.5 0.8 0.8 0.8
VOH High Level Output 4.5 IO=-50 µA 4.4 4.49 4.4 4.4 V
Voltage IO=-50 µA
5.5 5.4 5.49 5.4 5.4
4.5 IO=-24 mA 3.86 3.76 3.7
5.5 IO=-24 mA 4.86 4.76 4.7
VOL Low Level Output 4.5 IO=50 µA 0.001 0.1 0.1 0.1
Voltage V
5.5 IO=50 µA 0.001 0.1 0.1 0.1
4.5 IO=24 mA 0.36 0.44 0.5
5.5 IO=24 mA 0.36 0.44 0.5
II Input Leakage Cur-
5.5 VI = VCC or GND ± 0.1 ±1 ±1 µA
rent
ICCT Max ICC/Input 5.5 VI = VCC - 2.1V 0.6 1.5 1.6 mA
ICC Quiescent Supply
5.5 VI = VCC or GND 2 20 80 µA
Current
IOLD Dynamic Output VOLD = 1.65 V max 75 50 mA
5.5
IOHD Current (note 1, 2) VOHD = 3.85 V min -75 -50 mA
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on trasmission lines with impedances as low as 50Ω

AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)

Test Condition Value

Symbol Parameter TA = 25°C -40 to 85°C -55 to 125°C Unit


VCC
(V) Min. Typ. Max. Min. Max. Min. Max.
tPLH tPHL Propagation Delay
Time 5.0(*) 1.5 4.5 8.0 1.0 9.0 1.0 9.0 ns

(*) Voltage range is 5.0V ± 0.5V

CAPACITIVE CHARACTERISTICS
Test Condition Value

Symbol Parameter VCC TA = 25°C -40 to 85°C -55 to 125°C Unit


(V) Min. Typ. Max. Min. Max. Min. Max.
CIN Input Capacitance 5.0 4 pF
CPD Power Dissipation
Capacitance (note 5.0 fIN = 10MHz 30 pF
1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)

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74ACT08

TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)


RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)

WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)

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74ACT08

Plastic DIP-14 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 1.39 1.65 0.055 0.065

b 0.5 0.020

b1 0.25 0.010

D 20 0.787

E 8.5 0.335

e 2.54 0.100

e3 15.24 0.600

F 7.1 0.280

I 5.1 0.201

L 3.3 0.130

Z 1.27 2.54 0.050 0.100

P001A

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74ACT08

SO-14 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45 (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S 8 (max.)

P013G

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74ACT08

TSSOP14 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.

A 1.1 0.433

A1 0.05 0.10 0.15 0.002 0.004 0.006

A2 0.85 0.9 0.95 0.335 0.354 0.374

b 0.19 0.30 0.0075 0.0118

c 0.09 0.20 0.0035 0.0079

D 4.9 5 5.1 0.193 0.197 0.201

E 6.25 6.4 6.5 0.246 0.252 0.256

E1 4.3 4.4 4.48 0.169 0.173 0.176

e 0.65 BSC 0.0256 BSC

K 0o 4o 8o 0o 4o 8o

L 0.50 0.60 0.70 0.020 0.024 0.028

A A2
K L
A1 b e c E

E1

PIN 1 IDENTIFICATION
1

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74ACT08

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consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
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