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26 - System Analysis-An Introduction

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26

System Analysis:
An Introduction

26.1 INTRODUCTION
The growing number of packaged systems in the electrical, electronic,
and computer fields now requires that some form of system analysis
appear in the syllabus of the introductory course. Although the content
of this chapter will be a surface treatment at best, the material will
introduce a number of important terms and techniques employed in the
system analysis approach. The increasing use of packaged systems is
quite understandable when we consider the advantages associated with
such structures: reduced size, sophisticated and tested design, reduced
construction time, reduced cost compared to discrete designs, and so
forth. The use of any packaged system is limited solely to the proper
utilization of the provided terminals of the system. Entry into the inter-
nal structure is not permitted, which also eliminates the possibility of
repair to such systems.
System analysis includes the development of two-, three-, or multi-
port models of devices, systems, or structures. The emphasis in this
chapter will be on the configuration most frequently subject to model-
ing techniques: the two-port system of Fig. 26.1.

1 2
Device,
system,
structure,
etc.
1′ 2′

FIG. 26.1
Two-port system.
1150  SYSTEM ANALYSIS: AN INTRODUCTION

Note that in Fig. 26.1 there are two ports of entry or interest, each
1 Device, 2 having a pair of terminals. For some devices, the two-port network of
system, Fig. 26.1 may appear as shown in Fig. 26.2(a). The block diagram of
structure,
etc. Fig. 26.2(a) simply indicates that terminals 1′ and 2′ are in common,
which is a particular case of the general two-port network. A single-
port network and a multiport network appear in Fig. 26.2(b). The for-
mer has been analyzed throughout the text, while the characteristics of
(a) 1′,2′
the latter will be touched on in this chapter, with a more extensive cov-
erage left for a more advanced course.
1 Single- The latter part of this chapter introduces a set of equations (and,
port subsequently, networks) that will allow us to model the device or sys-
1′ configuration tem appearing within the enclosed structure of Fig. 26.1. That is, we
will be able to establish a network that will display the same terminal
characteristics as those of the original system, device, and so on. In
2 2′ Fig. 26.3, for example, a transistor appears between the four external
terminals. Through the analysis to follow, we will find a combination
1 3
of network elements that will allow us to replace the transistor with a
Multiport
1′ configuration 3′
network that will behave very much like the original device for a spe-
cific set of operating conditions. Methods such as mesh and nodal
analysis can then be applied to determine any unknown quantities. The
4 4′ models, when reduced to their simplest forms as determined by the
(b)
operating conditions, can also provide very quick estimates of network
FIG. 26.2 behavior without a lengthy mathematical derivation. In other words,
(a) Two-port system; (b) single-port system someone well-versed in the use of models can analyze the operation of
and multiport system. large, complex systems in short order. The results may be only
approximate in most cases, but this quick return for a minimum of
effort is often worthwhile.
C
1 2 The analysis of this chapter is limited to linear (fixed-value) systems
with bilateral elements. Three sets of parameters are developed for the
two-port configuration, referred to as the impedance (z), admittance
B
(y), and hybrid (h) parameters. Table 26.1 at the end of the chapter
relates the three sets of parameters.
1′ 2′
E
26.2 THE IMPEDANCE PARAMETERS Zi AND Zo
FIG. 26.3
Two-port transistor configuration. For the two-port system of Fig. 26.4, Zi is the input impedance
between terminals 1 and 1′, and Zo is the output impedance between
terminals 2 and 2′. For multiport networks an impedance level can be
defined between any two (adjacent or not) terminals of the network.
The input impedance is defined by Ohm’s law in the following
form:

Ii Io
1 2
+ +

Ei Two-port Eo
system

– –
1′ 2′
Zi Zo

FIG. 26.4
Defining Zi and Zo.
THE IMPEDANCE PARAMETERS Zi AND Zo  1151

Ei
Zi   (ohms, ) (26.1)
Ii

with Ii the current resulting from the application of a voltage Ei.


The output impedance Zo is defined by

Eo
Zo   (ohms, ) (26.2)
Io Ei  0 V

with Io the current resulting from the application of a voltage Eo to the


output terminals, with Ei set to zero.
Note that both Ii and Io are defined as entering the package. This is
common practice for a number of system analysis methods to avoid
concern about the actual direction for each current and also to define Zi
and Zo as positive quantities in Eqs. (26.1) and (26.2), respectively. If Io
were chosen to be leaving the system, Zo as defined in Eq. (26.2) would
have to have a negative sign.
An experimental setup for determining Zi for any two input termi-
nals is provided in Fig. 26.5. The sensing resistor Rs is chosen small
enough not to disturb the basic operation of the system or to require too
large a voltage Eg to establish the desired level of Ei. Under operating
conditions, the voltage across Rs is Eg  Ei, and the current through the
sensing resistor is
VR Eg  Ei
IRs  s  
Rs Rs
Ei Ei
But Ii  IRs and Zi    
Ii IRs

VRs Ii
+
+ IRs Rs

Eg Two-port
Ei system


Zi

FIG. 26.5
Determining Zi.

The sole purpose of the sensing resistor, therefore, was to determine Ii


using purely voltage measurements.
As we progress through this chapter, keep in mind that we cannot
use an ohmmeter to measure Zi or Zo since we are dealing with ac sys-
tems whose impedance may be sensitive to the applied frequency. Ohm-
meters can be used to measure resistance in a dc or an ac network, but
recall that ohmmeters are employed only on a de-energized network,
and their internal source is a dc battery.
The output impedance Zo can be determined experimentally using the
setup of Fig. 26.6. Note that a sensing resistor is introduced again, with
Eg being an applied voltage to establish typical operating conditions. In
addition, note that the input signal must be set to zero, as defined by Eq.
1152  SYSTEM ANALYSIS: AN INTRODUCTION

(26.2). The voltage across the sensing resistor is Eg  Eo, and the current
through the sensing resistor is
VR Eg  Eo
IRs  s  
Rs Rs
Eo Eo
but Io  IRs and Zo    
Io IRs

Io VRs
– +
+ Rs IRs +
Two-port
Ei = 0 V
system Eo Eg


Zo

FIG. 26.6
Determining Zo.

For the majority of situations, Zi and Zo will be purely resistive, result-


ing in an angle of zero degrees for each impedance. The result is that either
a DMM or a scope can be used to find the required magnitude of the
desired quantity. For instance, for both Zi and Zo, VRs can be measured
directly with the DMM, as can the required levels of Eg, Ei, or Eo. The cur-
rent for each case can then be determined using Ohm’s law, and the imped-
ance level can be determined using either Eq. (26.1) or Eq. (26.2).
If we use an oscilloscope, we must be more sensitive to the common
ground requirement. For instance, in Fig. 26.4, Eg and Ei can be mea-
sured with the oscilloscope since they have a common ground. Trying
to measure VRs directly with the ground of the oscilloscope at the top
input terminal of Ei would result in a shorting effect across the input
terminals of the system due to the common ground between the supply
and oscilloscope. If the input impedance of the system is “shorted out,”
the current Ii can rise to dangerous levels because the only resistance in
the input circuit is the relatively small sensing resistor Rs. If we use the
DMM to avoid concern about the grounding situation, we must be sure
that the meter is designed to operate properly at the frequency of inter-
est. Many commercial units are limited to a few kilohertz.
If the input impedance has an angle other than zero degrees (purely
resistive), a DMM cannot be used to find the reactive component at the
input terminals. The magnitude of the total impedance will be correct if
measured as described above, but the angle from which the resistive and
reactive components can be determined will not be provided. If an
oscilloscope is used, the network must be hooked up as shown in Fig.
26.7. Both the voltage Eg and VRs can be displayed on the oscilloscope
at the same time, and the phase angle between Eg and VRs can be deter-
mined. Since VRs and Ii are in phase, the angle determined will also be
the angle between Eg and Ii. The angle we are looking for is between Ei
and Ii, not between Eg and Ii, but since Rs is usually chosen small
enough, we can assume that the voltage drop across Rs is so small com-
pared to Eg that Ei  Eg. Substituting the peak, peak-to-peak, or rms
values from the oscilloscope measurements, along with the angle just
determined, will permit a determination of the magnitude and angle for
THE IMPEDANCE PARAMETERS Zi AND Zo  1153

Zi, from which the resistive and reactive components can be determined
using a few basic geometric relationships. The reactive nature (induc-
tive or capacitive) of the input impedance can be determined when the
angle between Ei and Ii is computed. For a dual-trace oscilloscope, if
Eg leads VRs (Ei leads Ii), the network is inductive; if the reverse is true,
the network is capacitive.

+ +
Red Ii

Eg Two-port
Ei system
Ii
– – Rs + –
Black

Black Red

Channel 2: VRs Share common


Channel 1: Es ground

FIG. 26.7
Determining Zi using an oscilloscope.

To determine the angle associated with Zo, the sensing resistor must
again be moved to the bottom to form a common ground with the sup-
ply Eg. Then, using the approximation Eg  Eo, the magnitude and
angle of Zo can be determined.

EXAMPLE 26.1 Given the DMM measurements appearing in Fig. Rs


26.8, determine the input impedance Zi for the system if the input +
100 
impedance is known to be purely resistive. +
Solution: Eg 100 mV Ei = 96 mV Two-port
system

VRs  Eg  Ei  100 mV  96 mV  4 mV –
VR 4 mV
Ii  IRs  s    40 mA
Rs 100  Zi

Ei 96 mV
Zi  Ri      2.4 k FIG. 26.8
Ii 40 mA Example 26.1.

EXAMPLE 26.2 Using the provided DMM measurements of Fig.


26.9, determine the output impedance Zo for the system if the output
impedance is known to be purely resistive.

Rs

+ 2 k
+
Ei = 0 V Two-port 2V
system Eo = 1.92 V Eg

Zo

FIG. 26.9
Example 26.2.
1154  SYSTEM ANALYSIS: AN INTRODUCTION

Solution:
VRs  Eg  Eo  2 V  1.92 V  0.08 V  80 mV
VR 80 mV
Io  IRs  s    40 mA
Rs 2 k
Eo 1.92 V
Zo      48 k
Io 40 mA

EXAMPLE 26.3 The input characteristics for the system of Fig.


26.10(a) are unknown. Using the oscilloscope measurements of Fig.
26.10(b), determine the input impedance for the system. If a reactive
component exists, determine its magnitude and whether it is inductive
or capacitive.

Eg

+ +
Zi

50 mV ∠0° Two-port VRs


Eg Ei
(p-p) system
150°
– Rs
– + –
Channel 1 10 

Channel 2
(a)
Eg: Vertical sensitivity = 10 mV/div.
VR : Vertical sensitivity = 1 mV/div.
s

(b)

FIG. 26.10
Example 26.3.

Solution: The magnitude of Zi:


VRs( p-p) 2 mV
Ii( p-p)  IRs( p-p)      200 mA
Rs 10 
Ei Eg 50 mV
Zi        250 
Ii Ii 200 mA

The angle of Zi: The phase angle between Eg and VRs (or IRs  Ii) is

180°  150°  30°

with Eg leading Ii, so the system is inductive. Therefore,

Zi  250  30°
 216.51   j 125   R  j XL
THE VOLTAGE GAINS AvNL, Av, AND AvT  1155

26.3 THE VOLTAGE GAINS AvNL, Av, AND AvT


The voltage gain for the two-port system of Fig. 26.11 is defined by
+ +

E
AvNL  o (26.3)
Ei AvNL Eo
Ei
– –
The capital letter A in the notation was chosen from the term amplifi-
cation factor, with the subscript v selected to specify that voltage levels FIG. 26.11
are involved. The subscript NL reveals that the ratio was determined Defining the no-load gain AvNL.
under no-load conditions; that is, a load was not applied to the output
terminals when the gain was determined. The no-load voltage gain is
the gain typically provided with packaged systems since the applied
load is a function of the application.
The magnitude of the ratio can be determined using a DMM or an
oscilloscope. The oscilloscope, however, must be used to determine the
phase shift between the two voltages.
In Fig. 26.12 a load has been introduced to establish a loaded gain
that will be denoted simply as Av and defined by

E
Av  o (26.4)
Ei with RL

Rg

+ +
+ +
Eg Ei Av Eo RL VL = Eo


– –

FIG. 26.12
Defining the loaded voltage gain Av (and AvT ).

For all two-port systems the loaded gain Av will always be less than
the no-load gain.
In other words, the application of a load will always reduce the gain
below the no-load level.
A third voltage gain can be defined using Fig. 26.12 since it has an
applied voltage source with an associated internal resistance—a situa-
tion often encountered in electronic systems. The total voltage gain of
the system is represented by AvT and is defined by

E
AvT  o (26.5)
Eg

It is the voltage gain from the source Eg to the output terminals Eo. Due
to loss of signal voltage across the source resistance,
the voltage gain AvT is always less than the loaded voltage gain Av or
unloaded gain AvNL.
1156  SYSTEM ANALYSIS: AN INTRODUCTION

If we expand Eq. (26.5) as follows:

 
Eo Eo Eo Ei Eo Ei
AvT    (1)      ⋅ 
Eg Eg Eg Ei Ei Eg
Ei
then AvT  Av  (if loaded)
Eg
Ei
or AvT  AvNL (if unloaded)
Eg
The relationship between Ei and Eg can be determined from Fig.
26.12 if we recognize that Ei is across the input impedance Zi and thus
apply the voltage divider rule as follows:
Zi (Eg)
Ei  
Zi  Rg
Ei Zi
or 
Eg Zi  Rg
Substituting into the above relationships will result in

Zi
AvT  Av (if loaded) (26.6)
Zi  Rg

Zi
AvT  AvNL (if unloaded) (26.7)
Zi  Rg

A two-port equivalent model for an unloaded system based on the


definitions of Zi, Zo, and AvNL is provided in Fig. 26.13. Both Zi and Zo
appear as resistive values since this is typically the case for most elec-
tronic amplifiers. However, both Zi and Zo can have reactive compo-
nents and not invalidate the equivalency of the model.

Ii Zo I2
+ Ro +
+
Ei Zi Ri AvNLEi Eo

– –

FIG. 26.13
Ro Equivalent model for two-port amplifier.
+
+ The input impedance is defined by Zi  Ei /Ii and the voltage Eo 
AvNLEi in the absence of a load, resulting in AvNL  Eo /Ei as defined.
AvNLEi Eo RL
The output impedance is defined with Ei set to zero volts, resulting in
– AvNLEi  0 V, which permits the use of a short-circuit equivalent for the
– controlled source. The result is Zo  Eo /Io, as defined, and the parame-
ters and structure of the equivalent model are validated.
FIG. 26.14 If a load is applied as in Fig. 26.14, an application of the voltage
Applying a load to the output of Fig. 26.13. divider rule will result in
THE VOLTAGE GAINS AvNL, Av, AND AvT  1157

RL(AvNLEi)
Eo  
RL  Ro

Eo RL
and Av    AvNL (26.8)
Ei RL  Ro

For any value of RL or Ro, the ratio RL /(RL  Ro) must be less than
1, mandating that Av is always less than AvNL as stated earlier. Further,
for a fixed output impedance (Ro), the larger the load resistance (RL ),
the closer the loaded gain to the no-load level.
An experimental procedure for determining Ro can be developed if
we solve Eq. (26.8) for the output impedance Ro:
RL
Av  AvNL
RL  Ro
or Av(RL  Ro)  RLAvNL
AvRL  AvRo  RLAvNL
and AvRo  RLAvNL  AvRL
RL(AvNL  Av)
with Ro  
Av

AvNL
or

Ro  RL 
Av
1  (26.9)

Equation (26.9) reveals that the output impedance Ro of an amplifier


can be determined by first measuring the voltage gain Eo /Ei without a
load in place to find AvNL and then measuring the gain with a load RL to
find Av. Substitution of AvNL, Av, and RL into Eq. (26.9) will then pro-
vide the value for Ro.

EXAMPLE 26.4 For the system of Fig. 26.15(a) employed in the


loaded amplifier of Fig. 26.15(b):

Rg

+ + 1 k + +
+
Ei = 4 mV AvNL Eo = –20 V Eg Ei Av Eo RL 2.2 k VL

– – – –

(a) Zi = 1 k Zo = 50 k
(b)

FIG. 26.15
Example 26.4.

a. Determine the no-load voltage gain AvNL.


b. Find the loaded voltage gain Av.
c. Calculate the loaded voltage gain AvT.
d. Determine Ro from Eq. (26.9), and compare it to the specified value
of Fig. 26.15.
1158  SYSTEM ANALYSIS: AN INTRODUCTION

Solutions:
Eo 20 V
a. AvNL      5000
Ei 4 mV

 
RL 2.2 k
b. Av  AvNL   (5000) 
RL  Ro 2.2 k  50 k
 (5000)(0.0421)  210.73

 
Zi 1 k
c. AvT  Av  (210.73) 
Zi  Rg 1 k  1 k


1
 (210.73)   105.36
2
AvNL 5000
 
d. Ro  RL   1  2.2 k   1
Av 210.73  
 2.2 k(23.727  1)  2.2 k(22.727)
 50 k as specified

26.4 THE CURRENT GAINS Ai AND AiT , AND


THE POWER GAIN AG
The current gain of two-port systems is typically calculated from volt-
age levels. A no-load gain is not defined for current gain since the
absence of RL requires that Io  Eo /RL  0 A and Ai  Io /Ii  0.
For the system of Fig. 26.16, however, a load has been applied,
and
Eo
Io  
RL
Ei
with Ii  
Zi

Ig Rg Ii Io

+ +
+
Eg Ei Av Eo RL


– –

Zi Zo

FIG. 26.16
Defining Ai and AiT.

Note the need for a minus sign when Io is defined, because the
defined polarity of Eo would establish the opposite direction for Io
through RL.
The loaded current gain is
Eo /RL
 
Io Eo Zi
Ai       
Ii Ei /Zi Ei RL
THE CURRENT GAINS Ai AND AiT , AND THE POWER GAIN AG  1159

Zi
and Ai  Av (26.10)
RL

In general, therefore, the loaded current gain can be obtained


directly from the loaded voltage gain and the ratio of impedance levels,
Zi over RL.
If the ratio AiT  Io /Ig were required, we would proceed as follows:
Eo
Io  
RL
Eg
with Ii  
Rg  Zi
Io Eo /RL Eo Rg  Zi
and AiT        
Ig Eg /(Rg  Zi) Eg RL   
Io Rg  Zi
or AiT    AvT 
Ig 
RL  (26.11)

The result obtained with Eq. (26.10) or (26.11) will be the same
since Ig  Ii, but the option of which gain is available or which you
choose to use is now available.
Returning to Fig. 26.13 (repeated in Fig. 26.17), an equation for the
current gain can be determined in terms of the no-load voltage gain.

Ii Ro Io
+ +
+
Ei Ri AvNLEi Eo RL

– –

FIG. 26.17
Developing an equation for Ai in terms of AvNL.

Through Ohm’s law:


AvNL Ei
Io  
RL  Ro
but Ei  Ii Ri
AvNL(Ii Ri)
and Io  
RL  Ro

Io Ri
so that Ai    AvNL (26.12)
Ii RL  Ro

The result is an equation for the loaded current gain of an amplifier


in terms of the nameplate no-load voltage gain and the resistive ele-
ments of the network.
1160  SYSTEM ANALYSIS: AN INTRODUCTION

Recall an earlier conclusion that the larger the value of RL, the larger
the loaded voltage gain. For current levels, Equation (26.12) reveals that
the larger the level of RL, the less the current gain of a loaded
amplifier.
In the design of an amplifier, therefore, one must balance the desired
voltage gain with the current gain and the resulting ac output power
level.
For the system of Fig. 26.17, the power delivered to the load is
determined by E2o /RL, whereas the power delivered at the input termi-
nals is E2i /Ri. The power gain is therefore defined by
E2o /RL E2o Ri
 
Po Eo 2 Ri
AG     2  2    
Pi E i /Ri E i RL Ei RL

Ri
and AG  A2v (26.13)
RL

Expanding the conclusion,

 
Ri
AG  (Av) Av  (Av)(Ai)
RL

so AG  Av Ai (26.14)

Don’t be concerned about the minus sign. Av or Ai will be negative


to ensure that the power gain is positive, as obtained from Eq. (26.13).
If we substitute Av  Ai RL /Ri [from Eq. (26.10)] into Eq. (26.14),
we will find
Ai RL
AG  Av Ai    Ai
Ri  
RL
or AG  A2i  (26.15)
Ri

which has a format similar to that of Eq. (26.13), but now AG is given
in terms of the current gain of the system.
The last power gain to be defined is the following:
PL E2o /RL E2o /RL Eo Rg  Ri
  
2
AGT         
Pg Eg Ig E g /(Rg  Ri)
2
Eg RL

Rg  Ri
or AGT  A2vT 
RL  (26.16)

Expanding:
Rg  Ri

AGT  AvT AvT
RL 
and AGT  AvT AiT (26.17)
THE CURRENT GAINS Ai AND AiT , AND THE POWER GAIN AG  1161

EXAMPLE 26.5 Given the system of Fig. 26.18 with its nameplate
data:

Ig Rg Ii Io

1 k + +
+
AvNL = –960
Eg Ei Zi = 2.7 k Eo RL = 4.7 k
Zo = 40 k

– –

FIG. 26.18
Example 26.5.

a. Determine Av.
b. Calculate Ai.
c. Increase RL to double its current value, and note the effect on Av and
Ai.
d. Find AiT.
e. Calculate AG.
f. Determine Ai from Eq. (26.1), and compare it to the value obtained
in part (b).

Solutions:

 
RL 4.7 k
a. Av  AvNL  (960)   100.94
RL  Ro 4.7 k  40 k

 
Ri 2.7 k
b. Ai  AvNL  (960)   57.99
RL  Ro 4.7 k  40 k
c. RL  2(4.7 k)  9.4 k

   
RL 9.4 k
Av  AvNL   (960) 
RL  Ro 9.4 k  40 k
 182.67 versus 100.94, which is a significant increase

   
Ri 2.7 k
Ai  AvNL   (960) 
RL  Ro 40 k  9.4 k
 52.47 versus 57.99
which is a drop in level but not as significant as the change in Av.
d. AiT  Ai  57.99 as obtained in part (b)
Rg  Ri
However, AiT  AvT 
RL  
Ri (Rg  Ri)

  Av 
(Ri  Rg) RL  
 
Ri 2.7 k
 Av  (100.94) 
RL 4.7 k
 57.99
as well

 
Ri 2.7 k
e. AG  A2v  (100.94)2   5853.19
RL 4.7 k
1162  SYSTEM ANALYSIS: AN INTRODUCTION

f. AG  Av Ai
AG (5853.19)
or Ai    
Av (100.94)
 57.99 as found in part (b)

26.5 CASCADED SYSTEMS


When considering cascaded systems, as in Fig. 26.19, the most impor-
tant fact to remember is that
the equations for cascaded systems employ the loaded voltage and
current gains for each stage and not the nameplate unloaded levels.

Ii1 Io3

+ +
Ei1 A v1 , A i1 Eo1 = Ei2 A v2 , A i2 Eo2 = Ei3 Av3, Ai3 Eo3 RL

– –
Zi1 Zi2 Zi3

FIG. 26.19
Cascaded system.

Too often the labeled no-load gains are employed, resulting in enor-
mous overall gains and unreasonably high expectations for the system.
In addition, bear in mind that the input impedance of stage 3 may affect
the input impedance of stage 2 and, therefore, the load on stage 1.
In general, therefore, the equations for cascaded systems initially
appear to offer a high level of simplicity to the analysis. Simply be
aware, however, that each term of the overall equations must be care-
fully evaluated before using the equation.
The total voltage gain for the system of Fig. 26.19 is

AvT  Av1 ⋅ Av2 ⋅ Av3 (26.18)

where, as noted above, the amplification factor of each stage is deter-


mined under loaded conditions.
The total current gain for the system of Fig. 26.19 is

AiT  Ai1 ⋅ Ai2 ⋅ Ai3 (26.19)

where, again, the gain of each stage is determined under loaded (con-
nected) conditions.
The current gain between any two stages can also be determined
using an equation developed earlier in the chapter. For cascaded sys-
tems, the equation has the following general format:

Zi
Ai  Av (26.20)
RL

where Av is the loaded voltage gain corresponding to the desired loaded


current gain. That is, if the gain is from the first to the third stages, then
CASCADED SYSTEMS  1163

the voltage gain substituted is also from the first to third stages. The
input impedance Zi is for the first stage of interest, and RL is the load-
ing on the last stage of interest.
For example, for the three-stage amplifier of Fig. 26.19,
Zi1
AiT  AvT
RL
whereas for the first two stages
Zi1
A′i  A′v 
Zi3
Io2 Eo2
where A′i   and A′v  
Ii1 Ei1
The total power gain is determined by

AGT  AvT AiT (26.21)

whereas the gain between specific stages is simply the product of the
voltage and current gains for each section. For example, for the first two
stages of Fig. 26.19,
A′G  A′v2 ⋅ A′i2
where A′v2  Av1 ⋅ Av2 and A′i2  Ai1 ⋅ Ai2

EXAMPLE 26.6 For the cascaded system of Fig. 26.20, with its
nameplate no-load parameters:

Ii1 Io

+ + + +
AvNL = 1 AvNL = –600 AvNL = –1200
Ei1 Zi = 50 k Eo1 = Ei2 Zi = 1.8 k Eo2 = Ei3 Zi = 1.2 k Eo3 RL 3.3 k
Zo = 25  Zo = 40 k Zo = 50 k
– – – –

FIG. 26.20
Example 26.6.

a. Determine the load voltage and current gain for each stage, and
redraw the system of Fig. 26.20 with the loaded parameters.
b. Calculate the total voltage and current gain.
c. Find the total power gain of the system using Eq. (26.21).
d. Calculate the voltage and current gain for the first two stages using
Eqs. (26.18) and (26.19).
e. Determine the current gain for the first two stages using Eq. (26.20),
and compare your answer with the result of part (d).
f. Calculate the power gain for the first two stages using Eq. (26.21).
g. Determine the power gain for the first two stages using Eq. (26.13).
Compare this answer with the result of part (f ).
h. Calculate the incorrect voltage gain for the entire system using Eq.
(26.18) and the no-load nameplate level for each stage. Compare this
answer to the result of part (b).
1164  SYSTEM ANALYSIS: AN INTRODUCTION

Solutions:
RL Zi2 1.8 k
a. Av1  AvNL1  AvNL1  (1)
RL  Ro Zi2  Ro1 1.8 k  25 
 0.986
Zi3 1.2 k
Av2  AvNL2  (600)  17.476
Zi3  Ro2 1.2 k  40 k
RL 3.3 k
Av3  AvNL3  (1200)  74.296
RL  Ro3 3.3 k  50 k
Ri Zi1 50 k
Ai1  AvNL  AvNL1  (1)
RL  Ro Zi2  Ro1 1.8 k  25 
 27.397
Zi2 1.8 k
Ai2  AvNL2  (600)  26.214
Zi3  Ro2 1.2 k  40 k
Zi3 1.2 k
Ai3  AvNL3  (1200)  27.017
RL  Ro3 3.3 k  50 k

Note Fig. 26.21.

Ii1 Io

+ +
Av1 = 0.986 Av2 = –17.476 Av3 = –74.296
Ei 1 Eo1 = Ei2 Eo2 = Ei3 Eo3 RL = 3.3 k
Ai 1 = –27.397 Ai 2 = 26.214 Ai 3 = 27.017

– –

FIG. 26.21
Solution to Example 26.6.

Eo3
b. AvT    Av1 ⋅ Av2 ⋅ Av3  (0.986)(17.476)(74.296)
Ei1
 1280.22
Io3
AiT    Ai1 ⋅ Ai2 ⋅ Ai3  (27.397)(26.214)(27.017)
Ii1
 19,403.20
c. AGT  AvT ⋅ AiT  (1280.22)(19,403.20)  24.84  106
d. A′v2  Av1 ⋅ Av2  (0.986)(17.476)  17.231
A′i2  Ai1 ⋅ Ai2  (27.397)(26.214)  718.185
Zi Zi1 50 k
e. A′i2  Av  A′v2  (17.231)
RL Zi 3 1.2 k
 717.958 versus 718.185
with the difference due to the level of accuracy carried through the
calculations.
f. A′G2  A′v2 ⋅ A′i2  (17.231)(718.185)  12,375.05
Ri Ri1 50 k
g. A′G2  A2v  (A′v2)2  (17.231)2  12,371.14
RL Zi3 1.2 k
IMPEDANCE (z) PARAMETERS  1165

h. AvT  Av1 ⋅ Av2 ⋅ Av3  (1)(600)(1200)  7.2  105


720,000 : 1280.22  562.40 : 1
which is certainly a significant difference in results.

26.6 IMPEDANCE (z) PARAMETERS


For the two-port configuration of Fig. 26.22, four variables are speci- I1 I2
fied. For most situations, if any two are specified, the remaining two + +
variables can be determined. The four variables can be related by the
E1 (Z) E2
following equations:
– –

E1  z11I1  z12I2 (26.22a)


FIG. 26.22
Two-port impedance parameter configuration.
E2  z21I1  z22I2 (26.22b)

The impedance parameters z11, z12, and z22 are measured in ohms.
To model the system, each impedance parameter must be determined
by setting a particular variable to zero.

z11
For z11, if I2 is set to zero, as shown in Fig. 26.23, Equation (26.22a) I1 I2 = 0
becomes
+
E1  z11I1  z12(0) E1 System

E1
and z11   (ohms, ) (26.23)
I1 I2  0 FIG. 26.23
Determining z11.
Equation (26.23) reveals that with I2 set to zero, the impedance param-
eter is determined by the resulting ratio of E1 to I1. Since E1 and I1 are both
input quantities, with I2 set to zero, the parameter z11 is formally referred
to in the following manner:
z11  open-circuit, input-impedance parameter

z12
For z12, I1 is set to zero, and Equation (26.22a) results in

E1
z12   (ohms, ) (26.24)
I2 I2  0

For most systems where input and output quantities are to be com- I1 = 0 I2
pared, the ratio of interest is usually that of the output quantity divided
by the input quantity. In this case, the reverse is true, resulting in the + +
following: E1 System E2
– –
z12  open-circuit, reverse-transfer impedance parameter
The term transfer is included to indicate that z12 will relate an input
and output quantity (for the condition I1  0). The network configura- FIG. 26.24
tion for determining z12 is shown in Fig. 26.24. Determining z12.
1166  SYSTEM ANALYSIS: AN INTRODUCTION

For an applied source E2, the ratio E1/I2 will determine z12 with I1
set to zero.

z21
To determine z21, set I2 to zero and find the ratio E2/I1 as determined by
Eq. (26.22b). That is,

E2
z21   (ohms, ) (26.25)
I1 I2  0

In this case, input and output quantities are again the determining
variables, requiring the term transfer in the nomenclature. However, the
ratio is that of an output to an input quantity, so the descriptive term
forward is applied, and
z21  open-circuit, forward-transfer impedance parameter
I1 I2 = 0 The determining network is shown in Fig. 26.25. For an applied
+ + voltage E1, it is determined by the ratio E2/I1 with I2 set to zero.
E1 System E2
– –
z22
The remaining parameter, z22, is determined by
FIG. 26.25
Determining z21.
E2
z22   (ohms, ) (26.26)
I2 I1  0
I1 = 0 I2

+ as derived from Eq. (26.22b) with I1 set to zero. Since it is the ratio of
System E2 the output voltage to the output current with I1 set to zero, it has the ter-
– minology
z22  open-circuit, output-impedance parameter
FIG. 26.26 The required network is shown in Fig. 26.26. For an applied voltage
Determining z22. E2, it is determined by the resulting ratio E2/I2 with I1  0.

EXAMPLE 26.7 Determine the impedance (z) parameters for the T


R XL network of Fig. 26.27.
1 2
3 5 Solution: For z11, the network will appear as shown in Fig. 26.28,
with Z1  3  0°, Z2  5  90°, and Z3  4  90°:
XC 4
E1
I1  
Z1  Z3
1′ 2′
E1
Thus z11  
I1 I2  0
FIG. 26.27
T configuration.
and z11  Z1  Z3 (26.27)

For z12, the network will appear as shown in Fig. 26.29, and
E1  I2Z3
IMPEDANCE (z) PARAMETERS  1167

I1 I2 = 0 I1 = 0 I2
1
Z1 Z2 2 1 Z1 Z2
+ 2
+
+ +
E1 Z3 E1 Z3 E1 E2
– –

1′ – 2′
2′ 1′

FIG. 26.28 FIG. 26.29


Determining z11. Determining z12.

E1 I2Z3
Thus z12   
I2 I1  0 I2

and z12  Z3 (26.28)

For z21, the required network appears in Fig. 26.30, and


I1 I2 = 0
E2  I1Z3 Z1 Z2 2
1 +
E2 I1Z3 +
Thus, z21    +
I1 I2  0 I1
E1 E2 Z3 E2

and z21  Z3 (26.29) –



1′ –
For z22, the determining configuration is shown in Fig. 26.31, and 2′

E2 FIG. 26.30
I2   Determining z21.
Z2  Z3
E2 I2(Z2  Z3)
Thus z22     I1 = 0 I2
I2 I1  0 I2 1 Z1 Z2
2
and z22  Z2  Z3 (26.30) +
Z3 E2
Note that for the T configuration, z12  z21. For Z1  3  0°, –
Z2  5  90°, and Z3  4  90°, we have
2′
1′
z11  Z1  Z3  3   j 4 
FIG. 26.31
z12  z21  Z3  4  90°  j 4  Determining z22.
z22  Z2  Z3  5  90°  4  90°  1  90°  j 1 

For a set of impedance parameters, the terminal (external) behavior


of the device or network within the configuration of Fig. 26.22 is deter-
mined. An equivalent circuit for the system can be developed using the
impedance parameters and Eqs. (26.22a) and (26.22b). Two possibili-
ties for the impedance parameters appear in Fig. 26.32.
Applying Kirchhoff’s voltage law to the input and output loops of
the network of Fig. 26.32(a) results in
E1  z11I1  z12I2  0
and E2  z22I2  z21I1  0
1168  SYSTEM ANALYSIS: AN INTRODUCTION

– +
1 I1 I2 2 1 I1 I2 2
z11 z22 z11 – z12 z22 – z12
+ + + +
(z21 – z12)I1
+ +
E1 z12I2 z 21I E2 E1 z12 E2
1
– –

– – – –
1′ 2′ 1′ 2′
(a) (b)

FIG. 26.32
Two possible two-port, z-parameter equivalent networks.

which, when rearranged, become


E1  z11I1  z12I2 E2  z21I1  z22I2
matching Eqs. (26.22a) and (26.22b).
For the network of Fig. 26.32(b),
E1  I1(z11  z12)  z12(I1  I2)  0
and E2  I1(z21  z12)  I2(z22  z12)  z12(I1  I2)  0
which, when rearranged, are
E1  I1(z11  z12  z12)  I2z12
E2  I1(z21  z12  z12)  I2(z22  z12  z12)
and E1  z11I1  z12I2
E2  z21I1  z22I2

Note in each network the necessity for a current-controlled voltage


source, that is, a voltage source the magnitude of which is determined
by a particular current of the network.
The usefulness of the impedance parameters and the resulting equiv-
alent networks can best be described by considering the system of Fig.
26.33(a), which contains a device (or system) for which the impedance

+ +

– –
I1 I2
2 z11 z22
1 1 2
Device, + +
network, z12I2 z21I1
system
(z) – –
1′ 2′ 1′ 2′

(a) (b)

FIG. 26.33
Substitution of the z-parameter equivalent network into a complex system.
ADMITTANCE (y) PARAMETERS  1169

parameters have been determined. As shown in Fig. 26.33(b), the equiv-


alent network for the device (or system) can then be substituted, and
methods such as mesh analysis, nodal analysis, and so on, can be
employed to determine required unknown quantities. The device itself
can then be replaced with an equivalent circuit and the desired solutions
obtained more directly and with less effort than is required using only
the characteristics of the device.

EXAMPLE 26.8 Draw the equivalent circuit in the form shown in Fig.
26.32(b) using the impedance parameters determined in Example 26.7.

Solution: The circuit appears in Fig. 26.34.

I1 XC XL I2
R
1 2
+ 3 1
+
4
+ +
E1 4I2 ∠–90° 4I1 ∠–90° E2
– –
– –
1′ 2′

FIG. 26.34
Example 26.8.

26.7 ADMITTANCE (y) PARAMETERS


The equations relating the four terminal variables of Fig. 26.22 can also
be written in the following form:

I1  y11E1  y12E2 (26.31a)

I2  y21E1  y22E2 (26.31b)

Note that in this case each term of each equation has the units of cur-
rent, compared to voltage for each term of Eqs. (26.22a) and (26.22b).
In addition, the unit of each coefficient is siemens, compared with the
ohm for the impedance parameters.
The impedance parameters were determined by setting a particular
current to zero through an open-circuit condition. For the admittance
(y) parameters of Eqs. (26.31a) and (26.31b), a voltage is set to zero
through a short-circuit condition.
The terminology applied to each of the admittance parameters fol-
lows directly from the descriptive terms applied to each of the
impedance parameters. The equations for each are determined
directly from Eqs. (26.31a) and (26.31b) by setting a particular volt-
age to zero.
1170  SYSTEM ANALYSIS: AN INTRODUCTION

y11

I1
y11   (siemens, S) (26.32)
E1 E2  0

y11  short-circuit, input-admittance parameter


The determining network appears in Fig. 26.35.

I1 I2
2
+ 1
E1 System E2 = 0

2′
1′

FIG. 26.35
y11 determination.

y12

I1
y12   (siemens, S) (26.33)
E2 E1  0

y12  short-circuit, reverse-transfer admittance parameter


The network for determining y12 appears in Fig. 26.36.

I1 I2
1
2 +
E1 = 0 System E2

1′
2′

FIG. 26.36
y12 determination.

y21

I2
y21   (siemens, S) (26.34)
E1 E2  0

y21  short-circuit, forward-transfer admittance parameter


The network for determining y21 appears in Fig. 26.37.

I1 I2
2
+ 1
E1 System E2 = 0

2′
1′

FIG. 26.37
y21 determination.
ADMITTANCE (y) PARAMETERS  1171

y22

I2
y22   (siemens, S) (26.35)
E2 E1  0

y22  short-circuit, output-admittance parameter


The required network appears in Fig. 26.38.

I1 I2
1
2 +
E1 = 0 System E2

1′
2′

FIG. 26.38
y22 determination.

EXAMPLE 26.9 Determine the admittance parameters for the p net-


work of Fig. 26.39. I1 BL I2
1 2
Solution: The network for y11 will appear as shown in Fig. 26.40, + +
0.02 mS
with
Y1  0.2 mS 0° Y2  0.02 mS 90° Y3  0.25 mS 90° E1 G 0.2 mS BC 0.25 mS E2
We use I1  E1YT  E1(Y1  Y2)
I1 – –
with y11   1′ 2′
E1 E2  0

FIG. 26.39
and y11  Y1  Y2 (26.36) p network.

I1 Short circuited
Y2 2
1
+
E1 Y1 Y3 E2 = 0

1′ 2′

FIG. 26.40
Determining y11.

The determining network for y12 appears in Fig. 26.41. Y1 is short


circuited; so IY2  I1, and
IY2  I1  E2Y2
The minus sign results because the defined direction of I1 in Fig. 26.41 is
opposite to the actual flow direction due to the applied source E2; that is,
I1
y12  
E2 E1  0
1172  SYSTEM ANALYSIS: AN INTRODUCTION

Short circuited I1 IY2 I2


1 Y2
2
+
E1 = 0 Y1 Y3 E2

1′
2′

FIG. 26.41
Determining y12.

and y12  Y2 (26.37)

The network employed for y21 appears in Fig. 26.42. In this case, Y3
is short circuited, resulting in
IY2  I2 and IY2  I2  E1Y2
I2
with y21  
E1 E2  0

and y21  Y2 (26.38)

I1 IY2 I2 Short circuited


Y2 2
1
+
E1 Y1 Y3 E2 = 0

1′ 2′

FIG. 26.42
Determining y21.

Note that for the p configuration, y12  y21, which was expected
since the impedance parameters for the T network were such that z12 
z21. A T network can be converted directly to a p network using the
Y-D transformation.
The determining network for y22 appears in Fig. 26.43, and

Short circuited I1 IY2 I2


1 Y2
2
+
E1 = 0 Y1 Y3 E2

1′
2′

FIG. 26.43
Determining y22.
ADMITTANCE (y) PARAMETERS  1173

YT  Y2  Y3 and I2  E2(Y2  Y3)

I2
Thus y22  
E2 E1  0

and y22  Y2  Y3 (26.39)

Substituting values, we have

Y1  0.2 mS 0°
Y2  0.02 mS 90°
Y3  0.25 mS 90°
y11  Y1  Y2
 0.2 mS  j 0.02 mS (L)
y12  y21  Y2  (j 0.02 mS)
 j 0.02 mS (C)
y22  Y2  Y3  j 0.02 mS  j 0.25 mS
 j 0.23 mS (C)

Note the similarities between the results for y11 and y22 for the p net-
work compared with z11 and z22 for the T network.
Two networks satisfying the terminal relationships of Eqs. (26.31a)
and (26.31b) are shown in Fig. 26.44. Note the use of parallel branches

I1 I2 I1 I2
a b –y12
1 2 1 2
+ + + (y22 – y12)I1 +

E1 y11 y12E2 y21E1 y22 E2 E1 y11 + y12 y22 + y12 E2

– – – –
1′ 2′ 1′ 2′

(a) (b)

FIG. 26.44
Two possible two-port, y-parameter equivalent networks.

since each term of Eqs. (26.31a) and (26.31b) has the units of current,
and the most direct route to the equivalent circuit is an application of
Kirchhoff’s current law in reverse. That is, find the network that satis-
fies Kirchhoff’s current law relationship. For the impedance parame-
ters, each term had the units of volts, so Kirchhoff’s voltage law was
applied in reverse to determine the series combination of elements in
the equivalent circuit of Fig. 26.44(a).
Applying Kirchhoff’s current law to the network of Fig. 26.44(a), we
have
1174  SYSTEM ANALYSIS: AN INTRODUCTION

Entering Leaving

Node a: I1  y11E1  y12E2


Node b: I2  y22E2  y21E1
which, when rearranged, are Eqs. (26.31a) and (26.31b).
For the results of Example 26.9, the network of Fig. 26.45 will result
if the equivalent network of Fig. 26.44(a) is employed.

I1 0.02 mS ∠90° E1 I2
+ +

BL 0.02 mS BC 0.23 mS
E1 E2

– –

0.02 mS ∠90° E2

FIG. 26.45
Equivalent network for the results of Example 26.9.

26.8 HYBRID (h) PARAMETERS


The hybrid (h) parameters are employed extensively in the analysis of
transistor networks. The term hybrid is derived from the fact that the
parameters have a mixture of units (a hybrid set) rather than a single
unit of measurement such as ohms or siemens, used for the z and y
parameters, respectively. The defining hybrid equations have a mixture
of current and voltage variables on one side, as follows:

E1  h11I1  h12E 2 (26.40a)

I2  h21I1  h22E 2 (26.40b)

To determine the hybrid parameters, it will be necessary to establish


both the short-circuit and the open-circuit condition, depending on the
parameter desired.

h11

E1
h11   (ohms, ) (26.41)
I1 E2  0

h11  short-circuit, input-impedance parameter


The determining network is shown in Fig. 26.46.
I1 I2
2
1
+
E1 System E2 = 0

1′
2′

FIG. 26.46
h11 determination.
HYBRID (h) PARAMETERS  1175

h12

E1
h12   (dimensionless) (26.42)
E2 I1  0

h12  open-circuit, reverse-transfer voltage ratio parameter


The network employed in determining h12 is shown in Fig. 26.47.

I1 = 0 I2
1
+ 2
+
E1 System E2

– –
2′
1′

FIG. 26.47
h12 determination.

h21

I2
h21   (dimensionless) (26.43)
I1 E2  0

h21  short-circuit, forward-transfer current ratio parameter


The determining network appears in Fig. 26.48.

I1 I2
2
1
+
E1 System E2 = 0

1′ 2′

FIG. 26.48
h21 determination.

h22

I2
h22   (siemens, S) (26.44)
E2 I1  0

h22  open-circuit, output admittance parameter


The network employed to determine h22 is shown in Fig. 26.49.
The subscript notation for the hybrid parameters is reduced to the
following for most applications. The letter chosen is that letter appear-
ing in boldface in the preceding description of each parameter:
h11  h i h12  hr h 21  h f h 22  ho
1176  SYSTEM ANALYSIS: AN INTRODUCTION

I1 = 0 I2
1
+ 2
+
E1 System E2

– –
2′
1′

FIG. 26.49
h22 determination.

The hybrid equivalent circuit appears in Fig. 26.50. Since the unit of
measurement for each term of Eq. (26.40a) is the volt, Kirchhoff’s volt-
age law was applied in reverse to obtain the series input circuit indi-
cated. The unit of measurement of each term of Eq. (26.40b) has the
units of current, resulting in the parallel elements of the output circuit
as obtained by applying Kirchhoff’s current law in reverse.

I1 I2
1 h11 2
+ +

+
E1 h12E2 h21I1 h22 E2

– –
1′ 2′

FIG. 26.50
Two-port, hybrid-parameter equivalent network.

Note that the input circuit has a voltage-controlled voltage source


whose controlling voltage is the output terminal voltage, while the out-
put circuit has a current-controlled current source whose controlling
current is the current of the input circuit.

EXAMPLE 26.10 For the hybrid equivalent circuit of Fig. 26.51:

I1 I2

+ hi +
Rs Zi
+
1
E1 hr E2 hf I1 ho E2 ZL
+
Es –

– –

FIG. 26.51
Example 26.10.

a. Determine the current ratio (gain) A i  I2 /I1.


b. Determine the voltage ratio (gain) Av  E 2 /E1.
HYBRID (h) PARAMETERS  1177

Solutions:
a. Using the current divider rule, we have
(1/h o)h f I1 h f I1
I2    
(1/h o)  ZL 1  h oZL

I2 hf
and A i     (26.45)
I1 1  hoZL

b. Applying Kirchhoff’s voltage law to the input circuit gives us


E1  hr E2
E1  h i I1  hr E2  0 and I1  
hi
Apply Kirchhoff’s current law to the output circuit:
I2  h f I1  h oE 2
E2
However, I2  
ZL
E2
so   h f I1  h oE 2
ZL
Substituting for I1 gives us
E1  hrE 2
 
E2
  h f   h oE 2
ZL hi
or h i E 2  h f ZL E1  h r h f ZL E 2  h i h oZL E 2
and E 2(h i  h r h f ZL  h i h oZL )  h f ZL E1
with the result that

E2 h f ZL
A v     (26.46)
E1 h i (1  h oZL )  h r h f ZL

EXAMPLE 26.11 For a particular transistor, hi  1 k, hr  4 


104, h f  50, and h o  25 ms. Determine the current and the voltage
gain if ZL is a 2-k resistive load.
Solution:
hf 50
Ai    
1  h oZL 1  (25 mS)(2 k)
50 50
     47.62
1  (50  103) 1.050
h f ZL
A v  
h i (1  h oZL )  h r h f ZL
(50)(2 k)
 
(1 k)(1.050)  (4  104)(50)(2 k)
100  103 100
  3     99
(1.050  10 )  (0.04  10 )
3
1.01
The minus sign simply indicates a phase shift of 180° between E2 and
E1 for the defined polarities in Fig. 26.51.
1178  SYSTEM ANALYSIS: AN INTRODUCTION

26.9 INPUT AND OUTPUT IMPEDANCES


The input and output impedances will now be determined for the hybrid
equivalent circuit and a z-parameter equivalent circuit. The input imped-
ance can always be determined by the ratio of the input voltage to the
input current with or without a load applied. The output impedance is
always determined with the source voltage or current set to zero. We
found in the previous section that for the hybrid equivalent circuit of Fig.
26.51,
E1  hi I1  hrE2
E2  I2ZL
I2 hf
and   
I1 1  h o ZL
By substituting for I2 in the second equation (using the relationship
of the last equation), we have
h f I1
E2    ZL
1  h oZL 
so the first equation becomes
h f I1ZL
E1  h i I1  hr  
1  h oZL 
h r h f ZL
and 
E1  I1 h i  
1  h oZL 
E1 h r h f ZL
Thus, Zi    h i   (26.47)
I1 1  h oZL

For the output impedance, we will set the source voltage to zero but
preserve its internal resistance Rs as shown in Fig. 26.52.

I1 I2

1 hi +2
Rs
+ Zo
1
hr E2 hf I1 ho E2 ZL
Es = 0 –

1′ 2′

FIG. 26.52
Determining Zo for the hybrid equivalent network.

Since Es  0
hr E2
then I1  
h i  Rs
From the output circuit,
I2  h f I1  h o E 2

 
hr E2
or I2  h f   h o E 2
h i  Rs
INPUT AND OUTPUT IMPEDANCES  1179

hr h f
and 
I2    h o E 2
h i  Rs 
Thus, E2 1 (26.48)
Zo    ——
I2 hr h f
h o  
h i  Rs

EXAMPLE 26.12 Determine Zi and Zo for the transistor having the


parameters of Example 26.11 if Rs  1 k.
Solution:
hr h f ZL 0.04 k
Zi  hi    1 k  
1  h oZL 1.050
 1  103  0.0381  103  961.9 
1 1
Zo  ——  ———
hr h f (4  104)(50)
h o   25 mS  
h i  Rs 1 k  1 k
1 1
  6 6  
25  10  10 10 15  106
Zo  66.67 k

For the z-parameter equivalent circuit of Fig. 26.53,

I1 I2
z11 z22
+ +2
Rs
Zi + + Zo
E1 z12I2 z21I1 E2 ZL
+
Es – –
– –

2′

FIG. 26.53
Determining Zi for the z-parameter equivalent network.

z 21 I1
I2  
z 22  ZL
E1  z12 I2
and I1  
z11

 
z 21I1
or E1  z11I1  z12I2  z11I1  z12 
z 22  ZL

E1 z12z 21
and Zi    z11   (26.49)
I1 z 22  ZL

For the output impedance, Es  0, and


1180  SYSTEM ANALYSIS: AN INTRODUCTION

z12I2 E2  z 21I1
I1   and I2  
Rs  z11 z 22

 
z12I2
or E 2  z 22I2  z 21I1  z 22I2  z 21 
Rs  z11
z12z 21I2
and E 2  z 22I2  
Rs  z11

E2 z12z 21
Thus, Zo    z 22   (26.50)
I2 Rs  z11

26.10 CONVERSION BETWEEN PARAMETERS


The equations relating the z and y parameters can be determined
directly from Eqs. (26.22) and (26.31). For Eqs. (26.31a) and (26.31b),
I1  y11E1  y12E 2
I2  y21E1  y22E 2
The use of determinants will result in
I1 y12
I2 y22 y22I1  y12I2
E1  ––––––––  –––––––––––––––––
y11 y12  y11y22  y12y21
y21 y22
Substituting the notation
Dy  y11y22  y12y21
y22 y12
we have E1  I1  I2
Dy Dy
which, when related to Eq. (26.22a),
E1  z11I1  z12I2
indicates that
y22 y12
z11   and z12  
Dy Dy
and, similarly,
y21 y11
z21   and z22  
Dy Dy
For the conversion of z parameters to the admittance domain, determi-
nants are applied to Eqs. (26.22a) and (26.22b). The impedance param-
eters can be found in terms of the hybrid parameters by first forming the
determinant for I1 from the hybrid equations:
E1  h11I1  h12E2
I2  h21I1  h22E2
That is,
E1 h12
I2 h22  h22 h12
I1  ––––––––  ––– E1  –––– I2
h11 h12 Dh Dh
h21 h22
COMPUTER ANALYSIS  1181

h22 h12
and E1  I1  I2
Dh Dh
DhI1 h12
or E1    I2
h22 h22
which, when related to the impedance-parameter equation,
E1  z11I1  z12I2
indicates that
Dh h12
z11   and z12  
h22 h22
The remaining conversions are left as an exercise. A complete table
of conversions appears in Table 26.1.

TABLE 26.1
Conversions between z, y, and h parameters.

From
→ z y h
To
→

y22 y12 Dh h12


z11 z12    
Dy Dy h22 h22
z
y21 y11 h21 1
z21 z22    
Dy Dy h22 h22
z22 z12 1 h12
  y11 y12  
Dz Dz h11 h11
y
z21 z h Dh
 11
y21 y22 
21

Dz Dz h11 h11

Dz z12 1 y12
    h11 h12
z22 z22 y11 y11
h
z21 1 y Dy
  
21
 h21 h22
z22 z22 y11 y11

26.11 COMPUTER ANALYSIS

PSpice

Hybrid Equivalent Network—Voltage Gain The computer


analysis of this section will be limited to a practice session in the use of
controlled sources. The system to be analyzed will be the hybrid equiv-
alent network of Fig. 26.54. Both the voltage gain and the output
impedance will be determined using schematics.
Using Eq. (26.46), the magnitude and the phase of the output volt-
age are determined in the following manner:

hf RL
Av  
hi(1  ho RL)  hrhf RL
(50)(2 k)
 
(1 k)(1  (25  106 S)(2 k))  (4  104)(50)(2 k)
100  103 100  103
  3    99.01
(1 k)(1  50  10 )  40 1050  40
1182  SYSTEM ANALYSIS: AN INTRODUCTION

hi

I1 1 k + +
+ +
E1 = 1 V ∠0° 4× 10–4
E2
50I1 1
40 k E2 RL = 2 k VL
hrE2 hf I1 ho
– –
– –

FIG. 26.54
Hybrid equivalent model to be investigated under loaded conditions using PSpice.

E VL
and Av  2  
E1 E1

so that VL  AvE1  (99.01)(1 V 0°)


 99.01 V 180°
The schematic representation has been established as shown in Fig.
26.55. Note that both a CCCS and a VCVS must be used along with
the ac source VSIN. Most of the construction and setting up of the var-
ious components through the Property Editor dialog box is quite
straightforward. However, you must be very careful when setting up the
connections for the controlling variables. When you cross a line, be
absolutely sure that a small circular dot does not appear where you
cross the line; otherwise, a connection is being made. Simply click the
wire in place before crossing the line, and then click the wire construc-
tion again after crossing the line.

FIG. 26.55
Using PSpice to analyze the network of Fig. 26.54.
COMPUTER ANALYSIS  1183

The Simulation Settings were AC Sweep, Start and End Frequen-


cies at 1 kHz, and 1 data Point/Decade. Select PSpice-View Output
File, click OK, and run the simulation. The AC ANALYSIS listing of
Fig. 26.56 results. There is an exact match between the theoretical solu-
tion provided above and the computer analysis.

Hybrid Equivalent Network—Output Impedance For the out-


put impedance, the applied source VSIN is set to 0 V by replacing it
with a direct 0- connection. Then a 1-A current source is applied as
shown in Fig. 26.57. The ISRC current source was selected because it

FIG. 26.56
Output file for the voltage across the load resistor of Fig. 26.55.

FIG. 26.57
Modification of the schematic of Fig. 26.55 to determine the output
impedance of the network.
1184  SYSTEM ANALYSIS: AN INTRODUCTION

has the arrow in the symbol. Everything else in the network remains the
same, so there is no need to rebuild the entire network. Simply make
the changes and run the simulation. Even the simulation does not have
to be changed since the chosen parameters will remain the same. The
current source was given a magnitude of 1 A so that the magnitude of
the VPRINT1 voltage would also be the magnitude of the output
impedance. The results of Fig. 26.58 indicate an output impedance of
200 k. The following theoretical analysis reveals that the output
impedance is indeed 200 k:

1 1
Zo  ——  ————
hrhf (4  104)(50)
ho   25  106 S  
hi  Rs 1 k  0
1 1
     200 k
25  106 S  20  106 S 5  106 S

FIG. 26.58
Output file for the voltage across the 1-A current source (and output
impedance) of the network of Fig. 26.57.

PROBLEMS
SECTION 26.2 The Impedance Parameters Zi and Zo
1. Given the indicated voltage levels of Fig. 26.59, deter-
mine the magnitude of the input impedance Zi.

Rs

47  +
+
Eg 1.05 V Ei = 1 V System


Zi

FIG. 26.59
Problem 1.
PROBLEMS  1185

2. For a system with


Ei  120 V 0° and Ii  6.2 A 10.8°
determine the input impedance in rectangular form. At a
frequency of 60 Hz, determine the nameplate values of
the parameters.
3. For the multiport system of Fig. 26.60: – Ei = 1.8 V +
a. Determine the magnitude of Ii1 if Ei1  20 mV. 2
Ii2 = 0.4 mA
b. Find Zi2 using the information provided. Zi2
c. Calculate the magnitude of Ei3.

+ Ii1 +

Multi-port
Ei1 system Eo RL

– –

Zi = 2 k
Zi3 = 4.6 k
Ii3 = 1.5 mA
+ Ei3 –

FIG. 26.60
Problem 3.

4. Given the indicated voltage levels of Fig. 26.61, deter-


mine Zo.

Rs

+ 2 k
+
System Eo = 3.8 V ( p–p) Eg = 4 V ( p–p)


Zo

FIG. 26.61
Problems 4 through 6.

5. For the configuration of Fig. 26.61, determine Zo if eg


2 sin 377t and vR  40  103 sin 377t, with Rs  0.91
k.
6. Determine Zo for the system of Fig. 26.61 if Eg 
1.8 V (p-p) and Eo  0.6 V rms.
1186  SYSTEM ANALYSIS: AN INTRODUCTION

7. Determine the output impedance for the system of Fig.


26.62 given the indicated scope measurements.

eg

Io
+
+
System Eo Eg vR

– Rs

1 k
+ VR –
Channel 1
eg : Vertical sensitivity — 0.2 V/div.
Channel 2 vRs : Vertical sensitivity — 10 mV/div.

FIG. 26.62
Problem 7.

SECTION 26.3 The Voltage Gains A vNL, A v, and A vT


Ii = 10 mA 0° 8. Given the system of Fig. 26.63, determine the no-load
voltage gain AvNL.
+ +

Ei System Eo = 4.05 V (pp) 180°

– –

Zi = 1.8 k 0°

FIG. 26.63
Problem 8.

9. For the system of Fig. 26.64:


a. Determine Av  Eo /Ei.
b. Find AvT  Eo /Eg.

Ig Rg Ii Io

0.5 k + +
+
AvNL = –3200
Eg Ei Zi = 2.2 k Eo RL = 5.6 k
Zo = 40 k
– – –

FIG. 26.64
Problems 9, 12, and 13.
PROBLEMS  1187

10. For the system of Fig. 26.65(a), the no-load output volt-
age is 1440 mV, with 1.2 mV applied at the input ter-
minals. In Fig. 26.65(b), a 4.7-k load is applied to the
same system, and the output voltage drops to 192 mV,
with the same applied input signal. What is the output
impedance of the system?

+ + + +
+
Ei = 1.2 mV System Eo = –1440 mV Ei = 1.2 mV System Eo 4.7 k VL = –192 mV

– – –

(a) (b)

FIG. 26.65
Problem 10.

*11. For the system of Fig. 26.66, if


Av  160 Io  4 mA 0° Eg  70 mV 0°
a. Determine the no-load voltage gain.
b. Find the magnitude of Ei.
c. Determine Zi.

Rg Ii Io

+ 0.4 k + +

Eg Ei Av = –160 Eo RL 2 k
Zi = 0.75 k
– – –

Zi

FIG. 26.66
Problems 11 and 14.

SECTION 26.4 The Current Gains Ai and AiT , and


the Power Gain AG
12. For the system of Fig. 26.64:
a. Determine Ai  Io /Ii.
b. Find AiT  Io /Ig.
c. Compare the results of parts (a) and (b), and explain
why the results compare as they do.
13. For the system of Fig. 26.64:
a. Determine AG using Eq. (26.13), and compare the
value with the result obtained using Eq. (26.14).
b. Find AGT using Eq. (26.16), and compare the value to
the result obtained using Eq. (26.17).
14. For the system of Fig. 26.66:
a. Determine the magnitude of Ai  Io /Ii.
b. Find the power gain AGT  PL /Pg.
1188  SYSTEM ANALYSIS: AN INTRODUCTION

SECTION 26.5 Cascaded Systems


15. For the two-stage system of Fig. 26.67:
a. Determine the total voltage gain AvT  VL /Ei.
b. Find the total current gain AiT  Io /Ii.
c. Find the current gain of each stage Ai1 and Ai2.
d. Determine the total current gain using the results of
part (c), and compare it to the result obtained in part (b).

Ii Io
+ +
+
Ei Av1 = –30 Av2 = –50 Eo RL = 8 k VL

– –

Zi1 = 1 k Zi2 = 2 k

FIG. 26.67
Problem 15.

*16. For the system of Fig. 26.68:


a. Determine Av2 if AvT  6912.
b. Determine Zi2 using the information provided.
c. Find Ai3 and AiT using the information provided in
Fig. 26.68.

Ii Io 3
1

+ +
Av 1 = –12 Av 2 = ? Av 3 = –32
Ei 1 Ai = 4 Ai = 26 Ai = ? Eo 3 RL 2.2 k
1 2 3
Zi 1 = 1 k Zi 2 = ? Zi 3 = 2 k
– –

FIG. 26.68
Problem 16.

SECTION 26.6 Impedance (z) Parameters


17. a. Determine the impedance (z) parameters for the p
network of Fig. 26.69.
b. Sketch the z-parameter equivalent circuit (using either
form of Fig. 26.32).

I1 I2
Z2
+ +

E1 Z1 Z3 E2

– –

FIG. 26.69
Problems 17 and 21.
PROBLEMS  1189

18. a. Determine the impedance (z) parameters for the net- R1


work of Fig. 26.70.
b. Sketch the z-parameter equivalent circuit (using either
form of Fig. 26.32). I1 R2 R3 I2

SECTION 26.7 Admittance (y) Parameters + +


19. a. Determine the admittance (y) parameters for the T
network of Fig. 26.71. E1 R4 E2
b. Sketch the y-parameter equivalent circuit (using either
form of Fig. 26.44). – –
20. a. Determine the admittance (y) parameters for the net-
work of Fig. 26.72. FIG. 26.70
b. Sketch the y-parameter equivalent circuit (using either Problems 18 and 22.
form of Fig. 26.44).

I1 I2 I1 I2
Y1 Y2 Y2
+ + + +

E1 Y3 E2 E1 Y1 Y3 E2

– – – –
Y4

FIG. 26.71
Problems 19 and 23. FIG. 26.72
Problems 20 and 24.

SECTION 26.8 Hybrid (h) Parameters


21. a. Determine the h parameters for the network of Fig.
26.69.
b. Sketch the hybrid equivalent circuit.
22. a. Determine the h parameters for the network of Fig.
26.70.
b. Sketch the hybrid equivalent circuit.
23. a. Determine the h parameters for the network of Fig.
26.71.
b. Sketch the hybrid equivalent circuit.
24. a. Determine the h parameters for the network of Fig.
26.72.
b. Sketch the hybrid equivalent circuit.
25. For the hybrid equivalent circuit of Fig. 26.73:
a. Determine the current gain Ai  I2/I1.
b. Determine the voltage gain Av  E2/E1.

I1 hi I2

+ 1 k +
1 Zo
Zi
+ ho
hr E2 hf I1
40 k E2 RL = 2 k
E1 4  10–4E2 50I1

– –

FIG. 26.73
Problems 25 and 26.
1190  SYSTEM ANALYSIS: AN INTRODUCTION

SECTION 26.9 Input and Output Impedances


26. For the hybrid equivalent circuit of Fig. 26.73:
a. Determine the input impedance.
b. Determine the output impedance.
27. Determine the input and output impedances for the z-
parameter equivalent circuit of Fig. 26.74.

I1 (z11) (z22) I2

+ 1 k 2 k +
4 k
Rg 1 k
+ +
E1 5  10 ∠90°I2 10  103I1
3
E2 RL 1 k
+ (z12I2) (z21I1)
– –
Eg Zi Zo
– – –

FIG. 26.74
Problems 27, 32, and 34.

28. Determine the expression for the input and output imped-
ance of the y-parameter equivalent circuit.
SECTION 26.10 Conversion between Parameters
29. Determine the h parameters for the following z param-
eters:
z11  4 k
z12  2 k
z21  3 k
z22  4 k
30. a. Determine the z parameters for the following h param-
eters:
h11  1 k
h12  2  104
h21  100
h22  20  106 S
b. Determine the y parameters for the hybrid parameters
indicated in part (a).

SECTION 26.11 Computer Analysis


PSpice or Electronics Workbench
31. For E1  4 V 30°, determine E2 across a 2-k resis-
tive load between 2 and 2′ for the network of Fig.
26.34.
32. For Eg  2 V 0°, determine E2 for the network of Fig.
26.74.
33. Determine Zi for the network of Fig. 26.34 with a 2-k
resistive load from 2 to 2′.
34. Determine Zi for the network of Fig. 26.74.
GLOSSARY  1191

GLOSSARY
Admittance (y) parameters A set of parameters, having the Input impedance The impedance appearing at the input ter-
units of siemens, that can be used to establish a two-port minals of a system.
equivalent network for a system. Output impedance The impedance appearing at the output
Hybrid (h) parameters A set of mixed parameters (ohms, terminals of a system with the energizing source set to zero.
siemens, some unitless) that can be used to establish a two- Single-port network A network having a single set of access
port equivalent network for a system. terminals.
Impedance (z) parameters A set of parameters, having the Two-port network A network having two pairs of access
units of ohms, that can be used to establish a two-port terminals.
equivalent network for a system.

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