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    Programmer Pinouts: 2016 Benedikt Stockebrand

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    salelg1980

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    Programmer Pinouts: 2016 Benedikt Stockebrand

    Uploaded by

    salelg1980
    59 views4 pages

    Original Title

    bivblog42-cheatsheets.pdf

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    Copyright:

    © All Rights Reserved
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    59 views4 pages

    Programmer Pinouts: 2016 Benedikt Stockebrand

    Uploaded by

    salelg1980

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 4

    Programmer Pinouts

    MSP430 Spy Bi-Wire


    PICkit 2 (14 pin header)
    1 VPP/MCLR 1 RESET (TDO/TDI)
    2 VDD Target 2 VCC Tool
    3 VSS (GND) 8 TEST
    4 ICSPDAT/PGD 9 GND
    5 ICSPCLK/PGC
    6 (Auxiliary)

    AVR ISP-6 AVR ISP-10 AVR JTAG BusPirate Mapping


    1 MISO 1 MOSI 1 TCK BusPirate Name ISP Name
    2 VCC 2 VCC 2 GND MISO MISO
    3 SCK 3 (unused) 3 TDO 3.3 V/5.0 V/(none) VCC
    4 MOSI 4 GND 4 VREF CLK SCK
    5 RESET 5 RESET 5 TRS MOSI MOSI
    6 GND 6 GND 6 nSRST CS RESET
    7 SCK 7 (unused) GND GND
    8 GND 8 nTRST
    9 MISO 9 TDI
    10 GND 10 GND

    Generic Boxed Header Pinout

    1 2
    As seen from top; numbering is equivalent to mapping via IDC
    3 4
    connector to ribbon cable.
    5 6

    • PICkit 2 Programmer/Debugger User’s Guide,


    http://ww1.microchip.com/downloads/en/DeviceDoc/51553E.pdf

    • AVR ISP Header Pinouts (Batsocks),


    http://www.batsocks.co.uk/readme/isp_headers.htm

    • AVR JTAG header pinout (JTAGtest),


    http://www.jtagtest.com/pinouts/avr

    • JTAG (MSP430),
    http://processors.wiki.ti.com/index.php/JTAG_(MSP430)

    c 2016 Benedikt Stockebrand


    Copyright
    PIC 16F887
    Key Electrical Specifications
    2.0–5.5 V Operating voltage range, at reduced clock speed
    4.5–5.5 V Operating voltage range, at full clock speed
    ± 25 mA Maximum current per pin (absolute maximum rating)
    ± 95 mA Maximum current in/out, total (absolute maximum rating)

    External Components and Connections


    2× 100 nF ceramic cap one per power input pin couple,
    widely considered best practice
    2× 10 nF ceramic cap additionally if the ADC is used,
    one per power input pin couple

    Pinout

    re3/mclr/vpp 1 40 rb7/icspdat
    ra0/an0/ulpwu/c12in0- 2 39 rb6/icspclk
    ra1/an1/c12in1- 3 38 rb5/an13/t1g
    ra2/an2/vref-/cvref/c2in+ 4 37 rb4/an11
    ra3/an3/vref+/c1in+ 5 36 rb3/an9/pgm/c12in2-
    ra4/t0cki/c1out 6 35 rb2/an8
    ra5/an4/ss/c2out 7 34 rb1/an10/c12in3-
    re0/an5 8 33 rb0/an12/int
    re1/an6 9 32 vdd
    re2/an7 10 31 vss
    vdd 11 30 rd7/p1d
    vss 12 29 rd6/p1c
    ra7/osc1/clkin 13 28 rd5/p1b
    ra6/osc2/clkout 14 27 rd4
    rc0/t1oso/t1cki 15 26 rc7/rx/dt
    rc1/t1osi/ccp2 16 25 rc6/tx/ck
    rc2/p1a/ccp1 17 24 rc5/sdo
    rc3/sck/scl 18 23 rc4/sdi/sda
    rd0 19 22 rd3
    rd1 20 21 rd2

    • PIC16F882/883/884/886/887 Data Sheet


    http://ww1.microchip.com/downloads/en/DeviceDoc/40001291H.pdf

    c 2016 Benedikt Stockebrand


    Copyright
    ATmega 328P
    Key Electrical Specifications
    1.8–5.5 V Operating voltage range, at reduced clock speed
    4.5–5.5 V Operating voltage range, at full clock speed
    ± 40 mA Maximum current per pin (absolute maximum rating)
    ± 200 mA Maximum current in/out, total (absolute maximum rating)

    External Components and Connections


    1× 10 kΩ resistor between RESET and VCC
    1× 100 nF ceramic cap between VCC and GND
    1× 100 nF ceramic cap between AREF and GND if ADC is used

    • AVCC and VCC should be externally connected; if the ADC is actually used, use a
    low pass filter (see datasheet), otherwise connect directly.

    • If the fuse bits are set accordingly, then an external clock source/oscillator/resonator
    may also be required to even program the device.

    Pinout

    (pcint14/reset) pc6 1 28 pc5 (adc5/scl/pcint13)


    (pcint16/rxd) pd0 2 27 pc4 (adc4/sda/pcint12)
    (pcint17/txd) pd1 3 26 pc3 (adc3/pcint11)
    (pcint18/int0) pd2 4 25 pc2 (adc2/pcint10)
    (pcint19/oc2b/int1) pd3 5 24 pc1 (adc1/pcint9)
    (pcint20/xck/t0) pd4 6 23 pc0 (adc0/pcint8)
    vcc 7 22 gnd
    gnd 8 21 aref
    (pcint6/xtal1/tosc1) pb6 9 20 avcc
    (pcint7/xtal2/tosc2) pb7 10 19 pb5 (sck/pcint5)
    (pcint21/oc0b/t1) pd5 11 18 pb4 (miso/pcint4)
    (pcint22/oc0a/ain0) pd6 12 17 pb3 (mosi/oc2a/pcint3)
    (pcint23/ain1) pd7 13 16 pb2 (ss/oc1b/pcint2)
    (pcint0/clko/icp1) pb0 14 15 pb1 (oc1a/pcint1)

    • Datasheet Summary
    http://www.atmel.com/Images/Atmel-42735-8-bit-AVR-Microcontroller-ATmega328-328P_Summary.
    pdf

    • Datasheet Complete
    http://www.atmel.com/Images/Atmel-42735-8-bit-AVR-Microcontroller-ATmega328-328P_datasheet.
    pdf

    c 2016 Benedikt Stockebrand


    Copyright
    MSP430 G2553
    Key Electrical Specifications
    1.8–3.6 V Operating voltage range, at full clock speed
    ± ??? mA Maximum current per pin
    ± 48 mA Maximum current in/out, total

    External Components and Connections


    1× 47 kΩ resistor between RESET and VCC
    1× 2.2 nF ceramic cap between RESET and GND
    1× 100 nF ceramic cap between VCC and GND
    1× 10 µF electrolytic cap between VCC and GND (only for ADC?)

    Pinout

    dvcc 1 20 dvss
    p1.0/ta0clk/aclk/a0/ca0 2 19 xin/p2.6/ta0.1
    p1.1/ta0.0/uca0rxd/uca0somi/a1/ca1 3 18 xout/p2.7
    p1.2/ta0.1/uca0txd/uca0simo/a2/ca2 4 17 test/sbwtck
    p1.3/adc10clk/caout/vref-/veref-/a3/ca3 5 16 rst/nmi/sbwtdio
    p1.4/smclk/ucb0ste/uca0clk/vref+/veref+/a4/ca4/tck 6 15 p1.7/caout/ucb0simo/ucb0sda/a7/ca7/tdo/tdi
    p1.5/ta0.0/ucb0clk/uca0ste/a5/ca5/tms 7 14 p1.6/ta0.1/ucb0somi/ucb0scl/a6/ca6/tdi/tclk
    p2.0/ta1.0 8 13 p2.5/ta1.2
    p2.1/ta1.1 9 12 p2.4/ta1.2
    p2.2/ta1.1 10 11 p2.3/ta1.0

    • MSP430G2x53 MSP430G2x13 Mixed Signal Microcontroller Datasheet


    http://www.ti.com/lit/ds/symlink/msp430g2553.pdf

    • MSP430x2xx Family User’s Guide


    http://www.ti.com/lit/ug/slau144j/slau144j.pdf

    c 2016 Benedikt Stockebrand


    Copyright

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