Automotive Mosfet: Typical Applications
Automotive Mosfet: Typical Applications
Automotive Mosfet: Typical Applications
AUTOMOTIVE MOSFET
IRF2805
HEXFET® Power MOSFET
Typical Applications
D
l Climate Control, ABS, Electronic Braking,
VDSS = 55V
Windshield Wipers
Features RDS(on) = 4.7mΩ
l Advanced Process Technology G
l Ultra Low On-Resistance
l 175°C Operating Temperature ID = 75A
S
l Fast Switching
l Repetitive Avalanche Allowed up to Tjmax
Description
Specifically designed for Automotive applications, this HEXFET® Power
MOSFET utilizes the latest processing techniques to achieve extremely
low on-resistance per silicon area. Additional features of this design are
a 175°C junction operating temperature, fast switching speed and im-
proved repetitive avalanche rating . These features combine to make this
design an extremely efficient and reliable device for use in Automotive
applications and a wide variety of other applications. TO-220AB
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.45
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
HEXFET(R) is a registered trademark of International Rectifier.
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8/8/02
IRF2805
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.06 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 3.9 4.7 mΩ VGS = 10V, ID = 104A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA
gfs Forward Transconductance 91 ––– ––– S VDS = 25V, ID = 104A
––– ––– 20 VDS = 55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 55V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Qg Total Gate Charge ––– 150 230 ID = 104A
Qgs Gate-to-Source Charge ––– 38 57 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– 52 78 VGS = 10V
td(on) Turn-On Delay Time ––– 14 ––– VDD = 28V
tr Rise Time ––– 120 ––– ID = 104A
ns
td(off) Turn-Off Delay Time ––– 68 ––– RG = 2.5Ω
tf Fall Time ––– 110 ––– VGS = 10V
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 104A, VGS = 0V
t rr Reverse Recovery Time ––– 80 120 ns TJ = 25°C, IF = 104A
Q rr Reverse Recovery Charge ––– 290 430 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Coss eff. is a fixed capacitance that gives the same charging time
Repetitive rating; pulse width limited by as Coss while VDS is rising from 0 to 80% VDSS .
max. junction temperature. (See fig. 11).
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
Starting TJ = 25°C, L = 0.08mH
RG = 25Ω, IAS = 104A. (See Figure 12). avalanche performance.
ISD ≤ 104A, di/dt ≤ 240A/µs, VDD ≤ V(BR)DSS, This value determined from sample failure population. 100%
TJ ≤ 175°C tested to this value in production.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
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IRF2805
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
ID, Drain-to-Source Current (A)
4.5V
100
4.5V
10
1000 200
T J = 25°C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (A)
T J = 175°C 160
T J = 175°C
120
100
T J = 25°C
80
40
VDS = 25V VDS = 25V
20µs PULSE WIDTH 20µs PULSE WIDTH
10 0
4.0 5.0 6.0 7.0 8.0 9.0 10.0 0 40 80 120 160 200
VGS , Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A)
10000 20
VGS = 0V, f = 1 MHZ
ID= 104A VDS= 44V
C iss = C gs + C gd , C ds
VDS= 28V
6000 12
Ciss
4000
8
4
2000
Coss
Crss 0
0
0 40 80 120 160 200 240
1 10 100
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
1000.0 10000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
ID, Drain-to-Source Current (A)
T J = 175°C
ISD, Reverse Drain Current (A)
100.0 1000
10.0 100
100µsec
TJ = 25°C 1msec
1.0 10
Tc = 25°C
10msec
Tj = 175°C
VGS = 0V Single Pulse
0.1 1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 1 10 100 1000
VSD, Source-toDrain Voltage (V) VDS , Drain-toSource Voltage (V)
180 3.0
I D = 175A
LIMITED BY PACKAGE
150 2.5
(Normalized)
90 1.5
60 1.0
30 0.5
V GS = 10V
0 0.0
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
1
(Z thJC )
D = 0.50
0.1 0.20
0.10
Thermal Response
0.05
0.01
t1
t2
Notes:
1. Duty factor D = t1/ t 2
2. Peak T J = P DM x Z thJC +T C
0.001
0.00001 0.0001 0.001 0.01 0.1
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IRF2805
1000
15V ID
TOP 43A
87A
800 BOTTOM 104A
L DRIVER
VDS
0
25 50 75 100 125 150 175
I AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
QG
10 V
QGS QGD 4.0
VGS(th) Gate threshold Voltage (V)
VG
ID = 250µA
3.0
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
2.0
50KΩ
12V .2µF
.3µF
+
V
D.U.T. - DS
1.0
VGS -75 -50 -25 0 25 50 75 100 125 150 175
3mA T J , Temperature ( °C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature
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IRF2805
10000
1
1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
400
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
300 not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
200 4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
100
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
T jmax (assumed as 25°C in Figure 15, 16).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
Starting TJ , Junction Temperature (°C) ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
*
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
-
+
Recovery
Current
Body Diode Forward
Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Ripple ≤ 5% ISD
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
V DS
VGS
D.U.T.
RG
+
-V DD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
VDS
90%
10%
VGS
td(on) tr t d(off) tf
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IRF2805
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 8/02
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/