9th International Conference on Power Electronics-ECCE Asia

June 1 - 5, 2015 / 63 Convention Center, Seoul, Korea

Double Step-down Dual Active Bridge DC-DC

Converter
Su-Han Kim1, Hyemin Kang1, Honnyong Cha1, Seongyong Jeong1 and Heung-Geun Kim2
1
School of Energy Engineering Kyungpook National University Daegu, Korea
2
Department of Electrical Engineering Kyungpook National University Daegu, Korea

Abstract—A double step-down dual active bridge CS11

DS11
iS11 io
converter with high voltage gain and high efficiency is iS12 iS21 iS22
proposed in this paper. The proposed converter achieves S11 + CS 21 CS 22
CS12
C1 VC1 S12 S21 S22
double step down function by adding only one capacitor at DS12 DS 21 DS 22
Vin iTR Llk 1: n
the primary side of transformer. Moreover, the three −
+ + +
switches at the primary side has reduced voltage stress and vTR vSEC Co RL Vo
− −
the proposed converter operates in a wide ZVS range under −
CS13 C CS 23 CS 24
light load. Additionally there is no transformer saturation S13 S S14
S23 S24
DS13 14 DS14 DS 23 DS 24
problem by the addition of this capacitor. Hence, it removes iS14
iS13 iS23 iS24
the need of additional control scheme and circuit which
improves the efficiency of the system in terms of cost and Fig. 1. Isolated double step-down converter
complexity. Moreover, by applying trapezoidal scheme at
transformer primary side, two low side switches of proposed This characteristic requires large ZVS energy and the
converter has improved turn-off loss. A 4 kW prototype ZVS range under the light load condition is constrained
converter is constructed to verify the performance of the
in conventional DAB converter, and the converter has a
proposed converter.
transformer saturation problem when duty ratio of
Index Terms - Double step-down, dual active bridge, soft switches between the first leg and second leg is different.
switching, transformer saturation. In order to address these aforementioned problems, a
double step-down DAB converter with an additional
I. INTRODUCTION capacitor is proposed in this paper. Transformer voltage
and the voltage across the three switches at the primary
Recently DC-DC converters are required for side of the proposed converter is equal to half of input
applications like bidirectional power flow and high step voltage. In addition the proposed converter naturally
up/down. Moreover, the galvanic isolation of the solves the transformer saturation problem by the addition
converter has a huge demand in power electronics field of the extra capacitor. Fig. 1 shows the proposed
such as automotive industry, energy storage system converter.
toward micro-grid and power system of aerospace [1]-[3],
[6], [7]. In aforementioned applications, generally II. OPERATION OF THE PROPOSED CONVERTER
DC/DC converters with half bridge circuits, resonant
circuits or dual active bridge (DAB) circuits are used, as The structure of the proposed converter is similar to
the converters have high frequency isolation, step conventional DAB converter. Additional capacitor is
up/down feature, high power conversion and bidirectional located in high side switch of first leg, and the high side
power flow. Conventional half-bridge(CHB) converter switch is shifted between the input source and primary
has been widely employed in industrial applications due switch stage. Secondary side of the proposed converter is
to no transformer saturation problem, simple control exactly the same as conventional DAB converter. There
strategy and simple structure [8]-[10]. However, soft- is a phase shift of 180r between the first leg and second
switching is not possible with this converter and it has leg at the converter primary side, and the high side and
high voltage stress across the switches. Resonant low side switches of the same leg are complementary to
converter is usually utilized in applications due to its soft each other. Diagonal switches signal of secondary side
switching feature with high frequency isolation, but this
converter also face some serious problems such as high are same and there is a phase shift of 180r phase between
resonant capacitor, and high circulating current. DAB the top switches. Phase shift control scheme is employed
converter offers all the aforementioned benefits which and output power can be adjusted by controlling this
can be realized such as bidirectional power flow, step phase. At the transformer, Primary side voltage has three
up/down, and galvanic isolation with high frequency level and secondary side voltage has two level. Fig. 2
transformer. Moreover the converter achieves ZVS show key waveforms of proposed DAB converter.
operation with minimum number of passive component.
Due to these characteristics, dual active bridge converter A. Mode 1 [ θ 0 ~ θ1 ]
have been generally employed in industry. However, the
conventional DAB converter face large switch voltage In this mode, switch S14 is turned on and switches S11,
stress and transformer voltage is same as input voltage. S12, and S13 are turned off. Secondary side switches S22

2015 KIPE
777
and S23 are turned on while switches S21 and S24 are §1 2·
S11 S13 1 § Vin ·
2
©
(
¨ 2 Llk iTR (θ 0 ) ) ¸
¹
ECS11 = ⋅ C S11 ⋅ ¨ ¸ = (1)
S12 2 © 2 ¹ 3
S14

S 21, S 24 S 22 , S 23
,where ECs11 is energy of capacitor C S 11 and C S 11 is
vTR Vin
equivalent capacitance of switch S11.
2
0
Vin
θ B. Mode 2 [ θ1 ~ θ 2 ]
−
2
vSEC
Vo In this mode, switches S11 is turned on and S14, S12,
and S13 remain previous mode state. All of secondary
0
θ switches also remain previous mode state. Switch S11 is
−Vo turned on while diode DS11 conducts and no current
iTR passes through the switch S11 until the transformer
current polarity changes from negative to positive to
θ achieve ZVS.

Vin
v DS vTR = (2)
vS13 vS11 Vin 2
2 v SEC = −Vo (3)
θ
v DS
vS12
iTR (θ ) = iTR (θ1 ) +
(VTR − VSEC n)
Vin
(θ2 − θ1 ) (4)
vS14 Vin ω Llk
2
θ
iS11 iS12
C. Mode 3 [ θ 2 ~ θ3 ]
i SW
In this mode, primary side switches S11, S14 remains on
state and S12, S13 remains off state. Secondary side
θ
switches S21, S24 remains off state and Switches S22, S23
iS14 are turned off. Capacitors CS21, CS24 are discharged and
i SW iS13
CS22, CS23 are charged by the stored energy of leakage
inductance. After CS21, CS24 are fully discharged, diodes
θ
DS21, DS24 are turned on and input energy is delivered to
output through the two diodes DS21 and DS24 .
v DS vS 21 , vS24 vS22 , vS23
§1 2·
1
(
¨ 2 Llk iTR (θ 2 ) ) ¸
= ⋅ CS 21 ⋅ (Vo ) = © ¹
2
θ ECS 24 = EC21 (5)
i SW 2 2

θ ,where ECs21 is energy of capacitor C S 21 and C S 21 is

iS21 , iS23 iS22 , iS24 equivalent capacitance of switch S21.
io

D. Mode 4 [ θ 3 ~ θ 4 ]
θ In this mode primary switches remains same as in
previous mode. Secondary side switch S21 and S24 are
θ0 θ1 θ 2 θ3 θ 4 θ5 θ 6 θ 7 θ8 θ9 θ10 θ11 θ12 turned on while switches S22 and S23 remains off.
( 0 ) (δ ) (φ ) (π ) Switches S21 and S24 are turned on while transformer
current flows through the diodes DS21 and DS24. Energy of
Fig. 2. Key waveforms of the proposed converter.
input side is delivered to output through the capacitor C1
and transformer.
turned off. Capacitors CS12 and CS13 are charged and CS11
Vin
is discharged by the stored energy of leakage inductance. vTR = (6)
2
After CS11 is fully discharged, diode DS11 is turned on and v SEC = Vo (7)
energy of leakage inductance freewheels through the two
diodes DS11 , DS14 and capacitor C1.
iTR (θ ) = iTR (θ3 ) +
(VTR − VSEC n)
ωLlk
(θ4 − θ3 ) (8)

778
 v SEC = Vo (15)

E. Mode 5 [ θ 4 ] iTR (θ ) = iTR (θ7 ) +

(VTR − VSEC n)
~ θ5
ωLlk
(θ8 − θ7 ) (16)
In this mode, primary side switches S11 is turned off.
S12, S13, and S14 remain previous mode state. Secondary
side switches state remains same as in previous mode I. Mode 9 [ θ 8 ~ θ 9 ]
state. Capacitors CS12 and CS13 are discharged and CS11 is
charged by the stored energy of leakage inductance. After In this mode, switches S21, and S24 are turned off and
CS13 is fully discharged, diode DS13 is turned on and all other switches remains same as in previous mode state.
energy of leakage inductance freewheels through the Capacitors CS21, and CS24 are charged and CS22, and CS23
switch S14 and diode DS13. are discharged by stored energy of leakage inductance.
After CS22, CS23 are fully discharged diodes DS22, DS23 are
§1 2·
turned on.
1 § Vin ·
2
©
(
¨ 2 Llk iTR (θ 4 ) ) ¸
¹
ECS13 = ⋅ C S13 ⋅ ¨ ¸ = (9) §1 2·
2 © 2 ¹ 3
1
(
¨ 2 Llk iTR (θ8 ) ) ¸
= ⋅ C S 22 ⋅ (Vo ) = © ¹
2
,where ECs13 is energy of capacitor C S 13 and C S 13 is ECS 23 = ECS 22 (17)
2 2
equivalent capacitance of switch S13. ,where ECs23 is energy of capacitor C S 23 and C S 23 is
equivalent capacitance of switch S23.
F. Mode 6 [ θ 5 ~ θ 6 ]
In this mode Switch S13 is turned on while switches S11,
S12, and S14 remain same as in previous mode state. J. Mode 10 [ θ 9 ~ θ10 ]
Secondary switches state also remains same. Switch S13 is
In this mode, switches S12 and S13 remain on and
turned on while current of leakage inductance flows
switches S11 and S14 remain off. Secondary side switches
through the diode DS13.
S22 and S23 are turned on while S21 and S24 kept their
previous state. Switch S22 and S23 are turned on while
vTR = 0 (10)
current of leakage inductance flows through the diodes
v SEC = Vo (11) DS22, and DS23.
iTR (θ ) = iTR (θ5 ) +
(VTR − VSEC n)
ωLlk
(θ6 − θ5 ) (12) Vin
vTR = − (18)
2
v SEC = −Vo (19)
G. Mode 7 [ θ 6 ~ θ7 ] (VTR − VSEC n)
iTR (θ ) = iTR (θ9 ) + (θ10 −θ9 ) (20)
In this mode, all switches keep their previous state ωLlk
while S14 is only turned off. Capacitor CS14 is charged
while CS12 is discharged by the stored energy of leakage
inductance. After CS12 is fully discharged diode DS12 is K. Mode 11 [ θ10 ~ θ11 ]
turned on and energy of leakage inductance freewheels In this mode, S12 is turned off and primary side
through capacitor C1 and diode DS12. switches and secondary side switches keep their previous
mode state. Capacitor CS12 is charged and CS14 is
§1 2· discharged by stored energy of leakage inductance. After
1 § Vin ·
2
©
(
¨ 2 Llk iTR (θ6 ) ) ¸
¹ CS14 is fully discharged, diode DS14 is turned on.
ECS12 = ⋅ CS12 ⋅ ¨ ¸ = (13)
2 © 2 ¹ 2
,where ECS12 is energy of capacitor C S 12 and C S 12 is §1
( )
2·
1 § Vin ·
2 ¨ 2 Llk iTR (θ10 ) ¸
© ¹ (21)
equivalent capacitance of switch S12. ECS14 = ⋅ CS14 ⋅ ¨ ¸ =
2 © 2 ¹ 2
,where ECs14 is energy of capacitor C S 14 and C S 14 is

H. Mode 8 [ θ 7 equivalent capacitance of switch S14.

~ θ8 ]

In this mode Switch S12 is turned-on, and all other

switch remains same as in previous mode state. Switch L. Mode 12 [ θ11 ~ θ12 ]
S12 is turned on while diode DS12 conducts the current of In this mode, Switch S14 is turned on and all other
leakage inductance. No current passes through the switch switch remains same as in previous mode state. Switch
S12 until the transformer current polarity changes from S14 is turned on while current of leakage inductance flows
positive to negative to achieve ZVS. through the diode DS14.

Vin vTR = 0 (22)

vTR = − (14)
2
v SEC = −Vo (23)

779
 iTR (θ ) = iTR (θ11 ) +
(VTR − VSEC n) io
(θ12 − θ11 ) (24) DS 21
ω Llk
S21
CS11
DS11 io iTR Llk 1: n
DS 22 +
+
CS12 v+TR v+
SEC Co RL Vo
C1 VC1 S 22 − −
DS13 −
Vin iTR Llk
− 1: n
+ + S13 S14 S24
vTR +
vSEC RL
Co Vo DS 24
CS13 − − DS14
−

DS14 DS 23 S 23 (f) Mode 6 [ θ 5 ~ θ 6 ]

io
(a) Mode 1 [ θ 0 ~ θ1 ]
DS 21
+ CS12
C1 S12 DS12 S21
DS11 io VC1
iTR Llk 1: n
DS 22 − +
+ + +
vTR vSEC Co RL Vo
C1 VC1 S 22 − −
Vin iTR Llk −
− 1: n
+ + S13 CS14 S24
vTR + RL
vSEC Co Vo
− − DS13 DS 24
−
S14 DS 23 S23 (g) Mode 7 [ θ 6 ~ θ 7 ]
DS14

io
(b) Mode 2 [ θ1 ~ θ 2 ]
+ DS12
C1 VC1 S12 DS 21 S21
DS11 io
− iTR Llk
1: n
+ + + RL +
S11 CS 21 vTR vSEC Co Vo
C1 VC1 DS 21 − −
Vin iTR Llk CS 22 −
− 1: n
+ +
+ RL S24
vTR vSEC Co Vo
− − DS 24
−
CS 24
S14 CS 23
DS14 (h) Mode 8 [ θ 7 ~ θ 8 ]
DS 24

io
(c) Mode 3 [ θ 2 ~ θ 3 ]
+ CS 22
DS12 C S 21
DS11 io C1 VC1 S12
− iTR Llk 1: n DS 22
S11 + + +
+ RL
C1 VC1 DS 21 S21 vTR vSEC Co Vo
Vin − −
− iTR Llk 1: n −
+ C S 23 CS 24
+ + S13
vTR vSEC Co RL Vo
− − DS 23
−
S14 S24
DS14
DS 24 (i) Mode 9 [ θ 8 ~ θ 9 ]

(d) Mode 4 [ θ 3 ~ θ 4 ] io

+
CS11 DS12
io C1 VC1 S12 S 22
Vin iTR Llk DS 22
− 1: n
+ DS 21 +
+ +
CS12 vTR vSEC Co RL
C1 VC1 S21 Vo
− −
Vin iTR Llk −
− 1: n
+ S13 S 23
+
v+TR vSEC Co RL Vo DS 23
DS13 − −
−
S14 S24
(j) Mode 10 [ θ 9 ~ θ10 ]
CS13 DS14 DS 24

(e) Mode 5 [ θ 4 ~ θ 5 ]

780
 io the mode analysis, capacitor energy of switch depends on
+
transformer current. Proposed converter has wider ZVS
C1 VC1 DS12 S22 range than conventional converter under the light load
− iTR Llk
1: n DS 22 condition since transformer current is half and required
+
+
vTR +
vSEC Co RL Vo
switch voltage to achieve ZVS is half as compared with
− −
− conventional DAB converter. The proposed converter
S13 CS14 S23 eliminates the transformer saturation problem as the
DS14
DS13 DS 23 transformer current satisfies the charge balance condition
due to the additional capacitor.
(k) Mode 11 [ θ10 ~ θ11 ]

io TABLE I
VOLTAGE STRESS COMPARISON OF PROPOSED CONVERTER
Conventional Proposed
S22
DAB Converter DAB Converter
iTR Llk DS 22
1: n
+ + + Vin
vTR vSEC Co RL Vo
vTR Vin
− − 2
−
CS13 iTR iTR 2iTR with same Po
S13 S14 S23
DS14 DS 23
Vin
Vin for all for three
v SW with primary side 2
(l) Mode 12 [ θ11 ~ θ12 ] switches
switches
Fig. 3. Operation modes of the proposed converter.
ZVS ZVS ZVS
Transformer
O X
III. CHARACTERISTICS OF THE PROPOSED CONVERTER saturation

A. Transformer current and output power

TABLE II
Transformer current has symmetrical characteristics CIRCUIT PARAMETER OF POWER STAGE
under the steady state condition, by using symmetrical Proposed Converter
characteristics and aforementioned mode analysis
transformer current can be expressed as Vin 400 V
Vo 200 V
§ Vin · ⋅ φ + § Vo · ⋅ 2δ − π
¨ 2 ¸¹ ¨ n ¸ ( )
iTR ( 0 ) = − iTR (π ) = − © ©
2ω Llk
¹ (25) Po 4 kW
fs 50 kHz
§ Vin · ⋅ 2δ − φ + § Vo · ⋅ π
¨ 2 ¸¹ ( ) ¨ n¸
iTR ( δ ) = © © ¹ (26) MOSFET SPW47N60CFD
2ω Llk
§ Vin · ⋅ φ + § Vo · ⋅ π − 2φ + 2δ Number of turns 1:1
¨ 2 ¸¹ ¨ n ¸ ( )
iTR (φ ) = © © ¹ (27) Ci 20 uF
2ω Llk
Llk 20 uH
From the expressions for iTR (θ ) , for each interval,
output power of the proposed DAB converter can be
defined as, IV. EXPERIMENTAL RESULTS OF PROPOSED CONVERTER
A 4 kW prototype converter is built and tested to
2π verify the performance of the proposed converter. It was
³
1
Po = vTR (θ ) ⋅ iTR (θ ) d θ
2π 0 operated at input voltage 400 V, output voltage 200 V,
(28)
V ⋅V 2 mδπ − 2δ 2 − ( mπ ) + π 2 m
2 switching frequency 50 kHz and d=1. Trapezoidal
= in o ⋅ scheme is used with modulation index m=0.9 in the
4 nω Llk π
primary side of transformer. Table II shows the circuit
parameters of the converter. Fig. 4 shows the waveforms
,where n is the turns ratio of transformer, ω is
of primary side voltage and secondary side voltage of
angular velocity and m is modulation index as defined
transformer and shows primary side current of
φ transformer under the full load condition. It can be seen
m= .
π that the transformer primary side voltage is half of input
voltage. Voltage stress of switch S12 is equal to input
B. Characteristic comparison of the proposed converter voltage and voltage of other switches are half of input
Transformer voltage and the voltage across the three voltage as shown in Fig. 5 and Fig. 6. Fig. 7 - Fig. 10
switches of proposed converter is reduced to half of input shows the transformer current waveforms and voltage
voltage due to the additional capacitor. As explained in across the switches. It is clear that gate signal is turned on

781
after switch voltage is zero. Transformer current direction
is changed after switch is turned on. All switches of
primary side achieve ZVS operation as shown in vGS11 [20V /div]
experimental results. Fig. 11(a) show the transformer
voltage and current of proposed DAB converter and Fig. vDS11 [100V /div]
11(b) shows the conventional DAB converter under
different duty ratio. Proposed DAB converter operates iTR [20 A/div]
without transformer saturation problem. However
conventional DAB converter has a DC component in
transformer current causing saturation even though the
converter has slight mismatch in the duty ratio between
the two legs of primary side switches.

vTR [100V /div] ZVS [1 μ sec/div]

iTR [10 A/div]
Fig. 7. Switch voltage of proposed converter

vGS12 [20V /div]

vDS12 [200V /div]

vSEC [100V /div] [5 μ sec/div]

Fig. 4. Transformer current and voltage of proposed converter ZVS iTR [20 A/div]

vDS11 [100V /div] [1 μ sec/div]

Fig. 8. Switch voltage of proposed converter

vGS13 [20V /div]

vDS13 [100V /div]

vDS13 [100V /div]

iTR [20 A/div]

[5 μ sec/div] ZVS
Fig. 5. Switch voltage of proposed converter [1 μ sec/div]

Fig. 9. Switch voltage of proposed converter

vDS12 [200V /div]

vGS14 [20V /div]

vDS14 [100V /div]

vDS14 [100V /div]

ZVS iTR [20 A/div]

[5 μ sec/div] [1 μ sec/div]
Fig. 6. Switch voltage of proposed converter Fig. 10. Switch voltage of proposed converter

782
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