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Using A Decoder and External Gates Design The Combination Circuit Defined by Three Boolean Function.

This experiment involves designing a combinational circuit using Boolean logic gates to represent three Boolean functions. The objective is to solve the Boolean equations, implement the solutions using logic gates in a simulator, observe the outputs, and verify them against a truth table. The document provides the equations, their solutions, a circuit diagram, and instructions to build and test the circuit in a simulator while comparing the outputs to the truth table.
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0% found this document useful (0 votes)
2K views

Using A Decoder and External Gates Design The Combination Circuit Defined by Three Boolean Function.

This experiment involves designing a combinational circuit using Boolean logic gates to represent three Boolean functions. The objective is to solve the Boolean equations, implement the solutions using logic gates in a simulator, observe the outputs, and verify them against a truth table. The document provides the equations, their solutions, a circuit diagram, and instructions to build and test the circuit in a simulator while comparing the outputs to the truth table.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Name: Mohayminul Al-Hamim

ID: 153402032

Experiment No: 16
Experiment Name: Using a Decoder and external gates design the combinational circuit
defined by three Boolean function.

Objective:
 To solve the equations by using the three Boolean algebraic equations.
 To implement the obtained equation using different logic gates in the simulator
 Observe the outputs.
 To verify the outputs using the truth table.

Required Apparatus:

 Logic gate simulator app.


 AND gates IC types 7408 Quadruple 2 input.
 OR gates IC types 7432 Quadruple 2 input.
 Input and output gates.

Theory:
Solving the provided equations:

F1= X’YZ’+ XZ
= X’YZ’+ XZ(Y+Y’)
= X’YZ’+ XYZ+XY’Z

010 111 101


275

F2= XY’Z’+X’Y
= XY’Z’+X’Y(Z+Z’)

= XY’Z’+X’YZ+ X’Y Z’
= 100 011 010
432

F3= X'Y'Z'+XY

1
Name: Mohayminul Al-Hamim
ID: 153402032

= X'Y'Z'+XY(Z+Z')
= X'Y'Z'+ XYZ+ XYZ'
000 111 110

076

Circuit Diagram Simulation:

Fig: Circuit diagram of Decoder and external gates design

2
Name: Mohayminul Al-Hamim
ID: 153402032

Procedure:
 At first, in the Simulator Application the logic gates and other components should be placed.
 The logic gates and other components should be connected with connectors.
 Finally, using the Toggle Switches the outputs can be observed and compared with the truth
table in the monitor.

Discussion:
 Check all gates before setup.
 Connect properly input and output with Basic gates.
 Check output with truth table.

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