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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

General Description Features

The MAX98400A/MAX98400B Class D amplifiers provide ●● Wide 8V to 28V Supply Voltage Range
high-performance, thermally efficient amplifier solutions. The ●● Single-Supply Operation
MAX98400A delivers 2x20W into 8Ω loads or 1x40W into a
4Ω load. The MAX98400B delivers 2x12W into 8Ω loads. ●● Low EMI: Active Emissions Limiting

An integrated limiting circuit prevents output clipping ●● Clipping Limiter

distortion, protects small speakers from transient voltages, ●● Low Quiescent Current
and reduces power dissipation. ●● Thermal Foldback
A thermal-foldback feature can be enabled to automatically ●● Thermal and Overcurrent Protection
reduce the output power at above a junction temperature
of +120°C. Traditional thermal protection is also available in Applications
addition to robust overcurrent protection. ●● LCD/PDP Televisions
The ICs operate from a single 8V to 28V supply and provide ●● LCD Monitors
a high 67dB PSRR, eliminating the need for a regulated ●● MP3 Docking Stations
power supply. They offer up to 90% efficiency from a 12V ●● Notebook PCs
supply.
Filterless modulation allows the ICs to pass EN55022B EMI
limits with 1m cables using only a low-cost ferrite bead and
small-value capacitor on each output.
Both devices feature eight digitally controlled gain settings. Ordering Information appears at end of data sheet.
Comprehensive click-and-pop reduction circuitry minimizes
noise coming into and out of shutdown.
The MAX98400A/MAX98400B are available in 36-pin and
24-pin TQFN packages, respectively, and are specified over
the -40°C to +85°C temperature range.

Simplified Block Diagram

INL- OUTL-
CLASS D
CLIPPING
PGA MODULATOR
LIMITER
INL+ AND H-BRIDGE OUTL+

MONO*
MAX98400A/B

INR- OUTR-
CLASS D
CLIPPING
PGA MODULATOR
LIMITER
INR+ AND H-BRIDGE OUTR+

*MAX98400A ONLY

19-5286; Rev 2; 8/20

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

TABLE OF CONTENTS
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Stereo Configuration for MAX98400A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Mono Configuration for MAX98400A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Click-and-Pop Suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Mono Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Clipping Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Limiter Threshold Control (LIM_TH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Release Time Control (RELEASE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Preamplifier Gain Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Thermal Foldback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Filterless Class D Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Inductor-Based Output Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Internal Regulator VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Supply Bypassing, Layout, and Grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Chip Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Functional Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

LIST OF FIGURES
Figure 1. MAX98400B EMI Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 2. MAX98400A Efficiency vs. Class AB Effifciency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 3. Limiter Control, Mode3 Configuration (Table 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 4. Output Filter for PWM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

LIST OF TABLES
Table 1. Limiter Control Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 2. Gain Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 3. Filter Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Absolute Maximum Ratings

PVDD to PGND......................................................-0.3V to +30V Continuous Power Dissipation (TA = +70°C)
VS to GND................................................................-0.3V to +6V 36-Pin TQFN Multilayer Board
SHDN, MONO to GND.............................................-0.3V to +6V (derate 35.7mW/°C above +70°C)..........................2857.1mW
IN_ to GND...............................................................-0.3V to +6V θJA (Note 1)..............................................................28°C/W
G1, G2, RELEASE, TEMPLOCK, θJC (Note 1)................................................................1°C/W
LIM_TH to GND........................................-0.3V to (VS + 0.3V) 24-Pin TQFN Multilayer Board
OUT_ to PGND..................................... -0.3V to (VPVDD + 0.3V) (derate 27.8mW/°C above +70°C)..............................35.7mW
PGND to GND.......................................................-0.3V to +0.3V θJA (Note 1)..............................................................36°C/W
Continuous Current into OUT_............................................+2.4A θJC (Note 1)................................................................3°C/W
Continuous Current into PVDD, PGND...............................+4.8A Junction Temperature.......................................................+150°C
Continuous Current into All Other Pins.............................+10mA
Operating Temperature Range............................ -40°C to +85°C
Duration of OUT_ Short Circuit to PVDD or PGND...Continuous
Storage Temperature Range............................. -65°C to +150°C
Duration of Short Circuit Between
OUT_+ and OUT_-.................................................Continuous Lead Temperature (soldering, 10s)..................................+300°C
Soldering Temperature (reflow)........................................+260°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

Electrical Characteristics
(VPVDD = 18V, CIN = 1μF, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CREL =
1μF, C1 = C2 = 1μF, RL = ∞, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

AMPLIFIER DC CHARACTERISTICS
PVDD Supply Voltage Range VPVDD Inferred from PVDD_PSRR 8 28 V
VS Supply Input Voltage VS Inferred from IVS test 4.75 5.5 V
IPVDD Dual-supply mode: 10 15
Quiescent Current mA
IVS VS = 4.75V, TA = +25°C 6 8.2
Single-supply mode:
Single-Supply 16 23
IPVDD TA = +25°C mA
Quiescent Current
RL = 8Ω (Note 3) 17
ISHDN_
VSHDN = 0V, TA = +25°C, 8 20
Shutdown Current PVDD μA
VS = 5.5V
ISHDN_VS 3 10
PVDD Undervoltage Lockout VUVLO 7 7.9 V
VS Regulator Output Voltage VS 4.2 4.47 4.75 V
INPUT STAGE
Differential Input Voltage Range 2 VRMS
Single-Ended Input Voltage
1 VRMS
Range
Common-Mode Rejection Ratio CMRR 60 dB
Input Resistance Differential VLIM_TH = 0V, gain = +35dB 20 32 kΩ

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Electrical Characteristics (continued)

(VPVDD = 18V, CIN = 1μF, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CREL =
1μF, C1 = C2 = 1μF, RL = ∞, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER STAGE
Shutdown to Full Operation tSON 11 ms
Gain Accuracy ±0.8 ±4 %
Left-to-Right Gain Matching All gain settings ±2 %
1kHz -85
Crosstalk dB
10kHz -68
Output Offset Voltage VOS TA = +25°C ±8 ±45 mV
Peak voltage, Into
-47
32 samples/s, shutdown
Click-and-Pop Level KCP dBV
A-weighted, Out of
TA = +25°C (Notes 4, 5) -56
shutdown
VPVDD = 8V to 28V 52 63
PVDD Power-Supply Rejection
PSRRPVDD 1kHz, 100mVP-P ripple 67 dB
Ratio
10kHz, 100mVP-P ripple 57
VS = 4.75V to 5.5V 39 55
VS Power-Supply Rejection
PSRRVS 1kHz, 100mVP-P ripple 50 dB
Ratio
10kHz, 100mVP-P ripple 40
Stereo, RL = 8Ω, 10% THD+N,
22
fIN = 1kHz (Note 3)
MAX98400A Output Power POUT
Mono, RL = 4Ω, 10% THD+N,
44 W
fIN = 1kHz (Note 3)
Stereo, RL = 8Ω, 10% THD+N,
MAX98400B Output Power POUT 15
fIN = 1kHz (Note 3)
POUT = 0.1W to POUT/2, fIN = 20Hz to
Total Harmonic Distortion Plus 0.3
THD+N 20kHz, RL = 8Ω %
Noise
POUT/2, fIN = 1kHz, RL = 8Ω 0.03
Output Noise VN A-weighted 100 μVRMS
POUT = 2x20W, RL = 8Ω (MAX98400A)
Efficiency η 90 %
fIN = 1kHz (Note 3)
Current Limit ILIM 3.5 5 A
Output FET Resistance RDSON 0.4 Ω
Switching Frequency fSW 265 330 395 kHz
Peak Output Voltage VPVDD = 28V 20 26 V
LIMITER
Attack Time VLIM_TH = 0V 240 500 μs
Release Time VLIM_TH = 0V 0.8 s
Maximum Trigger Level VPVDD = 14V (Note 6) 4 dBFS
Minimum Trigger Level (Note 7) -6 dBFS
Trigger Level VLIM_TH = 0V -1 0 +1 dBFS
Compression Range VLIM_TH = 0V -12 dB

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Electrical Characteristics (continued)

(VPVDD = 18V, CIN = 1μF, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CREL =
1μF, C1 = C2 = 1μF, RL = ∞, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

VGA Distortion   Compression = 0 to -12dB 3.5 %
LIM_TH Input-Voltage Low
0.15 V
(PVDD Tracking)
LIM_TH Input-Voltage High VS
V
(Limiter Off) -1
Channel-to-Channel Attenuation
±1 dB
Tracking
THERMAL FOLDBACK
Internal Templock Resistor 120 205 310 kΩ
Trigger Temperature +130 °C
Hard Thermal Protection +165 °C
LOGIC INPUT (G1, G2)
Sink Current TA = +25°C, VG1, VG2 = 0V +2.5 +5 +8 μA
Source Current TA = +25°C, VG1, VG2 = VS -8 -5 -2.5 μA
0.8 x
Input High Threshold V
VS
0.3 x
Input Low Threshold V
VS
0.45 x 0.5 x 0.55 x
Input Three-State Window V
VS VS VS
LOGIC INPUT (SHDN, MONO (MAX98400A Only))
Input Leakage Current IIN TA = +25°C ±10 μA
Input High Threshold VINH 2 V
Input Low Threshold VINL 0.4 V
Input-Voltage Hysteresis 100 mV
Note 2: 100% production tested at TA = +25°C. Specifications over temperature limits are guaranteed by design.
Note 3: The MAX98400A stereo mode is specified with an 8Ω resistive load in series with a 68μH inductive load connected across
BTL outputs. The MAX98400A mono mode is specified with a 4Ω resistive load in series with 33μH inductive load. The
MAX98400B is specified with an 8Ω resistive load in series with a 68μH inductive load connected across BTL outputs.
Note 4: Amplifier inputs AC-coupled to GND.
Note 5: Mode transitions controlled by SHDN.
Note 6: Relative to equivalent full-scale undistorted output. Full scale (FS) = VPVDD x 0.95.
Note 7: Relative to equivalent full-scale undistorted output. Full scale (FS) = VPVDD.

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Typical Operating Characteristics

(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)

TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY PLUS NOISE vs. FREQUENCY PLUS NOISE vs. FREQUENCY
1 MAX98400 toc01 1 1

MAX98400 toc02

MAX98400 toc03
0.1 POUT = 4W 0.1 0.1
THD+N (%)

THD+N (%)

THD+N (%)
POUT = 7W
POUT = 10W
POUT = 0.5W
0.01 0.01 0.01

POUT = 1W
POUT = 1W
VPVDD = 12V VPVDD = 12V VPVDD = 18V
8I LOAD 4I LOAD 8I LOAD
0.001 0.001 0.001
0.01 0.1 1 10 100 0.01 0.1 1 10 100 0.01 0.1 1 10 100
FREQUENCY (kHz) FREQUENCY (kHz) FREQUENCY (kHz)

TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER vs. OUTPUT POWER vs. OUTPUT POWER
10 10 10
MAX98400 toc04

MAX98400 toc05

MAX98400 toc06
1 1 1
f = 6kHz f = 6kHz f = 6kHz
THD+N (%)

THD+N (%)

THD+N (%)

0.1 f = 1kHz 0.1 f = 1kHz 0.1 f = 1kHz

VPVDD = 24V
RL = 8I
0.01 0.01 0.01
STOPS BEFORE 10% THD+N
DUE TO THERMAL LIMITING OF
VPVDD = 12V VPVDD = 18V f = 100Hz
f = 100Hz f = 100Hz THERMAL FOLDBACK FEATURE
8I LOAD 8I LOAD
0.001 0.001 0.001
0 2 4 6 8 10 12 0 4 8 12 16 20 24 0 8 16 24 32 40 48
OUTPUT POWER (W) OUTPUT POWER (W) OUTPUT POWER (W)

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. OUTPUT POWER EFFICIENCY vs. OUTPUT POWER EFFICIENCY vs. OUTPUT POWER
10 100 100
MAX98400 toc07

MAX98400 toc08

MAX98400 toc09

90 90
80 80
1
f = 6kHz 70 70
EFFICIENCY (%)

EFFICIENCY (%)
THD+N (%)

60 60
0.1 f = 1kHz 50 50
40 40
30 30
0.01
20 VPVDD = 12V, 20 VPVDD = 18V,
f = 100Hz
VPVDD = 12V 8I LOAD, 8I LOAD,
10 10
4I LOAD BOTH CHANNELS DRIVEN BOTH CHANNELS DRIVEN
0.001 0 0
0 2 4 6 8 10 12 14 16 18 0 2 4 6 8 10 12 14 16 18 20 0 5 10 15 20 25 30 35 40
OUTPUT POWER (W) TOTAL OUTPUT POWER (W) TOTAL OUTPUT POWER (W)

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Typical Operating Characteristics (continued)

(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)

MAXIMUM OUTPUT POWER vs. SUPPLY VOLTAGE

EFFICIENCY vs. OUTPUT POWER EFFICIENCY vs. OUTPUT POWER (WITH THERMAL SHUTDOWN)
100 100 100

MAX98400 toc12
MAX98400 toc10

MAX98400 toc11
90 90 90 8I LOAD, BOTH
CHANNELS ARE DRIVEN

MAXIMUM OUTPUT POWER (W)

80 80 80
70 70 70
EFFICIENCY (%)

EFFICIENCY (%)

60 60 60
50 50 50
40 40 40
10% THD+N
30 30 30
20 VPVDD = 24V, 20 VPVDD = 12V, 20 1% THD+N
10 8I LOAD, 10 4I LOAD, 10
BOTH CHANNELS DRIVEN BOTH CHANNELS DRIVEN
0 0 0
0 10 20 30 40 50 60 0 10 20 30 40 8 12 16 20 24 28
TOTAL OUTPUT POWER (W) TOTAL OUTPUT POWER (W) SUPPLY VOLTAGE (V)

MAXIMUM OUTPUT POWER vs. SUPPLY VOLTAGE

(WITH THERMAL SHUTDOWN) OUTPUT POWER vs. LOAD OUTPUT POWER vs. LOAD
60 40 50
MAX98400 toc14

MAX98400 toc15
MAX98400 toc13

4I LOAD, BOTH CHANNELS ARE DRIVEN VPVDD = 12V VPVDD = 18V

35 45
50
MAXIMUM OUTPUT POWER (W)

40
30
35
40
25 30
POUT (W)

POUT (W)

30 10% THD+N 20 25

15 20
20 1% THD+N
15 10% THD+N
10 10% THD+N
10
10
5 5 1% THD+N
1% THD+N
0 0 0
8 10 12 14 16 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100
SUPPLY VOLTAGE (V) LOAD (I) LOAD (I)

OUTPUT POWER vs. LOAD POWER-SUPPLY REJECTION RATIO CROSSTALK vs. FREQUENCY
80 10 20
MAX98400 toc18
MAX98400 toc16

MAX98400 toc17

VPVDD = 24V 100mVP-P RIPPLE 8I LOAD,

70 0 POUT = 1W,
0
f = 1kHz
-10
60
-20 -20
CROSSTALK (dB)

50
PSRR (dB)
POUT (W)

-30
40 -40
-40
30
10% THD+N -50 -60
20 -60
-80
10 1% THD+N
-70

0 -80 -100
0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 100 0.01 0.1 1 10 100
LOAD (I) FREQUENCY (kHz) FREQUENCY (kHz)

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Typical Operating Characteristics (continued)

(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)

INBAND OUTPUT SPECTRUM WIDEBAND OUTPUT SPECTRUM SHDN ON/OFF RESPONSE

MAX98400 toc21
0 MAX98400 toc19
0

MAX98400 toc20
8I LOAD RBW = 100Hz
-20 -20
SHDN
OUTPUT AMPLITUDE (dBV)

OUTPUT AMPLITUDE (dBV)

2V/div
-40 -40

-60 -60

-80 -80
OUTPUT
-100 -100 2V/div

-120 -120
0 5 10 15 20 0.1 1 10 100 4ms/div
FREQUENCY (kHz) FREQUENCY (MHz)

SUPPLY CURRENT SUPPLY CURRENT SHUTDOWN CURRENT

vs. PVDD SUPPLY VOLTAGE vs. VS SUPPLY VOLTAGE vs. PVDD SUPPLY VOLTAGE
14 14 14
MAX98400 toc23
MAX98400 toc22

MAX98400 toc24
12 12 IPVDD 12
IPVDD IPVDD_SHDN
SHUTDOWN CURRENT (µA)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)

10 10 10

8 8 8
IVS
6 6 6
IVS

4 4 4
IVS_SHDN
2 2 2
VS = 5V VPVDD = 18V VS = 5V
0 0 0
8 12 16 20 24 28 4.75 5.00 5.25 5.50 8 12 16 20 24 28
PVDD SUPPLY VOLTAGE (V) VS SUPPLY VOLTAGE (V) PVDD SUPPLY VOLTAGE (V)

SHUTDOWN CURRENT MAXIMUM OUTPUT POWER TOTAL HARMONIC DISTORTION PLUS NOISE
vs. VS SUPPLY VOLTAGE vs. PVDD (NO THERMAL SHUTDOWN) vs. FREQUENCY (MONO)
14 60 1
MAX98400 toc25

MAX98400 toc26

MAX98400 toc27

12 50
8I LOAD POUT = 8W
SHUTDOWN CURRENT (µA)

10
MAXIMUM POUT (W)

40 0.1
THD+N (%)

8 IPVDD_SHDN
30
6 4I LOAD POUT = 1W
20 0.01
4
IVS_SHDN
2 10 THERMAL FOLDBACK DISABLED, VPVDD = 12V
VPVDD = 18V BOTH CHANNELS DRIVEN 4I LOAD
0 0 0.001
4.75 5.00 5.25 5.50 8 12 16 20 24 28 0.01 0.1 1 10 100
VS SUPPLY VOLTAGE (V) PVDD SUPPLY VOLTAGE (V) FREQUENCY (kHz)

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Typical Operating Characteristics (continued)

(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)

TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (MONO) vs. OUTPUT POWER (MONO) vs. OUTPUT POWER (MONO)
10 10 10
MAX98400 toc28

MAX98400 toc29

MAX98400 toc30
1 1 1
f = 6kHz f = 6kHz f = 6kHz
THD+N (%)

THD+N (%)

THD+N (%)
0.1 f = 1kHz 0.1 f = 1kHz 0.1 f = 1kHz

0.01 0.01 0.01

VPVDD = 12V, VPVDD = 18V, VPVDD = 24V,

f = 100Hz f = 100Hz
4I LOAD f = 100Hz 4I LOAD 4I LOAD
0.001 0.001 0.001
0 4 8 12 16 20 24 0 8 16 24 32 40 48 0 10 20 30 40 50 60 70 80
OUTPUT POWER (W) OUTPUT POWER (W) OUTPUT POWER (W)

EFFICIENCY vs. OUTPUT POWER (MONO) EFFICIENCY vs. OUTPUT POWER (MONO) EFFICIENCY vs. OUTPUT POWER (MONO)
100 100 100
MAX98400 toc31

MAX98400 toc32

MAX98400 toc33
90 90 90
80 80 80
70 70 70
EFFICIENCY (%)

EFFICIENCY (%)

EFFICIENCY (%)

60 60 60
50 50 50
40 40 40
30 30 30
20 20 20
VPVDD = 12V, VPVDD = 18V, VPVDD = 24V,
10 10 10
4I LOAD 4I LOAD 4I LOAD
0 0 0
0 5 10 15 20 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40
TOTAL OUTPUT POWER (W) TOTAL OUTPUT POWER (W) TOTAL OUTPUT POWER (W)

MAXIMUM OUTPUT POWER

vs. PVDD (WITH THERMAL SHUTDOWN, MONO) OUTPUT POWER vs. LOAD (MONO) OUTPUT POWER vs. LOAD (MONO)
100 25 50
MAX98400 toc34

MAX98400 toc35

MAX98400 toc36

VPVDD = 12V VPVDD = 18V

90 45
80 20 40
70 10% THD+N 35
MAXIMUM POUT (W)

60 15 30
POUT (W)

POUT (W)

50 25
1% THD+N
40 10 20
30 15
20 5 10% THD+N 10 10% THD+N
10 5
4I LOAD, THERMAL FOLD DISABLED 1% THD+N 1% THD+N
0 0 0
8 12 16 20 24 28 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100
PVDD SUPPLY VOLTAGE (V) LOAD (I) LOAD (I)

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Typical Operating Characteristics (continued)

(MAX98400A, VPVDD = 18V, VSHDN = 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
CREL = C1 = C2 = 1μF, typical values are at TA = +25°C, unless otherwise noted.)

SUPPLY CURRENT
OUTPUT POWER vs. LOAD (MONO) vs. PVDD SUPPLY VOLTAGE (MONO)
80 14

MAX98400 toc37

MAX98400 toc38
VPVDD = 24V
70 12
IPVDD
60

SUPPLY CURRENT (mA)

10
50
POUT (W)

8
40
6 IVS
30
4
20 10% THD+N
10 2
1% THD+N VS = 5V
0 0
0 10 20 30 40 50 60 70 80 90 100 8 12 16 20 24 28
LOAD (I) PVDD SUPPLY VOLTAGE (V)

SUPPLY CURRENT MAXIMUM OUTPUT POWER

vs. VS SUPPLY VOLTAGE (MONO) vs. PVDD (NO THERMAL SHUTDOWN, MONO)
14 60
MAX98400 toc39

MAX98400 toc40
12 IPVDD 50
SUPPLY CURRENT (mA)

10
MAXIMUM POUT (W)

40
8
30
6 IVS
20
4

2 10
VPVDD = 18V 4I LOAD, THERMAL FOLD DISABLED
0 0
4.75 5.00 5.25 5.50 8 12 16 20 24 28
VS SUPPLY VOLTAGE (V) PVDD SUPPLY VOLTAGE (V)

LIMITER TRANSFER CHARACTERISTIC LIMITER RELEASE TIME

MAX98400 toc42
24
MAX98400 toc41

RL = 8I + 68µH LIM_TH = GND

22
LIM_TH = GND
20 VPVDD = 24V INPUT
18 2V/div
OUTPUT VOLTAGE (V)

16
VPVDD = 18V
14
12
10
8
6 VPVDD = 8V OUTPUT
4 4V/div
2 tRELEASE
0
0 0.5 1.0 1.5 2.0 2.5 3.0 200ms/div
INPUT VOLTAGE (V)

www.maximintegrated.com Maxim Integrated │  11

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Pin Configurations

TEMPLOCK
RELEASE
TOP VIEW
OUTR+
OUTR+
OUTR-
OUTR-

SHDN

TEMPLOCK
N.C.

N.C.
TOP VIEW

RELEASE
OUTR+

SHDN
OUTR-

OUTR-
27 26 25 24 23 22 21 20 19

18 17 16 15 14 13
N.C. 28 18 N.C.
PGND 29 17 INR+ PGND 19 12 INR+
PGND 30 16 INR-
PGND 20 11 INR-
PVDD 31 15 GND
PVDD MAX98400A GND PVDD 21 10 GND
32 14 MAX98400B
PVDD 33 13 MONO PVDD 22 9 INL-
PGND 34 12 INL- PGND 23 INL+
8
PGND 35 11 INL+ EP
+ EP PGND 24 + 7 LIM_TH
N.C. 36 10 LIM_TH
1 2 3 4 5 6
1 2 3 4 5 6 7 8 9

OUTL-

OUTL-

OUTL+
VS

G1

G2
G1
OUTL-
OUTL-
N.C.
OUTL+
OUTL+
VS
N.C.

G2

TQFN
TQFN

Pin Descriptions
PIN
NAME FUNCTION
MAX98400A MAX98400B
1, 2 1, 2 OUTL- Negative Left Speaker Output
3, 7, 18, 22,
— N.C. No Connection
25, 28, 36
4, 5 3 OUTL+ Positive Left Speaker Output
5V Regulator Supply. Bypass VS to GND with a 1μF capacitor. Connect to a +5V
6 4 VS
source for dual-supply operation.
8 5 G1 Three-State Input for Gain Selection 1. See the Detailed Description section.
9 6 G2 Three-State Input for Gain Selection 2. See the Detailed Description section.
See the Limiter Threshold Control (LIM_TH) section for details.
Connect to:
1) VS to disable limiter.
10 7 LIM_TH
2) GND to have no clipping.
3) RLIM1 resistor to GND to have a PVDD tracking threshold.
4) RLIM1 and RLIM2 resistor-divider to have an absolute threshold.

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Pin Descriptions (continued)

PIN
NAME FUNCTION
MAX98400A MAX98400B
11 8 INL+ Left-Channel Positive Analog Input
12 9 INL- Left-Channel Negative Analog Input
Mono Operation. Connect MONO to GND for stereo operation. Connect MONO
13 — MONO
to VS for mono operation.
14, 15 10 GND Analog Ground
16 11 INR- Right-Channel Negative Analog Input
17 12 INR+ Right-Channel Positive Analog Input
See the Thermal Foldback section for details.
Connect to:
19 13 TEMPLOCK
1) GND to disable thermal foldback.
2) Leave open to enable thermal foldback.
20 14 RELEASE Sets the Limiter Time Constant. Connect to GND through 1μF.
Active-Low Shutdown Input
21 15 SHDN Low = shutdown
High = enable
23, 24 16 OUTR+ Positive Right Speaker Output
26, 27 17, 18 OUTR- Negative Right Speaker Output
19, 20,
29, 30, 34, 35 PGND Power Ground
23, 24
31, 32, 33 21, 22 PVDD Power Supply. Bypass PVDD to PGND with 1μF and 200μF capacitors.
— — EP Exposed Pad. Connect to PGND for optimum thermal performance.

www.maximintegrated.com Maxim Integrated │  13

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Stereo Configuration for MAX98400A

8V TO 28V

C2 C1 CBULK
1.0µF 1.0µF 200µF

VS PVDD

6 31, 32, 33
MONO
13 MAX98400A
REGULATOR
CIN
1.0µF
INL+ 11
4, 5 OUTL+
LEFT CIN CLIPPING
PGA
INPUT 1.0µF LIMITER
INL- 12
1, 2 OUTL-

TEMPLOCK 19 THERMAL POWER

CIN FOLDBACK STAGE
23, 24 OUTR+
1.0µF
INR+ 17
WITH THERMAL
RIGHT CIN CLIPPING AND
INPUT PGA 26, 27 OUTR-
1.0µF LIMITER OVERCURRENT
INR- 16 PROTECTION

LIMITER GAIN BIAS AND

CONTROL SELECTION OSCILLATOR

29, 30,
10 20 8 9 21 14, 15 34, 35

LIM_TH RELEASE G1 G2 SHDN GND PGND

CREL
1.0µF
ENABLE

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Mono Configuration for MAX98400A

8V TO 28V

C2 C1 CBULK
1.0µF 1.0µF 200µF

VS PVDD
VS 6 31, 32, 33

REGULATOR MAX98400A
MONO
13
CIN
1µF
INL+ 11
4, 5 OUTL+
LEFT CLIPPING
PGA 1, 2 OUTL-
INPUT LIMITER
INL- 12

CIN
1µF 19 THERMAL POWER
TEMPLOCK
CIN FOLDBACK STAGE
23, 24 OUTR+
1µF
INR+ 17
WITH THERMAL
RIGHT CLIPPING AND
PGA 26, 27 OUTR-
INPUT LIMITER OVERCURRENT
INR- 16
PROTECTION
CIN
1µF
LIMITER GAIN BIAS AND
CONTROL SELECTION OSCILLATOR

29, 30,
10 20 8 9 21 14, 15 34, 35
LIM_TH RELEASE G1 G2 SHDN GND PGND
CREL
1.0µF ENABLE

Detailed Description thermal protection is also available in addition to robust

The MAX98400A/MAX98400B Class D amplifiers provide overcurrent protection.
high-performance, thermally efficient amplifier solutions. Both devices operate from an 8V to 28V supply and
The MAX98400A delivers 2x20W into 8Ω loads or 1x40W provide a high 67dB PSRR, eliminating the need for a
into a 4Ω load. The MAX98400B delivers 2x12W into 8Ω regulated power supply. They offers up to 90% efficiency
loads. from a 12V supply.
An integrated limiting circuit prevents output clipping Filterless modulation allows the ICs to pass EN55022B
distortion and protects small speakers from transient volt- EMI limits with 1m cables using only a low-cost fer-
ages. rite bead and small-value capacitor on each output
A thermal-foldback feature can be enabled to automati- (Figure  1).
cally reduce the output power if the supply voltage, input Comprehensive click-and-pop reduction circuitry mini-
signal, and/or ambient temperature are too high to oper- mizes noise coming into and out of shutdown.
ate within a junction temperature of +130°C. Traditional

www.maximintegrated.com Maxim Integrated │  15

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

The MAX98400A/MAX98400B are available in 36-pin and Click-and-Pop Suppression

24-pin TQFN packages, respectively, and are specified The ICs feature comprehensive click-and-pop suppres-
over the -40°C to +85°C temperature range. sion that minimizes audible transients on startup and
Efficiency shutdown. While in shutdown, the H-bridge is in a high-
impedance state.
The high efficiency of a Class D amplifier is due to the
switching operation of the output stage transistors. In a Mono Configuration
Class D amplifier, the output transistors act as switches The MAX98400A features a mono mode that allows the
and consume negligible power. Power loss associated right and left channels to operate in parallel, achieving up
with the Class D output stage is due to the I2R loss of the to 40W of output power. Apply a logic-high (VS) to MONO
MOSFET on-resistance, various switching losses, and to enable mono mode. In mono mode, an audio signal
quiescent current overhead. applied to the left channel (INL) is routed to the H-bridges
The theoretical best efficiency of a linear amplifier is 78% of both channels. Connect OUTL+ to OUTR+ and OUTL-
at peak output power. Under typical music reproduction to OUTR- using heavy PCB traces as close as possible
levels, the efficiency falls below 30%, whereas these to the device. Driving MONO low (stereo mode) while the
ICs exhibit > 85% efficiency under the same conditions outputs are wired together in mono mode can trigger the
(Figure 2). short-circuit or thermal-overload protection, or both.
Shutdown Clipping Limiter
The ICs feature a shutdown mode that reduces power The ICs feature a programmable clipping limiter to pre-
consumption and extends battery life in portable applica- vent output clipping distortion and excessive power dissi-
tions. The shutdown mode reduces supply current to 8μA pation and to protect small speakers. All limiter functional-
(typ). Drive SHDN high for normal operation. Drive SHDN ity is controlled by two pins: LIM_TH and RELEASE. The
low to place the device in low-power shutdown mode. In voltage applied at the LIM_TH pin controls the threshold
shutdown mode, the outputs are high impedance and the when the limiter acts, and the capacitor at the RELEASE
common-mode voltage at the output decays to zero. The pin controls the release time of the limiter. The limiter
shutdown mode serves as a mute function. controls both left and right channels together.

EFFICIENCY vs. OUTPUT POWER

40
100
90
30 MAX98400A
80
AMPLITUDE (dBµV/m)

70
EFFICIENCY (%)

20
60
50
10
40
CLASS AB
30
0
20
10
-10
30 100 1000 0
0 5 10 15 20
FREQUENCY (MHz)
TOTAL OUTPUT POWER (W)

Figure 1. MAX98400B EMI Performance Figure 2. MAX98400A Efficiency vs. Class AB Efficiency

www.maximintegrated.com Maxim Integrated │  16

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Limiter Threshold Control (LIM_TH) For a 5V supply, a resistor-divider of RLIM1 = 165kΩ/

There are three modes for the limiter, defined by VLIM_TH, RLIM2 = 270kΩ gives both an unloaded voltage of 1.82V
the voltage applied to the LIM_TH pin (Table 1). and the desired output resistance of approximately
100kΩ.
In Mode1, the limiter is disabled. The output clips when
output peak voltage reaches the voltage on PVDD, VPVDD. If only distortion limiting is desired, set VTHRESH to be
20% higher than VPVDD. This limits the output clipping
In Mode2, the limiter threshold (VTHRESH) tracks supply
levels to approximately 10% THD.
voltage, VPVDD. The peak output voltage is limited to
approximately VTHRESH = VPVDD x 0.95. The attack time for the limiter is fixed, typically < 200μs.
In Mode3, the limiter threshold, VTHRESH, is program- Release Time Control (RELEASE)
mable. VLIM_TH can be set to a voltage proportional to the The release time for the limiter is set by an external
desired output threshold. The limiter threshold can be set capacitor at RELEASE (CREL) to GND. Choose CREL =
down to 0.5 x VPVDD and up to 1.6 x VPVDD. VTHRESH Release Time [s] x 1μF. The CREL limit is 2.2μF.
cannot exceed 22V.
Threshold settings below VPVDD can be used to protect
speakers; the peak output voltage is limited to a value of
VTHRESH = VLIM_TH x 6.4. MAX98400A
MAX98400B PVDD
Threshold settings above VPVDD can be used to limit the
PVDD
output distortion; the peak output voltage is limited to a 18V
PVDD
value of VTHRESH = VLIM_TH x 6.4 x 0.95. The 0.95 factor C1
takes into account the voltage drop across the power FET VS 1.0µF
that occurs when the amplifier is clipped. Choose RLIM1 REGULATOR
and RLIM2 (Figure 3) to set the desired voltage at the VS
LIM_TH pin. For best accuracy, the parallel combination
C2
RLIM1||RLIM2 should be approximately 100kΩ. 1.0µF LIMITER
RLIM2 CONTROL
Example:
If the speaker in the application can handle only 12V peak, LIM_TH RELEASE
but VPVDD is higher, the threshold voltage (VTHRESH)
should be set to 12V: RLIM1 CREL
1.0µF
VTHRESH = 12V
The voltage that needs to be applied to VLIM_TH is then
defined as:
Figure 3. Limiter Control, Mode3 Configuration (Table 1)
VLIM_TH = VTHRESH/6.4 = 12V/6.4 = 1.88V

Table 1. Limiter Control Modes

LIM_TH VOLTAGE
MODE NAME FUNCTION
RANGE
The limiter is disabled when connecting LIM_TH to VS or a voltage greater
Mode1 Disable 3.9V < VLIM_TH ≤ VS
than 3.9V.
The output peak voltage is limited to just below the supply voltage, VPVDD.
VGND ≤ VLIM_TH <
Mode2 PVDD tracking VTHRESH = VPVDD x 0.95 when LIM_TH is connected to ground or a
0.15V
voltage below 0.3V.
The output peak voltage, VTHRESH, is limited to the threshold set by the
voltage applied on the LIM_TH so that VTHRESH = VLIM_TH x 6.4.
Mode3 Programmable 0.6V ≤ VLIM_TH ≤ 3.8V
When VTHRESH is set 20% higher than VPVDD, the output THD distortion
is limited to 10%.
Note: VTHRESH is the output peak limiting voltage (limiter threshold voltage).

www.maximintegrated.com Maxim Integrated │  17

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Preamplifier Gain Setting sequence. The shutdown and recovering sequence is

The ICs offer eight pin-selectable gain settings, selectable repeated until the output fault is removed.
through the G1 and G2 pins.
Applications Information
Protection
Filterless Class D Operation
The ICs feature overcurrent protection and two types of
Traditional Class D amplifiers require an output filter to
thermal protection: thermal foldback and overtemperature
recover the audio signal from the amplifier’s output. The
protection.
filters add cost, increase the solution size of the amplifier,
Thermal Foldback and can decrease efficiency and THD+N performance.
The ICs feature thermal foldback that helps prevent The traditional PWM scheme uses large differential output
unwanted thermal-shutdown events. If activated, thermal swings (2 x VDD peak-to-peak) and causes large ripple
foldback attenuates the stereo output signal once the currents. Any parasitic resistance in the filter components
internal junction temperature exceeds +130°C. Attenuation results in a loss of power, lowering the efficiency.
is applied proportionally as the junction temperature (TJ) These ICs do not require an output filter. The devices rely
exceeds the fixed +130°C threshold. The thermal-foldback on the inherent inductance of the speaker coil and the
mode is controlled by the TEMPLOCK pin. natural filtering of both the speaker and the human ear to
Overtemperature Protection recover the audio component of the square-wave output.
Eliminating the output filter results in a smaller, lower cost
The ICs feature an overtemperature protection that dis-
solution.
ables the amplifier if the junction temperature exceeds
+165°C. Once the amplifier is disabled and the die tem- Because the frequency of the ICs’ output is well beyond
perature has cooled by 20°C, the devices enable again the bandwidth of most speakers, voice coil movement due
and resume normal operation. to the square-wave frequency is very small. For optimum
results, use a speaker with a series inductance > 10μH.
Overcurrent Protection Typical 8Ω speakers exhibit series inductances in the
When the output current reaches the current limit, 5A 20μH to 100μH range.
(typ), the ICs disable the outputs and initiate a recovering

Table 2. Gain Selection

GAIN SETTING
G1 G2
(dB)
GND GND 9
Unconnected GND 13
VS GND 16.7
GND Unconnected 20.1
Unconnected Unconnected 23.3
VS Unconnected 26.4
GND VS 29.8
Unconnected VS 32.9
VS VS Reserved

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Inductor-Based Output Filters Internal Regulator VS

Some applications use the ICs with a full inductor-/capac- For highest efficiency operation and best thermal perfor-
itor-based (L/C) output filter. See Figure 4 for the correct mance, especially at higher VPVDD levels, the VS can be
connections of these components. supplied from an external 5V supply. To do this, connect
The load impedance of the speaker determines the filter a 5V source to the VS pin (4.75V to 5.5V). When a 5V
component selection (Table 3). supply is connected to the VS pin, the internal regulator
is automatically disabled and the power dissipation of the
Inductors L1 and L2 and capacitor C1 form the primary ICs is reduced.
output filter. Capacitors C2 and C3 provide common-
mode filtering to reduce radiated emissions. Capacitors Supply Bypassing, Layout, and Grounding
C4 and C5, plus resistors R1 and R2, form a Zobel at the Proper layout and grounding are essential for optimum
output. A Zobel corrects the output loading to compen- performance. Use wide traces for the power-supply
sate for the rising impedance of the loudspeaker. Without inputs and amplifier outputs to minimize losses due to
a Zobel, the filter exhibits a peak response near the cutoff parasitic trace resistance. Proper grounding improves
frequency. audio performance, minimizes crosstalk between chan-
nels, and prevents switching noise from coupling into the
Component Selection
audio signal. Connect PGND and GND together at a sin-
Input Capacitor gle point on the PCB. Route all traces that carry switching
The input AC-coupling capacitors allow the amplifier to transients away from GND and the traces/components in
automatically bias the signal to an optimum DC level. 1μF the audio signal path.
is recommended for the input capacitor. Bypass each PVDD pin with a 0.1μF capacitor to PGND.
Power Supplies Place the bypass capacitors as close as possible to the
ICs. Place a 220μF capacitor between PVDD and PGND.
The ICs are designed to be operated from a single-
Bypass both PVDD and VS pins with a 1μF capacitor to
supply voltage, VPVDD, which can range from 8V to 28V.
GND.
Inside the ICs, this VPVDD supplies power for the output
FETs and other high-power circuitry, while the low-power Use wide, low-resistance output traces. Current drawn
circuitry operates from VS, an internally generated 5V from the outputs increases as load impedance decreas-
supply (4.6V typ). VS is internally generated from a lin- es. High-output trace resistance decreases the power
ear regulator that is powered from VPVDD. Bypass both delivered to the load. The TQFN package features an
PVDD and VS pins to ground with a 1μF capacitor. exposed thermal pad on its underside. This pad lowers
the package’s thermal resistance by providing a heat
conduction path from the die to the PCB. Connect the
C2 C4 exposed thermal pad to PGND by using a large pad and
R1 multiple vias to the PGND plane.
L1 For best optimum thermal performance, use 2oz copper
and allow lots of PCB area around the device.
MAX98400A/B C1

L2
C3 C5 Chip Information
R2 PROCESS: CMOS

Figure 4. Output Filter for PWM Mode

Table 3. Filter Component Selection

RL (Ω) L1, L2 (µH) C1 (µF) C2, C3 (µF) C4, C5 (µF) R1, R2 (Ω)
4 10 0.47 0.10 0.22 10
8 15 0.15 0.15 0.15 15
16 33 0.10 0.10 0.10 33

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Functional Diagrams

VS PVDD
6 31, 32, 33

MAX98400A
MONO REGULATOR
13

INL+ 11
4, 5 OUTL+
CLIPPING
PGA
LIMITER
INL- 12
1, 2 OUTL-

TEMPLOCK 19 THERMAL POWER

FOLDBACK STAGE
23, 24 OUTR+

INR+ 17
WITH THERMAL
CLIPPING AND
PGA 26, 27 OUTR-
LIMITER OVERCURRENT
INR- 16
PROTECTION

LIMITER GAIN BIAS AND

CONTROL SELECTION OSCILLATOR

29, 30,
10 20 8 9 21 14, 15 34, 35
LIM_TH RELEASE G1 G2 SHDN GND PGND

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Functional Diagrams (continued)

VS PVDD
4 21, 22

REGULATOR MAX98400B

INL+ 8
3 OUTL+
CLIPPING
PGA
LIMITER
INL- 9
1, 2 OUTL-

TEMPLOCK 13 THERMAL POWER

FOLDBACK STAGE
16 OUTR+

INR+ 12
WITH THERMAL
CLIPPING AND
PGA 17, 18 OUTR-
LIMITER OVERCURRENT
INR- 11
PROTECTION

LIMITER GAIN BIAS AND

CONTROL SELECTION OSCILLATOR

19, 20,
7 14 5 6 15 10 23, 24
LIM_TH RELEASE G1 G2 SHDN GND PGND

Ordering Information
PART PIN-PACKAGE SPEC
MAX98400AETX+ 36 TQFN-EP* 2x20W
MAX98400BETG+ 24 TQFN-EP* 2x12W

Note: Devices operate over the -40°C to +85°C temperature

range.
*EP = Exposed pad.

www.maximintegrated.com Maxim Integrated │  21

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Package Information
For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.

PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.

36 TQFN-EP T3666+3 21-0141 90-0050
24 TQFN-EP T2444+4 21-0139 90-0022

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MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Package Information (continued)

For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.

www.maximintegrated.com Maxim Integrated │  23

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Package Information (continued)

For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.

JEROLD LEE
9/25/13

www.maximintegrated.com Maxim Integrated │  24

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Package Information (continued)

For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.

www.maximintegrated.com Maxim Integrated │  25

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Package Information (continued)

For the latest package outline information and land patterns, go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-”
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.

www.maximintegrated.com Maxim Integrated │  26

MAX98400A/MAX98400B Stereo, High-Power, Class D Amplifiers

Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
0 6/10 Initial release —
1 4/15 Corrected Land Pattern numbers 22
2 8/20 Updated Package Information table 22

For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. ©  2020 Maxim Integrated Products, Inc. │  27