Hyper-Threading Technology
Hyper-Threading Technology
Hyper-Threading Technology
Hyper-Threading Technology
2001
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of
Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale
and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel
reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future
changes to them.
Intel’s IA-32 Intel® Architecture processors (e.g., Pentium® 4 and Pentium® III processors) may contain design defects or errors
known as errata. Current characterized errata are available on request.
Intel®, Intel386™, Intel486™, Pentium®, Intel® NetBurst™, Intel® Xeon™, MMX™, and Itanium™ are trademarks owned by
Intel Corporation.
*Third-party brands and names are the property of their respective owners.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 7641
Mt. Prospect IL 60056-7641
or call 1-800-879-4683
or visit Intel’s website at http:\\www.intel.com
PAGE
ABOUT THIS PAPER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
INTRODUCTION TO HYPER-THREADING TECHNOLOGY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.0 HYPER-THREADING TECHNOLOGY OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.0 SUPPORTING IA-32 PROCESSORS WITH HYPER-THREADING TECHNOLOGY . . . . 3
3.0 PERFORMANCE GAINS WITH HYPER-THREADING TECHNOLOGY. . . . . . . . . . . . . . 4
4.0 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
iii
ABOUT THIS PAPER
This paper describes the new Hyper-Threading technology from Intel®. Hyper-Threading tech-
nology is a new feature in the IA-32 Intel Architecture that provides a performance boost for future
Intel IA-32 processors based on the Intel® NetBurst™ microarchitecture. Included in this paper is a
brief overview of Hyper-Threading technology and description of how it increases the performance
of operating-system and application software written to run on IA-32 processors.
1
INTRODUCTION TO HYPER-THREADING
TECHNOLOGY
Throughout the evolution of the IA-32 Intel Architecture, Intel has continuously added innovations
to the architecture to improve processor performance and to address specific needs of compute-
intensive applications. The latest of these innovations is Hyper-Threading technology, which Intel
has developed to improve the performance of IA-32 processors when executing multiple-processor
(MP) capable operating systems and multi-threaded applications.
Logical
AS† AS AS AS
Processor
IA-32 IA-32
The physical processor Processor Processor Each processor is a
consists of two logical separate physical
processors that share a processor.
single processor core.
1. The architectural state that is duplicated for each logical processor consists of the IA-32 data registers, seg-
ment registers, control registers, debug registers, and most of the MSRs. Each logical processor also has its
own advanced programmable interrupt controller (APIC).
2
INTRODUCTION TO HYPER-THREADING TECHNOLOGY
run on a processor. The same division of work load can be found in many high-performance appli-
cations such as database engines, scientific computation programs, engineering-workstation tools,
and multi-media programs. To gain access to increased processing power, most contemporary oper-
ating systems and applications are also designed to execute in DP or MP environments, where,
through the use of symmetric multiprocessing (SMP), processes and threads can be dispatched to run
on a pool of processors.
Hyper-Threading technology leverages the process- and thread-level parallelism found in contem-
porary operating systems and high-performance applications by implementing two logical proces-
sors on a single chip. This configuration allows a thread2 to be executed on each logical processor.
Instructions from both threads are simultaneously dispatched for execution by the processor core.
The processor core executes these two threads concurrently, using out-of-order instruction sched-
uling to keep as many of its execution units as possible busy during each clock cycle.
The increase in instruction processing throughput that Hyper-Threading technology provides results
from a combination of two things:
• The design of the Intel NetBurst micro-architecture
• The mix of IA-32 instructions typically found in multi-threaded code.
The Intel NetBurst micro-architecture has been designed to provide optimum performance when
executing a single instruction stream (a single thread of execution); however, typically (even with
highly optimized code) not all of the available execution units are used during each clock cycle. On
average, when executing code that uses a typical mix of IA-32 instructions, only 35%3 of the execu-
tion resources of the Intel NetBurst micro-architecture are used. To make more efficient use of these
execution resources, Hyper-Threading technology takes advantage of the inherent parallelism of
multi-threaded code to provide the processor core with a second thread of execution. The two
resulting threads supply the instruction scheduler with a pool of instructions that contain less inter-
dependencies between instructions and thus more opportunities to use the processor core’s available
execution resources. The net result is an increase in the instruction processing throughput for the
physical processor when executing multi-threaded code.
2. In the remainder of this paper, the term “thread” will be used as a general term for the terms “process” and
“thread.”
3. This figure was obtained from Intel laboratory measurements.
4. Some relatively simple enhancements to the MP initialization algorithm are needed.
3
INTRODUCTION TO HYPER-THREADING TECHNOLOGY
4.0 SUMMARY
Hyper-Threading technology represents a new approach to improving the instruction throughput of
processors that are targeted for servers and high-performance workstations. It also provides a view
into the future of microprocessor design where the performance of a processor when executing a
specific type of application or the space and power requirements of a physical processor within a
server may be as important as its raw processing speed.