LAB 10 RISC-V Assembly (Part II) : EE-222 Microprocessor Systems

LAB 10
RISC-V Assembly (Part II)

EE-222 Microprocessor Systems
Contents
1 Administrivia 2
1.1 Deliverable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Link to Venus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Control Flow Instructions in RISC-V 3

2.1 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.1 If-Else . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.2 For-Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Lab Task 4
3.1 Task A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.2 Task B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.3 Task C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.4 Task D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1
1 Administrivia
By the end of this lab you will be able to;
1. Write programs in RISC-V assembly.
2. Get familiarized with RISC-V control flow instructions.
3. Understand the concept of branch and loops.
1.1 Deliverable
You are required to submit
• Appropriately Commented Code
• Issues in Developing the Solution and your Response
in the beginning of next lab
1.2 Link to Venus

Link
2
2 Control Flow Instructions in RISC-V
Instructions that change the flow of program are called control flow instructions and the
process is known as decision making in computers. These instructions are also called branch
instructions or jump. In C if-else, switch-case, for-loop, while-loop, etc. are translated by
assembler to these instructions.
Some of the control flow instructions are tabulated below,
Instruction Format Function

beq beq src1, src2, label Branch if src1 == src2 (signed and unsigned both)
bge bge src1, src2, label Branch if src1 >= src2 (signed comparison)
bgeu bgeu src1, src2, label Branch if src1 >= src2 (unsigned comparison)
blt blt src1, src2, label Branch if src1 < src2 (signed comparison)
bltu bltu src1, src2, label Branch if src1 < src2 (unsigned comparison)
bne bne src1, src2, label Branch if src1 ! = src2 (signed and unsigned both)
j j label jump to label no matter what
2.1 Examples
2.1.1 If-Else
a −→ t0, b −→ t1, c −→ t2
1 i f ( a <= b ) { 1 blt t1 , t0 , F a l s e
2 c = a; 2 add t2 , t0 , z e r o
3 } 3 j done
4 else { 4 False : add t2 , t1 , z e r o
5 c = b; 5 done :
6 } 6 # r e s t o f t h e program
2.1.2 For-Loop
i −→ t0, sum −→ s0
1 f o r ( i =0; i <10; i ++) 1 addi t1 , z e r o , 10

2 { 2 addi t0 , zero , 0
3 sum = sum + 5 ; 3 Loop : addi s0 , s0 , 5
4 } 4 addi t0 , t0 , 1
5 blt t0 , t1 , Loop
3
3 Lab Task
3.1 Task A
Below are two copies of a same program with different values of variables t0 and t1 (“a” and
“b”). Optimize the if-else condition with the same code in both programs such that your
code should comprise of only three instructions (counting pseudo-instruction as one).
1 .data 1 .data
2 Pass : .asciiz ” a <= b” 2 Pass : .asciiz ” a <= b”
3 Fail : .asciiz ” a > b” 3 Fail : .asciiz ” a > b”
4 .text 4 .text
5 . g l o b l main 5 . g l o b l main
6 main : 6 main :
7 a d d i t0 , z e r o , 10 # a 7 a d d i t0 , z e r o , 10 # a
8 a d d i t1 , z e r o , 20 # b 8 a d d i t1 , zero , 5 # b
9 9
10 #−−−−− Update h e r e −−−−−−−− 10 #−−−−− Update h e r e −−−−−−−−

11 b l t t1 , t0 , F a l s e 11 b l t t1 , t0 , F a l s e
12 l a a1 , Pass 12 l a a1 , Pass
13 j done 13 j done
14 False : l a a1 , F a i l 14 False : l a a1 , F a i l
15 done : 15 done :
16 #−−−−−−−−−−−−−−−−−−−−−−−−−− 16 #−−−−−−−−−−−−−−−−−−−−−−−−−−
17 17
18 a d d i a0 , z e r o , 4 18 a d d i a0 , z e r o , 4
19 ecall 19 ecall
20 end : 20 end :
21 a d d i a0 , z e r o , 10 21 a d d i a0 , z e r o , 10
22 ecall 22 ecall
3.2 Task B
Write an assembly program that prints the pattern shown using loops and branches.
4
3.3 Task C
Translate the following C program in assembly such that the code functions perfectly for
any value of x and y (greater than zero). Verify your code by comparing its outputs with
the outputs of the C program below. Change the values of “x” and “y” for further testing.
To recall the concept of Greatest Commonn Divisor see this link1 .
1 #i n c l u d e <s t d i o . h>
2
3 int x = 21;
4 int y = 49;
5
6 i n t main ( )
7 {
8 int a = x , b = y ;
9 do
10 {
11 i f (a < b){
12 b = b−a ;
13 }
14 e l s e i f (b < a){
15 a = a−b ;
16 }
17 } w h i l e ( a != b ) ;
18
19 p r i n t f ( ” G r e a t e s t common d i v i s o r o f %d and %d i s %d” , x , y , a ) ;
20
21 }
3.4 Task D
Write an assembly program that prints all the prime numbers between 1 and 100. You should
not use pre-defined data. Variants of arithmetic, logical, load, store and branch instructions
are only allowed. (Hint: Knowledge of Greatest Common Divisor, you gained in the previous
sections of this lab might be useful)
1
https://en.wikipedia.org/wiki/Greatestc ommond ivisor

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LAB 10

RISC-V Assembly (Part II)

2 Control Flow Instructions in RISC-V 3

1. Write programs in RISC-V assembly.

2. Get familiarized with RISC-V control flow instructions.

3. Understand the concept of branch and loops.

• Appropriately Commented Code

• Issues in Developing the Solution and your Response

in the beginning of next lab

1.2 Link to Venus

Instruction Format Function

1 f o r ( i =0; i <10; i ++) 1 addi t1 , z e r o , 10

10 #−−−−− Update h e r e −−−−−−−− 10 #−−−−− Update h e r e −−−−−−−−

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