Wt32I Bluetooth Audio Module: Data Sheet
Wt32I Bluetooth Audio Module: Data Sheet
Wt32I Bluetooth Audio Module: Data Sheet
DATA SHEET
Wednesday, 19 March 2014
Version 1.0
Copyright © 2000-2014 Bluegiga Technologies
All rights reserved.
Bluegiga Technologies assumes no responsibility for any errors which may appear in this manual.
Furthermore, Bluegiga Technologies reserves the right to alter the hardware, software, and/or specifications
detailed here at any time without notice and does not make any commitment to update the information
contained here. Bluegiga’s products are not authorized for use as critical components in life support devices
or systems.
The WRAP is a registered trademark of Bluegiga Technologies
The Bluetooth trademark is owned by the Bluetooth SIG Inc., USA and is licensed to Bluegiga Technologies.
All other trademarks listed herein are owned by their respective owners.
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VERSION HISTORY
VERSION COMMENT
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TABLE OF CONTENTS
1 WT32i Product Numbering ............................................................................................................................7
2 Block diagram ................................................................................................................................................8
3 Pinout and Terminal Description ...................................................................................................................9
4 Electrical Characteristics ............................................................................................................................ 12
4.1 Absolute Maximum Ratings ................................................................................................................ 12
4.2 Recommended Operating Conditions ................................................................................................. 12
4.3 Digital Terminals.................................................................................................................................. 12
4.4 Audio Characteristics .......................................................................................................................... 13
4.4.1 ADC .............................................................................................................................................. 13
4.4.2 DAC .............................................................................................................................................. 14
4.4.3 A2DP Codecs............................................................................................................................... 14
4.5 RF Characteristics ............................................................................................................................... 16
4.5.1 RF Transceiver ............................................................................................................................ 16
4.5.2 Antenna Characteristics ............................................................................................................... 17
4.6 Current Consumption .......................................................................................................................... 20
5 Power Control and Regulation ................................................................................................................... 21
5.1 Reset ................................................................................................................................................... 23
5.1.1 Internal POR ................................................................................................................................ 24
6 Battery Charger .......................................................................................................................................... 26
7 GPIO and AIO Functions ............................................................................................................................ 27
7.1 iWRAP supported GPIO Functions ..................................................................................................... 27
7.2 Outputting Internal Clocks ................................................................................................................... 27
7.3 Auxiliary ADC ...................................................................................................................................... 28
7.4 Software I2C Interface ........................................................................................................................ 28
8 Serial Interfaces.......................................................................................................................................... 29
8.1 UART Interface.................................................................................................................................... 29
8.1.1 Resetting Through UART Break Signal ....................................................................................... 30
8.1.2 UART Configuration While Reset is Active .................................................................................. 30
8.1.3 UART Bypass Mode .................................................................................................................... 30
8.2 USB Interface ...................................................................................................................................... 31
8.3 Programming and Debug Interface (SPI) ............................................................................................ 32
9 Audio Interfaces.......................................................................................................................................... 33
9.1 Stereo Audio Codec Interface ............................................................................................................. 33
9.1.1 ADC .............................................................................................................................................. 33
9.1.2 DAC .............................................................................................................................................. 35
9.1.3 Microphone Input ......................................................................................................................... 36
9.1.4 Line Input ..................................................................................................................................... 37
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9.1.5 Output Stage ................................................................................................................................ 38
9.1.6 Mono Operation ........................................................................................................................... 40
9.1.7 Side Tone ..................................................................................................................................... 40
9.2 PCM Interface ..................................................................................................................................... 40
9.3 I2S Interface ........................................................................................................................................ 40
9.4 IEC 60958 Interface ............................................................................................................................ 42
10 Design Guidelines ................................................................................................................................... 44
10.1 Audio Layout Guide ..................................................................................................................... 44
10.1.1 EMC Considerations .................................................................................................................... 44
10.1.2 Choosing Capacitors and Resistors ............................................................................................ 44
10.2 RF Layout Guide .......................................................................................................................... 45
10.3 Example Application Schematics ................................................................................................. 48
11 Physical Dimensions ............................................................................................................................... 52
12 Soldering Recommendations .................................................................................................................. 54
13 Package .................................................................................................................................................. 55
14 Certification Guidance for an End Product Using WT32i ....................................................................... 57
14.1 Bluetooth End Product Listing...................................................................................................... 57
14.2 CE Approval of an End-Product ................................................................................................... 57
14.3 FCC Certification of an End Product ............................................................................................ 58
14.3.1 Co-location with Other Transmitters ............................................................................................ 59
14.4 IC Certification of an End Product ............................................................................................... 59
14.5 MIC Japan Certification of an End Product .................................................................................. 59
15 WT32i Certifications ................................................................................................................................ 59
15.1 Bluetooth ...................................................................................................................................... 59
15.2 CE ................................................................................................................................................ 59
15.3 FCC .............................................................................................................................................. 60
15.4 IC .................................................................................................................................................. 61
15.4.1 IC .................................................................................................................................................. 61
15.5 MIC Japan .................................................................................................................................... 62
15.6 KCC (South-Korea) ...................................................................................................................... 62
15.7 Qualified Antenna Types for WT32i-E ......................................................................................... 62
16 Contact Information................................................................................................................................. 63
Bluegiga Technologies Oy
WT32i Bluetooth® Audio Module
DESCRIPTION
KEY FEATURES:
WT32i is an audio specific Bluetooth 3.0
Bluetooth 3.0 compliant
module with excellent radio frequency
performance and enhanced audio features, Excellent Radio Performance
enabling a best in class Bluetooth audio
o Transmit power: +6.5 dBm
experience. In addition to a
certified Bluetooth radio and software stack, o Receiver sensitivity: -90 dBm
WT32i also contains a DSP, stereo audio o Link budget: 96.5 dB
codec, and battery charger making it ideal
for fixed and portable audio applications. Integrated chip antenna or U.FL
WT32i includes Bluegiga's antenna connector
iWRAP6 Bluetooth stack software which Audio features
implements A2DP, AVRCP v.1.5 profiles
and supports aptX® and AAC audio codecs o Integrated DSP
for stereo audio applications. For hands-free o 16-bit stereo codec
applications iWRAP6 software also
supports HFP v.1.6, HSP, MAP and o 44.1kHz ADC, 48kHz DAC
PBAP and CVC® echo cancellation software. o Analog, I2S, PCM, SPDIF, and
For data communications to Android and microphone interfaces
iOS applications iWRAP6 also ®
o Optional aptX and AAC stereo
implements Bluetooth Serial Port Profile
audio codecs
(SPP) and Apple iAP profiles. WT32i is an
®
ideal solution for developers who want to o Optional CVC echo
quickly integrate the latest Bluetooth audio cancellation
technologies without the time and costs o Wide Band Speech
typically involved with a Bluetooth audio
chipset design. Built-in battery charger
UART host interface
APPLICATIONS:
802.11 co-existence interface
Stereo speakers and sound bars
10 software programmable IO pins
Hi-Fi devices
Operating voltage: 1.8V to 3.6V
Hands-free kits
Temperature range: -40C to +85C
Stereo headsets
Bluetooth, CE, FCC, IC, Korea and
Japan qualified
Integrated iWRAP6 Bluetooth stack
o 13 Bluetooth profiles
o Apple iAP1 and iAP2
compatibility
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1 WT32i Product Numbering
WT32i Bluetooth Module with internal chip antenna and iWRAP6 Bluetooth
WT32i-A-AI6
software
WT32i Bluetooth Module with internal chip antenna and aptX® audio codec
WT32i-A-AI6-APTX
capable iWRAP6 Bluetooth software.
WT32i Bluetooth Module with internal chip antenna and Apple iAP capable
WT32i-A-AI6IAP iWRAP6 Bluetooth software. Available only to Apple MFI licensees. Contact
sales@bluegiga.com for more information.
WT32i Bluetooth Module with U.FL connector and aptX® audio codec
WT32i-E-AI6-APTX
capable iWRAP6 Bluetooth software.
WT32i Bluetooth Module with U.FL connector and Apple iAP capable
WT32i-E-AI6IAP iWRAP6 Bluetooth software. Available only to Apple MFI licensees. Contact
sales@bluegiga.com for more information.
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2 Block diagram
Flash
BC05-MM
UART/USB
RAM
PIO
Baseband
Balanced 2.4 DSP
Antenna filtter GHz I/O Audio In/Out
Radio MCU
PCM/I2S
Kalimba DSP
SPI
XTAL Reset
circuitry
BC05-MM
The BlueCore®5-Multimedia External is a single-chip radio and baseband IC for Bluetooth 2.4GHz systems. It
provides a fully compliant Bluetooth v3.0 specification system for data and voice. BlueCore5-Multimedia
External contains the Kalimba DSP coprocessor with double the MIPS of BlueCore3-Multimedia External,
supporting enhanced audio applications.
XTAL
Ther reference clock of WT32i is generated with 26 MHz crystal. All BC05-MM internal digital clocks are
generated using a phase locked loop, which is locked to the frequency of either the 26 MHz crystal or an
internally generated watchdog clock frequency of 1kHz.
RESET CIRCUITRY
The internal reset circuitry keeps BC05-MM in reset during boot in order for the supply voltages to stabilize.
This is to prevent corruption of the flash memory during booting. Please see chapter 5.1 for more detailed
description.
BALANCED FILTER
The internal balanced filter provides optimal impedance matching and band pass filtering in order to achieve
lowest possible in-band and out-of-band emissions.
ANTENNA
The antenna is a ceramic chip antenna with high efficiency. The antenna is insensitive to surrounding
dielectric materials and requires only a small clearance underneath which makes it compatible with previous
WT32I designs and well suitable for designs with high density.
FLASH
16 Mbit flash memory is used for storing the Bluetooth protocol stack and Virtual Machine applications. It can
also be used as an optional external RAM for memory-intensive applications.
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3 Pinout and Terminal Description
50 AUDIO_OUT_P_LEFT
49 AUDIO_OUT_N_LEFT
48 GND
VREG_ENA 1 47 AUDIO_OUT_P_RIGHT
GND 2 46 AUDIO_OUT_N_RIGHT
GND 3 45 AUDIO_IN_N_LEFT
GND 4 44 AUDIO_IN_P_LEFT
AIO0 5 43 GND
AIO1 6 42 AUDIO_IN_N_RIGHT
PIO0 7 41 AUDIO_IN_P_RIGHT
PIO1 8 40 MIC_BIAS
PIO2 9 39 GND
PIO3 10 38 VDD_CHG
USB_D- 11 37 VDD_BAT
USB_D+ 12 36 LED0
PIO9 13 35 SPI_MOSI
PIO10 14 34 SPI_MISO
UART_RXD 15 33 SPI_CLK
UART_TXD 16 32 SPI_NCSB
VDD_IO 17 31 GND
20
18
19
21
22
23
24
25
26
30
27
28
29
UART_NRTS
UART_NCTS
PIO7
PIO6
PIO4
PIO8
PIO5
RESET
PCM_IN
PCM_CLK
PCM_OUT
GND
PCM_SYNC
Figure 3: WT32i
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Pin
Pin Name Pin Type Description
Number
7 PIO0
8 PIO1
General purpose IO's can be configured with
9 PIO2 iWRAP for various functions. Each IO can be
10 PIO3 configured individually as output or input with
13 PIO9 strong or weak pull-up/-down. Using particular PS
14 PIO10 Configurable CMOS I/O setting GPIO pins can be used to implement WiFi
22 PIO8 co-existence signaling between WT32i and a WiFi
23 PIO7 radio. Software I2C interface can be implemented
for slow I2C functions such as configuring external
24 PIO6
audio codec or display.
25 PIO5
26 PIO4
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CMOS Input, weak internal
34 SPI_MISO SPI data input
pull-down
CMOS output, tristate,
35 SPI_MOSI SPI data output
weak internal pull-down
Pin
Pin Name Pin Type Description
Number
40 MIC_BIAS Analog
41 AUDIO_IN_P_RIGHT Analog
42 AUDIO_IN_N_RIGHT Analog
44 AUDIO_IN_P_LEFT Analog
45 AUDIO_IN_N_LEFT Analog
46 AUDIO_OUT_N_RIGHT Analog
47 AUDIO_OUT_P_RIGHT Analog
49 AUDIO_OUT_N_LEFT Analog
50 AUDIO_OUT_P_LEFT Analog
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4 Electrical Characteristics
4.1 Absolute Maximum Ratings
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4.4 Audio Characteristics
4.4.1 ADC
Resolution - - - 16 Bits
Input Sample
- 8 - 44.1 kHz
Rate, Fsample
Fsample
8kHz - 79 - dB
Signal to Noise 11.025kHz - 77 - dB
Ratio, SNR 16kHz - 76 - dB
22.050kHz - 76 - dB
32kHz - 75 - dB
44.1kHz - 75 - dB
Input full scale at maximum gain (differential) - 4 - mV rms
Input full scale at minimum gain (differential) - 800 - mV rms
3dB Bandwidth - 20 - kHz
Microphone mode input impedance - 6.0 - kHz
THD+N @ 30mV rms input - 0.04 - %
Table 7: ADC characteristics
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4.4.2 DAC
Resolution - - - 16 Bits
Output Sample
- 8 - 48 kHz
Rate, Fsample
Fsample
8kHz - 95 - dB
Signal to Noise 11.025kHz - 95 - dB
Ratio, SNR 16kHz - 95 - dB
22.050kHz - 95 - dB
32kHz - 95 - dB
44.1kHz - 95 - dB
Output Full Voltage Swing (differential) - 750 - mV rms
Resistive 16 - O.C. Ω
Allowed Load
Capacitive - - 500 pF
THD+N 16Ω Load - - 0.1 %
THD+N 100Ω Load - - 0.01 %
Table 8: DAC Characteristics
4.4.3.2 aptX®
The aptX is widely used in high quality audio devices. aptX can provide dynamic range up to 120 dB and it
®
has the shortest coding delay (<2ms) than other coding algorithms. Using aptX the whole system latency can
be reduced significantly because unlike SBC, it does not require buffering the audio. SBC reproduces a limited
®
audio band width whereas aptX encode the entire frequency range of audio.
®
aptX is more robust and resilient coding scheme than SBC and thus re-transmits does not occur as with
SBC.
®
Both SBC and aptX have flat frequency response up to 14 kHz. Up to 14 kHz both algorithms produce good
®
quality audio with very little distortion. At frequencies higher than 14 kHz the benefit of aptX becomes
®
obvious. SBC exhibits increasing attenuation with increasing frequency but aptX retains high reproduction
quality.
®
aptX requires purchasing a license for each Bluetooth address and the license agreement must be done with
®
CSR. The combination of aptX license and the Bluetooth address is programmed into the module in the
module production line.
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Figure 4: Frequency response of aptX and SBC codecs
4.4.3.3 AAC
AAC (Advanced Audio Coding) achieves better sound quality than MP3 and it is the default audio format for
®
YouTube and iPhone among others. AAC has long latency (>100ms) compared to aptX . Because of high
processing capacity requirement for encoding, WT32i does not support AAC as A2DP source. Thus WT32i
can be used for receiving (A2DP sink) AAC (from iPhone for example) but it cannot transmit AAC coded
audio.
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4.5 RF Characteristics
4.5.1 RF Transceiver
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Min Typ Max
Band / Limit by the Standard
Standard (AVG / (AVG / (AVG / Unit
Frequency (AVG / PEAK)
PEAK) PEAK) PEAK)
2nd harmonic 50 / 61 54 / 74 dBuV/m
< 40 /
3rd harmonic 54 / 74 dBuV/m
50
Band edge
54 / 74 dBuV/m
2390MHz
FCC part 15 Band edge
transmitter 54 / 74 dBuV/m
2483.5MHz
spurious
emissions Band edge
2400MHz -20 dBc
(conducted)
Band edge
2483.5MHz -20 dBc
(conducted)
ETSI EN 300 Band edge
-30 dBm
328 transmitter 2400MHz
spurious 2nd harmonic -35 -30 dBm
emissions 3rd harmonic <-40 -30 dBm
(2400 - 2479)
ETSI EN 300 -47 dBm
MHz
328 receiver
spurious (1600 - 1653)
-47 dBm
emissions MHz
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0 dB
-5 dB
-10 dB
-15 dB
-20 dB
-2 dB
-4 dB
-6 dB
-8 dB
-10 dB
-12 dB
-14 dB
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-1 dB
-2 dB
-3 dB
-4 dB
-5 dB
-6 dB
-7 dB
-8 dB
-9 dB
-10 dB
-11 dB
-12 dB
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4.6 Current Consumption
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5 Power Control and Regulation
WT32i contains an internal battery charger and a switch mode regulator that is mainly used for internal blocks
of the module. The module can be powered from a single 3.3 V supply provided that VDD_CHG is floating.
Alternatively the module can be powered from a battery connected to VDD_BAT and using an external
regulator for VDD_IO. 1.8 V to 3.3 V supply voltage for VDD_IO can be used to give desired signal levels for
the digital interfaces of the module. USB, however, requires 3.3 V for proper operation and thus, when USB is
in use, 3.3 V for VDD_IO is required.
VDD_CHG In
Battery Charger
Out
VDD_BAT AIO
Switch mode Linear 1.5V RF
VREG_ENA 1.8V regulator regulator Core
Audio
Flash
PIO
VDD_IO USB
UART
PCM
VDD_ENA is software configurable enable pin for the internal regulators. Using iWRAP the enable pin can be
configured to
1. Latch on the internal regulators at the rising edge
2. Turn the regulators on at rising edge and turn off the regulators at falling edge
3. Latch the regulators on at the rising edge and turn off the regulators at the following rising edge
GPIO can be configured to control an external regulator.
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Battery Voltage
(2.7V...4.4V)
VDD_BAT
ON/OFF
Button
VREG_ENA
IN LDO VDD_IO
EN (1.8V...3.6V)
R1
100k
C1 GPIO (holds the external LDO on)
4u7
R2
100k
Figure 9: Example of making a power on/off button using the latch feature of the internal regulators
iWRAP Example: Creating an on/off button with PIO2 holding the external regulator on
“SET CONTROL VREGEN 2 4”
(PIO is defined with a bit mask. 4 in hexadecimal is 100 in binary corresponding to PIO2)
NOTE: With the configuration shown above, when doing a SW reset for the module C1 will hold the enable pin
of the external regulator high until iWRAP has booted. This will prevent the module from turning off during
reset. When resetting through the reset pin one has to make sure that the enable pin is held high as long as
the reset pin is held active.
Figure 10 shows an example how to arrange power control when on/off button is not implemented.
VREG_ENA pin must not be connected to VDD_IO because leakage from VDD_BAT to VDD_IO will prevent
VREG_ENA to fall low enough to turn off the internal regulators.
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Battery Voltage
(2.7V...4.4V)
VDD_BAT
VREG_ENA
IN LDO VDD_IO
On/Off cntrl
EN (1.8V...3.6V)
Battery Voltage
(2.7V...4.4V)
VDD_BAT
VREG_ENA
IN LDO VDD_IO
On/Off cntrl
EN (1.8V...3.6V)
Figure 10: Correct and wrong connection for the power on/off control
5.1 Reset
WT32i may be reset from several sources: reset pin, power on reset, a UART break character or through
software configured watchdog timer.
At reset, the digital I/O pins are set to inputs for bi-directional pins and outputs are tri-state.
The chip status after a reset is as follows:
Warm Reset: data rate and RAM data remain available
Cold Reset: data rate and RAM data are not available
Table 13 shows the pin states of WT32i on reset. Pull-up (PU) and pull-down (PD) default to weak values
unless specified otherwise.
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No Core Voltage
Pin Name / Group I/O Type Full Chip Reset
Reset
USB Digital bi-directional N/A N/A
UART_RX
Digital input with PD PD PD
UART_CTS
UART_TX
Digital output with PU PU PU
UART_RTS
SPI_MOSI
Digital input with PD
SPI_CLK
PD PD
Digital tristate output with
SPI_MISO
PD
SPI_CS Digital input with PU PU PU
PCM_IN Digital input with PD
PCM_CLK
Digital bi-directional with PD
PCM_SYNC PD PD
Digital tri-state output with
PCM_OUT
PD
Digital bi-directional with
GPIO PD PD
PU/PD
Table 13: Pin states on reset
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WT32i
Reset BC05
22nF
Reset BC05
220k
R1
Host CPU
WT32i
GPIO Reset
Figure 12: An example how to connect CPU GPIO to the reset pin of the module
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6 Battery Charger
The battery charger is a constant current / constant voltage charger circuit, and is suitable for lithium
ion/polymer batteries only. It shares a connection to the battery terminal, VDD_BAT, with the switch-mode
regulator. The charger is initially calibrated by Bluegiga Technologies to have V float = 4.15V - 4.2 V.
The constant current level can be varied to allow charging of different capacity batteries. WT32i allows a
number of different currents to be used in the battery charger hardware. Values written to PS key 0x039b
CHARGER_CURRENT in the range 1..15 specify the charger current from 40..135mA in even steps. Values
outside the valid 0..15 range result in no change to the charging current. The default charging current (Key =
0) is nominally 40mA. Setting 0 is interpreted as “no-change” so it will be ignored
The charger enters various states of operation as it charges a battery. These are shown below:
Off: entered when the charger is disconnected.
Trickle Charge: entered when the battery voltage is below 2.9V.
Fast Charge - Constant Current: entered when the battery voltage is above 2.9V.
Fast Charge - Constant Voltage: entered when the battery has reached V float, the charger
switches mode to maintain the cell voltage at V float voltage by adjusting the constant
charge current.
Standby: this is the state when the battery is fully charged and no charging takes place.
When a voltage is applied to the charger input terminal VDD_CHG, and the battery is not fully charged, the
charger will operate and a LED connected to the terminal LED0 will illuminate. By default, until the firmware is
running, the LED will pulse at a low-duty cycle to minimize current consumption.
The battery charger circuitry auto-detects the presence of a power source, allowing the firmware to detect
when the charger is powered. Therefore, when the charger supply is not connected to VDD_CHG, the
terminal must be left open circuit. The VDD_CHG pin, when not connected, must be allowed to float and not
be pulled to a power rail. When the battery charger is not enabled, this pin may float to a low undefined
voltage. Any DC connection will increase current consumption of the device. Capacitive components such as
diodes, FETs, and ESD protection, may be connected.
The battery charger is designed to operate with a permanently connected battery. If the application permits
the charger input to be connected while the battery is disconnected, the VDD_BAT pin voltage may become
unstable. This, in turn, may cause damage to the internal switch-mode regulator. Connecting a 470μF
capacitor to VDD_BAT limits these oscillations thus preventing damage.
WARNING:
Use good consideration for battery safety. Do not charge with too much current. Do not charge when the
temperature is above 60°C or below 0°C. WT32i is initially calibrated to stop charging when battery voltage is
at 4.2 V. Do not try to charge batteries above 4.2 V. Do not short circuit the battery or discharge below 1.5 V.
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7 GPIO and AIO Functions
7.1 iWRAP supported GPIO Functions
Various GPIO functions are supported by iWRAP. These include:
Setting each GPIO state individually
Binding certain iWRAP commands to GPIO to trigger the command at either the rising or falling edge
of the GPIO
Carrier detect signal to indicate an active Bluetooth connection
Implementing RS232 modem signals
iWRAP ready indicator to signal to a host that iWRAP is ready to use
UART bypass mode to route UART signals to GPIO pins instead of iWRAP
Driving low frequency pulsed signal from a GPIO
Some of the functions are FW dependent. Refer to latest iWRAP user manual for the detailed information
about the GPIO functions.
0x0014 1
0x0004 2
0x0013 3
0x0017 4
0x0003 6
0x0016 6.5
0x0007 8
0x0011 12
0x0006 13
0x0002 16
0x0009 24
0x0005 32
Table 14: Selectable internal clock frequencies from AIO0
iWRAP does not support this feature. To use this feature either the particular PS Keys must be set to each
module separately or then ask for custom FW from Bluegiga.
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7.3 Auxiliary ADC
Simple iWRAP command can be used to read the ADC output from either of the two AIO pins. Refer to latest
iWRAP user manual for the detailed information.
PIO6 SCL
PIO7 SDA
Table 15: I2C Interface of WT32i
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8 Serial Interfaces
8.1 UART Interface
WT32i has a standard UART serial interface that provides a simple mechanism for communicating with other
serial devices using the RS232 protocol. UART configuration parameters, such as baud rate, parity and stop
bits can be configured with an iWRAP command.
The hardware flow control is enabled by default. HW flow control can be disabled in HW by connecting
UART_NCTS to GND and leaving UART_NRTS floating.
1200 1.73%
2400 1.73%
4800 1.73%
9600 -0.82%
19200 0.45%
38400 -0.18%
57600 0.03%
76800 0.14%
115200 0.03%
230400 0.03%
460800 -0.02%
921600 0.00%
1382400 -0.01%
1843200 0.00%
2764800 0.00%
3686400 0.00%
Table 17: Standard Baud Rates
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8.1.1 Resetting Through UART Break Signal
The UART interface can reset WT32i on reception of a break signal. A break is identified by a continuous logic
low (0V) on the UART_RX terminal. If tBRK is longer than the value, defined by
PSKEY_HOSTIO_UART_RESET_TIMEOUT, a reset occurs. This feature allows a host to initialise the system
to a known state. Also, WT32i can emit a break character that may be used to wake the host.
Default PSKEY_HOSTIO_UART_RESET_TIMEOUT setting in WT32i is zero, which means that this feature is
disabled. To use this feature, either the PS setting has to be changed for each module separately or ask for
modules with custom FW with appropriate settings.
RESET
UART_TX PIO4
RXD TX
UART_RX PIO7
TXD RX
Test UART
interface
WT32i
WT12
WTxx
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8.2 USB Interface
WT32i has a full-speed (12Mbps) USB interface for communicating with other compatible digital devices. The
USB interface on WT32i acts as an USB peripheral, responding to requests from a master host controller.
WT32i can be used as bus-powered or self-powered device. See the WT_USB_Design_Guide available in the
Bluegiga techforum for details about the SW and HW configuration of the USB interface.
WT32i
VDD_IO
VDD_IO
VDD_BAT
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WT32i
VDD_IO
VDD_IO
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9 Audio Interfaces
9.1 Stereo Audio Codec Interface
Stereo audio CODEC operates from an internal 1.5V power supply. It uses fully differential architecture in
analog signal path for the best possible common mode noise rejection while effectively doubling the signal
amplitude.
The stereo audio bus standard I2S is supported and a software I2C interface can be implemented using
GPIOs to configure an external audio CODEC.
9.1.1 ADC
The ADC consists of two second-order sigma-delta converters and gain stages. The gain stage consists of
digital and analog gain stages which are controlled by iWRAP. The optimal combination of digital and analog
gain is automatically selected by iWRAP. The analog gain stage consist selectable 24 dB preamplifier for
selecting microphone or line input levels and an amplifier which can be configured in 3 dB steps. The iWRAP
gain selection values are shown in the Table 19.
Following sample rates are supported
8kHz
11.025kHz
16kHz
22.05kHz
24kHz
32kHz
44.1kHz
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Preamp ON = 24 dB gain (MIC input)
iWRAP Gain Setting
Preamp OFF = 0 dB gain (line input)
(-27...39)dB
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9.1.2 DAC
The DAC consists of two second-order sigma-delta converters and gain stages. The gain stage consists of
digital and analog gain stages which are controlled by iWRAP. The optimal combination of digital and analog
gain is automatically selected by iWRAP. The analog gain stage consist selectable 24 dB preamplifier for
selecting microphone or line input levels and an amplifier which can be configured in 3 dB steps. The iWRAP
gain selection values are shown in Table 20.
Following sample rates are supported
8kHz
11.025kHz
16kHz
22.05kHz
24kHz
32kHz
44.1kHz
48kHz
0 -42
1 -39
2 -36
3 -33
4 -30
5 -27
6 -24
7 -21
8 -18
9 -15
A -12
B -9
C -6
D -3
E 0
F 3
10 6
11 9
12 12
13 15
14 18
15 21
16 24
Table 20: DAC gain selection in iWRAP
iWRAP Example: Setting output with 0 dB gain
”SET CONTROL GAIN x E” (x is the ADC gain)
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9.1.3 Microphone Input
Figure 17 shows the recommended microphone biasing. The microphone bias, MIC_BIAS, derives its power
from the VDD_BAT and requires 1uF capacitor on its output (C1).
The input impedance at AUDIO_IN_P_LEFT and AUDIO_IN_N_LEFT is typically 6kohm and C5 and C4 are
typically 1uF. If bass roll-off is required to limit the wind noise on the microphone then C4 and C5 should be
150 nF.
R2 sets the microphone load impedance and is normally in the range of 1kΩ to 2kΩ
R1, C2 and C3 improve the supply rejection by decoupling supply noise from the microphone. Values should
be selected as required. R1 can be connected or to the MIC_BIAS output (which is ground referenced and
provides good rejection of the supply) as shown in Figure 17. MIC_BIAS is configured to provide bias only
when the microphone is required. R1 may also be connected to a convenient supply, in which case the bias
network is permanently enabled.
MIC_BIAS WT32i
C1
R1
AUDIO_IN_P_LEFT
C5
C2 R2
AUDIO_IN_N_LEFT
C4
C3
MIC
0 1.71 0.200
1 1.76 0.280
2 1.82 0.340
3 1.87 0.420
4 1.95 0.480
5 2.02 0.530
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6 2.10 0.610
7 2.18 0.670
8 2.32 0.750
9 2.43 0.810
A 2.56 0.860
B 2.69 0.950
C 2.90 1.000
D 3.08 1.090
E 3.33 1.140
F 3.57 1.230
Table 21: MIC_BIAS settings in iWRAP
WT32i
C1
Line input R1 AUDIO_IN_P_LEFT
R2
C2 AUDIO_IN_N_LEFT
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WT32i
C1
Line input P R1 AUDIO_IN_P_LEFT
R2
C2 AUDIO_IN_N_LEFT
Line input N
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WT32i
AUDIO_OUT_P_LEFT
AUDIO_OUT_N_LEFT
WT32i
AUDIO_OUT_P_LEFT C1
AUDIO_OUT_N_LEFT
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9.1.6 Mono Operation
Mono operation is a single-channel operation of the stereo codec. The left channel represents the single mono
channel for audio in and audio out. In mono operation the right channel is the auxiliary mono channel that may
be used in dual mono channel operation. Dual mono feature is FW dependent and iWRAP does not generally
support it.
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I2S CODEC
MCLK Generator
ASI
SCK
WS
WT32i
I2S_IN
I2S_OUT
2
Figure 22: I S scheme for WT32i
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Figure 23: Digital Audio Interface Modes
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DC bias f or the comparator input
3 V3
1 .0 K, 5 0 V, 0 .0 6 3 W
R1 4
1 u F/6 .3 V/X5 R/1 0 %
0 .1 5 u F/1 0 V/X5 R
1 0 K, 5 0 V, 0 .0 6 3 W
C7
C5
0 .1 5 u F/1 0 V/X5 R
R 15
1 .0 K, 5 0 V, 0 .0 6 3 W
C6
R1 3
C4
Impedance matching to 75 ohm
1 0 K, 5 0 V, 0 .0 6 3 W
4
3
6
+
V+
R1 2
SHT DN
5 SPD IF_ IN
V-
C2 -
U3
2
COMPARATOR_TLV3501AIDBVT
1 5 0 R, 5 0 V, 0 .0 6 3 W
1 5 0 R, 5 0 V, 0 .0 6 3 W
4 7 0 K, 5 0 V, 0 .0 6 3 W
1 0 0 0 0 p F/2 5 V/X7 R
R1 1
R5
R6
3 V3
D1
2
13
ESD_PROTECTION
U1-C
R1
6 5
5 6 0 R , 5 0 V, 0 .0 6 3 W
DC block 74HC14D
2
3 V3
1 U1-B U1-D
R2
J2 ESD_PROTECTION 4 3 8 9 SPD IF_ O U T
1 0 0 K, 5 0 V, 0 .0 6 3 W
RCA_RED 13 5 6 0 R , 5 0 V, 0 .0 6 3 W
74HC14D 74HC14D
D2
R1 6
2
U1-A
C1
R3
2 2 1
0 .1 5 u F/1 0 V/X5 R 5 6 0 R , 5 0 V, 0 .0 6 3 W
1 74HC14D
1 2 0 R, 5 0 V, 0 .0 6 3 W
J1
RCA_RED
R4
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10 Design Guidelines
This chapter shows briefly the most important points to consider when making a design with WT32i. Please
refer to the DKWT32i datasheet for detailed description of the development board design.
RL RL
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difference between the different capacitors is obvious at low frequencies where the impedance of the
capacitor is dominant.
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Board edge
Metal clearance
6mm area
Use good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog
signal traces. If using overlapping ground planes use stitching vias separated by max 3 mm to avoid emission
from the edges of the PCB. Connect all the GND pins directly to a solid GND plane and make sure that there
is a low impedance path for the return current following the signal and supply traces all the way from start to
the end.
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– Place MIC biasing resistors symmetrically as close to microhone as pos
– Make sure that the bias trace does not cross separated GND regions (D
AGND) so that the path for the return current is cut. If this is not possibl
not separate GND regions but keep one solid GND plane.
–A good
Keep the trace as short as possible
practice is to dedicate one of the inner layers to a solid GND plane and one of the inner layers to
supply voltage planes and traces and route all the signals on top and bottom layers of the PCB. This
arrangement will make sure that any return current follows the forward current as close as possible and any
loops are minimized.
Recommended PCB layer configuration
Signals
GND
Power
Signals
Figure 30: Use of stitching vias to avoid emissions from the edges of the PCB
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10.3 Example Application Schematics
BATTERY
1
2
MOD2
D2
can not read the calibration settings 1
and will be using the default minimum
2
current and voltage
C23
470uF/10V/20%/TAN MOD3
GENERAL_SPEAKER
120R
R1 0
2 B2
B1
SW9
C2
4
A2 1
A1
CHG _ L ED
MOD1 15pF
50
AUDIO_OUT_P_LEFT
49
AUDIO_OUT_N_LEFT
48
AGND
1
1 47 15nH
AUDIO_OUT_P_RIGHT L2
2 46 C16 1uF/X7R
GND AUDIO_OUT_N_RIGHT
3 45
GND AUDIO_IN_N_LEFT
4 44 4
GND AUDIO_IN_P_LEFT
5 43 15nH
AIO0 AGND L1
6 42 C17 1uF/X7R
AIO1 AUDIO_IN_N_RIGHT
7 41
PIO0 AUDIO_IN_P_RIGH
8 40 U6
2
3
PIO1 MIC_BIAS
9 39
PIO2 GND C15 MIC_WM7120A
10 38
PIO3 VDD_CHG 15pF True
D6
11 37 BATTERY
USB_DN VDD_BAT
3V3 12 36 CHG_LED
5 1 K, 5 0 V, 0 .0 6 3 W
USB_DP LED0
13 35
PIO9 SPI_MOSI C1
14 34
1uF
C2 7
U1 PIO10 SPI_MISO 10uF
R2 3
15 33
TPS79933 RXD SPI_CLK
16 32
TXD SPI_CS
PCM _ SYNC
1 5 17 31
PCM _ O UT
PCM _ CL K
IN OUT 3V3 GND
PCM _ IN
G ND
RESET
3 4
EN NR
PIO 8
PIO 7
PIO 6
PIO 5
PIO 4
G ND
WT32I
RTS
CTS
2
18
19
20
21
22
23
24
25
26
27
28
29
30
2 .2 u F
2 .2 u F
2
C4 9
C3 8
5V_CHARGER_INPUT
3V3 J9
100K
1
R1
MISO
2
3V3
3
CLK
1
4
MOSI
5
4 u 7 /X5 R/6 .3 V/1 0 %
CSB
6
GND
A
C1 4
D10
HS MG-C190
100K
5 1 0 R, 5 0 V, 0 .0 6 3 W, + /- 5 %
R2
2
1
R6 1
1
Figure 31: Example schematic with on/off button, silicon microphone and stereo speakers
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NOTE: Differential audio provides excellent common mode rejection and effectively douples the
amplitude. Thus it is strongly recommendable to use differential instead of single ended when ever possible
C26
2TIP
330uF/6.3V/20% /TAN/ESR<10mohm
3 RING
C28
1 SLEEVE
330uF/6.3V/20% /TAN/ESR<10mohm J2
SJ-3523-SMT-TR
5V0
2
1M, 50V, 0.1W, 5%
1
R16
WT32I 1 2
C18
1uF
U2 15 33
TPS79933 RXD SPI_CLK
16 32
TXD SPI_CS
PCM_SYNC
1 5 17 31
IN OUT 3V3 GND
PCM_OUT
PCM_CLK
PCM_IN
RESET
GND
3 4
EN NR
PIO8
PIO7
PIO6
PIO5
PIO4
GND
RT S
CT S
2
18
19
20
21
22
23
24
25
26
27
28
29
30
2.2uF
2.2uF
C13
C11
3V3 J1
1
MISO
2
3V3 Line level input can be as high as 4.37 Vpp.
3
4
CLK Voltage divider is used to drop this down to
MOSI
5
CSB
below 1 Vpp to avoid saturation of WT32 input
6
GND
D1
RESET_FROM_HOST
During boot the diode will prevent the host pulling reset low
before the internal flash has its supply voltage stabilised
Figure 32: Example schematic with single ended line input, single ended output and with on/off control from a host
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Figure 33: Example schematic for connecting external audio PA to the stereo audio output
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3V3
MOD1
WT32I
50
AUDIO_OUT_P_LEFT
49
AUDIO_OUT_N_LEFT
48
AGND
1 47
AUDIO_OUT_P_RIGHT
2 46
GND AUDIO_OUT_N_RIGHT
3 45
GND AUDIO_IN_N_LEFT
4 44
GND AUDIO_IN_P_LEFT
5 43
AIO0 AGND
6 42 3V3
AIO1 AUDIO_IN_N_RIGHT
7 41
PIO0 AUDIO_IN_P_RIGH
8 40
PIO1 M IC_BIAS
9 39
PIO2 GND
3V3 10 38
PIO3 VDD_CHG
11 37
USB_DN VDD_BAT
12 36
USB_DP LED0
13 35
PIO9 SPI_MOSI
14 34 3V3
PIO10 SPI_MISO
PC M_SYN C
TXD SPI_CS
PC M_O U T
17 31
PC M_C LK
3V3 GND J7
PC M_IN
R 37
1
R ESET
GN D
2
PIO 8
PIO 7
PIO 6
PIO 5
PIO 4
R TS
C TS
5 1
VDD RST 3
4
18
19
20
21
22
23
24
25
26
27
28
29
30
2 5
VSS
6
4 3
MR RST
Debug header
U1 0 PIO7/I2C_SDA
M CP1 3 1 9
PIO6/I2C_SCL
2 B2
B1
I2S_SDIN
3
I2S_SDOUT
3V3 I2S_WS
SW1
I2S_SCK
4
A2 1
A1
R38
R40
31
8
4
BCL K
WCL K
RESET
SCL
SDA
MCL K
DIN
DOUT
0.1uF/10V/X5R /10%
1uF/6.3V/X5R /10%
25
10uF/6.3V/X5R /10%
0.1uF/10V/X5R /10%
1uF/6.3V/X5R /10%
15 AVDD_ DAC
M ICBIAS 18
0.1uF/10V/X5R /10%
1uF/6.3V/X5R /10%
DRVDD
24
C 31
C 32
DRVDD
C 28
C 29
C 30
C 25
C 26
10
M IC1 L /L INE1 L
2
12
M IC2 L /L INE2 L
7
0.1uF/10V/X5R /10%
1uF/6.3V/X5R /10%
IOVDD
1 13
M IC2 R/L INE2 R
0.1uF/10V/X5R /10%
1uF/6.3V/X5R /10%
U1 8 32
C36 DVDD
C 23
C 24
1M , 50V, 0.1W, 5%
RCA_ WHITE 2 1
14
C 21
C 22
M IC3 L /L INE3 L
R46 1uF/16V/20% 16
M IC3 R/L INE3 R
C35 6
DVSS
17
AVSS_ ADC
26
1uF/16V/20% 11 AVSS_ DAC
M IC1 R/L INE1 R 21
DRVSS
2
33
RIGHT_ L OM
GND
RIGHT_ L OP
L EFT_ L OM
L EFT_ L OP
34
GND
HPL COM
HPRCOM
HPROUT
HPL OUT
35
1 GND
36
1M , 50V, 0.1W, 5% GND
U1 5 2 2 1
1 OUT IN
U9
GND
1uF/6.3V/X5R /10%
RCA_ RED 23
19
20
22
29
30
27
28
1uF/6.3V/X5R /10%
R49
TL V3 2 0 AIC3 2
U8
3
C 42
C 43
AP7 3 1 3
0.1uF/10V/X5R /10%
2
C 54
1
1M, 50V, 0.1W, 5%
U1 1
R 65
RCA_ RED
R 67
NP
C33
330uF/6.3V/20%/TAN/ESR<10m ohm
C34
2
330uF/6.3V/20%/TAN/ESR<10mohm
1
R 66
NP
1M, 50V, 0.1W, 5%
U1 2
RCA_ WHITE
R 64
0.1uF/10V/X5R /10%
C 53
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11 Physical Dimensions
23.9 (+/-0.2) mm
Model: WT32i-A
9.15 mm
15.9 (+/-0.2) mm
15.0 (+/-0.1) mm
FCC ID: QOQWT32I
IC: 5123A-BGTWT32I
KCC-CRM-BGT-WT32I
3.35 mm
Ant
R
3.8 mm
209-JXXXXX
2.4 (+/-0.15) mm
23.9 (+/-0.2) mm
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Figure 36: Pin dimensions of WT32i, top view
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12 Soldering Recommendations
WT32i is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is
dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and
particular type of solder paste used. Consult the datasheet of particular solder paste for profile configurations.
Bluegiga Technologies will give following recommendations for soldering the module to ensure reliable solder
joint and operation of the module after soldering. Since the profile used is process and layout dependent, the
optimum profile should be studied case by case. Thus following recommendation should be taken as a
starting point guide.
- Reliability of the solder joint and self-alignment of the component are dependent on the solder volume.
Minimum of 150m stencil thickness is recommended.
- Aperture size of the stencil should be 1:1 with the pad size.
- A low residue, “no clean” solder paste should be used due to low mounted height of the component.
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13 Package
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Figure 40: Reel dimensions
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14 Certification Guidance for an End Product Using WT32i
14.1 Bluetooth End Product Listing
The Bluetooth SIG requires for every commercially available product implementing Bluetooth technology to be
listed on the Bluetooth SIG End Product Listing (EPL).
For the details on how to make the end product listing, please refer to the Bluetooth End Product Listing Guide
available in www.bluegiga.com.
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Note: Because all the radiated emissions must be tested with the end product in any case and because the
end product manufacturer is fully responsible for the compliance of the end product, any antenna can be
selected for WT32i-E, not just the antenna type that Bluegiga has used in the CE approvals.
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14.3.1 Co-location with Other Transmitters
Co-location means co-transmission, not physical co-location. The radios are not considered to be in colocation
when the physical separation is more than 20 cm or if the transmissions overlap less than 30 seconds.
When two or more radios are in co-location human exposure must be evaluated as the sum of TX powers
from all the radios transmitting simultaneously. The FCC grant of WT32i does not allow co-location so it will
require authorization through C2PC, Change of ID or a new certification.
15 WT32i Certifications
15.1 Bluetooth
WT32i is qualified as a Bluetooth 3.0 Controller Subsystem with QDID 49552. By combining with a
prequalified Host Subsystem WT32i will make a complete Bluetooth end product without any further testing.
Listing an end product will require purchasing a declaration ID from Bluetooth SIG. Declaration ID is required
only for certain combination of QDID’s and it is only needed to pay once. After receiving the declaration ID,
multiple products can be listed with the same combination of QDID’s under the same declaration ID. If one of
the QDID’s under the Declaration ID is changed, then new declaration ID will be required.
15.2 CE
WT32i is in conformity with the essential requirements and other relevant requirements of the R&TTE
Directive (1999/5/EC). The product is conformity with the following standards and/or normative documents.
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Safety EN60950-1:2006+A11:2009+A1:2010+A12:2011
15.3 FCC
WT32i complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
(2) this device must accept any interference received, including interference that may
cause undesired operation.
Any changes or modifications not expressly approved by Bluegiga Technologies could void the
user’s authority to operate the equipment.
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End
users must follow the specific operating instructions for satisfying RF exposure compliance. This transmitter
meets both portable and mobile limits as demonstrated in the RF Exposure Analysis. This transmitter must not
be co-located or operating in conjunction with any other antenna or transmitter except in accordance with FCC
multi-transmitter product procedures.
IMPORTANT NOTE: In the event that these conditions can not be met (for certain configurations or co-
location with another transmitter), then the FCC and Industry Canada authorizations are no longer considered
valid and the FCC ID and IC Certification Number can not be used on the final product. In these
circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the
transmitter) and obtaining a separate FCC and Industry Canada authorization.
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“Contains Transmitter Module FCC ID: QOQWT32I”
or
“Contains FCC ID: QOQWT32I”
The OEM integrator has to be aware not to provide information to the end user regarding how to install or
remove this RF module or change RF related parameters in the user manual of the end product
15.4 IC
IC Statements:
WT32i complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following
two conditions: (1) this device may not cause interference, and (2) this device must accept any interference,
including interference that may cause undesired operation of the device.
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and
maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio
interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically
radiated power (e.i.r.p.) is not more than that necessary for successful communication.
The OEM integrator has to be aware not to provide information to the end user regarding how to install or
remove this RF module or change RF related parameters in the user manual of the end product
15.4.1 IC
Déclaration d’IC :
Ce dispositif est conforme aux normes RSS exemptes de licence d’Industrie Canada. Son fonctionnement est
assujetti aux deux conditions suivantes : (1) ce dispositif ne doit pas provoquer de perturbation et (2) ce
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dispositif doit accepter toute perturbation, y compris les perturbations qui peuvent entraîner un fonctionnement
non désiré du dispositif.
Selon les réglementations d’Industrie Canada, cet émetteur radio ne doit fonctionner qu’avec une antenne
d’une typologie spécifique et d’un gain maximum (ou inférieur) approuvé pour l’émetteur par Industrie
Canada. Pour réduire les éventuelles perturbations radioélectriques nuisibles à d’autres utilisateurs, le type
d’antenne et son gain doivent être choisis de manière à ce que la puissance isotrope rayonnée équivalente
(P.I.R.E.) n’excède pas les valeurs nécessaires pour obtenir une communication convenable.
Dans le guide d’utilisation du produit final, l’intégrateur OEM doit s’abstenir de fournir des informations à
l’utilisateur final portant sur les procédures à suivre pour installer ou retirer ce module RF ou pour changer les
paramètres RF.
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16 Contact Information
Sales: sales@bluegiga.com
Orders: orders@bluegiga.com
WWW: www.bluegiga.com
www.bluegiga.hk
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Mouser Electronics
Authorized Distributor
Bluegiga Technologies:
WT32i-A-AI6 WT32i-A-AI6-aptX WT32i-E-AI6 DKWT32i-A WT32i-A-AI6IAP WT32i-E-AI6IAP WT32i-E-AI6-aptX