Computer Organization

UNIT-I
Basic Computer Organization: Functions of CPU, I/O Units, Memory: Instruction:
Instruction Formats-One address, two addresses, zero addresses and three
addresses and comparison; addressing modes with numeric examples: Program
Control- Status bit conditions, conditional branch instructions, Program
Interrupts: Types of Interrupts.
UNIT-II
Input-Output Organizations: I/O Interface, I/O Bus and Interface modules: I/O Vs
Memory Bus, Isolated
Vs Memory-Mapped I/O, Asynchronous data Transfer- Strobe Control, Hand
Shaking: Asynchronous Serial
transfer- Asynchronous Communication interface, Modes of transfer Programmed
I/O, Interrupt Initiated
I/O,DMA; DMA Controller, DMA Transfer, IOP-CPU-IOP Communication, Intel
8089 IOP.
UNIT-III
Memory Organizations: Memory hierarchy, Main Memory, RAM, ROM Chips,
Memory Address Map,
Memory Connection to CPU, associate memory, Cache Memory, Data Cache,
Instruction cache, Miss and
Hit ratio, Access time, associative, set associative, mapping, waiting into cache,
Introduction to virtual
memory.
UNIT-IV
8086 CPU Pin Diagram: Special functions of general purpose registers, Segment
register, concept of
pipelining, 8086 Flag register, Addressing modes of 8086.
UNIT-V
8086-Instruction formats: assembly Language Programs involving branch & Call
instructions, sorting,
evaluation of arithmetic expressions.
Suggested Readings:
1. Computer system Architecture: Morris Mano (UNIT-1,2,3).
2. Advanced Micro Processor and Peripherals- Hall/ A K Ray(UNIT-4,5).

UNIT-I
Basic Computer Organization: Functions of CPU, I/O Units, Memory: Instruction:
Instruction Formats-One address, two addresses, zero addresses and three
addresses and comparison; addressing modes with numeric examples: Program
Control- Status bit conditions, conditional branch instructions, Program
Interrupts: Types of Interrupts.
UNIT I
Two Marks
1. What are the Major components of CPU.
The two typical components of a CPU include the following:
 The arithmetic logic unit (ALU), which performs arithmetic and logical
operations.
 The control unit (CU), which extracts instructions from memory and
decodes and executes them, calling on the ALU when necessary
 Registers: Stores the data
2. What is the function of ALU?
Most of the computer operations(arithmetic and logic) are performed in ALU.The
data required for the operation is brought by the processor and the operation is
performed by the ALU.
3. What is the function of CU?
The control unit acts as the nerve center, that coordinates all the computer
operations. It issues timing signals that governs the data transfer.
4. What are basic operations of a computer?
The basic operations are READ and WRITE.
5 Explain what you understand by registers, briefly explain the various types
of registers. – CPU
Answer:
A register is a temporary storage area built into a CPU.
The registers generally contained in the processor/CPU
Instruction Register (IR): The instruction register holds the instruction currently
being executed.
Memory Data Register (MDR): The memory data register (also known as
the memory buffer register or data buffer) holds the piece of data that has been
fetched from memory.
Memory Address Register (MAR): The memory address register holds the
address of the next piece of memory to be fetched.
Program Counter (PC): The program counter holds the location of the next
instruction to be fetched from memory. It is automatically incremented between
supplying the address of the next instruction and the instruction being executed.
Accumulator: The accumulator is an internal CPU register used as the default
location to store any calculations performed by the arithmetic and logic unit.

6. What are the registers generally contained in the processor/CPU?

MAR-Memory Address Register
MDR-Memory Data Register
IR-Instruction Register
R0-Rn-General purpose Registers
PC-Program Counter

7. Write the binary control word for the subtract micro-operation ?

Control Word Format

Subtract Microoperation:
8. What are the steps in executing a program?
1.Fetch 2.Decode 3.Execute 4.Store
9. Distinguish between RISC and CISC instruction set computer

10. Define Bus?

A group of lines that serves as a connecting path for several devices is called a
bus.
11. What is the use of buffer register?
The buffer register is used to avoid speed mismatch between the I/O device and
the processor.
12. What is Stack Organization? Define Register Stack and Memory stack
13. What is big endian and little endian format?
The name big endian is used when lower byte addresses are used for the more
Significant of the word. The name little endian is used for the less significant bytes
of the word.
14. List the types of CPU Organization?
 Single Accumulator organization Ex: ADD X , AC<--AC+M[X]
  General Register organization Ex: ADD R1,R2,R3 R1,--R2+R3
 Stack organization Ex PUSH X
14. Define Status register
15. What is a branch instruction?

Branch instruction is a type of instruction which loads a new value into the program counter.

16. What is branch target?

As a result of branch instructions , the processor fetches and executes the instruction at a new address
called branch target, instead of the instruction at the location that follows the branch instruction in
sequential address order.

17. Define addressing mode.

The different ways in which the location of an operand is specified in an instruction are referred to as
addressing modes.

18.Define various addressing modes.

The various addressing modes are 1.Absolute addressing mode 2.Register addressing mode 3.Indirect
addressing mode 4.Index addressing mode 5.Immediate addressing mode 6.Relative addressing mode
7.Autoincrement addressing mode 8.Autodecrement addressing mode

19 Define subroutine, Write the subroutine call and return micro-operations

subroutine is a sequence of program instructions that performs a specific task, packaged as a unit.
This unit can then be used in programs wherever that particular task should be performed.

A subroutine call is implemented with following microoperations

A subroutine return is implemented with following microoperations

20.Define Program Interrupt?

Program interrupt refers to transfer of program control from a currently running program to another
service program as a result of an external or internal request.

21.List the types of interrupt?

  External interrupt come from input-output (I/O) devices.
 Internal interrupt arise from illegal or erroneous use of an instruction
 External and internal interrupt are initiated from signals that occur in
hardware of CPU
 Software interrupt initiated by executing an instruction
Part-B
1. Explain in Detail about General Register Organization. Write the control
word for various Micro-operations for the CPU. (Morris Mano (pp243-
pp247))
2. Design an arithmetic circuit with one selection variable S and two n-bit data
inputs A & B. The circuit generates the following four arithmetic operations
in conjunction with the input carry Cin. Draw the logic diagram for the first
two stages.
3. What is stack organization? Explain the functioning of register stack and
memory stack with suitable example (Morris Mano (pp247-pp251))
4. Write a program that can evaluate the expression: (A*B)+(C*D) in a single
accumulator processor
5. What is an instruction Format? Explain different types of instruction
formats in detail. (Morris Mano (pp258-pp259))
Or
Write a program to evaluate the arithmetic statement Y=(A+B)*(C+D) using
three-address,two-address,one-address and zero-address instructions
(Morris Mano (pp28-pp259))
6. Describe about the different types of addressing modes used in system
processor with suitable Numerical examples? (Morris Mano (pp260-pp264))
7. Explain shift and rotate instructions with example
UNIT-II
Input-Output Organizations: I/O Interface, I/O Bus and Interface modules: I/O Vs
Memory Bus, Isolated Vs Memory-Mapped I/O, Asynchronous data Transfer-
Strobe Control, Hand Shaking: Asynchronous Serial transfer- Asynchronous
Communication interface, Modes of transfer Programmed I/O, Interrupt Initiated
I/O,DMA; DMA Controller, DMA Transfer, IOP-CPU-IOP Communication, Intel
8089 IOP.
Part-A
1. What is the need of I/O interface module?
or
What is I/O Interface and its functions.
Ans :Input Output Interface provides a method for transferring information between internal storage
and external I/O devices.

The need of I/O interface module is to resolve the differences that exist between the central
computer and each peripheral.

The Major Differences are:-

1. Peripherals are electromechnical and electromagnetic devices and CPU and memory are electronic
devices. Therefore, a conversion of signal values may be needed.

2. The data transfer rate of peripherals is usually slower than the transfer rate of CPU and consequently,
a synchronization mechanism may be needed.

3. Data codes and formats in the peripherals differ from the word format in the CPU and memory.

4. The operating modes of peripherals are different from each other and must be controlled so as not to
disturb the operation of other peripherals connected to the CPU.

To Resolve these differences, computer systems include special hardware components between the CPU
and Peripherals to supervises and synchronizes all input and out transfers  These components are
called Interface Units

2. Differentiate between I/O Bus and Memory Bus

I/O Bus and Memory Bus

Functions of Buses
1. MEMORY BUS is for information transfers between CPU and the MM
2. I/O BUS is for information transfers between CPU and I/O devices through their I/O interface
 3 ways to bus can communicate with memory and I/O :
(1). use two separate buses, one to communicate with memory and theother with I/O
interfaces- Computer has independent set of data, address and control bus one foraccessing
memory and another I/O.- done in computers that have separate IOP other than CPU.
(2). Use one common bus for memory and I/O but separate control linesfor each
(3). Use one common bus for memory and I/O with common controllines for both

3. Differentiate between Memory Mapped I/O and Isolated I/O.

ISOLATED I/O MEMORY MAPPED I/O

Memory and I/O have separate address

space Both have same address space

Due to addition of I/O addressable

All address can be used by the memory memory become less for memory

Separate instruction control read and write Same instructions can control both I/O

operation in I/O and Memory and Memory

In this I/O address are called ports. Normal memory address are for both

More efficient due to separate buses Lesser efficient

Larger in size due to more buses Smaller in size

It is complex due to separate separate Simpler logic is used as I/O is also

logic is used to control both. treated as memory only.

4.Define Asynchronous data transfer?

Asynchronous data transfer between two independent units requires that control signals be transmitted
between the communicating units to indicate the time at which data is being transmitted.

One way of achieving this is by means of a strobe Pulse, another way is Handshaking

5. What is Strobe signal and Handshaking signal?

strobe pulse is a control signal supplied by one of the source units to indicate to the other destination
unit when the transfer has to occur.
Another method commonly used is to accompany each data item being transferred with a control signal
that indicates the presence of data in the bus. The unit receiving the data item responds with another
control signal to acknowledge receipt of the data. This type of agreement between two independent
units is referred to as handshaking.

3. Differentiate between Synchronous and Asynchronous data transfer.

S.N

O SYNCHRONOUS TRANSMISSION ASYNCHRONOUS TRANSMISSION

In Synchronous transmission, Data is In asynchronous transmission, Data is sent in form of

1. sent in form of blocks or frames. byte or character.

2. Synchronous transmission is fast. Asynchronous transmission is slow.

3. Synchronous transmission is costly. Asynchronous transmission economical.

In Synchronous transmission, time In asynchronous transmission, time interval of

4. interval of transmission is constant. transmission is not constant, it is random.

In Synchronous transmission, There is In asynchronous transmission, There is present gap

5. no gap present between data. between data.

Efficient use of transmission line is While in asynchronous transmission, transmission line

6. done in synchronous transmission. remains empty during gap in character transmission.

7. Synchronous transmission needs Asynchronous transmission have no need of

 precisely synchronized clocks for the synchronized clocks as parity bit is used in this

information of new bytes. transmission for information of new bytes.

4. Explain how to access I/O devices in a system

Data transfer between the central computer to I/O devices may be handled
in variety of modes.
–Programmed I/O
–Interrupt Initiated I/O
–Direct Memory Access (DMA)
5.Differentiate between Programmed I/O and Interrupt driven I/O

6.What is DMA? Write its Advantages?

Direct Memory Access (DMA) transfers the block of data between the memory
and peripheral devices of the system, without the participation of the processor.
The unit that controls the activity of accessing memory directly is called a DMA
controller.
Advantages:
  Transferring the data without the involvement of the processor will speed
up the read-write task.
 DMA reduces the clock cycle requires to read or write a block of data.
 Implementing DMA also reduces the overhead of the processor.
7. Define Cycle Stealing?
In this method, system allows DMA controller to use system bus to transfer one
word, after which it should return back control of bus to CPU.
8. What is priority interrupt?
Priority interrupt is a system that establishes a priority over the various sources to
determine which condition is to be serviced first when two or more requests
arrive simultaneously.
9.What is Polling?
A polling procedure is used to identify the highest-priority sources by software
means.
10. What is interrupt? Give the steps for handling interrupt?
11. Define vectored interrupt
12. List various types of input/output peripheral devices.
13. What is Bus Arbitration ?
Bus Arbitration refers to the process by which the current bus master accesses and then
leaves the control of the bus and passes it to the another bus requesting processor unit

14.Difference between Subroutine and Interrrupt service routine

Part-B
1. What is the need of an I/O Interface unit and give an Example of an I/O
Interface unit (Morris Mano-pp 389-391)
2. What are handshaking signals. Explain the handshake control of data
transfer during input and output operation
3. What is Asynchronous serial transfer and explain in detail Asynchronous
communication interface or Universal asynchronous receiver-
transmitter(UART) (Morris Mano-pp 398-399)
4. What are priority interrupts ? Explain any one priority interrupt scheme.
(Daisy Chaining or parallel priority interrupt)
(Or)
Explain how simultaneous interrupt request from several I/O devices can be
handled by processor through single INTR line
(or)
Explain the following methods of handling interrupts from multiple devices
i) parallel priority interrupt ii) Daisy Chaining method

5. What is bus arbitration? Explain in detail any one approach of bus

arbitration. (Daisy Chaining)
Bus Arbitration  refers to the process by which the current bus master accesses and then
leaves the control of the bus and passes it to the another bus requesting processor unit.

The most popular BUS Arbitration methods is Daisy Chaining method .

6. Explain in detail, the different modes of data transfer between the
processor/memory and I/O devices in computer system
Or
 Illustrate the different modes of data transfer in I/O systems.
Or
Explain the various data transfer methods.
7. Explain in detail with flowchart sequence of operation between CPU-IOP
Communication
8. Discuss the functions of 8089 I/O Processor
9. What is DMA? Explain how the DMA Controllers are used in computer
system
UNIT-III
Memory Organizations: Memory hierarchy, Main Memory, RAM, ROM Chips,
Memory Address Map, Memory Connection to CPU, associate memory, Cache
Memory, Data Cache, Instruction cache, Miss and Hit ratio, Access time,
associative, set associative, mapping, waiting into cache, Introduction to virtual
memory.
Part-A
1. Explain the memory hierarchy with respect to speed, size and cost with a
neat diagram
The memory in a computer can be divided into five hierarchies based on
the speed as well as use. The processor can move from one level to another
based on its requirements. The five hierarchies in the memory are registers,
cache, main memory, magnetic discs, and magnetic tapes.

2. Draw the memory hierarchy in computer system?

3. Define Main Memory?
Memory unit that communicates directly with the CPU is called the main
memory. The main memory is the central storage unit in a computer
system. It is a relatively large and fast memory used to store programs and
data during the computer operation.
4. Define Auxiliary memory?
Devices that provide backup storage are called Auxiliary memory
Eg: Magnetic Tape, Magnetic disk.
5. Define Cache Memory?
A special very high speed memory called a cache is used to increase the
speed of processing by making current programs and data availible to the
CPU at a rapid rate
6. Define RAM.Draw the block diagram for RAM Chip?
Random access memory, a type of computer memory that can be accessed
randomly; that is, any byte of memory can be accessed without touching
the preceding bytes.

7. Define ROM.Draw the block diagram of ROM Chip?

ROM is an acronym for Read-Only Memory. It refers to computer memory
chips containing permanent or semi-permanent data. Unlike RAM, ROM is
 non-volatile; even after you turn off your computer, the contents of ROM
will remain.

8. Differentiate between ROM and RAM

9. Differentiate between SRAM & DRAM

10.

11.
12.

13.Define
i)Memory Latency:
In computing, memory latency is the time (the latency) between initiating a
request for a byte or word in memory until it is retrieved by a processor.
ii)Memory Bandwidth :
Memory bandwidth is the rate at which data can be read from or stored into a
semiconductor memory by a processor.
iii)Hit Rate
A cache hit ratio is calculated by dividing the number of cache hits by the total
number of cache hits and misses, and it measures how effective a cache is at
fulfilling requests for content.

iv)Miss Rate
  miss rate = 1 - hit rate

v)Average memory access time: Effective memory access time = (hit rate * cache
access time) + (miss rate * access time for cache miss)
vi)Miss-penality: Miss Penalty refers to the extra time required to bring the data into cache
from the Main memory whenever there is a “miss” in cache .

14.Write Cache Write Strategies

Two basic Cache write strategies:
• write-through: writes always update both cache and memory. So that processor does not
have to wait for memory write to finish, we include a write buffer (which holds information on
store instructions which have not yet been written to main memory)
• write-back: writes only update the block in the cache; when the block is replaced in the
cache, the modified words are written back to main memory. This is more complex but reduces
the main memory traffic, since a program may modify a memory word several times while it is
in the cache.

15. What is Virtual memory? Why it is significant?

Virtual memory is used to give programmers the illusion that they have a very large memory
even though the computer has a small main memory. It makes the task of programming easier
because the programmer no longer needs to worry about the amount of physical memory
available.

16. What is the role of TLB (Translation Look aside Buffer) in virtual address
translation?
Translation Lookaside Buffer (TLB) is nothing but a special cache used to keep track of recently
used transactions. TLB contains page table entries that have been most recently used. 

Part-B

1. With the diagram of basic SRAM and DRAM chip ,explain the read and write
operation on each of them
 2.

3. Describe in detail about associative memory.Explain the Match logic in

detail
4. Describe different types of cache mapping techniques with diagram
(Or)
What is a mapping function? What are the ways the cache can be mapped?
Explain in detail.
5. What is virtual memory? With a diagram explain how virtual memory
address is translated
(or)
With neat diagram, Explain address translation in virtual memory
Or
What is Virtual memory? Explain virtual memory organization.
Or
Explain with a diagram how virtual memory address is translated to physical
address using page table