VonNeumannarchit

ect
urewas
fi
rst
 publ
i
shedby
 JohnvonNeumann
i
n1945.
Hiscomputer
 archi
tectur
edesi gn
consi
sts 
ofa 
Cont r
olUnit,
 Ar
it
hmet ic
andLogicUni
t (ALU),Memor y
Unit
, 
Regi
ster
s andInputs/Outputs.
VonNeumannar chitectur
eisbased
onthe st
or ed-
program comput er
concept,whereinstructiondataand
progr
am dat aarest oredinthesame
memor y. Thisdesigni ssti
ll
usedin
most comput er
spr oducedt oday.
therepor tdescribedthef irststored-
program comput er.Earl
iercomput er
s,
suchast heENI AC, werehar d-wi r
ed
todoonet ask.Ifthecomput erhadt o
perform adi ff
erenttask,ithadt obe
rewired,whi chwasat ediouspr ocess.
Withast ored-program comput er,a
gener al
pur posecomput ercoul dbe
buil
tt orundi f
ferentprogr ams
.

Cent
ralPr
ocessi
ngUni
t(CPU)
The 
CentralPr
ocessingUnit
 (
CPU)
i
stheelectr
onicci
rcuitr
esponsi
ble
 forexecuti
ngtheinst
ruct
ionsofa
comput erpr
ogram.
I
tissometimesrefer
redtoasthe
micr
oprocessororpr
ocessor
.
TheCPUcontai
nstheALU,
CUand
avar
iet
yof
 regi
ster
s
Regi
ster
s
Register
sarehighspeedstorage
ar
easi ntheCPU. Alldat
amustbe
st
or edina 
regi
ster
 befor
eitcanbe
processed.

Holdsthe
Memor y memor ylocat
ion
MARAddr
ess ofdatathat
Regi
ster needstobe
accessed
 Holdsdata 
that
Memor yDat
aisbeing
MDR
Regi
ster t
ransfer
redtoor
f
rom memor y

Wher e
i
ntermediate
AC Accumul
ator ar
ithmeti
cand
l
ogicresult
sare
st
or ed

Containsthe
Progr
am addressofthe
PC
Counter nextinst
ruct
ion
tobeexecuted

CI
R Cur
rent Cont
ainst
he
 current
I
nstr
ucti
on i
nstructi
on
Regi
ster duri
ng
processi
ng
Ar
it
hmet
icandLogi
cUni
t(ALU)
TheALUal l
owsar it
hmeti
c(add,
subt
ractetc)andlogic(
AND,OR,
NOTet c)operat
ionstobecarr
iedout
Cont
rolUni
t(CU)
Thecont rolunitcontrolsthe
operati
onoft hecomput er’sALU,
memor yandi nput/
out putdevices,
tel
li
ngthem howt or espondt othe
program instruct
ionsithasj ustread
andinterpretedfrom thememor yuni
t.
Thecont
rol
uni
t 
alsopr
ovi
dest
he
ti
mingandcontr
olsi
gnal
srequi
redby
othercomput
ercomponent
s.
Buses
Buses 
arethemeansbywhi ch dat
ais
tr
ansmitt
edf r
om onepartofa
computertoanother
,connecti
ngall
majori
nternalcomponentstothe
CPUandmemor y
.
AstandardCPUsystem bus 
is
compri
sedofa cont
rolbus,
 dat
a
bus 
and addr
essbus.

Car
riesthe 
addressesof
Addressdat
a( butnott
hedat a)
Bus betweent heprocessorand
memor y

Dat
a Car
ri
es 
dat
abet
weent
he
 processor
,thememor yuni
t
Bus andt hei
nput/out
put
devices

Carri
escont r
ol
signal
s/ commandsf rom
theCPU( andst at
us
Cont
rol
signal
sf rom otherdev i
ces)
Bus
inorder to 
controland
coordinate al
ltheactivi
ti
es
withi
nt hecomput er

Memor
yUni
t
Thememor yunitconsist
sof RAM,
somet i
mesr eferr
edtoaspr i
maryor
mai nmemor y. Unl
ikeaharddrive
(secondar
ymemor y)
,thi
smemor yis
fastandalsodi r
ectl
yaccessibl
eby
t
heCPU.
RAM i
sspl
iti
nto 
part
it
ions. 
Each
par
ti
ti
onconsi
stsofanaddressand
i
tscont
ent
s(bothin 
binar
y f
orm).
Theaddresswi
lluniquel
yident
if
y
ever
ylocati
oni
nt hememor y.
Loadingdatafrom permanent
memor y(harddrive)
,int
ot hef
aster
anddirect
lyaccessibl
et emporar
y
memor y(RAM) ,al
lowstheCPU  t
o
operatemuchqui cker.