Sm-A107f SVC Schematic

5 4 3 2 1
Revision History
D REV DATE DESCRIPTION D

A1 20181203 Refer to MTK DVT1.1 Reference design
A1 20181205 Change from K4 Sch 1. Change PA from 87318 to 87319 2.Change Charger IC from SM5414 to ETA6793
3.Change P-L sensor from STK3331 to Spring board STK3332 4. Delete LCM I2C switch 5. Delete USB switch
6.Delete KEY Pressed force download circuit 7.Change CAM I2C connection 8.Change BAT CONN
C C
B B
A A
Title REV: V10
00_History
DOCUMENT NO.: S96116-1-13_MB_20190409-1317 Size A2
DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI
Date: Monday, April 08, 2019 Sheet 1 of 53

5 4 3 2 1
U101E
[8] DVDD_MODEM
MT6762-SBS DVDD_CORE [2,3,8]
[8] DVDD_MODEM_6357_FB
MODEM GPU
[8] DVDD_MODEM_6357_GND
R9 K20 C105 22uF;20%;6.3V;0603
T10 DVDD_VDD_MODEM1 DVDD_MFGSYS1 L19
U9 DVDD_VDD_MODEM2 DVDD_MFGSYS2 L20
SH101 SH102 U13 DVDD_VDD_MODEM3 DVDD_MFGSYS3 M20 C107 1.0UF;20%;6.3V;0201
V10 DVDD_VDD_MODEM4 DVDD_MFGSYS4 N19
V13 DVDD_VDD_MODEM5 DVDD_MFGSYS5 N20
W9 DVDD_VDD_MODEM6 DVDD_MFGSYS6 P20 C109 1.0UF;20%;6.3V;0201
W10 DVDD_VDD_MODEM7 DVDD_MFGSYS7 T20
C101 22uF;20%;6.3V;0603 W8 DVDD_VDD_MODEM8 DVDD_MFGSYS8 T21
D D
Y8 DVDD_VDD_MODEM9 DVDD_MFGSYS9 C111 1.0UF;20%;6.3V;0201
C108 22uF;20%;6.3V;0603 DVDD_VDD_MODEM10
C113 1.0UF;20%;6.3V;0201 C112 1.0UF;20%;6.3V;0201
C115 1.0UF;20%;6.3V;0201
C116 1.0UF;20%;6.3V;0201
C102 1.0UF;20%;6.3V;0201
GND
DVDD_DVFS [8]
CPU
GND
DVDD_DVFS_6357_FB [8]
U16
DVDD_DVFS1 DVDD_DVFS_6357_GND [8]
U18
DVDD_DVFS2 U20
DVDD_DVFS3 U22 SH103 SH104
DVDD_DVFS4 Y16
DVDD_DVFS5 Y18
DVDD_DVFS6 Y20
DVDD_DVFS7 Y21
DVDD_DVFS8 Y22
DVDD_DVFS9 AA16 C117 22uF;20%;6.3V;0603
[2,9] VSRAM_OTHERS_PMU DVDD_DVFS10 AA18
DVDD_DVFS11 AA20
DVDD_DVFS12 AA21 C118 22uF;20%;6.3V;0603
SRAM DVDD_DVFS13 AA22
DVDD_DVFS14 AB16
DVDD_DVFS15 AB18 C121 1.0UF;20%;6.3V;0201
C120 0.47UF;20%;6.3V;0201 DVDD_DVFS16
R19 C123 1.0UF;20%;6.3V;0201

DVDD_MFG_SRAM
C124 1.0UF;20%;6.3V;0201
C C
[2,9] VSRAM_OTHERS_PMU C125 1.0UF;20%;6.3V;0201

GND
L13
C127 0.47UF;20%;6.3V;0201 V12 DVDD_TOP_SRAM1
DVDD_TOP_SRAM2
C130 2.2uF;20%;6.3V;0402
C129 0.47UF;20%;6.3V;0201
C131 2.2uF;20%;6.3V;0402
GND [9] DVDD_SRAM_DVFS
C134 1.0UF;20%;6.3V;0201 V15 GND

DVDD_MCUSYS_SRAM
GND
CORE DVDD_CORE [2,3,8]
SH105
DVDD_CORE_6357_FB [8]
DVDD_CORE_6357_GND [8]
SH106
J21
DVDD_TOP1 K10
DVDD_TOP2 K13 C166 22uF;20%;6.3V;0603 Changed from 22uf 0603
DVDD_TOP3 K14
DVDD_TOP4 K17
DVDD_TOP5 L17
DVDD_TOP6 M10 C136 22uF;20%;6.3V;0603
DVDD_TOP7 M14
DVDD_TOP8 M18 C138 1.0UF;20%;6.3V;0201
B DVDD_TOP9 N13 B
DVDD_TOP10 N17 C139 1.0UF;20%;6.3V;0201
DVDD_TOP11 P10
DVDD_TOP12 P13 C140 1.0UF;20%;6.3V;0201
[9,16] VDRAM_PMU DVDD_TOP13 P14
DVDD_TOP14 P18 C142 1.0UF;20%;6.3V;0201
VDDQ DVDD_TOP15 P23
DVDD_TOP16 R13 C144 1.0UF;20%;6.3V;0201
DVDD_TOP17 R17
DVDD_TOP18 T18 C146 1.0UF;20%;6.3V;0201
DVDD_TOP19
C148 1.0UF;20%;6.3V;0201
C141 0.1uF;20%;6.3V;0201 H11
H12 AVDDQ_EMI0_1 C149 1.0UF;20%;6.3V;0201
C143 0.1uF;20%;6.3V;0201 AVDDQ_EMI0_2
H18 C151 1.0UF;20%;6.3V;0201
C145 0.1uF;20%;6.3V;0201 H19 AVDDQ_EMI1_1
AVDDQ_EMI1_2 C152 1.0UF;20%;6.3V;0201
C147 0.1uF;20%;6.3V;0201
Changed from 10uf 0603
C150 2.2uF;20%;6.3V;0402
H10
C153 4.7uF;20%;6.3V;0402 H13 AVDD2_EMI1
H17 AVDD2_EMI2
C155 10uF;20%;6.3V;0402 H20 AVDD2_EMI3 GND
AVDD2_EMI4
GND
MT6762V/W B
A A
Title REV: V10

01_BB_ POWER_PDN
DOCUMENT NO.: Design Name Size A2

5 4 3 2 1
5 4 3 2 1
U101F VA12_PMU [3,15]

C201
MT6762-SBS 0.1uF;20%;6.3V;0201
GND AVDD & MD_A
GND
AG21 AVDD18_SOC [3,9]
AVDD12_MD
A11 AG19 AVDD18_SOC [3,9]
A13 DVSS1 AVDD18_MD
DVSS2 AVDD18_SOC [3,9]
A15
B3 DVSS3 AG18 C202 C203 C204
B21 DVSS4 AVDD18_AP AC18
C2 DVSS5 AVDD18_CPU 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
C6 DVSS6
C12 DVSS7 PLL
C16 DVSS8 GND GND GND
C20 DVSS9 H21
DVSS10 AVDD18_DDR EMI_VDD1 [9,16]
C23
D3 DVSS11 C205 C206
D D9 DVSS12 D
D13 DVSS13 0.1uF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
D23 DVSS14
D27 DVSS15
E4 DVSS16 T14 GND GND
DVSS17 AVDD12_PLLGP VA12_PMU [3,15]
E24
E25 DVSS18 T16
DVSS19 AVDD18_PLLGP AVDD18_SOC [3,9]
F2
F4 DVSS20 C207 C208
F5 DVSS21
F6 DVSS22 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201
F7 DVSS23
F8 DVSS24
F10 DVSS25 PERI_D GND GND
F11 DVSS26
F12 DVSS27
F14 DVSS28 G28 R201 0;1A;0402
DVSS29 DVDD18_IOLT VIO18_PMU [4,5,7,9,11,16,17,21,24,25,26,28,32,35,41]
F17 W28
F19 DVSS30 DVDD18_IOLM
F20 DVSS31 AG27
F21 DVSS32 DVDD18_IOBL
F22 DVSS33
F23 DVSS34
G4 DVSS35 U1
G6 DVSS36 DVDD18_IORB1 AG6
DVSS37 DVDD18_IORB2 C209 C210 C211 C212 C213
G11
G12 DVSS38
DVSS39 C0201_NC C0201_NC C0201_NC 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201
G13 J1
G14 DVSS40 DVDD18_IORT
G15 DVSS41
DVSS42 GND GND GND GND GND
G21 AD18 VEFUSE_PMU [9]
G22 DVSS43 DVDD_VQPS
G26 DVSS44
H14 DVSS45 A27
H15 DVSS46 DVDD18_MSDC0
H22 DVSS47
H25 DVSS48 AD28
DVSS49 DVDD28_MSDC1 VMC_PMU [9]
J22
J23 DVSS50
J24 DVSS51 AE28
DVSS52 DVDD28_SIM1 VSIM1_PMU [9,26]
K9
K11 DVSS53
K12 DVSS54 AC28
DVSS55 DVDD28_SIM2 VSIM2_PMU [9,26]
K15
K16 DVSS56
K18 DVSS57 AA28 C214 C215 C216 C217
L8 DVSS58 DVDD18_MSDC1
DVSS59 0.1uF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201
L11 AB28
L15 DVSS60 DVDD18_SIM GND GND GND
L16 DVSS61 GND
C L21 DVSS62 Note: 11-1 Note: 11-2 C
L22 DVSS63
L26 DVSS64
M6 DVSS65
M7 DVSS66
M12 DVSS67
M16 DVSS68 C218 C219
M22 DVSS69
M24 DVSS70 PERI_A Note: 11-3
0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201
M28 DVSS71 GND GND
N6 DVSS72
N7 DVSS73 U2
DVSS74 AVDD12_CSI VA12_PMU [3,15]
N11
N15 DVSS75
N21 DVSS76 R28
DVSS77 AVDD12_DSI VA12_PMU [3,15]
N22
P7 DVSS78 C220 C221
P12 DVSS79
P16 DVSS80 1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
P21 DVSS81
P22 DVSS82
R11 DVSS83 GND GND
R15 DVSS84
R21 DVSS85 T28
DVSS86 AVDD04_DSI DVDD_CORE [2,8]
R22
T8 DVSS87
T12 DVSS88 C222
T22 DVSS89
U11 DVSS90 1.0UF;20%;6.3V;0201
V8 DVSS91
V16 DVSS92
V17 DVSS93 GND
V19 DVSS94
V21 DVSS95
W17 DVSS96
W19 DVSS97
W21 DVSS98
AA9 DVSS99
AA11 DVSS100
AA13 DVSS101
AB10 DVSS102
AB12 DVSS103
AD7 DVSS104 D28
DVSS105 AVDD18_USB AVDD18_SOC [3,9]
AD11
AD14
AE8
DVSS106
DVSS107 E28
Schematic design notice of "11_BB_POWER_IO" page.
DVSS108 AVDD12_USB VA12_PMU [3,15]
AE11
AE14 DVSS109
AF8 DVSS110 B28
B
AF11 DVSS111
DVSS112
AVDD33_USB VUSB_PMU [9]
Note 11-1: C214 closed DVDD18_MSDC0 150mil B
AF14
AF17 DVSS113 C223 C225
C224
AF28 DVSS114
AG26 DVSS115
DVSS116
1.0UF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 1.0UF;20%;6.3V;0201 Note 11-2: C215 closed DVDD28_MSDC1 150mil
GND GND GND
Note 11-3: C218 closed DVDD18_MSDC1 150mil
GND
H2 AVDD18_SOC [3,9]
AVDD18_WBG
C3 VA12_PMU [3,15] C226

AVDD12_WBG
C227 0.1uF;20%;6.3V;0201
0.1uF;20%;6.3V;0201
GND
GND
MT6762V/WB
A A
Title REV: V10

02_BB_POWER_IO
DOCUMENT NO.: Design Name Size D

5 4 3 2 1
5 4 3 2 1
U101A
MT6762-SBS
PMU_IF
E27
[10] SYSRSTB SYSRSTB
K24 U101B
[10] WATCHDOG WATCHDOG
L25
MT6762-SBS
[10] SRCLKENA0 SRCLKENA0
[10,32] SRCLKENA1
M25 SIM ABB_IF
SRCLKENA1
D AA25 AB13 D
[26] SIM1_SCLK SIM1_SCLK MAIN_X26M_IN PMIC_CLK_BB [10]
H26 Y25
[10] RTC32K_CK RTC32K_CK [26] SIM1_SIO SIM1_SIO
AA26
[26] SIM1_SRST SIM1_SRST AE9
TX_BB_IP0 LTE_TX_BB0_IP [32]
K27 AC25 AD9
[10] PWRAP_SPI0_CSN PWRAP_SPI0_CSN [26] SIM2_SCLK SIM2_SCLK TX_BB_IN0 LTE_TX_BB0_IN [32]
L27 AB25 AE10
[10] PWRAP_SPI0_CK PWRAP_SPI0_CK [26] SIM2_SIO SIM2_SIO TX_BB_QP0 LTE_TX_BB0_QP [32]
M27 AC26 AD10
[10] PWRAP_SPI0_MO PWRAP_SPI0_MO [26] SIM2_SRST SIM2_SRST TX_BB_QN0 LTE_TX_BB0_QN [32]
K28
[10] PWRAP_SPI0_MI PWRAP_SPI0_MI
J25
[11]
[11]
AUD_CLK_MOSI
AUD_CLK_MISO
G27 AUD_CLK_MOSI RFIC_Ctrl
AUD_CLK_MISO AF13 6177_i0 6177m_iP
PRX_BB_I0P LTE_PRX_BB0_IP [32]
AE21 AG13 6177m_iN
[32] RFIC0_BSI_EN RFIC0_BSI_EN PRX_BB_I0N LTE_PRX_BB0_IN [32]
J27 AF22 AF15 6177_i1
[11] AUD_DAT_MISO0 AUD_DAT_MISO0 [32] RFIC0_BSI_CK RFIC0_BSI_CK PRX_BB_I1
J28 [32] RFIC0_BSI_D0 AE20 AF12 6177_q0 6177m_qP
[11] AUD_DAT_MISO1 AUD_DAT_MISO1 RFIC0_BSI_D0 PRX_BB_Q0P LTE_PRX_BB0_QP [32]
[32] RFIC0_BSI_D1 AF21 AG12 6177m_qN
RFIC0_BSI_D1 PRX_BB_Q0N LTE_PRX_BB0_QN [32]
AG22 AG15 6177_q1
K26 RFIC0_BSI_D2 PRX_BB_Q1
[11] AUD_DAT_MOSI0 AUD_DAT_MOSI0
K25
AD13 6177_i0 6177m_iP
[11] AUD_SYNC_MISO
H27 RF MIPI DRX_BB_I0P AE13 6177m_iN
LTE_DRX_BB0_IP
LTE_DRX_BB0_IN
[32]
[32]
J26 AUD_SYNC_MISO DRX_BB_I0N AG16 6177_i1
[11] AUD_SYNC_MOSI AUD_SYNC_MOSI DRX_BB_I1
AG7 AD12 6177_q0 6177m_qP
[41] MIPI0_SCLK MISC_BSI_CK_0 DRX_BB_Q0P LTE_DRX_BB0_QP [32]
AF7 AE12 6177m_qN
[41] MIPI0_SDATA MISC_BSI_DO_0 DRX_BB_Q0N LTE_DRX_BB0_QN [32]
AF16 6177_q1 Note: 12-5
AF5 DRX_BB_Q1
[36] MIPI1_SCLK MISC_BSI_CK_1
AF6
Test Pin [36] MIPI1_SDATA MISC_BSI_DO_1
AE6 AG9
MISC_BSI_CK_2 DET_IP0 LTE_DET_BB0_IP [32]
AD6 AF9
MISC_BSI_DO_2 DET_IN0 LTE_DET_BB0_IN [32]
F27 AF10
TESTMODE DET_QP0 LTE_DET_BB0_QP [32]
AE5 AG10
MISC_BSI_CK_3 DET_QN0 LTE_DET_BB0_QN [32]
AD5
W13 MISC_BSI_DO_3
TP_PLLGP
W12
GND TN_PLLGP AD8
BPI RFIC_ET0_P AC9
RFIC_ET0_N
C AC10 C
APC APC1 [36]
AE2
AD3 BPI_PA_VM1
AC5 BPI_PA_VM0 AUX IN
CDM3P5A AF24
AB6 AE3 BPI_BUS15_ANT2
CDM5P5A [44] BPI_BUS14 BPI_BUS14_ANT1
AE25 AE17
[38] BPI_BUS13 BPI_BUS13_ANT0 AUXIN4 BOARD_ID3 [5]
AE24 AE18
[41] BPI_BUS12 BPI_BUS12_OLAT1 AUXIN3 BAT_ID [17]
AD4
[44] BPI_BUS11 BPI_BUS11_OLAT0 AE19
AF25 AUXIN2 AUXIN2 [5]
[35] BPI_BUS10 BPI_BUS10
AF26 AF19
[29] BPI_BUS9 BPI_BUS9 AUXIN1 AUX_IN1_NTC [41]
AD25
AC6 AF20
[43] BPI_BUS7 BPI_BUS7 AUXIN0 AUX_IN0_NTC [7]
AG4
AG3
AG2
[44] BPI_BUS4 BPI_BUS4 C308 C307 C318 C301 C302
AF4
[43]
[38]
BPI_BUS3
BPI_BUS2
AF3 BPI_BUS3 REF POWER
1.0UF;20%;6.3V;0201
A1 AF2 BPI_BUS2
1.0UF;20%;6.3V;0201
1.0UF;20%;6.3V;0201
1.0UF;20%;6.3V;0201
1.0UF;20%;6.3V;0201
NC1 [29] BPI_BUS1 BPI_BUS1
A28 AE4
NC2 [29] BPI_BUS0 BPI_BUS0
AG1 AF18 REFP
AG28 NC3 REFP
NC4 C303
0.1uF;20%;6.3V;0201
Note: 12-2
MT6762V/W B GND
GND GND GND GND GND
Note: 12-1
B B
[3,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU
R301
MT6762V/W B
Schematic design notice of "12_BB_1" page. DEL R303=12K

LO=LPDDR3
R0201_NC
AUD_DAT_MOSI0 PWRAP_SPI0_CSN PWRAP_SPI0_MI
Note 12-1: The de-coupling cap. for REFP (AF18 ball) have to be placed as close to BB as possible.
R305
R0201_NC R306
Note 12-2: To shunt a 1uF capacitor in the AUXIN ADC input to prevent noise coupling. It should 12K;5%;0201
be placed as close to BB as possible. Connect the unused AUX ADC input to GND.
Note 12-3: "PWRAP_SPI0_CSN" and "AUD_DAT_MOSI0" are bootstrap pin to select which interface will be the JTAG pin out. GND
PWRAP_SPI0_CSN AUD_DAT_MOSI0 JTAG Function
default=PU default=PD AP_JTAG MD_JTAG Note: 12-3 Note: 12-4
HI LO N/A N/A
HI HI (by ext. PU) SPI0+EINT8 SPI1+SPI3
LO (by ext. PD) LO SPI0+EINT8 N/A
LO (by ext. PD) HI (by ext. PU) MSDC1 N/A
Note 12-4: PWRAP_SPI0_MI is DDR type feature in bootstrap

Note 12-5: Please set unused IQ pins in NC
PWRAP_SPI0_MI Booting interface
A default=PU DDR MSDC0 pin mux A
LO (by ext. PD) LPDDR3 follow LP3 Ref SCH.

HI LPDDR4X follow LP4X Ref SCH.
Title REV: V10

03_BB_1_RF&SIM_IF

5 4 3 2 1
5 4 3 2 1
U101D
MT6762-SBS
Note 13-2: MIPI CSI unused pin can be floating, but need correct SW setting
U101C USB CONN_Dig.
MT6762-SBS [17]
[17]
USB_DP
USB_DM
C27
B27 USB_DP
USB_DM
CONN_TOP_CLK
CONN_TOP_DATA
J6
K7
CONN_TOP_CLK [51]
CONN_TOP_DATA [51]
CSI-0 DSI-0 CONN_BT_CLK

J5
K8
BT_CLK [51]
D CONN_BT_DATA BT_DATA [51] D
AB27
N3 P25 [17] IDDIG IDDIG
[22] RDP2 CSI0A_L0P DSI0_CKP DSI0_CKP [21] AB26 H5
N4 P26 DRVBUS CONN_WF_CTRL0 WF_CTRL0 [51]
[22] RDN2 CSI0A_L0N DSI0_CKN DSI0_CKN [21] H4
CONN_WF_CTRL1 WF_CTRL1 [51]
H3
CONN_WF_CTRL2 WF_CTRL2 [51]
N1 N25
[22] RDP0 CSI0A_L1P DSI0_D0P DSI0_D0P [21] G2
[22] RDN0
N2
CSI0A_L1N DSI0_D0N
N26
DSI0_D0N [21] BC CONN_WB_PTA G3
CONN_WB_PTA
CONN_HRST_B
[51]
[51]
CONN_HRST_B
D26 G7
P1 N28 [10] CHD_DP CHD_DP XIN_WBG CONN_XO_IN_BB [51]
[22] RCP CSI0A_L2P DSI0_D1P DSI0_D1P [21] E26
P2 N27 [10] CHD_DM CHD_DM
[22] RCN CSI0A_L2N DSI0_D1N DSI0_D1N [21] K5
ANT_SEL0 K6
ANT_SEL1 K4
P3 R25 ANT_SEL2
[22] RDP1 CSI0B_L0P DSI0_D2P DSI0_D2P [21]
[22] RDN1
P4
CSI0B_L0N DSI0_D2N
R26
DSI0_D2N [21] KEYPAD
R3 P27
AA1 CONN_IQ
[22] RDP3 DSI0_D3P [21] AB1 KPROW0
R4 CSI0B_L1P DSI0_D3P R27 [53] GPIO_GPS_LNA_EN
[22] RDN3 DSI0_D3N [21] KPROW1 F1
CSI0B_L1N DSI0_D3N GPS_I [51]
AB3 GPS_I G1
[28] KPCOL0 KPCOL0 GPS_Q GPS_Q [51]
AB2
N5 AD26 [27] KPCOL1 KPCOL1
CSI0B_L2P LCM_RST LCM_RST [21] A3
P5 WF_IP WF_IP [51]
CSI0B_L2N A2
AE27 WF_IN WF_IN [51]
DSI_TE DSI_TE [21] B1
WF_QP WF_QP [51]
B2
GND
CSI-1 DISP_PWM
AD27
DISP_PWM [21] I2C WF_QN WF_QN [51]
D2
BT_IP BT_IP [51]
D1
L3 BT_IN BT_IN [51]
L4 CSI1A_L0P GPIO AB5
AC4 SCL0 Touch BT_QP
E3
F3
BT_QP [51]
CSI1A_L0N BT_QN [51]
SDA0 BT_QN
AD1
SPI0_MI SPI0_MI [28]
GND L1
[22] RDP0_D CSI1A_L1P
[22] RDN0_D
L2
CSI1A_L1N SPI0_CSB
AC1
SPI0_CSB [28] GPIO
JTAG AC2
G23
BOARD_ID0 [5]
SPI0_MO [28] AE1 GPIO_EXT0
M1 SPI0_MO [25] SCL1 SCL1
[22] RCP_D
M2 CSI1A_L2P AD2
SPI0_CLK [28]
[25] SDA1
AF1
SDA1 Sensors GPIO_EXT1
F25
BOARD_ID1 [5]
[22] RCN_D CSI1A_L2N SPI0_CLK
F24
GPIO_EXT2 BOARD_ID2 [5]
L5
CSI1B_L0P G24
M5 W24 GPIO_EXT3
CSI1B_L0N SPI1_MI SPI1_MI [24]
U23 [22] SCL2
V4 Rear Cam&Front F26
SPI1_CSB [24] V3 SCL2 GPIO_EXT4
M3 SPI1_CSB [22] SDA2 SDA2
M4 CSI1B_L1P FP Y24
SPI1_MO [24] GPIO_EXT5
G25
LCD_ID1 [21]
CSI1B_L1N SPI1_MO
H23
V24 GPIO_EXT6 LCD_ID0 [21]
SPI1_CLK SPI1_CLK [24]
GND CSI-2 AC21 GPIO_EXT7
H24
FP_LDO_EN [24]
C [21,35] SCL3 SCL3 C
R1 U24 [21,35] SDA3
AC22
SDA3 LCD_BIAS& SAR1 GPIO_EXT8
AA24
GPIO_FP_RST_N [24]
[22] RDP2_B CSI2A_L0P SPI2_MI
R2
[22] RDN2_B CSI2A_L0N Y23
T26 GPIO_EXT9 LCD_ID2 [21]
SPI2_CSB
AA23
T1 T25 GPIO_EXT10
[22] RDP0_B T2 CSI2A_L1P SPI2_MO
[22] RDN0_B CSI2A_L1N U6 AD21
T24 [22] SCL4 SCL4 GPIO_EXT11 GPIO_CTP_RSTB [21]
SPI2_CLK [22] SDA4
V6
SDA4
DepthCam AD20
T3 GPIO_EXT12 FRONT_CAM_DVDD_EN [22]
[22] RCP_B CSI2A_L2P
T4
[22] RCN_B CSI2A_L2N AD19
U25 GPIO_EXT13
SPI3_MI SPI3_LCM_MISO [21]
U3
[22] RDP1_B CSI2B_L0P AC20
U4 U26 GPIO_EXT14 PWDN_VCM [22]
[22] RDN1_B CSI2B_L0N SPI3_CSB SPI3_LCM_CSB [21] AB23
Touch V26
[13]
[13]
SCL5
SDA5
AC23 SCL5 Sub PMIC AC19
PWSEQ_ID [22]
SPI3_LCM_MOSI [21] SDA5 GPIO_EXT15
R5 SPI3_MO
[22] RDP3_B CSI2B_L1P
T5 V25
[22] RDN3_B CSI2B_L1N SPI3_CLK SPI3_LCM_CLK [21] Y1
SRCLKENAI
AC3
PWM0
CSI Ctrl U27
SPI4_MI [25]
[18] SCL6
J3
J4 SCL6 AE26
SPI4_MI [18] SDA6 SDA6 Audio PA INT_SIM1 EINT_SIM_SD [5,26]
V28
SPI4_CSB [25] AF27
[22] CAM_RST0
V2
CAM_RST0 A-SENSOR SPI4_CSB T27
INT_SIM2 EINT_SIM_SD [5,26]
SPI4_MO SPI4_MO [25] AB4
W6
CAM_PDN0 V27
UART EINT0 EINT_CTP [21]
SPI4_CLK SPI4_CLK [25] AA7
V1 EINT1 EINT_SIM_SD [5,26]
[22] CAM_RST1 CAM_RST1 AA3
[28] URXD0 URXD0 AA5 EINT_RAMDUMP [28]
Y2 EINT2
CAM_PDN1 AA2
[28] UTXD0 UTXD0 AA4 CONF_0 [28]
K3 EINT3
[22] CAM_RST2 CAM_RST2 GPO Y6
K2 EINT4 CONF_1 [28]
[22] CAM_PDN2 CAM_PDN2 AD22
PERIPHERAL_EN0 GPIO_LCM_BIAS_EN [21] Y7
AF23
CAM_RST3 AD24
SD (MSDC1) EINT5 EINT_FP_N [24]
PERIPHERAL_EN1 GPIO_LCM_BIAS_EN2 [21] Y4
L24 EINT6 EINT_ALS [25]
CAM_PDN3 AD23
PERIPHERAL_EN2 TORCH_EN [23] W26 Y3
[26] MSDC1_CLK MSDC1_CLK EINT7 MOUDLE_ID1 [22]
AC24
PERIPHERAL_EN3 FLASH_EN [23] W27 AA6
L401 120nH;5%;0201 W5 [26] MSDC1_CMD MSDC1_CMD EINT8 EINT8 [28]
[22] CAM_CLK0 CAM_CLK0 AE23
PERIPHERAL_EN4 AUDIO_PA_RST [18] W4
L402 120nH;5%;0201 W2 EINT9 SAR_EINT_N [35]
[22] CAM_CLK1 CAM_CLK1 W25
AE22 [26] MSDC1_DAT3 MSDC1_DAT3
PERIPHERAL_EN5 GPIO_CHG_EN_0 [13] AA27 W3
L403 120nH;5%;0201 J2 [26] MSDC1_DAT2 MSDC1_DAT2 EINT10 EINT_PS [25]
[22] CAM_CLK2 CAM_CLK2 Y26
[26] MSDC1_DAT1 MSDC1_DAT1
Y27 W7
AG24 [26] MSDC1_DAT0 MSDC1_DAT0 EINT11 EINT_CHG_0 [13]
CAM_CLK3
B C407 C408 C409 M26 B
C404 C405 C406 Note: 13-1 EINT12 EINT_ACC [25]
C0201_NC C0201_NC C0201_NC MT6762V/WB
C0201_NC C0201_NC C0201_NC
MT6762V/WB
VIO18_PMU [3,4,7,9,11,16,17,21,24,25,26,28,32,35,41]
GND
GND
R411 R413 R415 R417
R450
100K;1%;0201
BOARD_ID
R0201_NC R0201_NC R0201_NCR0201_NC
[5] BOARD_ID0
[5] BOARD_ID1
[5] BOARD_ID2
[4] BOARD_ID3
[4] AUXIN2
R412 R414 R416 R418 R451 BOARD_ID3为AUXIN4，AUXIN2电源域为0~1.45V

分压电阻选择请注意要在0~1.45V范围内
Schematic design notice of "13_BB_2" page. R0201_NC
10K;1%;0201
10K;1%;0201
10K;1%;0201
10K;1%;0201
Note 13-1: The enable pin of acoustic or optoelectronic devices (e.g. SPK AMP/Backlight/Charger
OCP/OVP) suggest to use Peripheral_EN[0:5]
If use other GPIOs as enable pin, suggest to reserve 0201 NC to GND
A A
Title REV: V10

04_BB_2_MIPI&GPIO

5 4 3 2 1
5 4 3 2 1
U101G
D
MT6762-SBS D
EMI_DDR
C13 A9
[16] EMI0_DQ0 EMI0_DQ0 EMI0_CS0_n EMI0_CS0 [16]
C15 E8
[16] EMI0_DQ1 EMI0_DQ1 EMI0_CS1_n EMI0_CS1 [16]
C14
[16] EMI0_DQ2 EMI0_DQ2
E15 D8
[16] EMI0_DQ3 EMI0_DQ3 EMI0_CKE0 EMI0_CKE0 [16]
B15 E7
[16] EMI0_DQ4 EMI0_DQ4 EMI0_CKE1 EMI0_CKE1 [16]
D15
E16 B16
[16] EMI0_DQ6 EMI0_DQ6 EMI0_DM0 EMI0_DMI0 [16]
B17 C17
A17 E10
E18 B19
F18
C18 F9
[16] EMI0_DQ11 EMI0_DQ11 EMI0_CK_T EMI0_CK_T [16]
D19 E9
[16] EMI0_DQ12 EMI0_DQ12 EMI0_CK_C EMI0_CK_C [16]
E19
C19
[16] EMI0_DQ14 EMI0_DQ14 E14
A19 EMI0_DQS0_C EMI0_DQS0_C [16]
[16] EMI0_DQ15 EMI0_DQ15 D14
D10 EMI0_DQS0_T EMI0_DQS0_T [16]
C11 D17
[16] EMI0_DQ17 EMI0_DQ17 EMI0_DQS1_C EMI0_DQS1_C [16]
C10 E17
[16] EMI0_DQ18 EMI0_DQ18 EMI0_DQS1_T EMI0_DQS1_T [16]
C D12 C
[16] EMI0_DQ19 EMI0_DQ19 E13
B13 EMI0_DQS2_C EMI0_DQS2_C [16]
[16] EMI0_DQ20 EMI0_DQ20 F13
B11 EMI0_DQS2_T EMI0_DQS2_T [16]
B12 E22
[16] EMI0_DQ22 EMI0_DQ22 EMI0_DQS3_C EMI0_DQS3_C [16]
E11 D22
[16] EMI0_DQ23 EMI0_DQ23 EMI0_DQS3_T EMI0_DQS3_T [16]
D20
E20
E21 B8
[16] EMI0_DQ26 EMI0_DQ26 EMI0_CA0 EMI0_CA0 [16]
D21 B7
B20 C7
C22 D6
C21 B5
A21 D5
C5
EMI0_CA6 EMI0_CA6 [16]
E6
EMI0_CA7 EMI0_CA7 [16]
F16 E5
[16] EVREF VREF_EMI EMI0_CA8 EMI0_CA8 [16]
G16 A5
NC1 EMI0_CA9 EMI0_CA9 [16]
E23 A7
NC2 NC3 B9
Note: 14-1 NC4 C4
B NC5 C9 B
EMI_EXTR B4 NC6 D4
EMI_EXTR NC7 D7
R501 NC8 D11
NC9 D18
NC10
TP502
34.8;1%;0201 Note: 14-2 1
GND
eMMC (MSDC0)
12x15MIL
A26 C25
[16] MSDC0_DAT7 MSDC0_DAT7 MSDC0_RSTB MSDC0_RSTB [16]
B24
B23 B25
[16] MSDC0_DAT5 MSDC0_DAT5 MSDC0_CMD MSDC0_CMD [16]
A23
C24 D25
[16] MSDC0_DAT3 MSDC0_DAT3 MSDC0_CLK MSDC0_CLK [16]
A25
D24 B26
[16] MSDC0_DAT1 MSDC0_DAT1 MSDC0_DSL MSDC0_DSL [16]
C26
TP506
1
Note: Place R502 close to U101.D25
TP501
1 MT6762V/W B
12x15MIL
TP507
Note: Place12x15MIL
TP501 Close to U101 1
12x15MIL
Schematic design notice of "14_BB_3" page.

A Note 14-1: R501 please select 34.8 ohm (1%) resistor A
Note 14-2: Please check eMCP LP3 and eMCP LP4X pin mux
Title REV: V10
05_BB_3_EMMC

5 4 3 2 1
5 4 3 2 1
The pull up ressister need to be 1% accuracy

NTC=100K
D D
[3,4,5,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU
R602
390K;1%;0201
AUX_IN0_NTC
[4] AUX_IN0_NTC
RT604
100K;1%;0402
GND
Thermistor to sense CHARGER Thermistor to sense AP

temperature
Huawei NOTE:1. NTC606 must keep a distance about 3~5 mm away from Charger IC and far from
temperature
other heat sources 5~10 mm at least.
1. RT604must keep a distance about 6~8 mm away from AP and far from
other heat sources 10 mm at least.
2. The distance is the shortest distance from package edge to edge.
C C
B B
A A
Title REV: V10

06_BB_AUXADC_Thermal

5 4 3 2 1
5 4 3 2 1
Note: 20-2
U701A
MT6357
VSYS_SMPS
VBUCK CTRL
23,24,25,28,41] VBAT R701 1;5%;0201 B2
VSYS_SMPS
C702
SG701
1.0UF;20%;6.3V;0201
GND_SMPS B1
GND_SMPS
Set power inductor
1
D TVS701 D
C737 close to PMIC [2] DVDD_DVFS
VPROC IN VPROC L701
4.7uF;20%;6.3V;0402 A4 A6 VPROC 0.47uH;20%;2016
2
NF_PTVSHC3D4V5U B4 VSYS_VPROC1 VPROC1 A7

C4 VSYS_VPROC2 VPROC2 B6
VSYS_VPROC3 VPROC3 B7 C760
VPROC4 C6
C703 VPROC5 C7 C0201_NC
VPROC6
10uF;20%;6.3V;0402 Differential and shielded with GND
C2
FOR EOS VPROC_FB DVDD_DVFS_6357_FB [2]
4mil
GND D2 GND
GND_VPROC_FB DVDD_DVFS_6357_GND [2]
A5 4mil
SG702 GND_VPROC1
B5
GND_VPROC C5 GND_VPROC2
GND_VPROC3
Set power inductor [2,3] DVDD_CORE

VCORE IN VCORE close to PMIC
A8 A9 VCORE
VSYS_VCORE1 VCORE1 L702 0.47uH;20%;2016
B8 A10
C704 C8 VSYS_VCORE2 VCORE2 B10
VSYS_VCORE3 VCORE3 C10
SG703 C9 VCORE4
10uF;20%;6.3V;0402 C761
GND_VCORE B9 GND_VCORE1
GND_VCORE2 D3
Differential and shielded with GND C0201_NC
VCORE_FB DVDD_CORE_6357_FB [2]
4mil
E3
GND_VCORE_FB DVDD_CORE_6357_GND [2]
4mil
GND
Set power inductor [2] DVDD_MODEM

close to PMIC
VMODEM IN VMODEM L703 1.0uH;20%;2016
A13 B11 VMODEM
B13 VSYS_VMODEM1 VMODEM1 C11
C705 VSYS_VMODEM2 VMODEM2
Differential and shielded with GND C762
C 4.7uF;20%;6.3V;0402 E13 C
VMODEM_FB DVDD_MODEM_6357_FB [2]
A12 4mil C0201_NC
SG704 GND_MODEM GND_VMODEM1
B12 D14
GND_VMODEM2 GND_VMODEM_FB DVDD_MODEM_6357_GND [2]
C12 4mil
GND_VMODEM3
Set power inductor [8,41] GND

VPA_PMU
close to PMIC Note: 20-1
VPA IN VPA
A2 A1 VPA L704 1.0uH;20%;2016
A3 VSYS_VPA1 VPA Note:VPA_PMU cout >10V
C721
C706 VSYS_VPA2
E4 C763
VPA_FB VPA_PMU [8,41]
10uF;20%;6.3V;0402 B3 2.2uF;20%;6.3V;0402
SG705 GND_VPA GND_VPA C0201_NC
GND
VS1 IN VS1 GND Set cap. C707 close to

B14
Set power inductor VPA power inductor
A14 VSYS_VS1_1 A16 VS1 close to PMIC
C708 VSYS_VS1_2 VS1_1 B16 L705 1.0uH;20%;2016
VS1_2 VS1_PMU [8,9,15,22]
4.7uF;20%;6.3V;0402
A15 C764
SG706 GND_VS1 GND_VS1_1
B15
GND_VS1_2 E14 C0201_NC
VS1_FB VS1_PMU [8,9,15,22]
VS1 Input/output CAP >=10V
GND
MT6357CRV/A
B B
Schematic design notice of "20_POWER_MT6357_Buck"

Note 20-1: C707, please choose 0402 size
Note 20-2: For MT6765/62/61 platform, please only use MT6357CRV
A A
Title REV: V10

07_POWER_MT6357_Buck

5 4 3 2 1
5 4 3 2 1
1. "Typical Cap" defined in design notice is the minimum cap. to LDO Cout.
2. NC cap can move to application, if (PCB L<20nH, PCB R<0.2 ohm)
Suggest trace width > 40 mil => value and placement of Cap, please refer design notice
[15] EXT_VS2 1.46V VS2_PMU [9,15]
U701B
SH801
1 2
[15] EXT_VS2_FB
Note: 21-3 MT6357 Set cap. close to PMIC
HT-COPPER
LDO IN LDO
[8,15,22] VS1_PMU C17 L14
VS1_LDO1 VFE28 VFE28_PMU [41]
T4
VXO22 VXO22_PMU
C801 C802 C803 K13
D VCN28 VCN28_PMU [51,53] D
10uF;20%;6.3V;0402 22uF;20%;6.3V;0603 4.7uF;20%;6.3V;0402 Note: 21-5 H16
VCAMA VCAMA_PMU [22]
GND GND GND T5
VAUX18 VAUX18_PMU [10]
F15
VS2_LDO1 L7
VAUD28 VAUD28_PMU [11]
F17
VS2_LDO2
ALDO C804
C805 C806
[9,15] VS2_PMU 2.2uF;20%;6.3V;0201
1.0UF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
C810
GND
2.2uF;20%;6.3V;0201 GND GND
G14 P17
VSYS_LDO1 VCN33 VCN33_PMU [51]
N17 L16
VSYS_LDO2 VLDO28 VLDO28_PMU [22]
GND K7 K15
VSYS_LDO3 VIO28 VIO28_PMU [25]
For EOS L15
VMC VMC_PMU [3]
8,21,22,23,24,25,28,41] VBAT F13 N16

D_GND1 VMCH VMCH_PMU [26]
G8
G7 D_GND2 L17
D_GND3 VEMC VEMC_PMU [16]
C812 G9
C811 G12 D_GND4 J17
C813 D_GND5 VSIM1 VSIM1_PMU [3,26]
10uF;20%;6.3V;0402 H6
10uF;20%;6.3V;0402 2.2uF;20%;6.3V;0201 D_GND6
1.0UF;20%;6.3V;0201
1.0UF;20%;6.3V;0201
G10 K16
1.0UF;20%;6.3V;0201
D_GND7 VSIM2 VSIM2_PMU [3,26]
1.0UF;20%;6.3V;0201
1.0UF;20%;6.3V;0201
1.0UF;20%;6.3V;0201
1.0UF;20%;6.3V;0201
G11
H7 D_GND8 M16
D_GND9 VIBR VIBR_PMU [29]
GND GND GND H8
H9 D_GND10 J14
D_GND11 VUSB VUSB_PMU [3]
H10
H11 D_GND12 H15
Set cap. close to PMIC F12 D_GND13 VEFUSE VEFUSE_PMU [3]
F11 D_GND14 C814 C815
F10 D_GND15 C817 C818 C819 C820
F9 D_GND16 DLDO C824 C816
H12 D_GND17
J6 D_GND18 1.0UF;20%;6.3V;0201
D7 D_GND19 D16 GND GND GND GND GND GND GND
D8 D_GND20 VRF18
D6 D_GND21 GND
D_GND22 VRF18_PMU [32]
D9
F5 D_GND23 E15
D_GND24 VCN18 VCN18_PMU [51]
J7
D10 D_GND25 E17
D_GND26 VCAMD VCAMD_PMU [22]
D11
C D12 D_GND27 A17 C
D_GND28 VCAMIO VCAMIO_PMU [22]
D13
F6 D_GND29 B17
D_GND30 VIO18 VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41]
J8
K12 D_GND31
E6 D_GND32 C825 C826 R803 0;0.5A;0201
D_GND33 AVDD18_SOC [3]
E7
E8 D_GND34 4.7uF;20%;6.3V;0402 4.7uF;20%;6.3V;0402
F7 D_GND35 SLDO1 SH888
D_GND36 EMI_VDD1 [3,16]
J9
E11 D_GND37
E9 D_GND38 GND GND
E10 D_GND39 E16
E12 D_GND40 VRF12 Note: 21-4
F8 D_GND41
D_GND42 VRF12_PMU [32]
J11
D_GND43 G15
VSRAM_PROC DVDD_SRAM_DVFS [2]
GND G16
VSRAM_OTHERS VSRAM_OTHERS_PMU [2]
Set cap. and shortpad close to PMIC
VREF
VREF VDRAM_PMU [2,16]
H17
T14 VDRAM C831 C832 C833 C834
C830 VREF
0.1uF;20%;6.3V;0201 SLDO2 4.7uF;20%;6.3V;0402 2.2uF;20%;6.3V;0402
SG804 GND_VREF T13 2.2uF;20%;6.3V;0201 4.7uF;20%;6.3V;0402
GND_VREF Note: 21-1
R9
C832 C833 need SMT 2.2UF
DIG Power GND GND GND GND
SH805 TREF
,26,28,32,35,41] VIO18_PMU 1 2 K10
DVDD18_IO
DVDD18_DIG L10
SINGLE-GND-L2 DVDD18_DIG
TREF_PMU [17]
C835
C836 C837 J10
1.0UF;20%;6.3V;0201 DVSS18_IO
1.0UF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 Power Switch
Note: 21-2
SG806 DVSS18_IO MT6357CRV/A
GND
B B
Schematic design notice of "21_POWER_MT6357_LDO"

Note 21-1: If these power trace can meet LDO layout constraint, these CAP can be NC or removed.
Please refer to MT6357 design notice.
Note 21-2: Output cap range please follow MT6357CRV LDO design notice Note 21-4: Please set R803 and R803 close to C826, making star connection among VIO18_PMU, AVDD18_SOC, and
EMI_VDD1 near to LDO cap. C826
Note 21-3: Ext Buck BOM option Ext. buck option
Please also refer to MT6357 design notice for further detail design information
w/ EXT VS2 Buck w/o EXT VS2 Buck
C801 10uF 22uF
Note 21-5: Please connect VS2_LDO1(F15) to VS1_PMU if voltage applied to VCAMD(E17) >= 1.3 V
A A
Title REV: V10

08_POWER_MT6357_LDO

5 4 3 2 1
5 4 3 2 1
U701C
Schottky diode (VF <0.3V @ 1mA) MUST be for

PWRKEY ESD protection and to
avoid inverse current from MT6371.
MT6357 VRTC28
Control I/F RTC Set cap. close to chip

Note: 22-3 PWRKEY_PMIC R4 R12
[27] PWRKEY PWRKEY VRTC28
N4
[27] HOMEKEY FCHR_ENB C901
TP902 R5
[4] SYSRSTB RESETB
1 SG910 0.1uF;20%;6.3V;0201
T8 1 2
[4] WATCHDOG WDTRSTB_IN
12x15MIL R902 200K;1%;0201 UVLO_VTH N3
GND UVLO_VTH SINGLE-GND-L4
GND
P14
RTC32K_1V8_0 RTC32K_CK [4]
N7
[4] SRCLKENA0 SRCLKEN_IN0 R15
N8 RTC32K_1V8_1 TP903
D
[4,32] SRCLKENA1 SRCLKEN_IN1 D
P11 1
TP901 RTC32K_2V8
1 12x15MIL
M5
EXT_PMIC_EN1
12x15MIL N5
[15] EXT_PMIC_EN2 EXT_PMIC_EN2
M6
EXT_PMIC_PG DCXO Note: 22-2
R8 M2 AVSS22_XO SG905
[4] PWRAP_SPI0_CSN SPI_CSN AVSS22_XO AVSS22_XO
M8
[4] PWRAP_SPI0_CK SPI_CLK AVSS22_XOBUF SG906
P1
AVSS22_XOBUF1 AVSS22_XOBUF
M7 R1
[4] PWRAP_SPI0_MO SPI_MOSI AVSS22_XOBUF2
M9
[4] PWRAP_SPI0_MI SPI_MISO
AVSS22_XO_ISO SG907
P5 N2
PMU_TESTMODE AVSS22_XO_ISO1 AVSS22_XO_ISO
P2
P9 AVSS22_XO_ISO2
FSOURCE
Set cap. close to PMIC

GND
Charger I/F R903 0;0.5A;0201
R3 XO_SOC
JP901 XO_SOC PMIC_CLK_BB [4]
3,24,25,28,41] VBAT N9 R904 0;0.5A;0201

JP902 VSYSSNS XO_CEL
Note: 22-5 T1
[8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT XO_CEL PMIC_CLK_RF [32]
M13
JP903 BATSNS
C903 R905 0;0.5A;0201
N13 P3 XO_WCN
1.0UF;20%;6.3V;0201
[13] ISENSE ISENSE XO_WCN PMIC_CLK_WCN [51]
BATON R13
GND BATON R2
C904 C905 VCDT T11 XO_NFC
VBUS_USB_IN [10,13]
VCDT
0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201
CHRLDO R11 T2
CHRLDO XO_EXT
P13 C906 C907 C908
GND VDRV
GND C0201_NC C0201_NC C0201_NC
R907
330K;1%;0201 M1 XTAL1 XTAL1 [10]

[17] BATON XTAL1 GND GND GND
N1 XTAL2 XTAL2 [10]

XTAL2 3mil trace width
Note: 22-4
C
3mil trace width C
R908 R909 7.5K;1%;0201
[10,13] VBUS_USB_IN Differential B910
39K;1%;0201 M10 VAUX18_PMU [9]
C910 [5] CHD_DM CHG_DM AUXADC
1.0UF;20%;6.3V;0201 M11 1000ohm;250mA;0402
[5] CHD_DP CHG_DP
GND R7
AVDD18_AUXADC C911
GND N12
VCDT rating: 1.268V PCHR_LED 1.0UF;20%;6.3V;0201 SG904
Set resistor and cap. close to PMIC P7
AVSS18_AUXADC
T7 C912
Gauge AUXADC_VIN
0.1uF;20%;6.3V;0201
T10
[17] CS_P CS_P
R10 Set cap. close to PMIC
[17] CS_N CS_N
Differential
AVSS18_AUXADC
ISINK
AUXADC_VIN 3mil trace width
L12 3mil trace width
ISINK1 AVDD18_AUXADC
3mil trace width
X901
R911 100K;1%;0201
4 3 XTAL2 XTAL2 [10]
SENSOR HOT2
3mil trace width
[10] XTAL1 XTAL1 1 2

HOT1 GND
3mil trace width
AVSS18_AUXADC 26MHz
3mil trace width

MT6357CRV/A
B
Note: 22-1 B
Schematic design notice of "22_POWER_MT6357-IF"
Route AVDD18_AUXADC, AUXADC_VIN, and AVSS18_AUXADC with 3mils width traces and well GND shielding
Note 22-1: Please implement 2520 & 2016 Size TMS PCB co-layout.
Please refer to MT6762_MT6357 Co-Clock Design Notice for co-layout guide
1. Please Connect P1 and R1 ball first and then to GND

Note 22-2: 2. Please Connect P2 and N2 ball first and then to GND
3. Please connect DCXO GND to main GND by independent L1-2 GND via.;
DO NOT connect it through L1 GND
Note 22-3: Let floating if disable HOMEKEY function
Note 22-4: Please follow MT6762_MT6357 Co-Clock Design Notice for Layout guide of VAUX18, Note 22-5: Please connect to battery connector
then R8101 can use 0 ohm to replace BEAD.
Please route VAUX18_PMU with well-ground sheilding if using 0 ohm to replace BEAD for AVDD18_AUXADC
A A
Title REV: V10

09_POWER_MT6357_IF

5 4 3 2 1
5 4 3 2 1
U701D
D
MT6357 D
AUDIO IF UL POWER
R16 K1 VAUD28_PMU [9]

[4] AUD_CLK_MISO AUD_CLK_MISO AVDD28_AUD
T17 C1001
[4] AUD_DAT_MISO0 AUD_DAT_MISO0
1.0UF;20%;6.3V;0201 SH1001
R17 H5
[4] AUD_DAT_MISO1 AUD_DAT_MISO1 AVSS28_AUD
T16 C1002 C1003
[4] AUD_SYNC_MISO AUD_SYNC_MISO [29] AVSS28_AUD
1.0UF;20%;6.3V;0201
L3 1.0UF;20%;6.3V;0201
AU_MICBIAS0 AU_MICBIAS0 [19,29]
P16
[4] AUD_CLK_MOSI AUD_CLK_MOSI M3
AU_MICBIAS1 AU_MICBIAS1 [20]
P15
N14
M14
[4] AUD_SYNC_MOSI AUD_SYNC_MOSI
Set cap. and shortpad close to PMIC
P-N pair should be AUDIO INPUT

differential pair & shielded with GND
K3
[19] AU_VIN0_P AU_VIN0_P CHARGE PUMP
K4
[19] AU_VIN0_N AU_VIN0_N
G2 VIO18_PMU [3,4,5,7,9,16,17,21,24,25,26,28,32,35,41]
K5 AVDD18_AUD
[20] AU_VIN1_P AU_VIN1_P SH1002
C1004
L5 F2 AVSS_AUD
[20] AU_VIN1_N AU_VIN1_N AVSS18_AUD 2.2uF;20%;6.3V;0402
C1005
P-N pair should be differential pair & shielded with GND D1 AU_V18N
4.7uF;20%;6.3V;0402
J4 AU_V18N
[19] AU_VIN2_P AU_VIN2_P
J5
[19] AU_VIN2_N AU_VIN2_N
F1 FLYP
P-N pair should be FLYP
C C
differential pair & shielded with GND C1006
1. AVSS18_AUD is connected to GND in very short trace
E2 FLYN 4.7uF;20%;6.3V;0402
FLYN
ACCDET
2. AVSS18_AUD is connected to de-couple cap of
M4 Set cap. close to PMIC AVDD18_AUD and AU_V18N with 6mil trace respectively
[20] ACCDET ACCDET
R1077 10K;5%;0201 J1
[29] HP_EINT HP_EINT
- AU_HPL and AU_HPR should be routed as single end signal,

and be guarded by GND, up and down, left and right respectively
- The suggested layout pattern of AU_HPL/ AU_HPR/ AU_REFN AUDIO OUTPUT
is " GND AU_HPL AU_REFN AU_HPR GND"
J2
[20] AU_HPL AU_HPL
H3
[29] AU_REFN AU_REFN
G3
[20] AU_HPR AU_HPR
F4
C1007 [18] AU_LOLP AU_LOLP
F3
[18] AU_LOLN AU_LOLN
1000pF;20%;50V;0201
G6
[18] AU_HSP AU_HSP
GND
G5
[18] AU_HSN AU_HSN
Set cap. close to PMIC

R1088 R1089
MT6357CRV/A
470;5%;0201
470;5%;0201
B B
GND
A A
Title REV: V10

10_POWER_MT6357_Audio

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title REV: V10

11_POWER_SubPMIC-General

5 4 3 2 1
5 4 3 2 1
D D
OVP
U1202
B3 A2 [10,13] VBUS_USB_IN
[28,29] VBUS_USB_IN_CON C2 VBUSIN1 VBUSOUT1 A3
C3 VBUSIN2 VBUSOUT2 B2
VBUSIN3 VBUSOUT3
2
R1207
C1211 C1288
R1215
C1210 C1260 C1 D1201
511K;1%;0201
OVPAD 0.1uF;20%;25V;0201 33pf;30%;50V;0201
NF_ESD5411N-2/TR
0.1uF;20%;25V;0201
33pf;30%;50V;0201
47K;5%;0201 R1208 A4
1
B4 GND3
C4 GND2 B1
GND1 nACOK
120K;1%;0201 A1
nEN
SM5328
Surge VBUS: ±100V with Overvoltage Protection up to 29V DC
Vovp=6.3V when R1207=511K R1208=120K +-3%
C C
807400000171
[10,13] VBUS_USB_IN C1203 TI BQ24157 should be 33nf/ ETA6973 Should be 10nf

ISENSE [10]
U1201
L1201 Huawei request DRC<30m Ω
C1201
A1 C1 L1201 1.0uH;20%;2520 R1218 0.056;1%;0805
VBUS1 SW1 VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41]
2.2uF;20%;16V;0402 A2 C2
VBUS2 SW2 C3 C1203
SW3 C1205 C1265
TP1204 TP1205
12x15MIL 12x15MIL PMID B1
B2 PMID1 A3 0.033uF;20%;16V;0201
10uF;20%;6.3V;0402 10uF;20%;6.3V;0402
C1222 C1202 PMID2 BOOT
B3
PMID3
2.2uF;20%;16V;0402 2.2uF;20%;16V;0402
1
PGND [13]
[13] PGND
D1
PGND1 SH1260
A4 D2
[5] SCL5 B4 SCL PGND2 D3 PGND
[5] SDA5 SDA PGND3
C4 E1
[5] EINT_CHG_0 STAT CSIN
[8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT R1214 R0201_NC D4 E4
OTG CSOUT
[5] GPIO_CHG_EN_0 E2 E3
CD VREF C1215 C1206
C1207
BQ24157YFFR 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201
1
1.0uF;10%;10V;0402
R1236 10K;1%;0201
Comptable with other Charger IC ETA6937CSU
TP1201 TP1202
12x15MIL 12x15MIL
B B
Schematic design notice of "26_POWER_SubPMIC-Charger + PP" page.

Note 26-1: For better ESD or surge performance we need choose suitable device for system
protection. Please refer to [Surge device selection guide V2.0] provide by MTK.
A A
Title REV: V10

12_POWER_SubPMIC-Charger + PP

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title 13_POWER_SubPMIC-HV powers REV: V10

5 4 3 2 1
5 4 3 2 1
D D
LDO for VA12 Note: 28-1

Suggest trace width > 12 mil
[8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT R1401 1K;5%;0201 VA12_PMU [3]
C1402 C1488 R1402 1.2V

C1401 U1401
1.0UF;20%;6.3V;0201 10uF;20%;6.3V;0402 28K;1%;0201
C2 A1
BIAS VOUT 33pf;30%;50V;0201
GND
B2 B1 GND GND
[10] EXT_PMIC_EN2 EN ADJ 0.5V x (1+R1402/R1403)=1.2V
C A2 C
GND
[9] VS2_PMU VIN R1403
20K;1%;0201
C1403 MT6680P/A
C1
4.7uF;20%;6.3V;0402
GND
GND GND
Ext. Bulk for VS2

L1401 Note: 28-2 Suggest trace width > 40 mil
U1402
[8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT 7 6 1.0uH;20%;2016 1.46V

VIN LX EXT_VS2 [9]
TP1401
C1406 C1407 R1404 C1404
1 8 2 270K;1%;0201
0.1uF;20%;6.3V;0201 PGOOD FB
1 22uF;20%;6.3V;0603
10uF;20%;6.3V;0402
12x15MIL EN
4
5 VOUT 3
PGND AGND GND
GND GND
R1405
MT6690N/A
180K;1%;0201
[8,9,22] VS1_PMU
GND
GND
0.6V x (1+R1404/R1405)
EXT_VS2_FB [9]
B
NOTE: Do not use VCAMD 1.3/1.5/1.8 when VS2 BUCK applied B
Schematic design notice of "28_POWER_ThirdParty-Power"

Note 28-1: VA12 Layout placement please close to AP
Note 28-2: VS2 Buck Layout placement please close to PMIC MT6357
Note 28-3: VCN33 LDO Layout placement please close to MT6631
A A
Title REV: V10

14_POWER_ThirdParty_Powers

5 4 3 2 1
5 4 3 2 1
LPDDR3
U1501
Y2 F3 EMI_VDD1 [3,9]
[6] EMI0_CA0 CA0 VDD1_1
Y3 F4
W2 F9
W3 G5 C1501 C1502
V3 AA3 0.1uF;20%;6.3V;0201 2.2uF;20%;6.3V;0402
L3 AA5
K3 AB3
J3 AB4
J2 AB9 GND
H2
D
[6] EMI0_CA9 CA9 D
F5
W12 VDD2_1 F8
[6] EMI0_DQ0 DQ0 VDD2_2
V11 J5
V13 K5
U11 L2 Note: 44-1
U13 L5 Note: 44-4
T11 M5
T13 N5
R12 P5
N12 P8 VDRAM_PMU [2,9,16]
M13 P11
M11 R5
[6] EMI0_DQ10 DQ10 VDD2_12
L13 T5
[6] EMI0_DQ11 DQ11 VDD2_13
L11 U5
[6] EMI0_DQ12 DQ12 VDD2_14
K11 V5 C1530 C1531 C1503 C1504 C1505 C1506 C1508
[6] EMI0_DQ13 DQ13 VDD2_15
K13 W5
[6] EMI0_DQ14 DQ14 VDD2_16
J12 AB5
C0201_NC
C0201_NC
[6] EMI0_DQ15 DQ15 VDD2_17
22uF;20%;6.3V;0603
0.1uF;20%;6.3V;0201
0.1uF;20%;6.3V;0201
0.1uF;20%;6.3V;0201
0.1uF;20%;6.3V;0201
AB12 AB8
[6] EMI0_DQ16 DQ16 VDD2_18
AB11
[6] EMI0_DQ17 DQ17
AB10 G9
[6] EMI0_DQ18 DQ18 VDDQ1
AA13 H8
AA12 H12
AA10 J11
Y13 K10
Y11 K12
[6]
[6]
EMI0_DQ23
EMI0_DQ24
H11 DQ23 Power VDDQ6 L8
H13 DQ24 VDDQ7 L9
G10 M10
G12 M12 GND
G13 N11
F10 R11
F11 T10
Note: 44-2 [6] EMI0_DQ30
F12 DQ30 VDDQ13 T12
[6] EMI0_DQ31 DQ31 VDDQ14 U8
R1501 240;1%;0201 ZQ0 G2 VDDQ15 U9
R1502 240;1%;0201 ZQ1 G3 ZQ0 VDDQ16 V10
ZQ1 VDDQ17 V12
F13 VDDQ18 W11
Note: 44-3
G11 VSSQ1 VDDQ19 Y8
H10 VSSQ2 VDDQ20 Y12
J8 VSSQ3 VDDQ21 AA9
J13 VSSQ4 VDDQ22
K8 VSSQ5 K2
VSSQ6 VDDCA_1 VEMC_PMU [9]
K9 N2
GND L10 VSSQ7 VDDCA_2 U2
L12 VSSQ8 VDDCA_3 V2 C1509 C1510 C1511
M8 VSSQ9 VDDCA_4
VSSQ10 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 4.7uF;20%;6.3V;0402
N13 B3
P9 VSSQ11 VCC1 B12
R13 VSSQ12 VCC2 B13 GND GND GND
C T8 VSSQ13 VCC3 C4 C
U10 VSSQ14 VCC4 D8
U12 VSSQ15 VCC5 A4
VSSQ16 VCCQ1 VIO18_PMU [3,4,5,7,9,11,17,21,24,25,26,28,32,35,41]
V8 B6
V9 VSSQ17 VCCQ2 B9
W8 VSSQ18 VCCQ3 C7 C1512 C1513 C1514
W13 VSSQ19 VCCQ4 C11
VSSQ20 VCCQ5 0.1uF;20%;6.3V;0201 0.1uF;20%;6.3V;0201 2.2uF;20%;6.3V;0402
Y10 A11 eMMC_VDDI
AA11 VSSQ21 VDDI
VSSQ22 A7 GND GND GND
DS MSDC0_DSL [6] C1516
F2 B8 C1515
VSS1 CLK MSDC0_CLK [6]
G4 C2 0.1uF;20%;6.3V;0201 1.0UF;20%;6.3V;0201
VSS2 RST_N MSDC0_RSTB [6]
G8 A6
H3 VSS3 eMMC CMD MSDC0_CMD [6]
H5 VSS4 B4
VSS5 DAT7 MSDC0_DAT7 [6]
L4 A5 GND
M3 A10
M4 C9
MSDC0_DAT4 [6]
N4 VSS8
VSS9
DAT4
DAT3
B5
MSDC0_DAT3 [6]
Close to Memory
N8 C6
P4 B10
P12 A9
R3 VSS12 DAT0 MSDC0_DAT0 [6] Note: 44-3
R4 VSS13
R8 VSS14
T4 VSS15
Y4 VSS16 U3
VSS17 CS0_N EMI0_CS0 [6]
Y5 T3
VSS18 CS1_N EMI0_CS1 [6]
AA2
AA4 VSS19 LP-DDR3 T2
EMI0_CKE0 [6]
AA8 VSS20 CKE0 R2
VSS21 CKE1 EMI0_CKE1 [6]
H4 P3
VSSCA1 CK_T EMI0_CK_T [6]
J4 N3
VSSCA2 CK_C EMI0_CK_C [6]
K4
P2 VSSCA3 T9
U4 VSSCA4 DQS0_T R9
EMI0_DQS0_T [6] Note: 44-5
VSSCA5 DQS0_C EMI0_DQS0_C [6]
V4 M9
VSSCA6 DQS1_T EMI0_DQS1_T [6]
W4 N9
A3
VSSCA7 DQS1_C
DQS2_T
Y9
W9
EMI0_DQS1_C
EMI0_DQS2_T
[6]
[6] Schematic design notice of "44_Memory_eMMC_LPDDR3"
VSSm1 DQS2_C EMI0_DQS2_C [6]
A8 H9
VSSm2 DQS3_T EMI0_DQS3_T [6][2,9,16] VDRAM_PMU
A12 J9
B2 VSSm3
VSSm4
DQS3_C EMI0_DQS3_C [6]
Note 44-1: Please refer to power supply related page select VDRAM1 output
B7 R10
B11 VSSm5
VSSm6
DM0
DM1
N10
EMI0_DMI0
EMI0_DMI1
[6]
[6] C1517 voltage properly for LPDDR3
C3 W10
VSSm7 DM2 EMI0_DMI2 [6]
C5 J10 2.2uF;20%;6.3V;0201
VSSm8 DM3 EMI0_DMI3 [6]
C8
B
C10 VSSm9
VSSm10 VREFCA
M2
EVREF [6,16]
Note 44-2: DRAM ZQx resistor = 240ohm (1%) that must be connected to GND B
C12 P13
VSSm11 VREFDQ EVREF [6,16]
C13
D7 VSSm12
VSSm13
DNU1
AB14 Note 44-3: Please refer to eMCP vendor's datasheet or MTK common design notice to
A2 AB13
A13 NC1
NC2
DNU2
DNU3
AB2 C1518 get the recommendation bypass cap. value for VCC/VCCQ/VDDI power
GND B1 AB1
B14 NC3
NC4
DNU4
DNU5
AA14
1.0UF;20%;6.3V;0201
domains of eMMC.
D2 AA1
D3 NC5 DNU6 A14
D4 NC6 DNU7 A1 GND
D5 NC7
NC8
DNU8 Note 44-4: VDD2 VDDQ VDDCA decoupling cap: closed to DRAM ball.
D6
NC9 For other cap for PMIC [>10uF, at PMIC page]:
P10
ODT please also refer to MMD and layout guide for placement.
32EMCP16-EL3DTA28 Note 44-5: Please check MT6765, MT6762 and MT6761's capacitor value.
Project C1517 C1518
MT6765 2.2uF 1uF
MT6762 2.2uF 1uF
MT6761 0.1uF 0.1uF
A A
Title
15_Memory_eMMC_LPDDR3REV: V10
DEPARTMENT: WINGTECH-SH DESIGNER: YANGSHAOYUN

5 4 3 2 1
5 4 3 2 1
BATTERY
D
CONNECTOR D
[8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT
VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41]
[5] IDDIG R3608 1K;5%;0201 [28,29] USB_ID
TVS3602
1
TVS3606
1
C3632
C3629 C3630
10uF;20%;6.3V;0402
2
PTVSHC3D4V5U 1.0UF;20%;6.3V;0201 33pf;30%;50V;0201
SDA
PESD5V0L1BSF
2
Rfg > 0.5W
GND
[8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT
R3607 0.01;1%;0603 VBAT- [17]
SG3601
SG3602
J3601
[17,28] BAT_ID_CONN 1 6
BATON_CONN [17,28]
CS_N [10]
2 5 VBAT- [17]
CS_P [10]
3 4
C C
7 8
9 10
11 GND8PIN 12
13 14
CPBA206-0102E
R3631 0;0.5A;0201
2 3 R3633 6.8;1%;0201
[28,29] USB_DM_1 USB_DM [5]
NF_ICMF052P900MFR
1 4 R3634 6.8;1%;0201
[28,29] USB_DP_1 EMI3601 USB_DP [5]
TVS3604 TVS3605 R3632 0;0.5A;0201
1
[17,28] BATON_CONN R3605 1K;1%;0201 BATON [10]
R3606 16.9k;1%;0201 TREF_PMU [9]
2
2
PSED5V0H1BSF PSED5V0H1BSF
R3624 TVS3603
24K;1%;0201 PESD3V3V1BCSF
1
Battery pack is considered not present if BAT_ON is above 0.944*TREF
B B
R3601 100K;1%;0201
[3,4,5,7,9,11,16,21,24,25,26,28,32,35,41] VIO18_PMU
[4] BAT_ID R3602 5.1K;1%;0201

BAT_ID_CONN [17,28]
2
TVS3601 R3623
PESD3V3V1BCSF
ADC 0.05-1.45 with 0.3 gap 300K;1%;0201
1
A A
Title REV: V10

36_Battery/USB IF

5 4 3 2 1
5 4 3 2 1
D D
SPK Receiver
[8,9,10,13,15,17,21,22,23,24,25,28,41] VBAT
L3701 1.0uH;20%;2520
0.1uF;20%;6.3V;0201 C3727
J3701
C3725 C3726
AW87319 D4 PIN should connect BATTERY 3mil 10uF;20%;6.3V;0402 0.1uF;20%;6.3V;0201 Close to BB Close to connector
R3702 0;1A;0402 REC_N 1
[11] AU_HSN
6mil 6mil
2
C C
4-00-451008
J3702
TP3707 C3706
D4
B3
A4
12x15MIL
U3701 100pF;30%;50V;0201
6mil 6mil R3703 0;1A;0402 REC_P 1
SW
SW1
VDD
[11] AU_HSP
[5] AUDIO_PA_RST D3 A2
1
RSTN PVDD C3717 C3721 C3722 2

C3718 C3716
E3 B2
2
[5] SDA6 SDA PVDD1 TVS3701 TVS3702
10uF;20%;16V;0603 100pF;30%;50V;0201 100pF;30%;50V;0201
10uF;20%;16V;0603 10uF;20%;16V;0603 4-00-451008
[5] SCL6 E4 C2
SCL PVDD2
TP3706 D2
1
AD1 B3703 120ohm;1300mA;0402

TP3705 A1 SPKR_OUT_P [29]
VOP
12x15MIL 12x15MIL
B3704 120ohm;1300mA;0402 NF_ESD5431Z-2/TR NF_ESD5431Z-2/TR
1
C1 SPKR_OUT_N [29]
VON
[11] AU_LOLN C3723 0.1uF;20%;6.3V;0201 E2
INN
[11] AU_LOLP C3724 0.1uF;20%;6.3V;0201 E1 C3712 C3711 Connect to one GND SG3702
BGND1
INP
BGND
PGND
GND
AD2
C0201_NC C0201_NC
B4
B1
C3
D1
C4
AW87319CSR
2
SG3701
HT-COPPER
Connecting the GNDs together and
then to main GND through signle via
B B
A A
Title REV: V10

37_SPK/Receiver/Vibrator

5 4 3 2 1
5 4 3 2 1
D D
MAIN MIC
main GND
SG3802
Close to PMIC
C3802
68pF;30%;50V;0201
[29] AU_VIN0_P_CONN C3821 1.0UF;20%;6.3V;0201AU_VIN0_P [11]
C3813
33pf;30%;50V;0201
[29] AU_VIN0_N_CONN C3812 1.0UF;20%;6.3V;0201AU_VIN0_N [11]
C3818
68pF;30%;50V;0201 TO CODEC
C C
main GND
AU_MICBIAS0 [11,29]
R3801
0;0.5A;0201
C3801 0.1uF;20%;6.3V;0201
TOP MIC SG3805
C8225 33pf;30%;50V;0201
U3801
SPV0842LR5H-1 Close to BB
1 2 C3809 1.0UF;20%;6.3V;0201 [11] AU_VIN2_P
VDD OUT
B B
GND
C3808
100pF;30%;50V;0201
3
C3810 1.0UF;20%;6.3V;0201 [11] AU_VIN2_N
C3803 C3804
C0201_NC C0201_NC
SG3801
A A
Title REV: V10

38_MIC

5 4 3 2 1
5 4 3 2 1
D D
Earphone
AU_HPL R3911 0;1A;0402 R3901 20;1%;0201
[11] AU_HPL AU_HPL_IN [29]
AU_HPR R3912 0;1A;0402 R3902 20;1%;0201

[11] AU_HPR AU_HPR_IN [29]
Earphone UL
NOTE: 63-1
C3908 C3907
C0201_NC C0201_NC
GND GND
main GND
C C
[11] AU_MICBIAS1
C3988
SG3902
C0201_NC
R3903
1K;5%;0201
C3905 1.0UF;20%;6.3V;0201 EAR_MIC_N

[11] AU_VIN1_N AU_VIN1_N_MIC [29]
C3903
R3905
C0201_NC SG3901
C3904
33pf;30%;50V;0201
C3909
1.5K;5%;0201
C0201_NC
C3906 1.0UF;20%;6.3V;0201 EAR_MIC_P
[11] AU_VIN1_P AU_VIN1_P_MIC [29]
Connecting the GNDs C3910

together and then to main C0201_NC
GND through signle via
GND
R3904 1K;5%;0201
[11] ACCDET
NOTE:62-2
B B
NOTE:62-1 R3911 R3912, BEAD6203, BEAD6204 and BEAD6205 needs changed to

"BLM18BD102SN1" for high THD performance (-90dB) but this BOM change will
results in FM RSSI 10dB degraded .
A
Note 62-2: Reserved Cap for CS/RS test, please double check multi-key function when used A
Title REV: V10

39_Earphone

5 4 3 2 1
Note 62-1: Part # of BEAD6202, BEAD6203, BEAD6204 and BEAD6205 needs changed to
"BLM18BD102SN1" for high THD performance (-90dB) but this BOM change will
results in FM RSSI 10dB degraded .
Note 62-2: Reserved Cap for CS/RS test, please double check multi-key function when used
Note 62-3: Earphone Jack Earphone Jack

@ Main board @ Sub board
R6513 0 ohm 100nF
Note 62-4: Please Select ACC Mode for Operator Project to Pass Electrical MOS Test;
5 4 3 2 1
Common Mode Filter
[21] LCM_LEDA 2 3 [5] DSI0_D3P

MIPI_DSI1_LANE3_P_CON [21] EMI4001
[3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU TP4031
12x15MIL 1 ICMF052P900MFR
4 [5] DSI0_D3N
MIPI_DSI1_LANE3_N_CON [21]
[21] LCM_AVEE
D D
[21] LCM_AVDD J4001
1
R4016 1 40
2 39
[21] LCM_LEDA MIPI_DSI1_LANE3_N_CON [21]
[5,21] LCM_RST 3 38
4 37 MIPI_DSI1_LANE3_P_CON [21]
[21] LCM_LEDK [5] DSI0_D2N
5 36 MIPI_DSI1_LANE2_N_CON [21] 1 EMI4002 4
[21] LCD_CABC [21] LCM_LEDK 6 35 MIPI_DSI1_LANE0_N_CON [21]
R0201_NC [5,21] SPI3_LCM_CLK 7 34 MIPI_DSI1_LANE0_P_CON [21] 2 ICMF052P900MFR
3 [5] DSI0_D2P
MIPI_DSI1_LANE2_P_CON [21]
[5,21] SPI3_LCM_CSB
8 33
[5,21] SPI3_LCM_MOSI 9 32 MIPI_DSI1_CLK_N_CON [21]
[3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU [5,21] SPI3_LCM_MISO MIPI_DSI1_CLK_P_CON [21]
10 31
[5,21] EINT_CTP 11 30
[5,21] GPIO_CTP_RSTB 12 29 MIPI_DSI1_LANE1_N_CON [21]
[5,21] GPIO_CTP_RSTB
[5,21] LCM_RST MIPI_DSI1_LANE1_P_CON [21]
13 28
[21] LCD_CABC 14 27
[5,21] EINT_CTP [5] DSI_TE MIPI_DSI1_LANE2_N_CON [21] EMI4003 [5] DSI0_CKP
15 26 MIPI_DSI1_CLK_P_CON [21] 2 3
16 25 MIPI_DSI1_LANE2_P_CON [21]
[3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU 17 24 1 ICMF052P900MFR
4 [5] DSI0_CKN
R4032 1K;5%;0201 [5] LCD_ID2 MIPI_DSI1_CLK_N_CON [21]
18 23 R4031 1K;5%;0201 [5] LCD_ID1
[21] LCM_AVDD 19 22 R4030 1K;5%;0201 [5] LCD_ID0
20 21
[5,21] SPI3_LCM_CLK [21] LCM_AVEE
41 44
[5,21] SPI3_LCM_CSB
42 GND4PIN 43
EMI4004 [5] DSI0_D1P
[5,21] SPI3_LCM_MOSI MIPI_DSI1_LANE1_P_CON [21] 2 3
OK-23GF040-04(005A)
1 ICMF052P900MFR
4 [5] DSI0_D1N
[5,21] SPI3_LCM_MISO MIPI_DSI1_LANE1_N_CON [21]
C4031
C4006 C4007 C4021 C4061 C4008 C4010 C4011 C4085 C4086 C4089 C4088
EMI4005
C0201_NC
MIPI_DSI1_LANE0_P_CON [21] 2 3 [5] DSI0_D0P
68pF;30%;50V;0201
1000pF;20%;50V;0201
33pf;30%;50V;0201
33pf;30%;50V;0201
C0201_NC
C0201_NC
C0201_NC
C0201_NC
C0201_NC
1.0UF;20%;6.3V;0201
68pF;30%;50V;0201
1 ICMF052P900MFR
4 [5] DSI0_D0N
MIPI_DSI1_LANE0_N_CON [21]
C C
LCD Gate Drive LCD Backlight LED Driver
LCD Gate Driver I2C address: 0X3E (Write:0x7C, Read:0x7D) SM5109&OCP2131WPAD Rating : 50V
20mil D4001
2 1 R4004 600oHM;300mA;0402 15mil
4.7UH;20%;2016 R4006 0;1A;0603 L4002 10uH;20%;2520 LCM_LEDA [21]
L4001 [8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT
B [8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT B
LMBR140ET1G
C4029
C4022 C4032
C4028 C4027
[3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU
33pf;30%;50V;0201
10uF;20%;6.3V;0402
10uF;20%;6.3V;0402
1.0uF;10%;50V;0603 33pf;30%;50V;0201
U4010
4
U4003
SW
VIN
GND
R4017 R4018 C1 D1
VIN SW GND GND
E3 R4002 0;1A;0402
OUTP LCM_AVDD [21]
R0201_NC R0201_NC D3 GND GND
REG1 R4007 R0201_NC 5 1 R4005 0;1A;0402
[5,35] SCL3 B2 E2 [5] DISP_PWM CTRL FB LCM_LEDK [21]
C2 SCL REG2 R4003
[5,35] SDA3 SDA C4026
4.99 C4084
B1 10uF;20%;10V;0603
GND1
GND2
[5] GPIO_LCM_BIAS_EN ENP R4008 0;0.5A;0201
A1 A2 R4001 0;1A;0402 [21] LCD_CABC
LCM_AVEE [21]
NC
[5] GPIO_LCM_BIAS_EN2 ENN OUTN 33pf;30%;50V;0201
GND R4007 R4008 Share PAD 4.99;1%;0402
B3 C3 C4087
TP4001 E1 PGND1 CFLY1 C4023
7
D2 PGND2 A3
C0201_NC
1 AGND CFLY2 C4024
4.7uF;10%;10V;0603
C4025
GND
TP4002
12x15MIL SM5109 10uF;20%;10V;0603 GND
1 10uF;20%;10V;0603
AW9962E&SGM3756
SM5109&OCP2131WPAD
I LED=VFB(200mv)/Rset 4.99@ 40mA
12x15MIL GND
GND
GND GND
GND
A A
Title REV: V10

40_LCD/CTP IF
5 4 3 2 1
5 4 3 2 1
Main Camera 13M TP4100

1
TP4101
1
12x15MIL
[5,22]
[5,22]
RCP_B
RCN_B
12x15MIL
TP4102
1 [5,22] RDP0_B
C4101
TP4103
12x15MIL
1.0UF;20%;6.3V;0201 J4101
1 [5,22] RDN0_B
[9] VLDO28_PMU VCM 1 30
[5] PWDN_VCM 2 29
[5,22] SCL2 3 28 R4132 0;0.5A;0201 CAM_CLK0 [5] 12x15MIL
[5,22] RDN1_B 4 27
D [5,22] RDP1_B 5 26 RDN0_B [5,22] D
6 25 RDP0_B [5,22]
[5,22] RCN_B 7 24
[5,22] RCP_B 8 23 R4150 1K;5%;0201 MOUDLE_ID1 [5] [5,22] RDP1_B
9 22
[5,22] RDN3_B 10 21 [5,22] RDN1_B
11 20 RDN2_B [5,22]
[5,22] RDP3_B
12 19 RDP2_B [5,22]
13 18 R4133 0;0.5A;0201 CAM_RST0 [5]
[5,22] SDA2 14 17
[22] FSYNC VCAMD_PMU [9]
[9,22] VCAMIO_PMU IOVDD 1.8V 15 16 AVDD 2.8V
CAM_AVDD_2P8 [22]
CAM AVDD 2P8 FOR FRONT AND REAR AVDD 31 33
32 GND4PIN 34 C4102C4162 C4187 C4103 C4105 C4104 [5,22] RDP2_B
C4106
[9,22] VCAMA_PMU R4190 0;0.5A;0201 C4185 C4186 C4166
YXT-BB1B-30S-02 2.2uF;20%;6.3V;0201
2.2uF;20%;6.3V;020115pF;10%;50V;0201C0201_NC [5,22] RDN2_B
C0201_NC C0201_NC 1.0UF;20%;6.3V;0201
C0201_NC 4.7uF;20%;6.3V;0402
C0201_NC
[8,9,10,13,15,17,18,21,23,24,25,28,41] VBAT
U4102
C4118 4 1
IN OUT CAM_AVDD_2P8 [22]
C0201_NC
2
GND1 R4139
[9,22] VCAMA_PMU 3 5
EN GND2 C4120
NF_ETA5053V280DF1E
C0201_NC
10K;5%;0201 [5,22] RDP3_B
C4139 [5,22] RDN3_B
C0201_NC
SAMSUNG NEED FAST DISCHARGE TYPE LDO

GND
C
Depth Camera 2M TP4104
1
TP4105
1
[5,22]
[5,22]
RCP_D
RCN_D
C
12x15MIL
SG4101
12x15MIL
BOM change to 813100001781

[9,22] VCAMIO_PMU C4141 C0201_NC
[22] CAM_AVDD_2P8 R4144 0;0.5A;0201
J4102
C4107 4.7uF;20%;6.3V;0402 AGND1 24
[9,22] VCAMA_PMU R4141 NF_0;0.5A;0201AVDD 2.8V 2 23 R4135 0;0.5A;0201 [5] CAM_CLK2
3 22
[5,22] RCN_D TP4106
VCAMIO_PMU [9,22] DOVDD 1P8 4 21
R4103 R4104 5 20 [5,22] RCP_D 1 [5,22] RDP0_D
C4111 TP4107
CAM_PDN2 [5] 6 19
R0201_NC R0201_NC 7 18 1 [5,22] RDN0_D
CAM_RST2 [5] R4134 0;0.5A;0201
8 17 15pF;10%;50V;0201 12x15MIL
R4152 1K;5%;0201
[5] PWSEQ_ID 9 16
10 15 [5,22] RDN0_D 12x15MIL
[5,22] SDA4 [5,22] RDP0_D
11 14
[5,22] SCL4 12 13
R4171
[22] FSYNC
0;0.5A;0201
[5,22] SDA4 C4188 C4189 C4136 C4108 C4109 25 28
26 GND-4PIN 27
[5,22] SCL4
C0201_NC C0201_NC C0201_NC 2.2uF;20%;6.3V;0402
C0201_NC
OK-23GF024-04
Front Camera 8M
B B
TP4108
1
12x15MIL [5,22] RCP
[5,22] RCN
BOM change to 813100001781
TP4109
1
J4103 TP4110
1 24 12x15MIL
1
[22] FCAM_DVDD RDN0 [5,22]
2 23
[9,22] VCAMIO_PMU RDP0 [5,22]
3 22
R4136 0;0.5A;0201 4 21 12x15MIL [5,22] RDP0
[5] CAM_CLK1 CAM_CLK1_CON [22] [5,22] RCN RDN1 [5]
[5,22] RCP 5 20
RDP1 [5]
6 19 [5,22] RDN0
R4137 0;0.5A;0201 CAM_RST1_CON [22] [22] CAM_CLK1_CON 7 18
[5] CAM_RST1 RDN3 [5] TP4111
8 17
[22] CAM_RST1_CON RDP3 [5]
[5,22] SDA2 9 16 1
SDA2 [5,22] [5,22] SCL2 10 15
[5,22] SDA2 RDP2 [5]
11 14
[22] FAGND RDN2 [5] 12x15MIL
12 13
SCL2 [5,22] [22] CAM_AVDD_2P8_CON
[5,22] SCL2
25 28
26 GND-4PIN 27
OK-23GF024-04
C4114 C4144
C4142 C4143
C0201_NC
C0201_NC C0201_NC C0201_NC
[22] FCAM_DVDD FCAM_DVDD [22]
[9,22] VCAMIO_PMU VCAMIO_PMU [9,22]
[9,22] VCAMA_PMU R4175 R0201_NC
[8,9,15] VCAMD_PMU R4165 0;0.5A;0201
A [22] CAM_AVDD_2P8 R4173 0;0.5A;0201 A

CAM_AVDD_2P8_CON [22]
C4140
[8,9,15] VS1_PMU
C4113 C4163
C0201_NC U4103
C4116 C4115 C4130 4 1 [22] FCAM_DVDD
IN OUT
2.2uF;20%;6.3V;0201
2.2uF;20%;6.3V;0201
C0201_NF
1.0UF;20%;6.3V;0201 2.2uF;20%;6.3V;0201 2
FRONT_CAM_DVDD_EN [5] 3 GND1 5 C4131 C4132
EN GND2
C0201_NF C0402_NF
TP4155
ETA5053V120DF1E_NF Title REV: V10
[22] FAGND 1
41_Camera IF
12x15MIL
SG4102
Date: Tuesday, April 09, 2019 Sheet 22 of 53
5 4 3 2 1
5 4 3 2 1
D D
L4201 1.0uH;20%;2016
[8,9,10,13,15,17,18,21,22,24,25,28,41] VBAT
C4203 C4204
4.7uF;20%;6.3V;0402 1.0UF;20%;6.3V;0201
EP
U4201
BOM Change to A-SL689W1D-QA6-4T
GND
5 8
SW1 OUT1
C 6 9 C
SW2 OUT2
2
4 LED4201
VIN
TP4202 A-SL689W1D-QA6-4T
TP4201
12x15MIL 12
12x15MIL LED1
1
14
LED2
2
10 1 TVS4203
2
[5] FLASH_EN ENF RM TVS4202
11 2
AGND1
AGND2
[5] TORCH_EN ENM RF C4201
PGND
4.7uF;20%;6.3V;0402
R4202
NF_PSED5V0H1BSF
R4201
NF_PSED5V0H1BSF
OCP8132AVAD
7
13
1
1
68.1K;1%;0201
13k;1%;0201
I LED1=6800/Rset
I LED2=6800/Rset
FLASH 1.0A/ TORCH 200mA
B B
A A
Title REV: V10

42_Flash/RGB
5 4 3 2 1
5 4 3 2 1
D D
[8,9,10,13,15,17,18,21,22,23,25,28,41] VBAT
U4301
4 1 R4301 0;0.5A;0201
IN OUT FP_3V3 [24]
2
3 GND1 5
[5] FP_LDO_EN EN GND2 C4302 C4303
C4304
C4301
ETA5053V330DF1E 1.0UF;20%;6.3V;0201
100pF;30%;50V;0201
33pf;30%;50V;0201
1.0UF;20%;6.3V;0201
Need change to 807100001163
Fingerprint
C J4301 C
[5] EINT_FP_N 1 10 GPIO_FP_RST_N [5]

2 9 SPI1_MO [5]
3 8 SPI1_MI [5]
4 7 SPI1_CSB [5]
[24] FP_3V3 5 6
[3,4,5,7,9,11,16,17,21,25,26,28,32,35,41] VIO18_PMU R4302 0;0.5A;0201 SPI1_CLK [5]
TVS4301 TVS4302 11 14
2
2
12 GND-4PIN 13
C4310 C4311 C4312 C4313 TVS4303 TVS4304 TVS4305
2
C4305 C4306 C4307 C4308 C4309
OK-23GF010-04
NF_AZ5A23-01F
C0201_NC C0201_NC C0201_NC C0201_NC C0201_NC
C0201_NC
C0201_NC
0.1uF;20%;6.3V;0201
1.0UF;20%;6.3V;0201
NF_AZ5A23-01F
PESD3V3V1BCSF
NF_AZ5A23-01F
NF_AZ5A23-01F
1
1
B B
Fingerprint
A A
Title REV: V10

43.Fingerprint
DOCUMENT NO.: S96116-1-13_MB_20190409-1317 Size D
DEPARTMENT: Wingtech-SZ DESIGNER: DESIGNER

5 4 3 2 1
5 4 3 2 1
Accerometer ALP-Sensor
TP4401 TP4402 TP4403 TP4404

12x15MIL 12x15MIL 12x15MIL 12x15MIL
D D
1
[5,25] SPI4_MI
[5,25] SPI4_MO
BMA253
[5,25] SPI4_CLK
SPI4_CLK [5,25]
[5,25] SPI4_CSB
12
11
U4412
SCX
PS
[5,25] SPI4_MI 1 10
SDO CSB SPI4_CSB [5,25]
[5,25] SPI4_MO 2 9
SDX GND U4416
3 8 1 10
[3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU VDDIO GNDIO GND1 NA4
R4460
4 7 [5,25] EINT_ALS 2 9
NC VDD VIO28_PMU [9,25] INTB GND2
INT1
INT2
C4402 0;0.5A;0201
[5,25] SCL1 3 8
SCL NA3
1.0UF;20%;6.3V;0201 BMA253 C4461 4 7
6
C4411 [5,25] SDA1 SDA NA2
C0201_NC 1.0UF;20%;6.3V;0201 [9,25] VIO28_PMU 5 6
VIO28_PMU_CON [25] VDD NA1
MN26005UKDN
[5] EINT_ACC
U4417
1
VDD
[5,25] SCL1 2 4
SCL LEDA VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41]
8 5
[5,25] SDA1 SDA LDR
7 6
GND
[5,25] EINT_PS /INT NC
STK3332
3
C C
FOR SAR sensor [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU

ALS/PROXIMITY SENSOR
R4420
R4422 R4423 R4425
821400000421 1.7V---3.0V
[25] VIO28_PMU_CON 22;5%;0201 R4424
VIO28_PMU [9,25]
[9,25] VIO28_PMU R4461 0;0.5A;0201
R0201_NC R0201_NC R0201_NC
R0201_NC C4404
I2C Address 0x47H
[8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT [5,25] SCL1 2.2uF;20%;6.3V;0402
U4450
C4452
[5,25] SDA1
4 1 [35] VDD2V8_SAR
C0201_NC IN OUT
2 C4450
GND1 [8,9,10,13,15,17,18,21,22,23,24,25,28,41] VBAT VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41]
[9,25] VIO28_PMU 3 5 [5,25] EINT_PS
EN GND2 C0201_NC C4410
NF_SGM2036-1.2YUDH4G/TR [5,25] EINT_ALS
2.2uF;20%;6.3V;0402
C4453
C0201_NC
B B
[9,25] VIO28_PMU VIO28_PMU [9,25]
C4405 C4406
1.0UF;20%;6.3V;0201 0.1uF;20%;6.3V;0201
A A
Title REV: V10

44_Sensor
5 4 3 2 1
5 4 3 2 1
Change to 813300002141
D
SIM1 D
J4501
R4503 47;5%;0201 S1 S7 R4505 100;5%;0201

[4] SIM1_SCLK VCC1 IO1 SIM1_SIO [4]
S1A S7A
R4504 100;5%;0201 S1B VCC2 IO2 S7B
[4] SIM1_SRST VCC3 IO3
2
R4501 2.2;1%;0201 TVS4523
[3,9] VSIM1_PMU S2 S6
RST1 VPP1
2
TVS4521 TVS4522 S2A S6A
C4501 RST2 VPP2
S2B S6B
RST3 VPP3
1
1.0UF;20%;6.3V;0201
TVS4511 S3 S5
S3B CLK1 GND1 S5A
1
S3A CLK2 GND2 S5B
CLK3 GND3 NF_ESD5451Z-2/TR
1
PESD5V0S1UL
NF_ESD5451Z-2/TR NF_ESD5451Z-2/TR S186-1B01F13F
C
J4502
SIM2 C
S1 S7 R4508
[4] SIM2_SCLK R4506 47;5%;0201 SIM2_SIO [4]
S1A VCC1 IO1 S7A
VCC2 IO2 100;5%;0201
R4516 100;5%;0201 S1B S7B
[4] SIM2_SRST VCC3 IO3
2
[3,9] VSIM2_PMU R4502 2.2;1%;0201
S2 S6 TVS4526
S2A RST1 VPP1 S6A
TVS4503 RST2 VPP2
2
2 S2B S6B
RST3 VPP3
NF_ESD5451Z-2/TR
C4502 TVS4524 TVS4525
N2
S3 S5
CLK1 GND1
1.0UF;20%;6.3V;0201
S3B S5A
N1
CLK2 GND2
1
S3A S5B
CLK3 GND3
PESD5V0S1BL
1
NF_ESD5451Z-2/TR NF_ESD5451Z-2/TR S186-1B01F13F

[3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU VMCH_PMU [9,26] VMCH_PMU [9,26]
1
R4526
100K
1
R4525 1 R4527
2
47K CJ2101
Q4502 R0402_NC
3
3
Q4501
2
R4583 1 2 0 1
[5,26] EINT_SIM_SD 2SK3541
2
VDD_SD [26]
1
R4528
47K
2
B B
TF CARD Change to-813300002241
J4503
R4509 Shielding connect to ground
33;5%;0201 P1 J4504
[5] MSDC1_DAT2 DAT2_2 Scratch resistant steel sheet
PA1
DAT2_1
SH4505 G1 G8 VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41]
R4510 33;5%;0201 P2 GND1 GND8
[5] MSDC1_DAT3 CD_DAT3_2 Change to813300002131 G2 G9
PA2 GND2 GND9
CD_DAT3_1 G3 G10
GND3 GND10
[5] MSDC1_CMD R4511 33;5%;0201 P3
CMD2
屏蔽罩 G4
G5 GND4 GND11
G11
G12 R4521
PA3 GND5 GND12
CMD1 G6 G13 100K;1%;0201
G7 GND6 GND13
P4
1
[26] VDD_SD GND7
PA4 VDD2
VDD1 SC18042-W007
R4512 33;5%;0201 P5
[5] MSDC1_CLK CLK2 G14 R4515 1K;5%;0201
PA5 SWITCH EINT_SIM_SD [5,26]
CLK1
P6
2
VSS2 S186-1B21F13B TVS4501
PA6
VSS1
Switch S186-1B21F13B
R4513 33;5%;0201 P7
[5] MSDC1_DAT0 DAT0_2 TRAY IN TRAY OUT
PA7
DAT0_1
H L
R4514 33;5%;0201 P8
[5] MSDC1_DAT1 DAT1_2 NF_ESD5431Z-2/TR
PA8
DAT1_1
1
S186-1B02F13F
2
TVS4514 TVS4513 TVS4512

2
TVS4517 TVS4516 TVS4515

C4570
2
TVS4508
N2
C0201_NC PESD5V0S1BL
C4511
2.2uF;20%;6.3V;0402
N1
NF
NF NF NF NF
NF
1
1
1
A A
Title REV: V10

45_SIM/TF IF
5 4 3 2 Date: 1 Monday, April 08, 2019 Sheet 26 of 53

5 4 3 2 1
D
Power Key / Key Pad D
DO NOT put pull-up resistor on PWRKEY
[28] HOMEKEY_TP
[28] PWRKEY_CONN_TP
[28] KPCOL1_TP
J4601 J4602
ANT-AT21-110001-02 AT14-110001-04
VOLUME DOWN::HOMEKEY+GND
1 1
2 2
J4603
ANT-AT21-110001-02 Note: 75-1
POWKEY：PWR+GND
J4605 1 R4601 1K;5%;0201 PWRKEY [10]
AT14-110001-04
2
2
J4604
TVS4601
2 AT14-110001-04
5V PESD5V0X1BCSF C4601
C0201_NC
1 VOLUME UP:KPCOL1+GND
C
2 C
1
[5] KPCOL1 R4602 1K;5%;0201
GND
2
TVS4604
Note: 75-3
Note: 75-3
PESD5V0X1BCSF
1
[10] HOMEKEY R4603 1K;5%;0201
TVS4602
2
Note: 75-3
PESD5V0X1BCSF
1
SIDEKEY
VOLUME DOWN: HOMEKEY+GND
POWERON: PWRKEY+GND
VOLUME UP: KPCOL1+GND
B B
Note 75-1:DO NOT put pull-up resistor on PWRKEY

Note 75-2: Volume Up:HOME KEY+GND
Volume Down:KPCOL1+GND
A A
Title REV: V10

46_Sidekey
5 4 3 2 Date: 1Thursday, April 11, 2019 Sheet 27 of 53

5 4 3 2 1
Fixture Test point Grounding

DEVICE MODE CONF
CT BT 1
TP4722 USB
TP-1MM
TP4713 TP4765 TP4714 TP4716 TP4717
[8,9,10,13,15,17,18,21,22,23,24,25,41] VBAT 1 TP-1MM TP-1MM TP-1MM TP-1MM TP-1MM
TP4712
TP-1MM
D
1
PTH D
1
[17] BAT_ID_CONN TP4720
TP-1MM
1 [17,29] USB_DM_1 HOLE4701 HOLE4702 HOLE4703 HOLE4704 HOLE4705 HOLE4706

[17] BATON_CONN TP4721 PTH-1.6MM PTH-1.6MM PTH-1.6MM PTH-1.6MM PTH-1.6MM 1.4-1.6
TP-1MM
[17,29] USB_DP_1
[13,29] VBUS_USB_IN_CON
1
TP4731
TP-1MM USB_ID [17,29]
1
1
TP4730
TP-1MM
BAT GND place near the connect

KEYS
[27] PWRKEY_CONN_TP
POWER_ON 1
TP4703
TP-1MM
[27] HOMEKEY_TP
VOL_UP 1 TP-1MM
TP4705
[27] KPCOL1_TP
VOL_DOWN 1 TP-1MM
TP4706
[5] KPCOL0
FORCE DOWNLOAD R4718 1K;5%;02011
TP4766 TP-1MM
TOP J4701
Spring Grounding
AT14-110001-04
J4702
AT14-110001-04
Debug
C C
J4703
AT14-110001-04
JTAG UART 1
2
R4716 1K;5%;0201 UTXD0_TP TP4761 1 TP-0.5MM
[5,28] UTXD0
CON4701
12 1 R4717 1K;5%;0201 URXD0_TP TP4762 1
12 1 VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] [5,28] URXD0
11 2 TP-0.5MM
[5] EINT8 10 11 2 3 SPI0_MO [5]
[5] SPI0_CSB 9 10 3 4 SPI0_CLK [5]
9 4 SPI0_MI [5]
8 5
7 8 5 6 UTXD0_TP [5,28]
7 6 URXD0_TP [5,28]
14 GND4PIN 13 [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU
16 14 13 15
16 15
R4727
AXE612124
TP4727
NF_10K;5%;0201 1
[5] EINT_RAMDUMP
12x15MIL
B B
SHIELDING
TOP Waterproof SN Label
MARK
SH4702 SH4703
SH4701
J4711
屏蔽罩屏蔽罩屏蔽罩 SN

1
BM4701 BM4702
1
PMI_SH BB_SH
1
WCN BAD Mark BAD Mark
SN-4x4mm
WCN BB_SH
PMI_SH
1
BM4703 BM4704
BAD Mark BAD Mark
BOT
Change to 817000003431
1
1 MIC MYLAR PCB

A
SH4706
BAD MARK MY4702
A
SH4705
BAD MARK ON PANEL
Mylar
屏蔽罩屏蔽罩 1
1
RF_SH
1
PMU_SH 4*7*0.08
Title
47_Testpoint/Shielding/GNDREV: V10

PMU_SH RF_SH
5 4 3 2 1
5 4 3 2 1
D D
C C
J4801
[11] HP_EINT 1 30 LTE_VFE28 [38,41,43,44,46]
[51] FM_ANT_P 2 29 BPI_BUS0 [4]
[51] FM_ANT_N 3 28 BPI_BUS9 [4]
4 27
[11,19] AU_MICBIAS0 5 26 BPI_BUS1 [4]
[19] AU_VIN0_P_CONN ANT_SAR_CS1 [35]
[19] AU_VIN0_N_CONN 6 25
ANT_SAR_CS0_REF [35]
7 24 USB_ID [17,28]
[20] AU_VIN1_P_MIC
[20] AU_VIN1_N_MIC 8 23
9 22 USB_DP_1 [17,28]
[20] AU_HPL_IN 10 21 USB_DM_1 [17,28]
[11] AU_REFN 11 20
[20] AU_HPR_IN 12 19 VIBR_PMU [9]
[11] AVSS28_AUD 13 18 VIBR_GND [29]
[18,29] SPKR_OUT_P 14 17 SPKR_OUT_P [18,29]
[18,29] SPKR_OUT_N 15 16 SPKR_OUT_N [18,29]
31 33
C4801 C4802 C4803 C4804 C4805 C4806 32 GND4PIN 34
C0201_NC C0201_NC C0201_NC C0201_NC C0201_NC C0201_NC WP27D-S030VA3
[13,28] VBUS_USB_IN_CON
[29] VIBR_GND
R4803
0;0.5A;0201
B B
A A
Title REV: V10

48_Sub PCB IF

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title
<Title>
Size Document Number Rev

A1 <Doc> 1.0

5 4 3 2 1
MT6177MV/A
MT6177MV/B
D D
G10
G11
G12
H10
H11
E10
K10
E11
K11
E12
F11
U5801
L10
J11
G3
G5
G6
G7
G8
G9
C3
D3
H3
C4
D4
H4
C5
D5
H5
C6
D6
H6
C7
D7
H7
C8
D8
H8
C9
D9
H9
K2
E4
E5
E6
E7
E8
B9
E9
F3
F4
F5
F6
F7
F8
F9
J7
J8
J9
MT6177MV/A
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
RF_B40B41_PRX_RFIC B8
[41] RF_B40B41_PRX_RFIC PRX1
RF_B5_PRX_RFIC A8 F12
[38] RF_B5_PRX_RFIC PRX2 VDD_TXHF VRF18_RFIC [32]
RF_B8_PRX_RFIC B7
[38] RF_B8_PRX_RFIC PRX3 L11 C5850
RF_B20_PRX_RFIC VDD_STXLV VRF12_RFIC [32]
A7 0.1uF;20%;6.3V;0201
[38] RF_B20_PRX_RFIC PRX4
RF_B1_PRX_RFIC B6 J10
[32] C5849
PRX
[39] RF_B1_PRX_RFIC PRX5 VDD_STXHF VRF18_RFIC
0.1uF;20%;6.3V;0201
RF_B3_PRX_RFIC A5
[39] RF_B3_PRX_RFIC PRX6 E3
RF_B7_PRX_RFIC VDD_RXLV VRF12_RFIC [32] C5848
B5 0.1uF;20%;6.3V;0201
[39] RF_B7_PRX_RFIC PRX7
RF_B4_PRX_RFIC A4 G2
[39] RF_B4_PRX_RFIC PRX8 VDD_RXHF VRF18_RFIC [32] C5847
0.1uF;20%;6.3V;0201
RF_B2_PRX_RFIC B4
[39] RF_B2_PRX_RFIC SWHB C5846
RF_B28_PRX_RFIC B3
[38] RF_B28_PRX_RFIC SWLB 0.1uF;20%;6.3V;0201
RF_B20_DRX_RFIC A2
[46] RF_B20_DRX_RFIC
[46] RF_B28_DRX_RFIC
RF_B28_DRX_RFIC A1
DRX1
DRX2
MT6177M BSI_D2
J2
J1 RFIC0_BSI_D1
RF_B7_DRX_RFIC BSI_D1 RFIC0_BSI_D1 [4]
B2
[47] RF_B7_DRX_RFIC DRX3 RFIC0_BSI_D0
H2
RF_B2_DRX_RFIC BSI_D0 RFIC0_BSI_D0 [4]
B1 BSI The linear detection range is 0~-39dBm,
[46] RF_B2_DRX_RFIC DRX4 RFIC0_BSI_CK
K1 coupling factor is 22~27dB.
RF_B5_DRX_RFIC BSI_CLK RFIC0_BSI_CK [4]
C2 DRX
[46] RF_B5_DRX_RFIC DRX5 RFIC0_BSI_EN
H1 3dB Attenuator
RF_B3_DRX_RFIC BSI_EN RFIC0_BSI_EN [4]
D1
[46] RF_B3_DRX_RFIC DRX6
RF_B38/41_DRX_RFIC D2
[47] RF_B38/41_DRX_RFIC DRX7 R5822
RF_B1/4_DRX_RFIC 15;5%;0201
E1 L7
[46] RF_B1/4_DRX_RFIC DRX8 TXDET1 RF_TXDET [36]
RF_B8_DRX_RFIC E2
[46] RF_B8_DRX_RFIC DRX9 R5821 R5820
RF_B40_DRX_RFIC F2 R5819 300;5%;0201 300;5%;0201
[47] RF_B40_DRX_RFIC DRX10 2K;1%;0201
G1
RCAL
C RF_LTE_HB_TX_RFIC D12 G4 SRCLKENA1 C

[41] RF_LTE_HB_TX_RFIC TXO1 EN_BB SRCLKENA1 [4,10]
RF_LTE_MB_TX_RFIC C12 XO
[41] RF_LTE_MB_TX_RFIC TXO2 L1
RF_2G_HB_TX_RFIC VIO VIO18_RFIC [32]
A12
[36] RF_2G_HB_TX_RFIC TXO3(2G) TXO DRX(I/Q) PRX(I/Q) TX(I/Q) DET(I/Q)
RF_2G_LB_TX_RFIC A10 L2 PMIC_CLK_CELL C5845
[36] RF_2G_LB_TX_RFIC TXO4(2G) XO_IN PMIC_CLK_RF [10]
0.1uF;20%;6.3V;0201
RX2_BBQN
RX1_BBQN
RX2_BBQP
RX1_BBQP
RF_LTE_LB_TX_RFIC
RX2_BBIN
RX1_BBIN
RX2_BBIP
RX1_BBIP
STX_MON
C11
TX_BBQN
TX_BBQP
TX_GND1
TX_GND2
TX_GND3
TX_GND4
TX_GND5
[41] RF_LTE_LB_TX_RFIC
TX_BBIN
TX_BBIP
DET_QN
TXO5
DET_QP
DET_IN
DET_IP
J3
J4
K4
K5
J6
J5
J12
L12
K9
K7
K8
F10
B10
B12
C10
D10
D11
L4
L5
H12
K12
L9
For phone, remove 0R to avoid low slew rate.
For EVB, put test point.
No Connection, for PN test
LTE_DET_BB0_IN
LTE_TX_BB0_QN
LTE_DRX_BB0_QN
LTE_DRX_BB0_QP
LTE_PRX_BB0_QN
LTE_PRX_BB0_QP
LTE_DET_BB0_QN
LTE_DET_BB0_QP
LTE_TX_BB0_QP
LTE_DRX_BB0_IN
LTE_DRX_BB0_IP
LTE_PRX_BB0_IN
LTE_PRX_BB0_IP
LTE_DET_BB0_IP
LTE_TX_BB0_IN
LTE_TX_BB0_IP
Put LC filter (default L=0R, C=NC) close to PMIC output
due to harmonic rejection.
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
LTE_TX_BB0_IP
LTE_TX_BB0_QP
LTE_TX_BB0_IN
LTE_TX_BB0_QN
LTE_PRX_BB0_QP
LTE_PRX_BB0_IP
LTE_DRX_BB0_QP
LTE_PRX_BB0_QN
LTE_DET_BB0_QP
LTE_DRX_BB0_IP
LTE_PRX_BB0_IN
LTE_DET_BB0_IP
LTE_DET_BB0_QN
LTE_DRX_BB0_IN
LTE_DET_BB0_IN
LTE_DRX_BB0_QN
B B
Power domain of MT6177M

SH5803
VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,35,41]
[32] VIO18_RFIC
SH5804
[32] VRF18_RFIC VRF18_PMU [9]
C5851
4.7uF;20%;6.3V;0402
SH5805
[32] VRF12_RFIC VRF12_PMU [9]
C5852
4.7uF;20%;6.3V;0402
4.7uF close to RFIC for better Ripple Performance

A A
Title REV: V10

Page Name = 58_Transceiver-1
DOCUMENT NO.: Design Name = S96116-1-13_MB_20190409-1317
Size D
DEPARTMENT: DEPARTMENT = W INGTECH-SZDESIGNER: DESIGNER = LIUFENGLEI
Date: Page Modify Date = Monday, April 08, 2019 Sheet 32 of 53
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title REV: V10

Reserved

5 4 3 2 1
D D
C C
B B
A A
Title REV: V10

Reserved

5 4 3 2 1
D D
818011998
3.2.08.0113 MM8030-2610RK0
J6101 J6102
818011998
R6103 C6130 C6133 C6146
2 2 1 RF_Ant_TRX_carkit
I/O OUT IN RF_Ant_TRX_DPDT [36]
GND1
GND2
GND3
GND1
GND2
0;0.5A;0201 33pf;30%;50V;0201 33pf;30%;50V;0201
33pf;30%;50V;0201
3
4
1
3.2.08.0113
3
4
L6132 L6130
NF_82nH;3%;0201 82nH;3%;0201
R6126
10K;5%;0201
BPI_BUS10 [4]
R6127
100K;5%;0201 R6125
C6131
1M;5%;0201
100pF;30%;50V;0201
L6131
VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41]
68nH;5%;0201
参考summer
C6132
100pF;30%;50V;0201
C C
选用:A96T346
VDD2V8_SAR [25]
R6188 R6144
待确认
0;0.5A;0201 R0201_NC
选用:SX9324
VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41]
ABOV: 560R
B B
A96T346HW 0.1uF;20%;6.3V;0201
[29] ANT_SAR_CS0_REF C6141 C6142

U6102
R6177 A2 1.0UF;20%;6.3V;0201
560;5%;0201 R6145
VDD
[29] ANT_SAR_CS1 A3 2.2K;5%;0201
CS0 都要求上拉1.8V
R6176 B4
560;5%;0201 B3 CS1 R6161
CS2
SCL3 [5,21]
A1
SCL B1 0;0.5A;0201
A4 SDA B2
GND NIRQ R6162
A96T346HW SDA3 [5,21]
0;0.5A;0201
SAR_EINT_N [5]
C6143 C6144 C6145
NF_100pF;30%;50V;0201
NF_100pF;30%;50V;0201
NF_100pF;30%;50V;0201
A A
Title REV: V10
DOCUMENT NO.:Design Name = S96116-1-13_MB_20190409-1317

Size D

5 4 3 2 1
5 4 3 2 1
D D
RF_TXDET1
[32] RF_TXDET
close to TXM
VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,41]
2
TVS6201
N2
100pF;30%;50V;0201
1000pF;20%;50V;0201 PESDHC2FD4V5BH
C6221 C6222
C6205 C6210
C6204
N1
22pF;30%;50V;0201 1000pF;20%;50V;0201 10uF;20%;6.3V;0402
1
TO_HMLB_Primary-ANT AP6716M-71
待更新 U6201
R6202 Reserved RC filter layout, in default 0 ohm is used
19
17
38
23
21
20
18
16
15
14
13
12
11
C VRAMP_1 APC1 C
VC7916-53 APC1 [4]
CPL
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND12
GND11
GND10
NC
C6207 6.98k;1%;0201
100pF;30%;50V;0201 C6209
10 220pF;20%;50V;0201
RF_Ant_TRX_ASM VBAT
[35] RF_Ant_TRX_DPDT
22
ANT
VCC
9 Reserved Shunt C for MIPI C-load Tuning
VRAMP
8 Control the Total Capacitance to 25pF+-3pF
L6203 L6201 7 C6211 LTE_VMIPI [41]
NF_1.2nH;0.1nH;0201 NF_1.2nH;0.1nH;0201 VIO R62040;0.5A;0201
RF_B28A_TRX_TXM 24 6 MIPI1_SDATA
[38] RF_B28A_TRX_TXM TRX14 SDATA MIPI1_SDATA [4]
RF_B28B_TRX_TXM R6205 0;0.5A;0201 MIPI1_SCLK
25 5 1000pF;20%;50V;0201
[38] RF_B28B_TRX_TXM TRX13 SCLK MIPI1_SCLK [4]
RF_B2_TRX_TXM 26 4
[39] RF_B2_TRX_TXM TRX12 GND1
27 3 RF_MB2_TX_TXM C6212 C6213
TRX11 TX_HB_IN C0201_NC C0201_NC
RF_B4_TRX_TXM 28 2
[39] RF_B4_TRX_TXM TRX10 TX_LB_IN
RF_B3_TRX_TXM 29 1
[39] RF_B3_TRX_TXM TRX9 GND
RF_B7_TRX_TXM 30
[39] RF_B7_TRX_TXM TRX8
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
TRX7
TRX6
TRX5
TRX4
TRX3
TRX2
TRX1
31
32
33
34
35
36
37
39
40
41
42
43
44
45
46
47
C6214 MT6177 TX Ouput need a DC block
L6225
RF_LB1_TX_TXM
RF_B1_TRX_TXM 33pf;30%;50V;0201
[39] RF_B1_TRX_TXM RF_2G_HB_TX_RFIC
RF_2G_HB_TX_RFIC [32]
4.3NH;3%;0201
C6227 C6228
2G_PAIN_HB
RF_B8_TRX_TXM 1.8pF;0.05pF;50V;0201
1.8pF;0.05pF;50V;0201
[38] RF_B8_TRX_TXM
RF_B20_TRX_TXM
[38] RF_B20_TRX_TXM
RF_B5_TRX_TXM C6216
[38] RF_B5_TRX_TXM L6220
33pf;30%;50V;0201
RF_2G_LB_TX_RFIC
RF_2G_LB_TX_RFIC [32]
RF_B40_TRX_TXM
B
[41] RF_B40_TRX_TXM 9.1NH;3%;0201
2G_PAIN_LB B
RF_B38/41_TRX_TXM
[41] RF_B38/41_TRX_TXM
C6225 C6226
3.3pF;0.25pF;50V;0201
3.3pF;0.25pF;50V;0201
High pass filter for G8 Tx in G7 Rx

band noise rejection
A A
Title REV: V10

Page Name = 62_Primary_ASM
Size D
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title
<Title>

A1 <Doc> 1.0

5 4 3 2 1
R6401 R6402
[41] RF_B5_PA_DPX NF_0;0.5A;0201

NF_0;0.5A;0201
[4] BPI_BUS8 MXD8921L

FL6405
SAYEY836MBA0F0A C6463 带建库
SAYEY836MBA0F0A LTE_VFE28 [29,38,41,43,44,46]
SFX836EYJ02 100pF;30%;50V;0201 MXD8015LC SAFFB881MAN0F0A
L6401
RF_B5_TRX_TXM RF_B5_TRX_DPX C6462 SFH881AA002
6 3 6 1
[36] RF_B5_TRX_TXM ANT TX C6481 L6499 EN GND1 100pF;30%;50V;0201
4.3NH;3%;0201 1 RF_B5_PRX_RF_IN RF_B5_PRX_LNA_IN
5 2 U6405 SAFFB881MAN0F0A
RX RFIN VDD R6498 L6404
GND1
GND2
GND3
GND4
GND5
L6403 L6402 3.3NH;0.1nH;0201 4 3 RF_B5_PRX_LNA_OUT RF_B5_PRX_SAW_IN 1 4 RF_B5_PRX_DPX_RFIP1 RF_B5_PRX_RFIC
1000pF;20%;50V;0201 GND2 RFOUT UNBL1 UNBL2 RF_B5_PRX_RFIC [32]
NF_15NH;3%;0201 NF_12NH;3%;0201 0;0.5A;0201 2.4NH;0.1nH;0201
GND1
GND2
GND3
U6415 C6401
2
4
5
7
8
L6490 33pf;30%;50V;0201
D NF_4.3nH;0.1nH;0201 L6405 L6406 D
NF_1.2nH;0.1nH;0201 1.2nH;0.1nH;0201
L6498
5
NF_4.3nH;0.1nH;0201
B5 PRX
R6496 R6497
[41] RF_B8_PA_DPX NF_0;0.5A;0201 NF_0;0.5A;0201
MXD8921L
D5DA942M5K2G6
FL6408 [4] BPI_BUS13 带建库
SFX897EYT02 D5DA942M5K2G6 100pF;30%;50V;0201 C6453
MXD8015LC
C6402
RF_B8_TRX_TXM RF_B8_TRX_DPX 6 3 6 1
[36] RF_B8_TRX_TXM ANT TX C6482 L6477 EN GND1
1 RF_B8_PRX_RF_IN RF_B8_PRX_LNA_IN 5 2
18pF;10%;50V;0201 RX RFIN VDD LTE_VFE28 [29,38,41,43,44,46]
GND1
GND2
GND3
GND4
GND5
3.3NH;0.1nH;0201 4 3 C6452 SFH942AA002
1000pF;20%;50V;0201 GND2 RFOUT 100pF;30%;50V;0201
L6408 L6407 SAFFB942MAN0F0A
NF_6.8NH;3%;0201 NF_8.2NH;3%;0201 L6496 U6418
2
4
5
7
8
NF_4.3nH;0.1nH;0201
U6408 SFH942AA002 C6450 C6471
R6495 5.6pF;0.25pF;50V;0201
33pf;30%;50V;0201
RF_B8_PRX_LNA_OUT RF_B8_PRX_SAW_IN 1 4 RF_B8_PRX_DPX_RFIP1 RF_B8_PRX_RFIC
UNBL1 UNBL2 RF_B8_PRX_RFIC [32]
0;0.5A;0201
GND1
GND2
GND3
L6472
C
B8 PRX L6495
C6475 8.2NH;3%;0201 C
5
NF_2.4pF;0.25pF;25V;0201
NF_4.3nH;0.1nH;0201
R6420
[41] RF_B20_PA_DPX
R0201_NC
B20：SAYEY806MBC0F0A FL6420
B39851B8622P810 RFLPF10050G9DM1T76
SAYEY806MBC0F0A
C6472 U6420
33pf;30%;50V;0201
RF_B20_TRX_TXM RF_B20_TRX_DPX 6 3 RFLPF10050G9DM1T76
[36] RF_B20_TRX_TXM ANT TX R6421 C6473 C6474
1 RF_B20_PRX_SAW_IN RF_B20_PRX_LPF_IN 6 4 RF_B20_PRX_DPX_RFIP1 RF_B20_PRX_RFIC
RX INPUT OUTPUT RF_B20_PRX_RFIC [32]
GND1
GND2
GND3
GND4
GND5
3.6NH;0.1nH;0201
GND1
GND2
L6421
NC1
NC2
L6420 0;0.5A;0201 18pF;10%;50V;0201
NF_6.8NH;3%;0201
NF_4.3NH;3%;0201
EMEA: LPF L6422 L6423
L6424
2
4
5
7
8
EMEA: B20 NF_2.7NH;0.1nH;0201 LATAM/APAC: 0R NF_6.8NH;3%;0201 6.8NH;3%;0201
1
3
2
5
LATAM/APAC: B28A
B12/17/20 PRX
B [41] RF_B28B_PA_DPX B
B28B：SAYEY733MBC0F0A
B39791B8539P810
FL6428
SAYEY733MBC0F0A
RF_B28B_TRX_TXM RF_B28B_TRX_DPX 6 3
[36] RF_B28B_TRX_TXM ANT TX
C6407 1
RX
GND1
GND2
GND3
GND4
GND5
33pf;30%;50V;0201
C6480
33pf;30%;50V;0201
L6411 L6410 L6433
2
4
5
7
8
NF_6.8NH;3%;0201 NF_6.8NH;3%;0201 NF_6.2NH;3%;0201
BPI_BUS2 [4]
C6477 100pF;30%;50V;0201
SPDT:代招标
B28B PRX U6401
1 6
RF2 V1
2 5 RF_B28_PRX_RFIC
GND ANT RF_B28_PRX_RFIC [32]
3 4 C6408 C6410
RF1 VDD 1.8pF;0.05pF;50V;0201 33pf;30%;50V;0201
[41] RF_B28A_PA_DPX
MXD8621C L6412
L6413 6.2NH;3%;0201
NF_6.8NH;3%;0201
B28A：SAYEY718MBC0F0A FL6429
B39771B8538P810 SAYEY718MBC0F0A
RF_B28A_TRX_TXM RF_B28A_TRX_DPX 6 3 LTE_VFE28 [29,38,41,43,44,46]

[36] RF_B28A_TRX_TXM ANT TX
C6476
C6478 1
A RX 100pF;30%;50V;0201 A
GND1
GND2
GND3
GND4
GND5
33pf;30%;50V;0201
C6479
1.8pF;0.05pF;50V;0201
L6430 L6431
2
4
5
7
8
NF_6.8NH;3%;0201 NF_6.8NH;3%;0201 L6432

NF_6.8NH;3%;0201
Title REV: V10

Page Name = 64_TRX_LB
B28A PRX DOCUMENT NO.: Design Name = S96116-1-13_MB_20190409-1317

Size D
5 4 3 2 1
5 4 3 2 1
[41] RF_B4_PA_DPX
[41] RF_B1_PA_DPX
SAYRH1G95BA0F0AR00 SFXG33PY702 要建SCH/PCB库

D 二供EPCOS新料，待确认 FL6501 SAYEY1G73BA0F0A D
FL6504
SAYRH1G95BA0F0AR00
C6518
SAYEY1G73BA0F0A
33pf;30%;50V;0201
RF_B1_TRX_TXM RF_B1_TRX_DPX C6523
6 3 C6519
[36] RF_B1_TRX_TXM ANT TX C6520 33pf;30%;50V;0201
33pf;30%;50V;0201 RF_B4_TRX_TXM RF_B4_TRX_DPX 6 3
1 RF_B1_PRX_DPX_RFIP1 RF_B1_PRX_RFIC [36] RF_B4_TRX_TXM C6524
RF_B1_PRX_RFIC [32] ANT TX C6525
RX 33pf;30%;50V;0201
GND1
GND2
GND3
GND4
GND5
1 RF_B4_PRX_DPX_RFIP1 RF_B4_PRX_RFIC
18pF;10%;50V;0201 RX RF_B4_PRX_RFIC [32]
GND1
GND2
GND3
GND4
GND5
18pF;10%;50V;0201
L6521 L6522 L6523
2
4
5
7
8
L6520 NF_10NH;3%;0201 NF_4.3nH;0.1nH;0201 2.7NH;0.1nH;0201
L6544 L6541 L6542
NF_4.3nH;0.1nH;0201
2
4
5
7
8
L6543 NF_10NH;3%;0201 NF_4.3nH;0.1nH;0201 2.7NH;0.1nH;0201
NF_4.3nH;0.1nH;0201
B1 PRX B4 PRX
[41] RF_B2_PA_DPX
FL6502
SAYEY1G88BA0B0A
D6DA1G960K2B2 SAYEY1G88BA0B0A [41] RF_B7_PA_DPX
C6501
3.0pF;0.25pF;25V;0201
RF_B2_TRX_TXM RF_B2_PRX_LPF 6 3 C6502 C6503
C [36] RF_B2_TRX_TXM ANT TX C
3.3pF;0.25pF;50V;0201 33pf;30%;50V;0201
1 RF_B2_PRX_LPF_RFIP1 RF_B2_PRX_RFIC
RX RF_B2_PRX_RFIC [32]
GND1
GND2
GND3
GND4
GND5
L6501
NF_6.2NH;3%;0201 L6502
NF_4.3nH;0.1nH;0201 L6503 L6504 D6HQ2G655DP02 FL6507
2
4
5
7
8
EMEA/LATAM NF_2.2NH;0.1nH;0201 2.0NH;0.1nH;0201
SAYEY2G53BA0F0A D6HQ2G655DP02
L6509
RF_B7_TRX_TXM RF_B7_TRX_DPX 6 3 C6509
[36] RF_B7_TRX_TXM ANT TX 3.3pF;0.25pF;50V;0201
0.6nH;0.1nH;0201 1 RF_B7_PRX_DPX_RFIP1 RF_B7_PRX_RFIC
GND1
GND2
GND3
GND4
GND5
L6511 C6510
B2 PRX
L6510 NF_3.3NH;0.1nH;0201 L6513 8.2pF;0.25pF;50V;0201
NF_4.3nH;0.1nH;0201 L6540 2.0NH;0.1nH;0201
2
4
5
7
8
NF_4.3nH;0.1nH;0201
B7 PRX
[41] RF_B3_PA_DPX
B B
B39182B1239P810
FL6503
SAYEY1G74BC0B0A
B1239
L6526
RF_B3_TRX_TXM RF_B3_TRX_DPX 6 3 C6521 C6522
[36] RF_B3_TRX_TXM ANT TX 2.7pF;0.25pF;50V;0201 22pF;30%;50V;0201
1.0NH;0.1nH;0201 1 RF_B3_PRX_DPX_RFIP1 RF_B3_PRX_RFIC
GND1
GND2
GND3
GND4
GND5
L6527 L6528
NF_4.3nH;0.1nH;0201 NF_4.3nH;0.1nH;0201 L6525
1.8NH;0.1nH;0201
2
4
5
7
8
L6524
NF_2.7NH;0.1nH;0201
B3 PRX
A A
Title REV: V10

Page Name = 65_TRX_MHB
Size D
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title
<Title>

A1 <Doc> 1.0

5 4 3 2 1
B28B TX
R6797
RF_B28B_PA_PA
RF_B28B_PA_DPX [38]
0;0.5A;0201
C6706
[3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] VIO18_PMU L6710
12pF;10%;50V;0201
C6782 NF_7.5NH;3%;0201
NF_2.4pF;0.25pF;25V;0201
R6783
390K;1%;0201
B2 TX C6781
L6709
NF_4.3nH;0.1nH;0201
RF_B2_PA_PA
[39] RF_B2_PA_DPX
12pF;10%;50V;0201
B28A TX
AUX_IN1_NTC L6708 R6798
[4] AUX_IN1_NTC L6707 NF_7.5NH;3%;0201 RF_B28A_PA_PA
D NF_4.3nH;0.1nH;0201 RF_B28A_PA_DPX [38] D
RT6701 0;0.5A;0201
100K;1%;0201
L6740 C6783
C6784 NF_7.5NH;3%;0201 12pF;10%;50V;0201
NF_2.4pF;0.25pF;25V;0201
GND
B1 TX L6741
NF_4.3nH;0.1nH;0201
R6707
RF_B1_PA_PA
[39] RF_B1_PA_DPX
0;0.5A;0201
C6704
B8 TX
Thermistor to sense RF PA L6716 L6717
RF_B8_PA_PA
RF_B8_PA_DPX [38]
temperature NF_2.0NH;0.1nH;0201 NF_4.3nH;0.1nH;0201
12pF;10%;50V;0201
L6706
1. RT603 must close to LTE Band 7 PA or the hottest PA <2mm. NF_7.5NH;3%;0201 L6705
NF_4.3nH;0.1nH;0201
2. The distance is the shortest distance from package edge to edge.
R6771 R6702
B5 TX
RF_B5_PA_PA
RF_B5_PA_DPX [38]
0;0.5A;0201 0;0.5A;0201
C6771 C6702 C6701
NF_2.4pF;0.25pF;25V;0201 NF_2.4pF;0.25pF;25V;0201NF_2.4pF;0.25pF;25V;0201
Power Net Connection B3 TX
[39] RF_B3_PA_DPX
R6709
RF_B3_PA_PA
L67190;0.5A;0201
NF_2.0NH;0.1nH;0201 L6720
B20 TX
NF_4.3nH;0.1nH;0201 R6781 R6705
RF_B20_PA_DPX [38]
RF_B20_PA_PA
0;0.5A;0201
SH6713 0;0.5A;0201
C NF_2.0NH;0.1nH;0201 C
[36,41] LTE_VMIPI VIO18_PMU [3,4,5,7,9,11,16,17,21,24,25,26,28,32,35,41] L6714
NF_4.3nH;0.1nH;0201
L6713
C6773
C6707 NF_2.4pF;0.25pF;25V;0201
1.0UF;20%;6.3V;0201
V28 to FEM
4G PA input need LPF for harmonic rejection
SH6714
[29,38,41,43,44,46]
8mil LTE_VFE28 VFE28_PMU [9]
8mil L6715 3/4G_PAIN_LB
C6711
B4 TX R6721
RF_B4_PA_PA
RF_LB2_TX_PA RF_LB2_TX_1
C6708
33pf;30%;50V;0201 RF_LTE_LB_TX_RFIC [32]
1.0UF;20%;6.3V;0201 9.1NH;3%;0201
[39] RF_B4_PA_DPX
AP7219M-71 C6709 C6710
0;0.5A;0201
21
20
19
18
17
16
AP7219M-71 3.3pF;0.25pF;50V;0201
3.3pF;0.25pF;50V;0201
L6739 L6738
MB1
LB5
LB1
LB2
LB3
LB4
NF_2.0NH;0.1nH;0201 NF_4.3nH;0.1nH;0201
VBAT to TXM 80mil
22
GND5 GND4
15
9,10,13,15,17,18,21,22,23,24,25,28,36,41] VBAT VBAT VBAT [8,9,10,13,15,17,18,21,22,23,24,25,28,36,41] 23 14

80mil 80mil MB2 RFIN_L2
C6715
24
25
GND6 RFIN_L1
13
12
L6718
RF_MB1_TX_PA RF_MB1_TX_1
C6712
33pf;30%;50V;0201
3/4G_PAIN_MB
4.7uF;20%;6.3V;0402 MB3 RFIN_M RF_LTE_MB_TX_RFIC [32]
26 11 4.3NH;3%;0201
MB4 NC3
27 10 C6713 C6714
GND7 NC2
1.8pF;0.05pF;50V;0201 1.8pF;0.05pF;50V;0201
28 9 [8,9,10,13,15,17,18,21,22,23,24,25,28,36,41]
VPA_VCC2 VCC2_2 NC1 R6796
29 8
From PMIC C6716 C6717 VCC1 VBATT VBAT
2
100pF;30%;50V;0201 30 7 10;5%;0201
1.0UF;20%;6.3V;0201 VCC2 VIO LTE_VMIPI [36,41] TVS6704
N2
C6721 100pF;30%;50V;0201 C6718
SH6701 PESDHC2FD4V5BH
31 6 1000pF;20%;50V;0201
10mil VPA_VCC1 GND8 SCLK C6719
R6712
N1
32 5 0.1uF;20%;6.3V;0201
MB5 SDATA 0;0.5A;0201
VPA_VCC1 MIPI0_SCLK [4]
33 4
1
HB1 GND3 MIPI0_SDATA [4]
C6723 C6724 34 3
GND9 RFIN_H C6720 C6722
60mil VPA_VCC2
60milSH6702
60mil
VPA_PMU [8]
1.0UF;20%;6.3V;0201 100pF;30%;50V;0201
35
HB2 GND2
2
C0201_NC C0201_NC
Reserved Shunt C for MIPI C-load Tuning
B 36 1 Control the Total Capacitance to 25pF+-3pF B
2
VPA_VCC2 GND10 GND1

TVS6710
N2
37 56
C6727 NF_PESD3V3V1BCSF 38 HB3 GND_P14 55
C6725 C6726
C6729 100pF;30%;50V;0201 39 GND11 GND_P13 54
1.0UF;20%;6.3V;0201
4.7uF;20%;6.3V;0402 1.0UF;20%;6.3V;0201 HB4 GND_P12
N1
GND_P10
GND_P11
GND_P1
GND_P2
GND_P3
GND_P4
GND_P5
GND_P6
GND_P7
GND_P8
GND_P9
GND12
TRX1
TRX2
1
Note: U6701
3/4G_PAIN_HB
40
41
42
43
44
45
46
47
48
49
50
51
52
53
Refer to design notice F6FC2G595H4PD C6728
B39262B8870L210 L6721
8.2pF;0.25pF;50V;0201
Note: B38/41(120M)TRX R6720
F6FC2G595H4PD
U6741
C6744 3.3NH;0.1nH;0201
RF_LTE_HB_TX_RFIC
RF_LTE_HB_TX_RFIC [32]
Reserve at least one tuning cap. For PMIC VPA total cap requirement, [36] RF_B38/41_TRX_TXM RF_B38/41_PA_SAW_OUT 4 1 RF_B38/41_PA_SAW_IN RF_B38/41_TRX_PA
the total cap at RF side should be in 6.2uF +7/-5%. UNBL2 UNBL1 C6730 C6731
GND3
GND2
GND1
1.0pF;0.05pF;50V;02011.0pF;0.05pF;50V;0201
0;0.5A;0201 1.8pF;0.05pF;50V;0201
L6733
L6730 L6736 L6737 NF_1.8NH;0.1nH;0201
NF_2.7NH;0.1nH;0201 NF_1.8nH;0.1nH;0201 NF_1.8nH;0.1nH;0201 LPF for more
5
margin on Tx
spurious
BPI_BUS12 [4]
C6745
27pF;10%;50V;0201 C6748
B40 TRX R6717 R6718

885075 U6740
885075
C6736
100pF;30%;50V;0201
RF_B40_PA_SAW_OUT 4 1 RF_B40_PA_SAW_IN RF_B40_TRX_PA

[36] RF_B40_TRX_TXM UNBL2 UNBL1
GND3
GND2
GND1
0;0.5A;0201 0;0.5A;0201 2.4pF;0.25pF;25V;0201 MXD8015HC

L6727 LTE_VFE28 [29,38,41,43,44,46]
L6723 L6724 L6726 NF_2.2NH;0.1nH;0201 6 1
L6728
5
NF_1.8nH;0.1nH;0201 L6725 NF_1.8nH;0.1nH;0201 EN GND1

NF_1.8NH;0.1nH;0201
NF_1.8nH;0.1nH;0201 RF_B40B41_PRX_LNA_IN
5 2
RFIN VDD C6746
3.3NH;0.1nH;0201 100pF;30%;50V;0201
4 3
GND2 RFOUT
U6704 C6762
C6740 C6742
C6761 33pf;30%;50V;0201
33pf;30%;50V;0201
C0201_NC RF_B40B41_PRX_LNA_OUT 1.8pF;0.05pF;50V;0201
A MXD8015HC RF_B40B41_PRX_RFIC [32] A
RTC8606M
C6760
B7 TX C6749
C6759
NF_2.4pF;0.25pF;25V;0201 NF_2.4pF;0.25pF;25V;0201
[39] RF_B7_PA_DPX RF_B7_PA_PA
B38/40/41 PRX
Title REV: V10
1.8pF;0.05pF;50V;0201
Page Name = 67_RF_MMPA-1
L6735
L6734
Size D
NF_1.8NH;0.1nH;0201
NF_1.8nH;0.1nH;0201
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title
<Title>

A1 <Doc> 1.0

5 4 3 2 1
D D
J6902
4-00-45979 818011998
MM8030-2610RK0
J6901
1 818011998
R6901 R6910
2 2 1
OUT IN RF_Ant_DRX_carkit [44]
GND1
GND2
0;0.5A;0201 0;0.5A;0201
L6901 L6902 L6974
3
4
4-00-45979 L0201_NC L0201_NC L0201_NC
C C
J6904
4-00-45979
27pF;10%;50V;0201
1
2 C6906 ANT_DIV_1_50R
B B
L6951
NF_100nH;3%;0201
4-00-45979
R6911 MXD8544A R6960

RF1_50R
10
U6901 RF3_50R
NF_0;0.5A;0201 NF_0;0.5A;0201
ANT
R6908 1 9 R6961
RF2_50R 2 RF1 RF3 8 RF4_50R
RF2 RF4
7
NF_0;0.5A;0201 GND NF_0;0.5A;0201
VDD
V1
V2
V3
MXD8544A
5
6
3
4
LTE_VFE28 [29,38,41,44,46]
[4] BPI_BUS3
C6917 参考summer
C6990 100pF;30%;50V;0201
100pF;30%;50V;0201
[4] BPI_BUS6
R6962
[4] BPI_BUS7
A A
0;0.5A;0201
C6921 C6922
100pF;30%;50V;0201 100pF;30%;50V;0201
Title REV: V10

Page Name = 69_Diversity_ANT
DOCUMENT NO.:Design Name = S96116-1-13_MB_20190409-1317
Size D
DEPARTMENT: DEPARTMENT = W INGTECH-SZ DESIGNER: DESIGNER = LIUFENGLEI
Date:Page Modify Date = Monday, April 08, 2019 Sheet 43 of 53
5 4 3 2 1
5 4 3 2 1
D D
RF_B20/28_DRX_ASM
RF_B20/28_DRX_ASM [46]
RF_B2_DRX_ASM
RF_B2_DRX_ASM [46]
RF_B7_DRX_ASM
RF_B7_DRX_ASM [47]
RF_B5_DRX_ASM
RF_B5_DRX_ASM [46]
C C
MXD8680
U7001 NZ5708S,新料待确认
11
10
8
MXD8680
RF6
RF4
RF2
NC
12 7
C7007 RF8 V1 BPI_BUS4 [4]
RF_Ant_DRX_ASM 13
[43] RF_Ant_DRX_carkit ANT 6
V2 BPI_BUS11 [4]
14
15pF;10%;50V;0201 RF7
15 5
GND V3 BPI_BUS14 [4]
VDD
RF5
RF3
RF1
L7001 L7002 C7005
C7004 C7006
NF_1.8nH;0.1nH;0201 NF_1.8nH;0.1nH;0201
18pF;10%;50V;0201
18pF;10%;50V;0201 18pF;10%;50V;0201
4
LTE_VFE28 [29,38,41,43,46]
VREG_2P7
C7001
0.01uF;20%;25V;0201
RF_B38/41_DRX_ASM
RF_B38/41_DRX_ASM [47]
RF_B1/3/4_DRX_ASM
RF_B1/3/4_DRX_ASM [46]
RF_B8_DRX_ASM
RF_B8_DRX_ASM [46]
RF_B40_DRX_ASM
RF_B40_DRX_ASM [47]
B B
A A
Title REV: V10

Page Name = 70_Diversity ASM
Size D
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title REV: V10

Reserved

5 4 3 2 1
C7207 C7206
Band1/4
RF_B1/4_DRX_SAW_OUT RF_B1/4_DRX_RFIC
RF_B1/4_DRX_RFIC [32]
3.6pF;0.25pF;25V;0201 10pF;10%;50V;0201
L7211
L7212
2.7NH;0.1nH;0201
NF_1.8nH;0.1nH;0201
SAWFD1G84AA0F0A
SFWG42CBB02
U7201 SAFFB881MAN0F0A
SAWFD1G84AA0F0A SFH881AA002
D U7205 SAFFB881MAN0F0A D
L7213 L7214 C7208
L7209
Band3 [44] RF_B5_DRX_ASM
RF_B5_DRX_ASM
3.9NH;0.1nH;0201
RF_B5_DRX_SAW_IN 1
UNBL1 UNBL2
4 RF_B5_DRX_SAW_OUT
8.2NH;3%;0201
RF_B5_DRX_RFIC
RF_B5_DRX_RFIC [32]
GND1
GND2
GND3
RF_B1B3B4_DRX_SAW_IN 1 6 15pF;10%;50V;0201
[44] RF_B1/3/4_DRX_ASM Unbalance Port-Lch / Hch Unbalance Port-Hch C7204
1.2NH;0.1nH;0201 L7206
?MHZ 8.2pF;0.25pF;50V;0201 L7216 L7217
C7209
5
9 RF_B3_DRX_SAW_OUT RF_B3_DRX_RFIC NF_15nH;3%;0201 15nH;3%;0201
L7210 Unbalance Port-Lch RF_B3_DRX_RFIC [32] NF_1.0pF;0.05pF;50V;0201
C7205 NF_3.9NH;0.1nH;0201 1.8NH;0.1nH;0201
2
NF_0.5pF;0.1pF;50V;0201 GND1
3 7 L7207
GND2 GND5 L7208
2.4NH;0.1nH;0201
NF_15NH;3%;0201
4 8
GND3 GND6
5
GND4 GND7
10
B5 DRX
B1/3/4 DRX
SFH942AA002
SAFFB942MAN0F0A
U7208 SFH942AA002
C7201 L7201 C7202
C
SAFFB1G96AB0F0A RF_B8_DRX_SAW_IN 1 4 RF_B8_DRX_SAW_OUT RF_B8_DRX_RFIC C
SFHG60CA002 [44] RF_B8_DRX_ASM UNBL1 UNBL2 RF_B8_DRX_RFIC [32]
7.5NH;3%;0201
GND1
GND2
GND3
39pF;10%;50V;0201 27pF;10%;50V;0201
U7202 SAFFB1G96AB0F0A L7205
R7260 L7220 C7213 L7203 L7204 12NH;3%;0201
RF_B2_DRX_ASM RF_B2_DRX_SAW_IN 1 4 RF_B2_DRX_SAW_OUT RF_B2_DRX_RFIC NF_1.8nH;0.1nH;0201 NF_1.8nH;0.1nH;0201
5
[44] RF_B2_DRX_ASM UNBL1 UNBL2 RF_B2_DRX_RFIC [32]
10NH;3%;0201
GND1
GND2
0;0.5A;0201 GND3 L722733pf;30%;50V;0201

L7226 15NH;3%;0201
NF_2.7NH;0.1nH;0201
2
L7270
NF_2.7NH;0.1nH;0201
B8 DRX
B2 DRX
B28： SFH780AA402
SAFFB780MAA0F0A
U7228 SFH780AA402
R7203 L7221 C7220
[4] BPI_BUS5 RF_B20/28_DRX_SAW_IN 1 4 RF_B28_DRX_SAW_OUT RF_B28_DRX_RFIC
UNBL1 UNBL2 RF_B28_DRX_RFIC [32]
10NH;3%;0201
GND1
GND2
GND3
B 100pF;30%;50V;0201 C7222 B
0;0.5A;0201 L7222 L7223 33pf;30%;50V;0201
NF_12NH;3%;0201 15nH;3%;0201
5
C7221
NF_100pF;30%;50V;0201
SPDT:代招标
U7204
6 1
[44] RF_B20/28_DRX_ASM
RF_B20/28_DRX_ASM
R7202
0;0.5A;0201
RF_B20/28_DRX_LPF_IN 5
4
V1
ANT
VDD
GND
RF2
RF1
2
3
B28 DRX
MXD8621C
R7294
C7225
100pF;30%;50V;0201
R0201_NC
R7904
B20： SAFFB806MAA0F0A
RFLPF10050G9DM1T76 SFH806BA002
FL7220
RFLPF10050G9DM1T76 U7220 SAFFB806MAA0F0A
0;0.5A;0201 R7201 R7261 L7281 C7278
6 4 RF_B20_DRX_LPF_OUT RF_B20_DRX_SAW_IN 1 4 RF_B20_DRX_SAW_OUT RF_B20_DRX_RFIC
[29,38,41,43,44] LTE_VFE28 INPUT OUTPUT UNBL1 UNBL2 RF_B20_DRX_RFIC [32]
10NH;3%;0201
GND1
GND2
GND1
GND2
GND3
C7223
NC1
NC2
100pF;30%;50V;0201 0;0.5A;0201 0;0.5A;0201 L7250 L7282 33pf;30%;50V;0201
EMEA: LPF NF_12NH;3%;0201 15nH;3%;0201
1
3
2
5
5
C7224
NF_100pF;30%;50V;0201
LATAM/APAC: 0R C7261
NF_100pF;30%;50V;0201
EMEA: B20
LATAM/APAC: B28A
A A
B12/17/20 DRX
Title REV: V10
Page Name = 72_DRX_LMB
Size D
5 4 3 2 1
5 4 3 2 1
D D
SAFFB2G65AA0F0A
SFHG56BA002
U7307
C7304 L7305 C7305
RF_B7_DRX_ASM RF_B7_DRX_SAW_IN 1 4 RF_B7_DRX_SAW_OUT RF_B7_DRX_RFIC
1.2NH;0.1nH;0201
GND1
GND2
GND3
10pF;10%;50V;0201 8.2pF;0.25pF;50V;0201
SAFFB2G65AA0F0A L7308 C7312

L7307
5
NF_5.6nH;0.1nH;0201 2.2pF;0.25pF;50V;0201
NF_5.6nH;0.1nH;0201
B7 DRX
C C
SFHG96AA402
SAFFB2G53AA1F0A
U7341 SFHG96AA402
C7310
C7320 L7318
5.6pF;0.25pF;50V;0201
RF_B38/41_DRX_ASM RF_B38/41_DRX_SAW_IN
1 4 RF_B38/41_DRX_SAW_OUT RF_B38/41_DRX_RFIC
[44] RF_B38/41_DRX_ASM UNBL1 UNBL2 RF_B38/41_DRX_RFIC [32]
2.7NH;0.1nH;0201
GND1
GND2
GND3
10pF;10%;50V;0201
L7322
NF_5.1NH;3%;0201
L7319
5
C7311 5.6nH;0.1nH;0201
NF_2.2pF;0.25pF;50V;0201
B38/41 DRX
B B
SFHG52AA002
SAFFB2G35AA0F0A
U7340
SFHG52AA002
L7309 C7321 C7322
RF_B40_DRX_ASM RF_B40_DRX_SAW_IN 1 4 RF_B40_DRX_SAW_OUT RF_B40_DRX_RFIC
2.4NH;0.1nH;0201
GND1
GND2
GND3
8.2pF;0.25pF;50V;0201 8.2pF;0.25pF;50V;0201
C7314 L7311
NF_0.5pF;0.1pF;50V;0201 L7312
NF_3.9NH;0.1nH;0201 2.7NH;0.1nH;0201
2
B40 DRX
A A
Title REV: V10

Page Name = 73_DRX_HB
Size D
DEPARTMENT: DEPARTMENT = W INGTECH-SZ DESIGNER: DESIGNER = LIUFENGLEI
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title
<Title>

A1 <Doc> 1.0

5 4 3 2 1
D D
C C
B B
A A
Title REV: V10

Reserved

5 4 3 2 1
D D
C C
B B
A A
Title REV: V10

Reserved

5 4 3 2 1
AVDD18_WBT
Close to Antenna C7701

BT_DATA
BT_DATA [5]
0.1uF;20%;6.3V;0201
BT_CLK
BT_CLK [5]
D D
C7702 WF_CTRL0
WF_CTRL0 [5]
MT6631N/A 100pF;30%;50V;0201 WF_CTRL1

WF_CTRL1 [5]
WF_CTRL2
WF_CTRL2 [5]
U7702
30
29
28
27
26
25
24
23
22
21
AVDD18_WBT2
AVDD18_WBT1
WF_CTRL0
WF_CTRL1
WF_CTRL2
WIFI_AUX_2G
WB_VDET_2G
WIFI_VDET_5G
BT_DATA
BT_CLK
31 20 WF_IP
[52] WB_ANT_2G WB_RF_2G WF_IP WF_IP [5]
32 19 WF_IN
AVDD33_WBT NC1 WF_IN WF_IN [5]
C7703 4.7uF;20%;6.3V;0402 33 18 WF_QP

AVDD33_WBT WF_QP WF_QP [5]
Close to
MT6631
C7704 100pF;30%;50V;0201 34 17 WF_QN
WF_RF_5G WF_QN WF_QN [5]
Note: 51-3
35 16 BT_IP
WF_AUX_5G BT_IP BT_IP [5]
MT6631N/A
C7707
FM_AVDD28
36
MT6631N 15 BT_IN
BT_IN [5]
AVDD28_FM BT_IN
0.01uF;20%;25V;0201 Note: 51-4

37 14 BT_QP
FM_LANT_N BT_QP BT_QP [5]
[29] FM_ANT_N
L7709
38 13 BT_QN
[29] FM_ANT_P FM_LANT_P BT_QN BT_QN [5]
9.1NH;3%;0201
C C
L7704 L7705 39 12 GPS_I
GPS_RFIN GPS_IP GPS_I [5]
L0201_NC L0201_NC
AVDD18_GPS
40 11
AVDD18_GPS GPS_IN
AVDD28_FSOURCE
CONN_TOP_DATA
CONN_TOP_CLK
C7711
CONN_HRST_B
4700pF;20%;6.3V;0201
41
DVSS
GPS_QN
GPS_QP
WB_PTA
[53] GPS_RFIN
XO_IN
CEXT
NC2
1
10
MT6631
GPS_Q
GPS_Q [5]
CONN_HRST_B
[5] CONN_HRST_B
CONN_TOP_DATA C7713 C7714

[5] CONN_TOP_DATA
1.0UF;20%;6.3V;0201
100pF;30%;50V;0201
CONN_TOP_CLK
[5] CONN_TOP_CLK
CONN_WB_PTA
[5] CONN_WB_PTA
R7708
[5] CONN_XO_IN_BB
0;0.5A;0201
0;0.5A;0201
PMIC R5016/R5017 NC, R5003/R8005 0ohm
TCXO R5016/R5017 0ohm, R5003/R8005 NC
[10] PMIC_CLK_WCN
R7713
L7712
120oHM;500mA;0402
B
FM_AVDD28 VCN28_PMU [9,53] B
C7718
1.0UF;20%;6.3V;0201
R7711
AVDD18_GPS VCN18_PMU [9]
0;0.5A;0201 C7719
R7712
1.0UF;20%;6.3V;0201
AVDD18_WBT
Schematic design notice of "51_CONNECTIVITY_CONSYS_MT6631" 0;0.5A;0201
Note 51-1: For R5015 size, please select 0402 size or larger one R7768
AVDD33_WBT VCN33_PMU [9]

0;1A;0402
Note 51-2: Please refer to MT6762 Baseband design notice for VCN33 LDO selection guide
Note: 51-5
Note 51-3: If WiFi 5G not support, connect pin 34(WF_RF_5G) to GND
Note 51-4: Pin 36 (AVDD28_FM) must be connected to VCN28 even if FM not support
Note 51-5: If WiFi 5G were no need, VCN33 could be chosen from PMIC output (VCN33_PMU)
A A
Title REV: V10

Page Name = 77_WCN_MT6631
Size D
5 4 3 2 1
5 4 3 2 1
F6HG2G441EG65
靠近MT6331
F6HG2G441EG65 U7801
R7803 R7804
D D
4 1 50 Ohm WB_ANT_2G
UNBL2 UNBL1 WB_ANT_2G [51]
GND3
GND2
GND1
0;0.5A;0201 L7806 L7807 0;0.5A;0201
NF_8.2NH;3%;0201 NF_9.1NH;3%;0201 L7808
L7805
NF_1.8nH;0.1nH;0201
NF_1.8nH;0.1nH;0201
2
ANT7801
4-00-45979
DP1608-V1524CAT
FL7802
1 DP1608-V1524CAT
R7806 R7802
50 Ohm R7801
2 5 1
COMMON H_PORT
0;0.5A;0201
0;0.5A;0201 0;0.5A;0201
GND1
GND2
GND3
3 GPS_IN [53]
L7804 L7812 L_PORT
L7809 NF_1.8nH;0.1nH;0201 NF_1.8nH;0.1nH;0201
4-00-45979 L7810 L7811
L0201_NC
L0201_NC L0201_NC
2
4
6
C C
ANT7803
4-00-45979
4-00-45979
B B
A A
Title REV: V10
Reserved
5 4 3 2 1
5 4 3 2 1
D D
GPS xLNA Close to ANT 靠近MT6331

matching value depends on AW5005DNRZ R7905
LNA selected MXDLN16G 0;0.5A;0201

U7901 U7903 SAFFB1G56KB0F0A
R7907 R7902
SAFFB1G56KB0F0A 1 6
50 Ohm
1 4
50 Ohm GPS_RFIN [51]
GND1 RFOUT UNBL1 UNBL2
GND1
GND2
GND3
U7902 SAFFB1G56KB0F0A 2 5 0;0.5A;0201 0;0.5A;0201
18pF;10%;50V;0201 C7902 L7902 GND2 EN
50 Ohm
C7901
1 4 50 Ohm
3 4 Co_Pad Co_Pad C7910
[52] GPS_IN RFIN VCC NF_1.0pF;0.05pF;50V;0201
UNBL1 UNBL2
5
5.6nH;0.1nH;0201
GND1
GND2
GND3
C C7905
NF_1.0pF;0.05pF;50V;0201
18pF;10%;50V;0201
C7906
AW5005DNRZ
R7903
C
5
NF_1.0pF;0.05pF;50V;0201
[9,51] VCN28_PMU R7901
0;0.5A;0201 GPIO_GPS_LNA_EN GPIO_GPS_LNA_EN [5]
C7907 0;0.5A;0201
C7908
NF_1.0pF;0.05pF;50V;0201
0.01uF;20%;25V;0201
B B
A A
Title REV: V10
Reserved
5 4 3 2 1

Sm-A107f SVC Schematic

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Sm-A107f SVC Schematic

Uploaded by

Copyright:

Available Formats

5 4 3 2 1

D REV DATE DESCRIPTION D

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 1 of 53

C113 1.0UF;20%;6.3V;0201 C112 1.0UF;20%;6.3V;0201

R19 C123 1.0UF;20%;6.3V;0201

[2,9] VSRAM_OTHERS_PMU C125 1.0UF;20%;6.3V;0201

GND [9] DVDD_SRAM_DVFS

C134 1.0UF;20%;6.3V;0201 V15 GND

Title REV: V10

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 2 of 53

U101F VA12_PMU [3,15]

C3 VA12_PMU [3,15] C226

Title REV: V10

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 3 of 53

Schematic design notice of "12_BB_1" page. DEL R303=12K

Note 12-4: PWRAP_SPI0_MI is DDR type feature in bootstrap

LO (by ext. PD) LPDDR3 follow LP3 Ref SCH.

Title REV: V10

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 4 of 53

CSI-0 DSI-0 CONN_BT_CLK

R412 R414 R416 R418 R451 BOARD_ID3为AUXIN4，AUXIN2电源域为0~1.45V

Title REV: V10

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 5 of 53

Schematic design notice of "14_BB_3" page.

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 6 of 53

The pull up ressister need to be 1% accuracy

Thermistor to sense CHARGER Thermistor to sense AP

Title REV: V10

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 7 of 53

NF_PTVSHC3D4V5U B4 VSYS_VPROC1 VPROC1 A7

Set power inductor [2,3] DVDD_CORE

Set power inductor [2] DVDD_MODEM

Set power inductor [8,41] GND

VS1 IN VS1 GND Set cap. C707 close to

Schematic design notice of "20_POWER_MT6357_Buck"

Note 20-2: For MT6765/62/61 platform, please only use MT6357CRV

Title REV: V10

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 8 of 53

8,21,22,23,24,25,28,41] VBAT F13 N16

Schematic design notice of "21_POWER_MT6357_LDO"

Title REV: V10

DEPARTMENT: WINGTECH-SH DESIGNER: LIUFENGLEI

Date: Monday, April 08, 2019 Sheet 9 of 53

Schottky diode (VF <0.3V @ 1mA) MUST be for

Control I/F RTC Set cap. close to chip

Set cap. close to PMIC

3,24,25,28,41] VBAT N9 R904 0;0.5A;0201

330K;1%;0201 M1 XTAL1 XTAL1 [10]

N1 XTAL2 XTAL2 [10]

3mil trace width

[10] XTAL1 XTAL1 1 2

3mil trace width

1. Please Connect P1 and R1 ball first and then to GND

Title REV: V10