Inter-Integrated Circuit (IIC) Bus protocol

FPGA AND MICROCONTROLLER PROGRAMMING

Inter-Integrated Circuit (IIC)-Bus Protocol

By

Surya Chandra Karanam (230344)

MS in Electrical Engineering and Information Technology

Otto-von-Guericke University, Magdeburg

1
Inter-Integrated Circuit (IIC) Bus protocol

CONTENTS

1. Introduction

2. I2C Bus Protocol Hardware

3. Communication Mechanism in I2C Bus Protocol
3.1 Parts of Message in I2C Bus Protocol

4. Types of Addressing
4.1 7-Bit Addressing
4.2 10-Bit Addressing
4.3 10-Bit Addressing For Special Purpose
4.4 Modes of I2c Bus Protocol
5. Steps of I2c Data Transmission
6. Types of Master and Slave Devices

6.1 Single Master with Multiple Slaves

6.2 Multiple Master with Multiple Slaves

7. Advantages of I2C Bus Protocol

8. Disadvantages of I2C Bus Protocol
9. Applications of I2C Bus Protocol
10. References

2
Inter-Integrated Circuit (IIC) Bus protocol

1. INTRODUCTION

The Inter-Integrated Circuit bus is a bidirectional two-wired serial bus used to transmit the data
between integrated circuits. Inter-Integrated Circuit is referred as I2C-Bus or IIC Bus. This protocol
was discovered by Philips semiconductors in 1982 to make communication between integrated
circuits. A Bus system is used to transmit and receive information between two or more devices. There
are several types of bus protocols like USART, SPI, I2C bus protocol, etc. This bus system can be
operated in three modes: standard or fast mode and high-speed mode. I2C can connect IC’s within
the circuit board and also connect components linked via cable. I2C is preferred in many applications
because of their simplicity and flexibility. Few significant features of I2C are:

 Only two bus lines are sufficient

 No strict baud rate requirements
 Simple master and slave relationships exist
 Each device connected to the bus can be uniquely addressed in software
 I2C is a multi-master bus providing arbitration and collision detection

Figure 1 shows a simplified equivalent circuit diagram for an I2C connection between two devices
(master or slave) containing all relevant factors for I2C.

Figure 1: Simplified equivalent circuit diagram of I2C bus

VCC  I2C supply voltage, typically ranging from 1.2 V to 5.5 V

GND  Common ground

3
Inter-Integrated Circuit (IIC) Bus protocol

SDA  Serial data (I2C data line)

SCL  Serial clock (I2C clock line)

Rp  Pull-up resistance (a.k.a. I2C termination)

Rs  Serial resistance

Cp  Wire capacitance

Cc  Cross channel capacitance

2. I2C BUS PROTOCOL HARDWARE

I2C Bus system uses two wires to transmit and receive data between devices (fig 2):

1. SDA (Serial Data) – The wire/line which transfers data between master and slave.

2. SCL (Serial Clock) – The wire/line which carries the clock signal.

Figure 2: Transmission mechanism of I2C bus protocol

The data is transferred bit by bit in SDA line. Hence, I2C is a serial communication protocol. The
data transferred from master to slave and vice-versa is synchronized by clock generated by
master through SCL line. The internal structure of master and slave consists of data register tp
store data and core logic blocks to perform mathematical operations as shown in figure 3.

4
Inter-Integrated Circuit (IIC) Bus protocol

Figure 3: Internal structure of master and slave in I2C protocol

3. COMMUNICATION MECHANISM IN I2C BUS PROTOCOL

I2C Bus protocol divides the information into separate messages. The clock signal is generated by the
master and transmitted in SCL line. The message begins with a start bit, address of the slave device,
read or write bit, acknowledgment or no-acknowledgment bit, data frame, acknowledge bit and stop
bit. All the messages are transmitted in binary format. Figure 4 shows the format of messages
transferred in I2C bus.

Figure 4: Outline of data transmission in I2C protocol

5
Inter-Integrated Circuit (IIC) Bus protocol

3.1 PARTS OF MESSAGE IN I2C BUS PROTOCOL

1. Start Condition: First, the SDA line is triggered from a high voltage level to low voltage and then
SCL line is set from high to low voltage level (as shown in Figure 5).

2. Stop Condition: First, the SCL line is triggered from a low voltage level to a high voltage level and
then the SDA line is set from low to high voltage level (as shown in figure 5).

Figure 5: Start and stop conditions of I2C protocol

3. Address Frame: All the slave devices are identified with 7-bit or 10-bit binary addresses. These
bits are used to set the communication with particular slave device to transmit
data. The address of slave device of our choice must be given here.

4. Read/Write Bit: A single bit is used after address frame to indicate whether the master is reading
the data from slave or transmitting the data to slave. Read mode is indicated with
high voltage level (1) and write mode is indicated with low voltage level (0).

5. ACK/NACK Bit: After setting the device into read or write mode, the acknowledge/no-acknowledge
bit is used to confirm whether the device is connected and set to perform the
operation. If address frame is successfully set and read or write mode is activated,
an ACK bit with high voltage is sent by the receiver device. The sender may be
master or slave but the ACK/NACK bit is sent by the receiver device only.

6
Inter-Integrated Circuit (IIC) Bus protocol

6. Data Frame: The data frame is the most important part of data and it should be transmitted only
if the receiver is ready and the bus is free. The acknowledgement bit (ACK) from
the receiver indicates everything and the data frames are set for transmission.
Each data frame is 8 bits long and always the most significant bit is transmitted
first. Every time the data frame is received by the receiver the ACK/NACK bit is
sent to the sender to confirm the received data. If all the data frames are
successfully transmitted, the master device sends a stop condition to indicate that
the transmission is completed and slave device is set free to perform other
operations.

4. TYPES OF ADDRESSING

The slave devices are identified with unique binary address. It can be 7-bit or 10-bit binary
addressing. Based on the number of slave devices, the type of addressing is chosen. A 7-bit
addressing mechanism can connect 128 slave devices to a master device. If the application
requires more number of slave devices, 10-bit binary address is used which can connect 1024
slave devices.

4.1 7-BIT ADDRESSING

The addressing is always given in binary format (0s and 1s). I2C bus protocol does not have any
select line system to directly connect to a slave device. Address must be present in each message to
transmit or receive the data. The address frame is given after the start condition in each message.
First, the master transmits the address to all the slave devices and then the slave devices compare
their own address with the received address. If the address matches with the slave address, the slave
device sets the ACK bit to low voltage level. The slave device is connected to the master device for
communication.

The main drawback in this type of addressing is the maximum number of slave devices connected. Os
and 1s of 7 bits can produce only 128 devices. This address cannot be used when more than 128 slave
devices are in use.

4.2 10-BIT ADDRESSING

The 10-bit addressing technique is introduced due to the limitation of 7-bit addressing. The total
number of slave devices connected is increased to 1008. After the start condition, five bits “11110” is
added to a message frame. The five bits indicates that the 10-bit addressing is used in the message.

7
Inter-Integrated Circuit (IIC) Bus protocol

If the slave devices fail to find “11110”, it considers the message as 7-bit addressing. The following
figure shows an example of 10 bit address.

Figure 6: 10-Bit Addressing in I2C Bus

4.3 10-BIT ADDRESSING FOR SPECIAL PURPOSE

Apart from addressing the slave devices, the 10-Bit addressing is also used for different purposes like
changing the bus format and mode. The following table shows different 10-bit addresses and their
purposes.

Table 1: I2C 10-Bit addresses for special purposes:

10-BIT ADDRESSES PURPOSE

0000000 0 General Call

0000000 1 Start Byte

0000010 X Reserved for various Bus Formats

00001XX X High-Speed Master Code

11110XX X 10-bit Slave Addressing

11111XX X Reserved for future purposes

8
Inter-Integrated Circuit (IIC) Bus protocol

4.4 MODES OF I2C BUS PROTOCOL

Many applications consist of devices with different communication protocols within the same bus
system. Devices with I2C protocol must be programmed before to handle that kind of bus system. The
binary address ‘0000010X’ helps to interconnect I2C devices with other devices in the bus with
different communication protocols like SPI, UART etc. I2C devices which are capable of operating this
bus system will reply to the messages from other devices. To operate in such bus systems, the I2C
device must be fast enough. There are two modes in which I2C device can be operated related the
speed of transmission:

1. High speed mode

2. Standard or fast mode

The normal addressing scheme is used for standard or fast mode operation of I2C devices.

New 8-Bit address ‘00001XXX’ is used after the start condition to make the devices function in high
speed mode. Then the message is followed by acknowledge bit and continued with data frame. The
transmission in fast mode is at most 400k bits/second. The three least significant bits are to identify
different master devices in the same bus. The master codes can be selected by the programmer and
can use only up to eight master devices in a single bus system.

The data transmission begins with a start condition, high speed mode bits (0001), three master
identity address (XXX), Acknowledgment bit, data frame, continued with Acknowledgment bit and
start condition until stop condition is sent by the sender. After receiving the stop condition, the
transmission rate of I2C devices are set back to standard mode. The transmission rate in high speed
mode is 400 MB/second. The figure below shows the addressing scheme of a high speed I2C Bus.

Figure 7: High speed mode addressing in I2C Bus system

9
Inter-Integrated Circuit (IIC) Bus protocol

5. STEPS OF I2C DATA TRANSMISSION

Step 1: The master device transmits the start condition to all the slave devices by setting the SCL line
from a high voltage level to a low voltage level and then switching the SCL line from high to low
voltage.

Step 2: The master transmits 7 or 10-Bit address of the slave required along with read/write bit.

Step 3: With the address received from the master, the slave devices compares with their own

address and sends an acknowledgment by unsetting SDA line by one bit. The connection between

master and slave device is set now. The following figure shows the operation:

Figure 8: Master and slave connection using address

Step 4: The slave device is set to read/write mode by the master and the master sends or receives

the data frame. The most significant bit is transferred first. The following figure shows that the data is

being transmitted only to slave 3 and the data is stored as 10110100 (MSB is received first).

10
Inter-Integrated Circuit (IIC) Bus protocol

Figure 9: Master and slave communication in I2C bus

Step 5: The receiver returns ACK bit by setting SDA line to zero indicating the data transmission is

complete. The following figure shows the operation:

Figure 10: Acknowledgement by slave device in I2C bus

Step 6: Finally, the data transmission is stopped by the master using stop condition. The SCL line is

set to high before SDA is set to high. The following figure shows the operation:

11
Inter-Integrated Circuit (IIC) Bus protocol

6. TYPES OF MASTER AND SLAVE DEVICES

6.1 SINGLE MASTER WITH MULTIPLE SLAVES

Multiple slaves can be connected using single master. Maximum of 128 devices can be used in 7-bit

addressing scheme and maximum of 1024 devices can be used in 10-bit addressing scheme. While

connecting them practically, it is standard to use 4.7K ohm pull-up resistors to short SDA and SCL

lines with Voltage source (Vcc) as shown in figure 11.

Figure 11: Single master and multiple slave devices in I2C bus

6.2 MULTIPLE MASTERS WITH MULTIPLE SLAVES

Multiple masters can be connected to multiple slaves in a single system. There is a difficulty in this
system to choose the transmission time. There exists single bus for all the masters to communicate. If
one of the master devices is communicating, all the other devices have to wait and there is problem of
data collision when two master devices triggers at the same time. SDA line can be used to overcome
this problem, when the SDA is low then other masters can take control of the bus or they should wait
for certain time. it is standard to use 4.7K ohm pull-up resistors to short SDA and SCL lines with
Voltage source (Vcc) as shown in figure 12:

12
Inter-Integrated Circuit (IIC) Bus protocol

Figure 12: Multiple master and multiple slave devices in I2C bus

7. ADVANTAGES OF I2C BUS PROTOCOL

 Data transmission rates are flexible

 Can connect multiple masters and multiple slaves in a single bus system
 Data cannot be lost due to ACK/NACK bit which gives confirmation for each data frame
 Easy to trace any malfunctions or errors
 Less complicated hardware compared to UARTs
 Widely accepted protocol around the world
 Longer distance communication compared to SPI
 Each slave device can be uniquely identified
 It is capable of providing arbitration and communication collision detection
 Usage of open-collector transistors makes it flexible
 ICs can be added to an external hardware without disturbing the circuit

13
Inter-Integrated Circuit (IIC) Bus protocol

8. DISADVANTAGES OF I2C BUS PROTOCOL

 Rate of data transmission is less compared to SPI

 The data frame is always limited to 8 bits
 More complicated hardware compared to SPI
 Half-duplex communication

9. APPLICATIONS OF I2C BUS PROTOCOL

 Temperature and fan control in a server/IPMI

 Used in internal power supply
 Hot swap external power supply
 Telecom and storage sectors
 Used as buffer box-to-box communication
 Voltage translator
 Used as bus buffers in industrial applications
 Used as bridge in SPI CPU interface

REFERENCES

 https://www.i2c-bus.org/

 http://www.sase.com.ar/2010/descargar-
tutoriales/nxpi2cprotocolandapplications_sase.pdf?attredirects=0

 https://www.circuitbasics.com/basics-of-the-i2c-communication-protocol/

 https://www.ti.com/lit/an/slva704/slva704.pdf?ts=1626020304427&ref_url=htt
ps%253a%252f%252fwww.google.co.in%252f

 https://www.rfwireless-world.com/terminology/advantages-and-
disadvantages-of-i2c.html

14