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Introduction To: System-on-Chip

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Introduction to System-on-Chip

COE838/EE8221 Systems-on-Chip Design


http://www.ee.ryerson.ca/~courses/COE838/
Dr. Gul N. Khan
http://www.ee.ryerson.ca/~gnkhan
Electrical and Computer Engineering
Ryerson University
Overview
• Course Management
• Introduction to SoC
• SoC Applications
• On-Chip Interconnections
• Bus-based and NoC based SoC Interconnects

Introductory Articles on SoC available at the course webpage


COE838/EE8221: Systems-on-Chip Design
http://www.ee.ryerson.ca/~courses/coe838/

Instructor: Dr. Gul N. Khan


Email: gnkhan@ee.ryerson.ca
URL:http://www.ee.ryerson.ca/~gnkhan
Telephone: 416 979-5000 ext. 6084, Office: ENG448
Consultation Hours: Thursday 12:15-2:15PM or by Appointment

Department of Electrical and Computer Engineering


Ryerson University
Introduction to SoC Design 2
Lectures, Labs and Projects
Half Notes
 Students need to take notes and also require text-reference books and
some research articles identified by the instructor.
Labs and Project
 Aimed at concept reinforcement and practical experience.
Lectures, Labs, Projects and other support material
will be available at the course website:
http://www.ee.ryerson.ca/~courses/coe838/
Assessment and Evaluation
Labs: 15%
Project: 15%
Midterm Exam: 25% (Thursday: February 13, 2020
during lecture hours in TRS3149
Final Exam: 45%

Introduction to SoC Design 3


Course Text/Reference Books and other Material
Text and Other Books
1. M. Wolf, Computer as Components: Principles of Embedded
Computing System Design, 3rd or 4th edition Morgan Kaufmann-Elsevier
Publishers 2012, 2016 ISBN 978-0-12-388436-7, ISBN 97801280538741.
2. Michael J. Flynn, Wayne Luk, Computer System Design: System on
Chip, John Wiley and Sons Inc. 2011, ISBN 978-0-470-64336-5
3. SystemC: From the Ground Up, 2nd Edition, D.C. Black, J Donovan, B.
Bunton, A. Keist, Springer 2010, ISBN 978-0-387-69958-5.
4. On-Chip Communication Architectures, System on Chip Interconnect,
S. Pascricha and N. Dutt, Morgan Kaufmann-Elsevier Publishers 2008,
ISBN 978-0-12-373892-9.
5. Embedded Core Design with FPGAs, Z. Navabi, McGraw-Hill 2007,
ISBN 978-0-07-147481-8 ISBN 0-07-147481-1.
Some Articles, Embedded Processors and other Data Sheets are available at the
Course Website: http://www.ee.ryerson.ca/~courses/coe838/

Introduction to SoC Design 4


Main Lecture Topics
1. Introduction to System on Chip (SoC)
* An SoC Design Approach
2. SystemC and SoC Design:
* Co-Specification, System Partitioning, Co-simulation, and Co-synthesis
* SystemC for Co-specification and Co-simulation
3. Hardware-Software Co-Synthesis, Accelerators based SoC Design
4. Basics of Chips and SoC ICs:
* Cycle Time, Die Area-and-Cost, Power,
* Area-time-Power Tradeoffs and Chip Reliability
5. System-on-Chip and SoPC (System on Programmable Chips)
6. SoC CPU/IP Cores
* ARM Cortex A9, NIOS-II, OpenRISC, Leon4 and OpenSPARC
7. SoC Interconnection Structures: Bus-based Interconnection
* AMBA Bus, IBM Core Connect, Avalon, Interconnection Structures
8. Network on Chip - NoC Interconnection and NoC Systems
9. Multi-core and MPSoC Architectures
10. SoC Application Case Studies (time permitting)

Introduction to SoC Design 5


System on a Chip
• An IC that integrates multiple components of a
system onto a single chip.
• MPSoC addresses performance requirements.

Introduction to SoC Design 6


Samsung S3C6410 Platform

Introduction to SoC Design 7


S3C6410 System-on-Chip
• A 16/32-bit RISC low power, high performance micro-processor
• Applications include mobile phones, Portable Navigation
Devices and other general applications.
• Provide optimized H/W performance for the 2.5G and
3G communication services,
• Includes many powerful hardware accelerators for motion
video processing, display control and scaling. An
• Integrated Multi Format Codec (MFC) supports encoding and
decoding of MPEG4/H.263, H.264.
• Many hardware peripherals such as camera interface, TFT 24-bit
LCD controller, power management, etc.
Introduction to SoC Design 8
S3C6410 based Mobile Processor
Navigation
System

iPhone based
on
ARM1176JZ
S3C6410

Introduction to SoC Design 9


Samsung S5PC100 SoC
used in iPhone 3GS

Introduction to SoC Design 10


S5PC100 Samsung SoC
S5PC100 has various functionalities:
• Wireless communication, Personal
navigation, Camera
• Portable gaming, Video player and
Mobile TV into one device.
• S5PC100 has a 32-bit ARM Cortex
A8 RISC microprocessor that
operates up to 833MHz.
• 64/32-bit internal bus architecture
• Used in iPhone 3GS and iPod touch
3rd generation.

Introduction to SoC Design 11


Moore’s Law

…the performance of an IC, including the number components on it, doubles


every 18-24 months with the same chip price ... - Moore - 1960
Introduction to SoC Design 12
Technology Past Roadmap

H.P: High performance µP - MicroProcessor


H.H: Hand Held Devices
Introduction to SoC Design 13
Evolution: Boards to SoC
Evolution:
• IP based design
• Platform-based design
Some Challenges
• HW/SW Co-design
• Integration of analog (RF) IPs
• Mixed Design
• Productivity
Emerging new technologies
• Greater complexity
• Increased performance
• Higher density
• Lower power dissipation

Introduction to SoC Design 14


What is System-on-Chip
SoC: More of a System not a Chip
* In addition to IC, SoC consists of software and
interconnection structure for integration.
SoC may consists of all or some of the following:
• Processor/CPU cores
• On-chip interconnection (busses, network, etc.)
• Analog circuits
• Accelerators or application specific hardware modules
• ASICs Logics
• Software – OS, Application, etc.
• Firmware

Introduction to SoC Design 15


System on a Chip
On-Chip Components?
A processor or multiple processors
* Including DSPs, microprocessors, microcontrollers
Cores (IPs): On-chip memory, accelerators,
peripherals (i.e. USB, ETH, etc.), PLLs, power
management, etc.

Introduction to SoC Design 16


SC2A11: Multi-core Processor
A multi-core processor SoC with 24-
cores of ARM Cortex-A53.
SC2A11 suitable for low-power server
systems. It can also suit to edge
computing to process data at the edge
of the cloud.

Introduction to SoC Design 17


SC2A11-Media Transcoder System
• High energy-efficiency processor element is realized with multi-
core configuration of ARM Cortex-A53.
• Large amount of Video data can be processed faster in memory.

Introduction to SoC Design 18


ASIC to System-on-Chip
ASICs: Application Specific ICs are close to SoC designed to
perform a specific function for embedded and other applications.
* ASIC vendors supply libraries for each technology they provide.
Mostly, these libraries contain pre-designed/verified logic circuits.
* SOC is an IC designed by combining multiple stand-alone VLSI
designs to provide a functional IC for an application. It composes
of pre-designed models of complex functions e.g. cores (IP block,
virtual components, etc.) that serve various embedded applications.

Introduction to SoC Design 19


ASIC Design Flow
Top Level Design
Long Time to Design
Unit Block Design DVT: Design,
Unit Block Verification Verification
Integration and Synthesis and Testing
Trial Netlists
Timing Convergence
& Verification

System Level Verification

Fabrication

DVT Prep

DVT
5 10 10 4 13 ?? 4 6 Time in Weeks

42
Time to Mask order
52

Introduction to SoC Design 20


System-on-Chip Design Flow
• Specify: What does the customer really want?
• Architect:
* Find the most cost and performance effective
architecture to implement it?
* Which existing components can we adapt & re-use?
• Evaluate: What is the performance impact of a
cheaper architecture?
• Implement: What can we generate automatically
from libraries and customization?
Use separate computation, communication, etc.

Introduction to SoC Design 21


SoC Design Flow
SoC Typical Design Steps
Top Level Design • Due to Chip Complexity
Unit Block Design
Unit Block Verification and lower IC area, it is
Integration and Synthesis difficult to reduce
Trial Netlists
Placement, Layout and
Timing Convergence Fabrication steps time.
and Verification
• There is need to reduce the
System Level Verification
time of other steps before
Fabrication
Placement, Layout and
DVT Prep
Fabrication steps.
3 3 2 12 4 4
DVT
• One should consider Chip
Time in Weeks
Layout issues up-front.
20 Time to Mask order
28

Introduction to SoC Design 22


System-on-Chip

CPU

MPEG CORE

DSP

GPU

Analog Other Component


RF

Introduction to SoC Design 23


SOC Structure
A tile of the chip

control

data

parity
spare

p1 bus
p3

A communication link

Introduction to SoC Design 24


SOC: System on Chip
 SOC cannot be considered as a large ASIC
 Architectural approach involving significant design reuse
 Addresses the cost and time-to-market problems
 SOC design is significantly more complex
 Need cross-domain optimizations
 IP reuse will increase productivity, but not enough
 Even with extensive IP reuse, many of the ASICs design
problems will remain, and more …
Proc IP cores
Mem
Mem
IP- USB CPU DSP USB
CPU Sec hub hub

$100 $10
IP- X
Co-
DSP X Sec Proc

Introduction to SoC Design 25


SOC Applications
 SOC Design include embedded processor cores, and a
significant software component, which leads to additional
design challenges.
 An SOC is a system on an IC that integrates software and
hardware Intellectual Property (IP) using more than one
design methodology.
 The designed system on a chip is application specific.
Microprocessor, Media processor,
Typical applications of SOC: GPS controllers, Cellular/Smart
phones, ASICs, HDTV, Game
 Consumer devices. Consoles, PC-on-a-chip
 Networking and communication.
 Biomedical Devices.
 Other segments of electronics industry.

Introduction to SoC Design 26


IP: Intellectual Property Cores
IP cores can be classified into three types:
Hard IP cores are hard layouts using physical design libraries.
The integration of hard IP cores is simple and easy. However,
they are technology dependent and lack flexibility.
Soft IP cores are generally in VHDL/Verilog code providing
functional descriptions of IPs. These cores are flexible and
reconfigurable. However, these soft IP cores must be synthesized
and verified by the user before integrating them.
Firm IP cores provide the advantage of both balancing the high
performance and optimization properties of hard IPs along with
the flexibility of soft IPs. These cores are provided in the form of
netlists to specific physical libraries after synthesis.

Introduction to SoC Design 27


Some IP Examples

Introduction to SoC Design 28


Multi-Core (Processor) System-on-Chip
Inter-node communication between CPU/cores can be
performed by message passing or shared memory.
Number of processors in the same chip-die increases at
each node (CMP and MPSoC).
• Memory sharing will require: Shared Bus
* Large Multiplexers
* Cache coherence
* Not Scalable
• Message Passing: NOC: Network-on-Chip
* Scalable
* Require data transfer transactions
* Overhead of extra communication

Introduction to SoC Design 29


Buses to Networks

• Architectural paradigm shift: Replace wire spaghetti by network


• Usage paradigm shift: Pack everything in packets
• Organizational paradigm shift
 Confiscate communications from logic designers
 Create a new discipline, a new infrastructure responsibility
Introduction to SoC Design 30
MPSoC
MPSoC is a system-on-chip and it contains multiple
instruction-set processors (CPUs).
• A typical MPSoC is a heterogeneous
multiprocessor where several different types of
processing elements (PEs).
• The memory system may also be heterogeneously
distributed around the machine, and the
interconnection structure between the PEs and the
memory may also be heterogeneous.
• MPSoCs often have large memory. The application
device can have embedded memory on-chip, and may
rely on off-chip commodity memory.
Introduction to SoC Design 31
SOC: System on Chip
Several CPUs are now actually considered as SoCs!
• CPUs now contain the CPU itself, along with integrated
graphics processors, PCI express, memory controllers etc. all
on a single die

Advantages?
Disadvantages?

ipad3’s CPU SoC Circuit  A5

PC Motherboard – CPU with support ICs

Introduction to SoC Design 32


Exynos 5410 Octa Processor SoC

Octa core CPU, big.LITTLE processing


3D graphics – fast/efficient operation for smartphone/tablets.
12.8 GB/s memory bandwidth, 1080p 60 fps video.
Introduction to SoC Design 33
Where are we heading?
 Introduction to System on Chip - An SoC Design Approach.
 SystemC for SoC Design: Co-Specification and Simulation.
 Hardware-Software Co-synthesis and Accelerator based SoCs.
 Basics of Chips and SoC ICs.
 Hardware-Software Co-synthesis and Accelerator based SoCs
 SoC CPU/IP Cores: ARM Cortex A9
 SoC Interconnection Structures: Bus-based Interconnection
 NoC: Network on Chip
 Multi-core and MPSoC (Multiprocessor SoC) Architectures
 SoC Case Studies (if time permits)

Introduction to SoC Design 34

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