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    Sagarsimhakt

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    sagar simha
    Sagar Simha K T is seeking a position that allows him to apply his knowledge and skills in a professional environment to help achieve organizational goals. He has an M.Tech in Electronics from BMS College of Engineering with a 7.31 CGPA and a B.E in Electronics and Communication Engineering from New Horizon College of Engineering with a 65.01% score. His technical skills include design tools like Cadence Virtuoso, programming languages like C and HDLs like Verilog and SystemVerilog. His areas of interest are IP/ASIC/SOC verification, post-silicon validation, and pre-silicon validation. He has worked on projects involving UART design and verification using SystemVerilog, a

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    Sagarsimhakt

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    sagar simha
    47 views2 pages
    Sagar Simha K T is seeking a position that allows him to apply his knowledge and skills in a professional environment to help achieve organizational goals. He has an M.Tech in Electronics from BMS College of Engineering with a 7.31 CGPA and a B.E in Electronics and Communication Engineering from New Horizon College of Engineering with a 65.01% score. His technical skills include design tools like Cadence Virtuoso, programming languages like C and HDLs like Verilog and SystemVerilog. His areas of interest are IP/ASIC/SOC verification, post-silicon validation, and pre-silicon validation. He has worked on projects involving UART design and verification using SystemVerilog, a

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    Sagar Simha K T is seeking a position that allows him to apply his knowledge and skills in a professional environment to help achieve organizational goals. He has an M.Tech in Electronics from BMS College of Engineering with a 7.31 CGPA and a B.E in Electronics and Communication Engineering from New Horizon College of Engineering with a 65.01% score. His technical skills include design tools like Cadence Virtuoso, programming languages like C and HDLs like Verilog and SystemVerilog. His areas of interest are IP/ASIC/SOC verification, post-silicon validation, and pre-silicon validation. He has worked on projects involving UART design and verification using SystemVerilog, a

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    47 views2 pages

    Sagarsimhakt

    Uploaded by

    sagar simha
    Sagar Simha K T is seeking a position that allows him to apply his knowledge and skills in a professional environment to help achieve organizational goals. He has an M.Tech in Electronics from BMS College of Engineering with a 7.31 CGPA and a B.E in Electronics and Communication Engineering from New Horizon College of Engineering with a 65.01% score. His technical skills include design tools like Cadence Virtuoso, programming languages like C and HDLs like Verilog and SystemVerilog. His areas of interest are IP/ASIC/SOC verification, post-silicon validation, and pre-silicon validation. He has worked on projects involving UART design and verification using SystemVerilog, a

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    SAGAR SIMHA K T

    SLV Lakshmanappa Complex, Mobile No: +91 - 7411235831


    Near Narasimhaswamy Temple, Bidarahalli, Email ID: sagarsimhakt@gmail.com
    Bengaluru – 560049 LinkedIn: linkedin.com/in/sagarsimhakt/
    Career objective

    To work in a firm with a professional work driven environment where I can utilize and apply my knowledge, skills
    which would enable me to grow while fulfilling organizational goals.

    Academic qualification

    Qualification Institute University/ Board Year CGPA/ %


    M. Tech - BMS College of Engineering, Autonomous under VTU 2020 7.31
    ELECTRONICS Bengaluru.
    B.E (ECE) New Horizon College of VTU, Belagavi 2016 65.01%
    Engineering, Bengaluru.
    12th Vision PU College, Bengaluru. Department of Pre-University 2012 87.5%
    Board, Bengaluru
    10th Little Bloom English High Karnataka State Board, Bengaluru 2010 87.68%
    School, Bengaluru.

    Technical skills

     Design Tools : Cadence Virtuoso, VIVADO, Questasim, CCS Compiler.


     Programming Language : C Programming.
     HDL : Verilog HDL.
     HVL : System Verilog
     Verification Methodology : UVM
     Scripting Languages : Perl (Beginner)

    Areas of Interest

     IP/ASIC/SOC Verification, Post Silicon Validation, Pre-Silicon Validation, Physical Design

    Projects

     Design and Verification of UART using System Verilog.


    The main objective of this project was to design and verify a UART module using System Verilog. The data will
    be transmitted serially, bit by bit to the receiving UART. This, in turn will convert serial data into parallel for
    the receiving device.

     WSN Based Flood Estimation and Early Cautioning System using IoT.
    A WSN architecture is proposed here for positioning sensor and gathering data. The system provides a real-
    world application of Internet of things and offer services like accurate level monitoring directly or indirectly
    benefited by the system sensors.

     Lua RTOS ESP32.


    Lua RTOS is a real time operating system designed to run on embedded systems, with Minimal requirements
    of FLASH and RAM memory. Currently Lua RTOS is available for ESP32, ESP8266 and PIC32MZ platforms, and
    can be easily ported to other 32-bit platforms.

     Lossless Image Compression Using MATLAB.


    MATLAB is a powerful tool for analyzing images and signals for developing applications. One of the applications
    is image compression with MATLAB busing graphical user interface. This technique is used to compress the
    captured image to reduce its size while maintaining its quality.
    Certifications

     Certification in Business English from University of Cambridge.


     Swayam – NPTEL Online Certification on VLSI Physical Design.

    Workshops, Conferences and Seminars

     International Infothon Conclave – 2K20 in “Machine Learning Redefining the Semiconductor Industry”,14th
    May 2020, Thakur College of Science & Commerce, Mumbai.
     International Webinar on “Dis-Aggregation of SW and HW in networking trends”, BMSCE, 2020..

    Papers Published

     Sagar Simha K T and Dr. Maligi Anantha Sunil,“WSN Based Flood Estimations and Early Cautioning System
    using IoT”, (IJITEE) ISSN: 2278-3075, Volume-8 Issue-10, August 2019

    Declaration:

    I certify that the particulars given above are correct and complete to the best of my Knowledge.

    Sagar Simha K T

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