Gujarat Technological University
Gujarat Technological University
Gujarat Technological University
___________
GUJARAT TECHNOLOGICAL UNIVERSITY
Diploma Engineering - SEMESTER–V • Examination – WINTER • 2014
Subject Code: 3351704 Date: 04-12-2014
Subject Name: PLC Programming
Time: 10:30 am - 01:00 pm Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. English version is considered to be Authentic.
5. Draw ladder diagram for time delay ON non-retentive timer for 60 second
having time base of 1 second.
(c) Explain BIT SET function showing bit pattern in the registers. 04
OR
(c) Explain BIT CLEAR function showing bit pattern in the registers. 04
(d) How shift register can be used to move digital bits through registers by using 04
function?
OR
(d) Derive square root by using PLC square root functions with suitable example. 04
1/2
Q.3 (a) State the trouble shooting procedure for PLC system 03
OR
(a) Explain FIFO function for PLC with example. 03
(c) Explain block diagram for PLC based automation system with sketch. 07
Q.5 (a) Describe PID module for PLC with the help of block diagram 04
(d) Draw neat sketch of PLC applications for temperature control of the tank. 03
************
2/2