Fujitsu Ah530 Schimatic

1 2 3 4 5 6 7 8
Intel Calpella
Intel Calpella Arrandale UMA 01
BlOCK DIAGRAM
A A
SYSTEM
RESET CIRCUIT
POWER
FAN & THERMAL POWER
BATT
CHARGER REGULATOR CPU VR
+1.5V_SUS/+0.75V_DDR_VTT
AC/BATT RUN POWER SW CLOCK DC/DC
CONNECTOR SLG8SP585VTR +1.05V_PCH +3VPCU/+5VPCU/
+3V_S5/+5V_S5 CPU (QFN-32)
+3V_SUS/+5V_SUS +1.05V_VTT
+5V_RUN/+3V_RUN/+1.8V_RUN
Arrandale 35W
DDR3-SODIMM1
CHA
37.5mm X 37.5mm
Dual Channel DDR3
B
1066 1.5V B
DDR3-SODIMM2
( rPGA 989 )
PS8101 HDMI
CHB
Panel Connector
FDI DMI X 4
HDMI
CRT CONN.
LVDS
SATA
SATA-ODD PCH VGA USB conn x 3
USB2.0 x 3
SATA 82801IBM Card Reader SD MS CARD
SATA-HDD
(HM55) RTS5159
C 27mm X 25mm PCIEx1 C
GLAN 10/100/1000 LAN

PCIEx1 Realtek RTL8111E-GR
IHDA
PCIEx1
AUDIO/AMP PCIEx1 MINI-CARD
ALC269 WLAN
SPI
LPC NEW CARD W83L351YG
Audio Audio FLASH

SPK conn Jacks 2Mbyts
EC MINI-CARD
ITE8502
18X8 3G
Keyboard
D D
SPI PS/2
FLASH Touchpad Quanta Computer Inc.

2Mbyts
PROJECT : FH2
Size Document Number Rev
1A
BLOCK DIAGRAM
Date: Monday, December 21, 2009 Sheet 1 of 38
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Table of Contents
PAGE
01
02
DESCRIPTION
Schematic Block Diagram
Front Page
Power Sequence 02
03 Clock Generator
ACIN
04-07 Arrandale
+3VPCU/+5VPCU
A 08-13 Ibex Peak-M A
NBSWON#
14-15 DDRIII SO-DIMM(204P)
16 LCD/CCD CONN
17 CRT CONN RVCC_ON
T1
18 Card Reader (RTS5159)
ICH_RSMRST#
19 LAN RTL8111E-GR/RJ45 T2
DNBSWON#
20 HDD/ODD/HOLE
21 USB/BLUE TOOTH
22 MINI-Card (WLAN/3G)/ XDP
SUSB#,SUSC#,SUSD#
23 KB/TOUCH PAD/LED
24 CODEC (ALC269)
SUSON
25 EC_ ITE8502
26 FAN/SW/NEWCARD MAINON T3
27 +5V/+3V (RT8206B) T5
MAINON2
28 +1.05V/ +1.8V (RT8204C)
B 29 CPU Core ( ADP3212) +1.5VSUS/+3VSUS/+5VSUS B
30 +1.05V_VTT (VT358)
+1.5V_RUN/+1.8V_RUN
31 UMA GPU CORE (RT8152C) /+3V_RUN/+5V_RUN
32 DDR3 (RT8207)
+1.05V_PCH/+1.05V_VTT
33 DISCHARGE/3VS5/5VS5/LAN /+0.75V_DDR_VTT
34 CHARGER (ISL88731)
35 Clock Distribution HWPG
36 Power Tree
VRON
37 SMBUS Address
+VCC_CORE
VR_PWRGD_CLKEN# 3ms~20ms
IMVP_PWRGD
C C
T4
MPWROK
H_VTTPWRGD
DRAMPWROK
VCCPPWRGOOD
PLTRST#
CPU_RST#
T1: RVCCON TO RSMRST# = 30ms (spec:mini 10ms)

T2: RSMRST# TO-DNBSWON = 110ms (spec:mini 100ms)
D D
T3: MAINON2 TO VRON = 110ms (spec:mini 99ms)
T4: VRON TO MPWROK = 10ms (HWPG NEED TO BE HIGH at that time)
Note: IMVP_CLK_EN# (inverted) assertion to SYS_PWROK/PCH_PWROK assertion.
SPEC:3ms~20ms Quanta Computer Inc.
T5: MAINON to MAINON2 =500us PROJECT : FH2
1A
Frontpage
1 2 3 4 5 6 7 8
5 4 3 2 1
03
D D
+3V_RUN
L11 BLM21PG600SN1D 40mil +3.3V_CLK_VDD 1 VDD_USB CLK_BUF_BCLK_P

5 VDD_LCD CPU-0 23 CLK_BUF_BCLK_P 10
17 22 CLK_BUF_BCLK_N
VDD_SRC CPU-0# CLK_BUF_BCLK_N 10
C185 C149 C148 C179 C181 C165 +VDDIO_CLK 24 VDD_CPU
29 20
10U/10V_8 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 15
18
VDD_REF
VDD_SRC_IO
VDD_CPU_IO
CK505 CPU-1
CPU-1# 19
9 VSS_SATA
QFN32 DOT96T_LPR 3 CLK_BUF_DREFCLKP
CLK_BUF_DREFCLKP 10
0.1uF near the every power pin. 2 4 CLK_BUF_DREFCLKN
VSS_USB DOT96C_LPR CLK_BUF_DREFCLKN 10
8 VSS_LCD
12 13 CLK_BUF_PCIE_3GPLLP
VSS_SRC SRC-2 CLK_BUF_PCIE_3GPLLP 10
21 14 CLK_BUF_PCIE_3GPLLN
VSS_CPU SRC-2# CLK_BUF_PCIE_3GPLLN 10
26 VSS_REF
10 CLK_BUF_DREFSSCLKP
SRC-1/SATA CLK_BUF_DREFSSCLKP 10
11 CLK_BUF_DREFSSCLKN
SRC-1#/SATA# CLK_BUF_DREFSSCLKN 10
C
+3V_RUN C
R139 10K/J_4 16 6
CK_PWRGD_R CPU_STOP# 27MHz_nonSS
25 CK_PWRGD/PD#_3.3 27MHz_SS 7
CLK_PCH_14M R125 33/J_4 CPU_SEL 30
10 CLK_PCH_14M REF_0/CPU_SEL
Place the 33 ohm XTAL_OUT 27

XTAL_IN XOUT
resistors close to the CK 505 28 XIN
10,14,15 CGDAT_SMB 31 SDATA GND 33

10,14,15 CGCLK_SMB 32 SCLK
SLG8SP585VTR U6
C145 C146 Realtek: 0.1uFx3pcs, 22uFx1pcs
*33P/50V_4 *33P/50V_4 IDT: 0.1uFx2pcs, 10uFx1pcs
+3V_RUN +VDDIO_CLK
Y1 L12 BLM21PG600SN1D
XTAL_IN 1 2 XTAL_OUT R142 *0/J_8 40mil
805
B 14.318MHZ +1.05V_PCH C186 C167 C180 B
2
C173
C166 33P/50V_4 10U/10V_8 0.1U/16V_4 0.1U/16V_4
+3V_S5 33P/50V_4 R144 0/J_8
1
HP: 10u x2pcs
C182 SLG,IDT: +1.05V Place each 0.1uF cap as close as

0.1U/16V_4 possible to each VDD IO pin. Place
Realtek: +3.3V
5
the 10uF caps on the VDD_IO plane.

29 VR_PWRGD_CLKEN# 2 4 R140 0/J_4 CK_PWRGD_R
U8 +VDDIO_CLK:
TC7SZ04FU(T5L,F,T)
SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V.
3
Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V.

IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V.
+3V_RUN
CPU_SEL:
2
PIN 30 CPU_0 CPU_1 SLG date sheet (V0.2) P15:

R126
*4.7K/J_4
High Voltage: Min 0.7V, Max 1.5V.
A 0(default) 133MHz 133MHz Low Voltage: Min Vss-0.3V, Max 0.35V. A
Realtek date sheet(V1.2) P11:
1
CPU_SEL
1(0.7V-1.5V) 100MHz 100MHz High Voltage: Min 0.7V, Max 1.5V.
2
Low Voltage: Min Vss-0.3V, Max 0.35V.

R127
C152
IDT date sheet(V0.7) P10: Quanta Computer Inc.
4.7K/J_4 High Voltage: Min 0.7V, Max 1.5V.
*10P/50V_4
Low Voltage: Min Vss-0.3V, Max 0.35V. PROJECT : FH2
1
EMI Capacitor Size Document Number Rev

1A
Clock Generator
5 4 3 2 1
5 4 3 2 1
04
U19A
B26 PEG_ICOMPI R251 49.9/F_4 U19B
PEG_ICOMPI H_COMP3
PEG_ICOMPO A26 AT23 COMP3
8 DMI_TXN0 A24 DMI_RX#[0] PEG_RCOMPO B27 BCLK A16 CLK_CPU_BCLKP 11
MISC
C23 A25 R254 750/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLKN 11
D 8 DMI_TXN1 DMI_RX#[1] PEG_RBIAS COMP2 BCLK# D
8 DMI_TXN2 B22 DMI_RX#[2] H_COMP1
CLOCKS
8 DMI_TXN3 A21 DMI_RX#[3] PEG_RX#[0] K35 G16 COMP1 BCLK_ITP AR30 CLK_BCLK_ITPP 22
PEG_RX#[1] J34 BCLK_ITP# AT30 CLK_BCLK_ITPN 22
B24 J33 H_COMP0 AT26
8 DMI_TXP0 DMI_RX[0] PEG_RX#[2] COMP0
8 DMI_TXP1 D23 DMI_RX[1] PEG_RX#[3] G35 PEG_CLK E16 CLK_PCIE_3GPLLP 10
DMI
8 DMI_TXP2 B23 DMI_RX[2] PEG_RX#[4] G32 PEG_CLK# D16 CLK_PCIE_3GPLLN 10
A22 F34 T13 TP_SKT0CC# AH24
8 DMI_TXP3 DMI_RX[3] PEG_RX#[5] SKTOCC#
PEG_RX#[6] F31 DPLL_REF_SSCLK A18 CLK_DREFSSCLKP 10
8 DMI_RXN0 D24 DMI_TX#[0] PEG_RX#[7] D35 DPLL_REF_SSCLK# A17 CLK_DREFSSCLKN 10
G24 E33 H_CATERR# AK14
8 DMI_RXN1 DMI_TX#[1] PEG_RX#[8] CATERR#
THERMAL
8 DMI_RXN2 F23 DMI_TX#[2] PEG_RX#[9] C33
8 DMI_RXN3 H23 DMI_TX#[3] PEG_RX#[10] D32
B32 F6 DDR3_DRAMRST#_C for S3 power reduction
PEG_RX#[11] R271 0/J_4 H_PECI_ISO SM_DRAMRST#
8 DMI_RXP0 D25 DMI_TX[0] PEG_RX#[12] C31 11 H_PECI AT15 PECI
F24 B28 AL1 SM_RCOMP_0
8 DMI_RXP1 DMI_TX[1] PEG_RX#[13] SM_RCOMP[0]
E23 B30 AM1 SM_RCOMP_1
G23 A31 AN1 SM_RCOMP_2 +1.05V_VTT
29 H_PROCHOT#_D H_PROCHOT#_D AN26 PROCHOT# R91 2
PEG_RX[0] J35 PM_EXT_TS#[0] AN15 1 10K/J_4
DDR3
MISC
H34 AP15 R86 2 1 10K/J_4
PEG_RX[1] PM_EXT_TS#[1] R103 0/J_4
8 FDI_TXN[7:0] PEG_RX[2] H33 PM_EXTTS#0 14
FDI_TXN0 E22 F35 11 H_THERM H_THERM R105 0/J_4 AK15 R83 0/J_4 PM_EXTTS#1 15
FDI_TXN1 FDI_TX#[0] PEG_RX[3] THERMTRIP#
D21 FDI_TX#[1] PEG_RX[4] G33
FDI_TXN2 D19 E34
FDI_TXN3 FDI_TX#[2] PEG_RX[5]
D18 FDI_TX#[3] PEG_RX[6] F32 PRDY# AT28 XDP_PRDY# 22
FDI_TXN4 G21 D34 AP27 XDP_PREQ# XDP_PREQ# 22 R80
FDI_TXN5 FDI_TX#[4] PEG_RX[7] PREQ# *12.4K/F_4
PCI EXPRESS -- GRAPHICS
E19 FDI_TX#[5] PEG_RX[8] F33
FDI_TXN6 F21 B33 AN28 XDP_TCLK XDP_TCLK 22
FDI_TX#[6] PEG_RX[9] TCK
Intel(R) FDI
FDI_TXN7 G18 D31 22 H_CPURST# H_CPURST# AP26 AP28 XDP_TMS XDP_TMS 22

FDI_TX#[7] PEG_RX[10] RESET_OBS# TMS
PWR MANAGEMENT
A32 AT27 XDP_TRST# XDP_TRST# 22
PEG_RX[11] TRST# T41
JTAG & BPM

8 FDI_TXP[7:0] PEG_RX[12] C30
FDI_TXP0 D22 A28 8 PM_SYNC AL15 AT29 XDP_TDI_R T38
FDI_TXP1 FDI_TX[0] PEG_RX[13] PM_SYNC TDI XDP_TDO_R T39
C21 FDI_TX[1] PEG_RX[14] B29 TDO AR27
FDI_TXP2 D20 A30 AR29 XDP_TDI_M
C FDI_TXP3 FDI_TX[2] PEG_RX[15] TDI_M XDP_TDO_M C
C18 FDI_TX[3] AN14 VCCPWRGOOD_1 TDO_M AP29
FDI_TXP4 G22 L33
FDI_TXP5 FDI_TX[4] PEG_TX#[0] H_DBR#_R R43 0/J_4
E20 FDI_TX[5] PEG_TX#[1] M35 DBR# AN25 XDP_DBRESET# 8,22
FDI_TXP6 F20 M33 11,22 H_PWRGOOD AN27
FDI_TXP7 FDI_TX[6] PEG_TX#[2] VCCPWRGOOD_0
G19 FDI_TX[7] PEG_TX#[3] M30 XDP_OBS[0:7] 22
L31 AJ22 XDP_OBS0_R R28 0/J_4 XDP_OBS0
PEG_TX#[4] PM_DRAM_PWRGD BPM#[0] XDP_OBS1_R R37 0/J_4 XDP_OBS1
8 FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32 8 PM_DRAM_PWRGD AK13 SM_DRAMPWROK BPM#[1] AK22
E17 M29 AK24 XDP_OBS2_R R32 0/J_4 XDP_OBS2
8 FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6] BPM#[2]
J31 AJ24 XDP_OBS3_R R29 0/J_4 XDP_OBS3
PEG_TX#[7] H_VTTPWRGD BPM#[3] XDP_OBS4_R R36 0/J_4 XDP_OBS4
8 FDI_INT C17 FDI_INT PEG_TX#[8] K29 AM15 VTTPWRGOOD BPM#[4] AJ25
H30 AH22 XDP_OBS5_R R30 0/J_4 XDP_OBS5
PEG_TX#[9] BPM#[5] XDP_OBS6_R R33 0/J_4 XDP_OBS6
8 FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29 BPM#[6] AK23
D17 F29 22 H_PWRGD_XDP AM26 AH23 XDP_OBS7_R R31 0/J_4 XDP_OBS7
8 FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] TAPPWRGOOD BPM#[7]
PEG_TX#[12] E28
PEG_TX#[13] D29
D27 R101 1.5K/F_4 AL14
PEG_TX#[14] 10,18,19,22,26 PLTRST# RSTIN#
PEG_TX#[15] C26
XDP_TDI_R XDP_TDI 22
L34 R102 R249 0/J_4
PEG_TX[0] Clarksfield/Auburndale XDP_TDO_M
PEG_TX[1] M34 750/F_4 XDP_TDO 22
M32 R41 *0/J_4
PEG_TX[2]
PEG_TX[3] L30
M31 R44
PEG_TX[4] XDP_TRST#
PEG_TX[5] K31
M28 0/J_4
PEG_TX[6] R259
PEG_TX[7] H31
K28 XDP_TDI_M 51/J_4
PEG_TX[8] R250 *0/J_4
PEG_TX[9] G30
G29 XDP_TDO_R
PEG_TX[10] R280 R257 0/J_4
PEG_TX[11] F28
E27 25,27 HWPG HWPG H_VTTPWRGD
PEG_TX[12] 2K/F_4
PEG_TX[13] D28
PEG_TX[14] C27
R282 For S3 power reduction
B PEG_TX[15] C25
1K/F_4 CPU THERMTRIP +1.05V_VTT B
+1.5V_SUS
3
Clarksfield/Auburndale R330 *0/J_4
Q2
2N7002W-7-F R332
2 Q16 1K/F_4
8,29 IMVP_PWRGD
DDR3_DRAMRST#_C 1 3 DDR3_DRAMRST# 14,15
2N7002E
2
R72 100K/J_4 R331 R329 *0/J_4 DDR3_CORL_EC 25
100K/J_4
R325 0/J_4 DDR3_CORL_PCH 11
R77
Processor Pullups Processor Compensation Signals 1K/J_4
DDR3 Compensation Signals A
1
C370
+1.05V_VTT
2
0.047u_4
2
H_COMP0 SM_RCOMP_2 Q1 +1.5V_RUN
H_THERM H_THERM_R 1 3 SYS_SHDN# 27
H_COMP1 SM_RCOMP_1 R76 33/J_4 MMBT3904
H_COMP2 SM_RCOMP_0 PM_THRMTRIP# STUP AS SHORT AS PASSPBLE

R75 R58 R64 R294
49.9/F_4 68/F_4 *68/J_4 H_COMP3 *1.1K/F_4
CPU THERM SENSOR PM_DRAM_PWRGD R288 1.5K/F_4 HWPG
H_CATERR# R112 R113 R114
R48 R65 R52 R54 130/F_4 24.9/F_4 100/F_4 +3V_RUN
H_PROCHOT#_D 49.9/F_4 49.9/F_4 20/F_4 20/F_4
U24 R293
H_CPURST# 4 5SYS_SHDN_1# SYS_SHDN# 750/F_4
VDD OS R361 *0/J_4
A 1 A
R360 CTRL
C369 *0_4 2 3
*0.1U/10V_4 GND Vtemp
*BDE0900G
T14 +1.05V_VTT
R362
XDP_TMS R59 *51/J_4
XDP_TDI_R
XDP_PREQ#
R253
R61
*51/J_4
*51/J_4
*0_4 Quanta Computer Inc.
XDP_TCLK R39 *51/J_4
T7 PROJECT : FH2
ES2-01 1A
ARRANDALE 1/4
5 4 3 2 1
5 4 3 2 1
U19C
ARRANDALE PROCESSOR (DDR3)
U19D
05
15 M_B_DQ[63:0] SB_CK[0] W8 M_B_CLKP0 15
SA_CK[0] AA6 M_A_CLKP0 14 SB_CK#[0] W9 M_B_CLKN0 15
AA7 M_A_CLKN0 14 M_B_DQ0 B5 M3 M_B_CKE0 15
D SA_CK#[0] M_B_DQ1 SB_DQ[0] SB_CKE[0] D
14 M_A_DQ[63:0] SA_CKE[0] P7 M_A_CKE0 14 A5 SB_DQ[1]
M_A_DQ0 A10 M_B_DQ2 C3
M_A_DQ1 SA_DQ[0] M_B_DQ3 SB_DQ[2]
C10 SA_DQ[1] B3 SB_DQ[3] SB_CK[1] V7 M_B_CLKP1 15
M_A_DQ2 C7 M_B_DQ4 E4 V6 M_B_CLKN1 15
M_A_DQ3 SA_DQ[2] M_B_DQ5 SB_DQ[4] SB_CK#[1]
A7 SA_DQ[3] SA_CK[1] Y6 M_A_CLKP1 14 A6 SB_DQ[5] SB_CKE[1] M2 M_B_CKE1 15
M_A_DQ4 B10 Y5 M_A_CLKN1 14 M_B_DQ6 A4
M_A_DQ5 SA_DQ[4] SA_CK#[1] M_B_DQ7 SB_DQ[6]
D10 SA_DQ[5] SA_CKE[1] P6 M_A_CKE1 14 C4 SB_DQ[7]
M_A_DQ6 E10 M_B_DQ8 D1
A8 SA_DQ[7] D2 SB_DQ[9]
M_A_DQ8 D8 M_B_DQ10 F2 AB8 M_B_CS0# 15
M_A_DQ9 SA_DQ[8] M_B_DQ11 SB_DQ[10] SB_CS#[0]
F10 SA_DQ[9] SA_CS#[0] AE2 M_A_CS0# 14 F1 SB_DQ[11] SB_CS#[1] AD6 M_B_CS1# 15
M_A_DQ10 E6 AE8 M_A_CS1# 14 M_B_DQ12 C2
M_A_DQ11 SA_DQ[10] SA_CS#[1] M_B_DQ13 SB_DQ[12]
F7 SA_DQ[11] F5 SB_DQ[13]
M_A_DQ12 E9 M_B_DQ14 F3
B7 SA_DQ[13] G4 SB_DQ[15] SB_ODT[0] AC7 M_B_ODT0 15
M_A_DQ14 E7 AD8 M_A_ODT0 14 M_B_DQ16 H6 AD1 M_B_ODT1 15
M_A_DQ15 SA_DQ[14] SA_ODT[0] M_B_DQ17 SB_DQ[16] SB_ODT[1]
C6 SA_DQ[15] SA_ODT[1] AF9 M_A_ODT1 14 G2 SB_DQ[17]
M_A_DQ16 H10 M_B_DQ18 J6
G8 SA_DQ[17] J3 SB_DQ[19]
M_A_DQ18 K7 M_B_DQ20 G1 M_B_DM[7:0] 15
M_A_DQ19 SA_DQ[18] M_B_DQ21 SB_DQ[20] M_B_DM0
J8 SA_DQ[19] G5 SB_DQ[21] SB_DM[0] D4
M_A_DQ20 G7 M_B_DQ22 J2 E1 M_B_DM1
M_A_DQ21 SA_DQ[20] M_B_DQ23 SB_DQ[22] SB_DM[1] M_B_DM2
G10 SA_DQ[21] M_A_DM[7:0] 14 J1 SB_DQ[23] SB_DM[2] H3
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ24 J5 K1 M_B_DM3
M_A_DQ23 SA_DQ[22] SA_DM[0] M_A_DM1 M_B_DQ25 SB_DQ[24] SB_DM[3] M_B_DM4
J10 SA_DQ[23] SA_DM[1] D7 K2 SB_DQ[25] SB_DM[4] AH1
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ26 L3 AL2 M_B_DM5
M_A_DQ25 SA_DQ[24] SA_DM[2] M_A_DM3 M_B_DQ27 SB_DQ[26] SB_DM[5] M_B_DM6
M6 SA_DQ[25] SA_DM[3] M7 M1 SB_DQ[27] SB_DM[6] AR4
M_A_DQ26 M8 AG6 M_A_DM4 M_B_DQ28 K5 AT8 M_B_DM7
M_A_DQ27 SA_DQ[26] SA_DM[4] M_A_DM5 M_B_DQ29 SB_DQ[28] SB_DM[7]
L9 SA_DQ[27] SA_DM[5] AM7 K4 SB_DQ[29]
C M_A_DQ28 L6 AN10 M_A_DM6 M_B_DQ30 M4 C
M_A_DQ29 SA_DQ[28] SA_DM[6] M_A_DM7 M_B_DQ31 SB_DQ[30]
K8 SA_DQ[29] SA_DM[7] AN13 N5 SB_DQ[31]
M_A_DQ30 N8 M_B_DQ32 AF3
P9 SA_DQ[31] AG1 SB_DQ[33] M_B_DQSN[7:0] 15
M_A_DQ32 AH5 M_B_DQ34 AJ3 D5 M_B_DQSN0
M_A_DQ33 SA_DQ[32] M_B_DQ35 SB_DQ[34] SB_DQS#[0] M_B_DQSN1
AF5 SA_DQ[33] M_A_DQSN[7:0] 14 AK1 SB_DQ[35] SB_DQS#[1] F4
M_A_DQ34 AK6 C9 M_A_DQSN0 M_B_DQ36 AG4 J4 M_B_DQSN2
SA_DQ[34] SA_DQS#[0] SB_DQ[36] SB_DQS#[2]
DDR SYSTEM MEMORY A
M_A_DQ35 AK7 F8 M_A_DQSN1 M_B_DQ37 AG3 L4 M_B_DQSN3

M_A_DQ36 SA_DQ[35] SA_DQS#[1] M_A_DQSN2 M_B_DQ38 SB_DQ[37] SB_DQS#[3] M_B_DQSN4
AF6 SA_DQ[36] SA_DQS#[2] J9 AJ4 SB_DQ[38] SB_DQS#[4] AH2
M_A_DQ37 M_A_DQSN3 M_B_DQ39 M_B_DQSN5
DDR SYSTEM MEMORY - B

AG5 SA_DQ[37] SA_DQS#[3] N9 AH4 SB_DQ[39] SB_DQS#[5] AL4
M_A_DQ38 AJ7 AH7 M_A_DQSN4 M_B_DQ40 AK3 AR5 M_B_DQSN6
M_A_DQ39 SA_DQ[38] SA_DQS#[4] M_A_DQSN5 M_B_DQ41 SB_DQ[40] SB_DQS#[6] M_B_DQSN7
AJ6 SA_DQ[39] SA_DQS#[5] AK9 AK4 SB_DQ[41] SB_DQS#[7] AR8
M_A_DQ40 AJ10 AP11 M_A_DQSN6 M_B_DQ42 AM6
M_A_DQ41 SA_DQ[40] SA_DQS#[6] M_A_DQSN7 M_B_DQ43 SB_DQ[42]
AJ9 SA_DQ[41] SA_DQS#[7] AT13 AN2 SB_DQ[43]
M_A_DQ42 AL10 M_B_DQ44 AK5
AK12 SA_DQ[43] AK2 SB_DQ[45]
M_A_DQ44 AK8 M_B_DQ46 AM4
AL7 SA_DQ[45] M_A_DQSP[7:0] 14 AM3 SB_DQ[47] M_B_DQSP[7:0] 15
M_A_DQ46 AK11 C8 M_A_DQSP0 M_B_DQ48 AP3 C5 M_B_DQSP0
M_A_DQ47 SA_DQ[46] SA_DQS[0] M_A_DQSP1 M_B_DQ49 SB_DQ[48] SB_DQS[0] M_B_DQSP1
AL8 SA_DQ[47] SA_DQS[1] F9 AN5 SB_DQ[49] SB_DQS[1] E3
M_A_DQ48 AN8 H9 M_A_DQSP2 M_B_DQ50 AT4 H4 M_B_DQSP2
AM10 SA_DQ[49] SA_DQS[3] M9 AN6 SB_DQ[51] SB_DQS[3] M5
M_A_DQ50 AR11 AH8 M_A_DQSP4 M_B_DQ52 AN4 AG2 M_B_DQSP4
AL11 SA_DQ[51] SA_DQS[5] AK10 AN3 SB_DQ[53] SB_DQS[5] AL5
M_A_DQ52 AM9 AN11 M_A_DQSP6 M_B_DQ54 AT5 AP5 M_B_DQSP6
AN9 SA_DQ[53] SA_DQS[7] AR13 AT6 SB_DQ[55] SB_DQS[7] AR7
M_A_DQ54 AT11 M_B_DQ56 AN7
AP12 SA_DQ[55] AP6 SB_DQ[57]
M_A_DQ56 AM12 M_B_DQ58 AP8
B
AN12 SA_DQ[57] M_A_A[15:0] 14 AT9 SB_DQ[59] B
M_A_DQ58 AM13 Y3 M_A_A0 M_B_DQ60 AT7
M_A_DQ59 SA_DQ[58] SA_MA[0] M_A_A1 M_B_DQ61 SB_DQ[60]
AT14 SA_DQ[59] SA_MA[1] W1 AP9 SB_DQ[61]
M_A_DQ60 AT12 AA8 M_A_A2 M_B_DQ62 AR10 M_B_A[15:0] 15
M_A_DQ61 SA_DQ[60] SA_MA[2] M_A_A3 M_B_DQ63 SB_DQ[62] M_B_A0
AL13 SA_DQ[61] SA_MA[3] AA3 AT10 SB_DQ[63] SB_MA[0] U5
M_A_DQ62 AR14 V1 M_A_A4 V2 M_B_A1
M_A_DQ63 SA_DQ[62] SA_MA[4] M_A_A5 SB_MA[1] M_B_A2
AP14 SA_DQ[63] SA_MA[5] AA9 SB_MA[2] T5
V8 M_A_A6 V3 M_B_A3
SA_MA[6] M_A_A7 SB_MA[3] M_B_A4
SA_MA[7] T1 SB_MA[4] R1
Y9 M_A_A8 15 M_B_BS0 AB1 T8 M_B_A5
SA_MA[8] M_A_A9 SB_BS[0] SB_MA[5] M_B_A6
14 M_A_BS0 AC3 SA_BS[0] SA_MA[9] U6 15 M_B_BS1 W5 SB_BS[1] SB_MA[6] R2
14 M_A_BS1 AB2 AD4 M_A_A10 15 M_B_BS2 R7 R6 M_B_A7
SA_BS[1] SA_MA[10] M_A_A11 SB_BS[2] SB_MA[7] M_B_A8
14 M_A_BS2 U7 SA_BS[2] SA_MA[11] T2 SB_MA[8] R4
U3 M_A_A12 R5 M_B_A9
SA_MA[12] M_A_A13 SB_MA[9] M_B_A10
SA_MA[13] AG8 15 M_B_CAS# AC5 SB_CAS# SB_MA[10] AB5
T3 M_A_A14 15 M_B_RAS# Y7 P3 M_B_A11
SA_MA[14] M_A_A15 SB_RAS# SB_MA[11] M_B_A12
14 M_A_CAS# AE1 SA_CAS# SA_MA[15] V9 15 M_B_WE# AC6 SB_W E# SB_MA[12] R3
14 M_A_RAS# AB3 AF7 M_B_A13
SA_RAS# SB_MA[13] M_B_A14
14 M_A_WE# AE9 SA_W E# SB_MA[14] P5
N1 M_B_A15
SB_MA[15]
Clarksfield/Auburndale
A A
Channel A DQ[15,32,48,54], DM[5] Clarksfield/Auburndale
Requires minimum 12mils spacing
with all other signals, including data signals.
Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing Quanta Computer Inc.
with all other signals, including data signals.
PROJECT : FH2
1A
ARRANDALE 2/4
5 4 3 2 1
5 4 3 2 1
CPU Core Power

+VCC_CORE=4.8 max
+VCC_CORE
U19F
+1.05V_VTT=1.8 max +1.05V_VTT

ARRANDALE PROCESSOR (GRAPHICS POWER) 06
AG35 AH14 U19G
VCC1 VTT0_1
AG34 VCC2 VTT0_2 AH12
AG33 VCC3 VTT0_3 AH11 AT21 VAXG1
AG32 AH10 C318 C103 C107 C311 C309 AT19 AR22 VGAU_VCCSENSE 31
VCC4 VTT0_4 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8 *10U/6.3V_8 VAXG2 VAXG_SENSE
SENSE
LINES
AG31 VCC5 VTT0_5 J14 AT18 VAXG3 VSSAXG_SENSE AT22 VGAU_VSSSENSE 31
AG30 VCC6 VTT0_6 J13 AT16 VAXG4
D AG29 H14 AR21 D
VCC7 VTT0_7 +VCC_GFX_CORE VAXG5
AG28 VCC8 VTT0_8 H12 AR19 VAXG6
AG27 VCC9 VTT0_9 G14 AR18 VAXG7
AG26 VCC10 VTT0_10 G13 AR16 VAXG8 GFX_VID[0] AM22 VGAU_VID0 31
AF35 VCC11 VTT0_11 G12 AP21 VAXG9 GFX_VID[1] AP22 VGAU_VID1 31
AF34 G11 C102 C105 C326 C99 AP19 AN22
GRAPHICS VIDs
VCC12 VTT0_12 VAXG10 GFX_VID[2] VGAU_VID2 31
AF33 F14 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 C97 AP18 AP23 VGAU_VID3 31
VCC13 VTT0_13 10U/6.3V_8 VAXG11 GFX_VID[3]
AF32 VCC14 VTT0_14 F13 AP16 VAXG12 GFX_VID[4] AM23 VGAU_VID4 31
AF31 VCC15 VTT0_15 F12 AN21 VAXG13 GFX_VID[5] AP24 VGAU_VID5 31
GRAPHICS
AF30 VCC16 VTT0_16 F11 AN19 VAXG14 GFX_VID[6] AN24 VGAU_VID6 31
AF29 E14 AN18 R67 4.7K_4 For S3 power reduction
VCC17 VTT0_17 VAXG15
AF28 VCC18 VTT0_18 E12 AN16 VAXG16
AF27 D14 AM21 AR25 VGA_ON VGA_ON 31 Check to ensure that 4 stitching caps per SODIMM
VCC19 VTT0_19 VAXG17 GFX_VR_EN
AF26 VCC20 VTT0_20 D13 AM19 VAXG18 GFX_DPRSLPVR AT25 VGAU_DPRSLPVR 31 connector between SODIMM 1.5V and GND are placed as
1.1V RAIL POWER

AD35 D12 +1.05V_VTT AM18 AM24
VCC21 VTT0_21 VAXG19 GFX_IMON VGAU_IMON close as possible to the connectors – caps should be
AD34 VCC22 VTT0_22 D11 AM16 VAXG20
AD33 C14 AL21 R256 *1K/F_4 evenly distributed between the connectors
VCC23 VTT0_23 + C88 C98 C63 VAXG21
AD32 VCC24 VTT0_24 C13 AL19 VAXG22
AD31 C12 330U/2.5V_7343 22U/6.3V_8 22U/6.3V_8 AL18
VCC25 VTT0_25 C329 C313 C304 VAXG23
AD30 VCC26 VTT0_26 C11 AL16 VAXG24
AD29 B14 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 AK21 AJ1 +1.5V_RUN
VCC27 VTT0_27 VAXG25 VDDQ1
AD28 VCC28 VTT0_28 B12 AK19 VAXG26 VDDQ2 AF1
- 1.5V RAILS
AD27 VCC29 VTT0_29 A14 AK18 VAXG27 VDDQ3 AE7
AD26 A13 AK16 AE4 C125 C124 C127 C128 C126
VCC30 VTT0_30 VAXG28 VDDQ4 1U/6.3V_4 1U/6.3V_41U/6.3V_41U/6.3V_41U/6.3V_4
AC35 VCC31 VTT0_31 A12 AJ21 VAXG29 VDDQ5 AC1
AC34 VCC32 VTT0_32 A11 AJ19 VAXG30 VDDQ6 AB7
AC33 VCC33 AJ18 VAXG31 VDDQ7 AB4
AC32 +1.05V_VTT AJ16 Y1
VCC34 VAXG32 VDDQ8
AC31 VCC35 AH21 VAXG33 VDDQ9 W7
POWER
AC30 VCC36 VTT0_33 AF10 AH19 VAXG34 VDDQ10 W4
AC29 VCC37 VTT0_34 AE10 AH18 VAXG35 VDDQ11 U1
AC28 VCC38 VTT0_35 AC10 AH16 VAXG36 VDDQ12 T7
CPU CORE SUPPLY
C + C122 C
AC27 VCC39 VTT0_36 AB10 VDDQ13 T4
AC26 Y10 +1.05V_VTT P1 330U/2.5V_7343 C121 C120
VCC40 VTT0_37 C308 C96 VDDQ14 7343 22U/6.3V_8 22U/6.3V_8
AA35 VCC41 VTT0_38 W10 VDDQ15 N7
AA34 U10 22U/6.3V_8 22U/6.3V_8 N4 2.5
VCC42 VTT0_39 VDDQ16
DDR3
AA33 VCC43 VTT0_40 T10 VDDQ17 L1
AA32 VCC44 VTT0_41 J12 J24 VTT1_45 VDDQ18 H1
FDI
AA31 VCC45 VTT0_42 J11 J23 VTT1_46
AA30 J16 H25 +1.05V_VTT +VCC_CORE
VCC46 VTT0_43 C319 C101 VTT1_47
AA29 VCC47 VTT0_44 J15
AA28 22U/6.3V_8 22U/6.3V_8
VCC48
AA27 VCC49 VTT0_59 P10
AA26 VCC50 VTT0_60 N10
Y35 L10 + C281 C54 C302 C52 C53 C291
VCC51 VTT0_61 C104 C106 C110 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8
Y34 VCC52 VTT0_62 K10
Y33 10U/6.3V_8 10U/6.3V_8 *330U/2.5V_7343
VCC53
Y32 VCC54
Y31 VTT0_43,VTT0_44:(Intel feedback)
VCC55
Y30 VCC56 They are connected to hidden page for
1.1V
Y29 VCC57 intel validation purpose. VTT1_63 J22
Y28 VCC58 K26 VTT1_48 VTT1_64 J20
Y27 J27 J18 C276 C38 C59 C58 C280 C285
VCC59 VTT1_49 VTT1_65
PEG & DMI

Y26 J26 H21 C330 C314 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8
VCC60 H_PSI# C317 C316 VTT1_50 VTT1_66 22U/6.3V_8 22U/6.3V_8
V35 VCC61 PSI# AN33 H_PSI# 29 J25 VTT1_51 VTT1_67 H20
V34 22U/6.3V_8 22U/6.3V_8 H27 H19
POWER
VCC62 VTT1_52 VTT1_68

V33 VCC63 G28 VTT1_53
V32 AK35 VID0 G27 +1.8V_RUN
VCC64 VID[0] VID0 29 VTT1_54
V31 AK33 VID1 VID1 29 G26
VCC65 VID[1] VID2 VTT1_55
V30 VCC66 VID[2] AK34 VID2 29 F26 VTT1_56
V29 AL35 VID3 E26 L26 C79 C56 C36 C81 C55 C299
VCC67 VID[3] VID3 29 VTT1_57 VCCPLL1
CPU VIDS
1.8V
V28 AL33 VID4 VID4 29 E25 L27 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
VCC68 VID[4] VID5 VTT1_58 VCCPLL2
V27 VCC69 VID[5] AM33 VID5 29 VCCPLL3 M26
V26 AM35 VID6 VID6 29 C331 C315 C42 C50 C65 C66 C297
B VCC70 VID[6] DPRSLPVR 22U/6.3V_8 22U/6.3V_8 1U/6.3V_4 1U/6.3V_4 2.2U/6.3V_6 4.7U/6.3V_6 22U/6.3V_8 B
U35 VCC71 PROC_DPRSLPVR AM34 DPRSLPVR 29
U34 VCC72
U33 VCC73
U32 VCC74
U31 G15 H_VTTVID1 30 C301 C300 C286 C80 C35 C82
VCC75 VTT_SELECT 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
U30 VCC76
U29 Clarksfield/Auburndale
VCC77 +VCC_CORE
U28 VCC78
U27 VCC79
U26 VCC80
R35 VCC81
R34 VCC82
R33 VCC_SENSE & VSS_SENSE: C57 C37 C78 C303
VCC83 R216 SC(V1.0)P19 +1.05V_VTT 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
R32 VCC84 ISENSE AN35 I_MON 29
R31 100/F_4 100- ±1% pull-down to GND near processor
VCC85
R30 VCC86
R29 VCC87
SENSE LINES
R28 VCC88 VCC_SENSE AJ34 VCCSENSE 29

R27 VCC89 VSS_SENSE AJ35 VSSSENSE 29
R26 R225 R227 R230 R233 R236 R239 R243 R208 R209
VCC90 1K/J_4 1K/J_4 1K/J_4 *1K/J_4 *1K/J_4 1K/J_4 *1K/J_4 1K/J_4 *1K/J_4 + C277 + C90
P35 VCC91
P34 B15 VTT_SENSE 30 *470U/6.3V_7343 *470U/6.3V_7343
VCC92 VTT_SENSE VID0
P33 VCC93 VSS_SENSE_VTT A15 VSS_SENSE_VTT 30
P32 R217 VID1
VCC94 100/F_4 VID2
P31 VCC95
P30 VID3
VCC96 VID4
P29 VCC97
P28 VSS_SENSE_VTT: VID5
VCC98 SC(V1.0)P20 PROC_DPRSLPVR: VID6
P27 VCC99
P26 Connect VSS_SENSE_VTT to GND SC(V1.0)P19: DPRSLPVR
VCC100 or can be left floating. It is important to have the resistor stuffing options H_PSI#
Note: CRB has the VSS_SENSE_VTT floating. in the design for the Turbo functionality.
A The stuffing and no-stuffing of the resistors A
will depend on the POC configuration of AUB
and CFD Note: R226 R228 R231 R234 R237 R240 R244 R213 R214
CRB(V1.0)P67: For Validating IMVP VR R814 should be STUFF *1K/J_4 *1K/J_4 *1K/J_4 1K/J_4 1K/J_4 *1K/J_4 1K/J_4 *1K/J_4 1K/J_4
uses 1K pull-up and pull-down resistors and R827 NO_STUFF
CRB default setting is "1"
Clarksfield/Auburndale
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER) Quanta Computer Inc.

PROJECT : FH2
1A
ARRANDALE 3/4
5 4 3 2 1
5 4 3 2 1
ARRANDALE PROCESSOR (GND) ARRANDALE PROCESSOR( RESERVED, CFG)
AT20
U19H
VSS1 VSS81 AE34

U19I
U19E
RSVD32
RSVD33
AJ13
AJ12
07
AT17 VSS2 VSS82 AE33 AP25 RSVD1
AR31 VSS3 VSS83 AE32 K27 VSS161 AL25 RSVD2 RSVD34 AH25
AR28 VSS4 VSS84 AE31 K9 VSS162 AL24 RSVD3 RSVD35 AK26
AR26 VSS5 VSS85 AE30 K6 VSS163 AL22 RSVD4
AR24 VSS6 VSS86 AE29 K3 VSS164 AJ33 RSVD5 RSVD36 AL26
AR23 VSS7 VSS87 AE28 J32 VSS165 AG9 RSVD6 RSVD_NCTF_37 AR2
D AR20 AE27 J30 M27 D
VSS8 VSS88 VSS166 RSVD7
AR17 VSS9 VSS89 AE26 J21 VSS167 L28 RSVD8 RSVD38 AJ26
AR15 VSS10 VSS90 AE6 J19 VSS168 J17 SA_DIMM_VREF RSVD39 AJ27
AR12 VSS11 VSS91 AD10 H35 VSS169 H17 SB_DIMM_VREF
AR9 VSS12 VSS92 AC8 H32 VSS170 G25 RSVD11
AR6 VSS13 VSS93 AC4 H28 VSS171 G17 RSVD12
AR3 VSS14 VSS94 AC2 H26 VSS172 E31 RSVD13 RSVD_NCTF_40 AP1
AP20 VSS15 VSS95 AB35 H24 VSS173 E30 RSVD14 RSVD_NCTF_41 AT2
AP17 VSS16 VSS96 AB34 H22 VSS174
AP13 VSS17 VSS97 AB33 H18 VSS175 RSVD_NCTF_42 AT3
AP10 VSS18 VSS98 AB32 H15 VSS176 RSVD_NCTF_43 AR1
AN34 VSS22 VSS102 AB28 H5 VSS180 RSVD45 AL28
AN31 AB27 H2 CFG0 AM30 AL29
VSS23 VSS103 VSS181 CFG[0] RSVD46
AN23 VSS24 VSS104 AB26 G34 VSS182 AM28 CFG[1] RSVD47 AP30
AN20 VSS25 VSS105 AB6 G31 VSS183 AP31 CFG[2] RSVD48 AP32
AN17 AA10 G20 CFG3 AL32 AL27
VSS26 VSS106 VSS184 CFG4 CFG[3] RSVD49
AM29 VSS27 VSS107 Y8 G9 VSS185 AL30 CFG[4] RSVD50 AT31
AM27 VSS28 VSS108 Y4 G6 VSS186 AM31 CFG[5] RSVD51 AT32
AM25 VSS29 VSS109 Y2 G3 VSS187 AN29 CFG[6] RSVD52 AP33
AM20 W 35 F30 CFG7 AM32 AR33
VSS30 VSS110 VSS188 CFG[7] RSVD53
AM17 VSS31 VSS111 W 34 F27 VSS189 AK32 CFG[8] RSVD_NCTF_54 AT33
AM14 W 33 F25 AK31 AT34
RESERVED
VSS32 VSS112 VSS190 CFG[9] RSVD_NCTF_55
AM11 VSS33 VSS113 W 32 F22 VSS191 AK28 CFG[10] RSVD_NCTF_56 AP35
AM8 VSS34 VSS114 W 31 F19 VSS192 AJ28 CFG[11] RSVD_NCTF_57 AR35
AM5 VSS35 VSS115 W 30 F16 VSS193 AN30 CFG[12] RSVD58 AR32
C AM2 VSS36 VSS116 W 29 E35 VSS194 AN32 CFG[13] C
AL34 W 28 E32 AJ32
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W 27
W 26
E29
E24
VSS195
VSS196
VSS197
VSS AJ29
AJ30
CFG[14]
CFG[15]
CFG[16]
RSVD_TP_59
RSVD_TP_60
E15
F15
AL20 VSS40 VSS120 W6 E21 VSS198 AK30 CFG[17] KEY A2
AL17 VSS41 VSS121 V10 E18 VSS199 H16 RSVD_TP_86 RSVD62 D15
AL12 VSS42 VSS122 U8 E13 VSS200 RSVD63 C15
AL9 VSS43 VSS123 U4 E11 VSS201 RSVD64 AJ15
AL6 VSS44 VSS124 U2 E8 VSS202 RSVD65 AH15
AL3 VSS45 VSS125 T35 E5 VSS203
AK29 VSS46 VSS126 T34 E2 VSS204 VSS_NCTF1 AT35 B19 RSVD15
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1 A19 RSVD16
AK25 VSS48 VSS128 T32 D30 VSS206 VSS_NCTF3 AR34
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34 A20 RSVD17
AK17 T30 D9 B2 B20
NCTF
VSS50 VSS130 VSS208 VSS_NCTF5 RSVD18
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1 RSVD_TP_66 AA5
AJ23 VSS52 VSS132 T28 D3 VSS210 VSS_NCTF7 A35 U9 RSVD19 RSVD_TP_67 AA4
AJ20 VSS53 VSS133 T27 C34 VSS211 T9 RSVD20 RSVD_TP_68 R8
AJ17 VSS54 VSS134 T26 C32 VSS212 RSVD_TP_69 AD3
AJ14 VSS55 VSS135 T6 C29 VSS213 AC9 RSVD21 RSVD_TP_70 AD2
AJ11 VSS56 VSS136 R10 C28 VSS214
VSS_NCTF pins can be connected to GND or left as NC (floating). AB9 RSVD22 RSVD_TP_71 AA2
AJ8 VSS57 VSS137 P8 C24 VSS215 When tied to GND they should be routed as trace and RSVD_TP_72 AA1
AJ5 VSS58 VSS138 P4 C22 VSS216 not as a GND plane. RSVD_TP_73 R9
AJ2 VSS59 VSS139 P2 C20 VSS217 RSVD_TP_74 AG7
AH35 VSS60 VSS140 N35 C19 VSS218 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
AH34 VSS61 VSS141 N34 C16 VSS219 A3 RSVD_NCTF_24
AH33 VSS62 VSS142 N33 B31 VSS220
AH32 VSS63 VSS143 N32 B25 VSS221 RSVD_TP_76 V4
B AH31 VSS64 VSS144 N31 B21 VSS222 RSVD_TP_77 V5 B
AH30 VSS65 VSS145 N30 B18 VSS223 RSVD_TP_78 N2
AH29 VSS66 VSS146 N29 B17 VSS224 J29 RSVD26 RSVD_TP_79 AD5
AH28 VSS67 VSS147 N28 B13 VSS225 J28 RSVD27 RSVD_TP_80 AD7
AH27 VSS68 VSS148 N27 B11 VSS226 RSVD_TP_81 W3
AH26 VSS69 VSS149 N26 B8 VSS227 A34 RSVD_NCTF_28 RSVD_TP_82 W2
AH20 VSS70 VSS150 N6 B6 VSS228 A33 RSVD_NCTF_29 RSVD_TP_83 N3
AH17 VSS71 VSS151 M10 B4 VSS229 RSVD_TP_84 AE5
AH13 VSS72 VSS152 L35 A29 VSS230 C35 RSVD_NCTF_30 RSVD_TP_85 AD9
AH9 VSS73 VSS153 L32 A27 VSS231 B35 RSVD_NCTF_31
AH6 VSS74 VSS154 L29 A23 VSS232
AH3 VSS75 VSS155 L8 A9 VSS233 VSS AP34
AG10 VSS76 VSS156 L5 Can be left NC is Intel CRM
AF8 L2 R215
VSS77 VSS157 implementation; ESD/DG
AF4 VSS78 VSS158 K34 0/J_4
AF2 K33 recommendation to GND
VSS79 VSS159 Clarksfield/Auburndale
AE35 VSS80 VSS160 K30
Clarksfield/Auburndale Clarksfield/Auburndale
1 0
CFG4 Enabled; An external Display port
(Display Port Disabled; No Physical Display Port device is connected to the Embedded
A
The Clarkfield processor's PCI Express interface may CFG0 R245 *3.01K/F_4 Presence) attached to Embedded Diplay Port Display port
A
not meet PCI Express 2.0 jitter specifications. Intel CFG3 R35 *3.01K/F_4 CFG0
recommends placing a 3.01K +/- 5% pull down resistor to
CFG4 R34 *3.01K/F_4 (PCI-Epress Single PEG Bifurcation enabled
VSS on CFG[7] pin for both rPGA and BGA components.
Configuration Select)
This pull down resistor should be removed when this CFG7 R246 *3.01K/F_4 Quanta Computer Inc.
issue is fixed. CFG3
(PCI-Epress Static Normal Operation Lane Numbers Reversed PROJECT : FH2
Lane Reversal) Size Document Number Rev
1A
ARRANDALE 4/4
5 4 3 2 1
5 4 3 2 1
IBEX PEAK-M (DMI,FDI,GPIO) IBEX PEAK-M (LVDS,DDI)

08
U18C
FDI_RXN0 BA18 FDI_TXN0 4
4 DMI_RXN0 BC24 BH17 FDI_TXN1 4
DMI0RXN FDI_RXN1 U18D
4 DMI_RXN1 BJ22 BD16 FDI_TXN2 4
DMI1RXN FDI_RXN2 PANEL_BKEN
4 DMI_RXN2 AW20 DMI2RXN FDI_RXN3 BJ16 FDI_TXN3 4 16 PANEL_BKEN T48 L_BKLTEN SDVO_TVCLKINN BJ46
BJ20 BA16 ENVDD T47 BG46
4 DMI_RXN3 DMI3RXN FDI_RXN4 FDI_TXN4 4 16 ENVDD L_VDD_EN SDVO_TVCLKINP
BE14 FDI_TXN5 4
FDI_RXN5
4 DMI_RXP0 BD24 BA14 FDI_TXN6 4 16 BIA_PWM Y48 BJ48
DMI0RXP FDI_RXN6 L_BKLTCTL SDVO_STALLN
D
4 DMI_RXP1 BG22 BC12 FDI_TXN7 4 BG48 D
DMI1RXP FDI_RXN7 LCD_DDCCLK SDVO_STALLP
4 DMI_RXP2 BA20 16 LCD_DDCCLK AB48
DMI2RXP LCD_DDCDAT L_DDC_CLK
4 DMI_RXP3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_TXP0 4 16 LCD_DDCDAT Y45 L_DDC_DATA SDVO_INTN BF45
FDI_RXP1 BF17 FDI_TXP1 4 SDVO_INTP BH45
BE22 BC16 L_CTRL_CLK AB46
4 DMI_TXN0 DMI0TXN FDI_RXP2 FDI_TXP2 4 L_CTRL_CLK
BF21 BG16 L_CTRL_DATA V48
4
4
DMI_TXN1
DMI_TXN2 BD20
DMI1TXN
DMI2TXN
FDI_RXP3
FDI_RXP4 AW16
FDI_TXP3
FDI_TXP4
4
4
L_CTRL_DATA A
BE18 BD14 R50 2.37K/F_4 AP39 T51 DPB_CTRL_CLK
4 DMI_TXN3 DMI3TXN FDI_RXP5 FDI_TXP5 4 LVD_IBG SDVO_CTRLCLK
BB14 LVDS_VBG AP41 T53 DPB_CTRL_DATA
FDI_RXP6 FDI_TXP6 4 T9 PAD LVD_VBG SDVO_CTRLDATA
4 DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 4
4 DMI_TXP1 BH21 AT43
DMI1TXP LVD_VREFH TP1
4 DMI_TXP2 BC20 DMI2TXP AT42 LVD_VREFL DDPB_AUXN BG44
BD18 BJ14 BJ44 TP2
4 DMI_TXP3 DMI3TXP FDI_INT FDI_INT 4 DDPB_AUXP
AU38 DPB_HPD_Q
DMI
FDI
DDPB_HPD
LVDS
BF13 TXLCLKOUT- AV53
FDI_FSYNC0 FDI_FSYNC0 4 16 TXLCLKOUT- LVDSA_CLK#
BH25 TXLCLKOUT+ AV51 BD42 DPB_LANE0_N
DMI_ZCOMP 16 TXLCLKOUT+ LVDSA_CLK DDPB_0N
BH13 BC42 DPB_LANE0_P
FDI_FSYNC1 FDI_FSYNC1 4 DDPB_0P
+1.05V_PCH R57 49.9/F_4 DMI_ZCOMP BF25 TXLOUT0- BB47 BJ42 DPB_LANE1_N
DMI_IRCOMP 16 TXLOUT0- LVDSA_DATA#0 DDPB_1N
TXLOUT1- DPB_LANE1_P
Digital Display Interface

BJ12 FDI_LSYNC0 4 16 TXLOUT1- BA52 BG42
FDI_LSYNC0 TXLOUT2- LVDSA_DATA#1 DDPB_1P DPB_LANE2_N
16 TXLOUT2- AY48 BB40
INT_TXLOUTN3 LVDSA_DATA#2 DDPB_2N DPB_LANE2_P
BG14 FDI_LSYNC1 4 PAD AV47 BA40
FDI_LSYNC1 T6 LVDSA_DATA#3 DDPB_2P DPB_LANE3_N
AW38
TXLOUT0+ DDPB_3N DPB_LANE3_P
16 TXLOUT0+ BB48 BA38
TXLOUT1+ LVDSA_DATA0 DDPB_3P
16 TXLOUT1+ BA50
TXLOUT2+ LVDSA_DATA1
16 TXLOUT2+ AY49 LVDSA_DATA2
INT_TXLOUTP3 AV48 Y49
T3 PAD LVDSA_DATA3 DDPC_CTRLCLK
AB49
DDPC_CTRLDATA
XDP_DBRESET# T6 J12 PCIE_WAKE# TXUCLKOUT- AP48
4,22 XDP_DBRESET# SYS_RESET# WAKE# PCIE_WAKE# 19,26 16 TXUCLKOUT- LVDSB_CLK#
TXUCLKOUT+ AP47 BE44
16 TXUCLKOUT+ LVDSB_CLK DDPC_AUXN
BD44
R107 0/J_4 SYS_PWROK CLKRUN# TXUOUT0- DDPC_AUXP
M6 SYS_PWROK CLKRUN# / GPIO32 Y1 16 TXUOUT0- AY53 LVDSB_DATA#0 DDPC_HPD AV40
TXUOUT1- AT49
16 TXUOUT1- LVDSB_DATA#1
TXUOUT2- AU52 BE40
16 TXUOUT2-
System Power Management

PCH_PWRGD R265 0/J_4 PWROK INT_TXUOUTN3 LVDSB_DATA#2 DDPC_0N
B17 AT53 BD40
C PWROK T34 PAD LVDSB_DATA#3 DDPC_0P
BF41
C
TXUOUT0+ DDPC_1N
16 TXUOUT0+ AY51 LVDSB_DATA0 DDPC_1P BH41
R98 0/J_4 MEPWROK K5 P8 RSV_LPCPD# T17 TXUOUT1+ AT48 BD38
MEPWROK SUS_STAT# / GPIO61 16 TXUOUT1+ LVDSB_DATA1 DDPC_2N
TXUOUT2+ AU50 BC38
16 TXUOUT2+ LVDSB_DATA2 DDPC_2P
INT_TXUOUTP3 AT51 BB36
LAN_RST# A10 F3 ICH_SUSCLK T25 T33 PAD LVDSB_DATA3 DDPC_3N
BA36
LAN_RST# SUSCLK / GPIO62 DDPC_3P
D9 E4 INT_CRT_BLU AA52 U50

4 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# 25 17 INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
INT_CRT_GRE AB53 U52
17 INT_CRT_GRE CRT_GREEN DDPD_CTRLDATA
INT_CRT_RED AD53
17 INT_CRT_RED CRT_RED
ICH_RSMRST# C16 H7
25 ICH_RSMRST# RSMRST# SLP_S4# SIO_SLP_S4# 25
BC46
DDPD_AUXN
17 G_CLK_DDC2 V51 BD46
SUS_PWR_ACK CRT_DDC_CLK DDPD_AUXP
25 SUS_PWR_ACK M1 P12 SIO_SLP_S3# 25 17 G_DAT_DDC2 V53 AT38
SUS_PWR_DN_ACK / GPIO30 SLP_S3# CRT_DDC_DATA DDPD_HPD
BJ40
SLP_M#_R R218 33/J_4 DDPD_0N
25 DNBSWON# P5 K8 T16 17 INT_CRT_HSYNC Y53 BG40
PWRBTN# SLP_M# R224 33/J_4 CRT_HSYNC DDPD_0P
17 INT_CRT_VSYNC Y51 BJ38
CRT_VSYNC DDPD_1N
BG38
DDPD_1P
CRT
AC_PRESENT P7 N2 T51 BF37
25 AC_PRESENT ACPRESENT / GPIO31 TP23 DDPD_2N
R38 1K/D_4 AD48 BH37
DAC_IREF DDPD_2P
AB51 BE36
PM_BATLOW# CRT_IRTN DDPD_3N
A6 BJ10 PM_SYNC 4 BD36
BATLOW# / GPIO72 PMSYNCH DDPD_3P
IbexPeak-M_R1P0
PM_RI# F14 F6 PM_SLP_LAN#_R
RI# SLP_LAN# / GPIO29
IbexPeak-M_R1P0
+3V_RUN
A
CLKRUN# R300 8.2K_4
B +3V_RUN B
LCD_DDCDAT R24 2 1 2.2K/J_4
UMA HDMI signals Q23
2
LCD_DDCCLK R25 2 1 2.2K/J_4 *2N7002K
Close to VGA side DPB_CTRL_CLK R404 0_4 SDVO_CLK 17
L_CTRL_CLK R26 10K/J_4 PCH_PWRGD R99 10K/J_4 DPB_CTRL_DATA R405 0_4 SDVO_DATA 17 DPB_HPD_Q 1 3 HDMI_HPD_CON 17
INT_CRT_BLU R219 2 1 150/F_4 DPB_LANE0_N C4564 .1U/10V_4 IN_D2# 17
L_CTRL_DATA R27 10K/J_4 ICH_RSMRST# R263 10K/J_4 DPB_LANE0_P C4565 .1U/10V_4 IN_D2 17
INT_CRT_GRE R220 2 1 150/F_4 DPB_LANE1_N C4566 .1U/10V_4 IN_D1# 17
XDP_DBRESET# R296 1K/J_4 LAN_RST# R273 10K/J_4 DPB_LANE1_P C4567 .1U/10V_4 IN_D1 17 R406
INT_CRT_RED R221 2 1 150/F_4 DPB_LANE2_N C4568 .1U/10V_4 IN_D0# 17 100K_4 R407 0_4
+3V_S5 PM_SLP_LAN#_R R85 10K/J_4 DPB_LANE2_P C4569 .1U/10V_4 IN_D0 17
PANEL_BKEN R19 2 1 100K/J_4 DPB_LANE3_N C4570 .1U/10V_4 IN_CLK# 17
PM_RI# R275 10K/J_4 DPB_LANE3_P C4571 .1U/10V_4 IN_CLK 17
ENVDD R20 2 1 100K/J_4
PCIE_WAKE# R81 10K/J_4
PM_BATLOW# R289 8.2K/J_4
AC_PRESENT R111 8.2K/J_4
SUS_PWR_ACK R109 8.2K/J_4
+3V_RUN +3V_S5
C109 *0.1U/10V_4
R115
*2K_4
5
U5
A 4,29 IMVP_PWRGD 2 A
4 PCH_PWRGD
16,25 MPWROK 1
C111 MC74VHC1G08DFT2G
3
*0.1U_4
Quanta Computer Inc.

PROJECT : FH2
1A
IBEX PEAK-M 1/6
5 4 3 2 1
5 4 3 2 1
+VCC_RTC
RTC BATTERY
+3VPCU
R348
2
D18
1
R267 20K/F_4
C310
15P/50V_4 IBEX PEAK-M (HDA,JTAG,SATA) 09
2
1
C307
1K/J_4 CH501H-40
1U/6.3V_4 Y5 R272
+VCCRTC3 32.768KHZ 10M/J_4
D17
3
4
C312 U18A
2 1
R266 20K/F_4 15P/50V_4 RP4
D D
CH501H-40 RTC_X1 B13 D33 R_LAD0 1 2 47X4-0402
RTCX1 FWH0 / LAD0 LAD0 22,25
C306 RTC_X2 D13 B33 R_LAD1 3 4
RTCX2 FWH1 / LAD1 LAD1 22,25
R347 Cap values depend on Xtal C32 R_LAD2 5 6
+5VPCU 1K/J_4 A R264 1U/6.3V_4 FWH2 / LAD2
FWH3 / LAD3 A32 R_LAD3 7 8
LAD2
LAD3
22,25
22,25
Q17 1M/F_4 RTC_RST# C14
R351 *2.2K/F_4 RTCRST# R_LFRAME# R363 47/F_4
3 1 FWH4 / LFRAME# C34 LFRAME# 22,25
CON11 SRTC_RST# D17
*MMBT3904 SRTCRST# R327 10K/J_4
1 A34 +3V_RUN
RTC
LPC
1 SM_INTRUDER# LDRQ0#
2 2 2 A16 INTRUDER# LDRQ1# / GPIO23 F34
R349
*4.7K_4 AAA-BAT-054-K01 +VCC_RTC R270 330K/J_4 PCH_INVRMEN A14 AB9
INTVRMEN SERIRQ IRQ_SERIRQ 25
bat-23_2-4_2
DFHS02FS012
INTVRMEN(Internal Voltage Regulator Enable) : ACZ_BIT_CLK A30 HDA_BCLK

This signal enables the internal 1.05 V regulators. SATA0RXN AK7 SATA_RXN0 20 SATA HDD
R350 This signal must be always pulled-up to VccRTC. ACZ_SYNC D29 AK6
HDA_SYNC SATA0RXP SATA_RXP0 20
*15K_4 AK11
SATA0TXN SATA_TXN0 20
24 PCBEEP PCBEEP P1 AK9
SPKR SATA0TXP SATA_TXP0 20
ACZ_RST# C30 HDA_RST#
SATA1RXN AH6 SATA_RXN1 20 SATA ODD
SATA1RXP AH5 SATA_RXP1 20
CODEC 24 ACZ_SDIN0 G30 HDA_SDIN0 SATA1TXN AH9 SATA_TXN1 20
SATA1TXP AH8 SATA_TXP1 20
F30 HDA_SDIN1
SATA2RXN AF11
E32 AF9
IHDA
HDA_SDIN2 SATA2RXP
SATA2TXN AF7
C F32 HDA_SDIN3 SATA2TXP AF6 C
SATA port 2/3 are not support in HM55 .
R252 33/J_4 ACZ_SYNC AH3
24 ACZ_SYNC_R SATA3RXN
R238 33/J_4 ACZ_RST# Flash Descriptor Security Override ACZ_SDOUT B29 AH1
24 ACZ_RST#_R HDA_SDO SATA3RXP
CODEC R258 33/J_4 ACZ_SDOUT AF3
24 ACZ_SDOUT_R SATA3TXN
R242 33/J_4 ACZ_BIT_CLK AF1
24 ACZ_BIT_CLK_R SATA3TXP
ME_FW_OVERRIDE R53 1 2 1K/F_4 H32
25 MEFW_OVERRIDE
SATA
Low = Enabled HDA_DOCK_EN# / GPIO33
SATA4RXN AD9
GPIO33 High = Disabled GPIO13 J30 AD8
C295 PR83 10K/F_4 HDA_DOCK_RST# / GPIO13 SATA4RXP
SATA4TXN AD6
*27P/50V_4 AD5
(Internal 20K/F pull high to +3.3V_RUN) SATA4TXP
50 T50 PCH_JTAG_TCK_BUF M3 AD3
JTAG_TCK SATA5RXN
SATA5RXP AD1
T49 PCH_JTAG_TMS K3 AB3
JTAG_TMS SATA5TXN
Note : GPIO33 is a signal used for Flash SATA5TXP AB1
T45 PCH_JTAG_TDI K1
Descriptor Security Override/ME Debug JTAG_TDI
JTAG
Mode.This signal should be only asserted T47 PCH_JTAG_TDO J2 AF16
JTAG_TDO SATAICOMPO
lowthrough an external pull-down in
T48 PCH_JTAG_RST# J4 AF15 SATA_COMP R62 37.4/F_4
manufacturing or debug environments TRST# SATAICOMPI +1.05V_PCH
Place all series terms close to PCH except for SDIN input ONLY.
lines,which should be close to source.Placement of R773, R775, SPI_CLK BA2 SPI_CLK
R776 & R777 should equal distance to the T split trace point. R319 10K/J_4 +3V_RUN
Basically, keep the same distance from T for all series SPI_CS0# AV3 SPI_CS0#
termination resistors.
T20 SPI_CS1# AY3 T3
SPI_CS1# SATALED# SATA_LED# 23
B B
SPI_SI AY1 Y9 R66 1 2 10K/J_4 +3V_RUN

SPI_MOSI SATA0GP / GPIO21
SPI
+3V_RUN SPI_SO AV1 V1 R298 1 2 10K/J_4
SPI_MISO SATA1GP / GPIO19
No Reboot strap.
1 2 PCBEEP Low = Default. IbexPeak-M_R1P0
R295 *1K/J_4 PCBEEP High = No Reboot.
RESET JUMP (Near ROOM DOOR)

JTAG
Test Pads are need to put on
the same side of mother board.
For PCH 32Mbit (4M Byte)
+3V_S5 Res. of TDI near PCH RTC_RST#
1
T52
+3V_RUN +3V_RUN
A A PAD
R315 R306 R312 R305
R314
2
200/J_4 200/J_4 200/J_4 *20K/J_4 3.3K/J_4
R291
PCH_JTAG_TMS U20 3.3K/J_4 SRTC_RST#
PCH_JTAG_TDI SPI_CS0# R311 15/J_4 SPI_CS0#_R 1 8
PCH_JTAG_TDO R308 51/J_4 PCH_JTAG_TCK_BUF SPI_CLK R292 15/J_4 SPI_CLK_R CE# VDD G1
6 SCK
PCH_JTAG_RST# SPI_SI R323 15/J_4 SPI_SI_R 5
SPI_SO R313 15/J_4 SPI_SO_R SI *SHORT_ PAD
A 2 SO HOLD# 7 A
R316 R307 R290 R304 C328 3 4

22P/50V_4 WP# VSS C327
100/J_4 100/J_4 100/J_4 *10K/J_4 MX25L1605DM2I 0.1U/10V_4
50
Note : Only pop when PCH is production 10
stage & need "JTAG boundary Scan". Quanta Computer Inc.
NC all Res. when Res. of TDO
Remember to depop XDP side Res.
PCH is PCH ES1 stage : NC PROJECT : FH2
production stage. PCH ES2 stage : pop Size Document Number Rev
1A
IBEX PEAK-M 2/6
5 4 3 2 1
5 4 3 2 1
IBEX PEAK-M (PCI,USB,NVRAM)

Place TX DC blocking caps close PCH.
IBEX PEAK-M (PCI-E,SMBUS,CLK)
U18B +3V_S5
10
U18E
H40 AY9 BG30 B9 RSV_SMBALERT# 10K/J_4 R276
AD0 NV_CE#0 PERN1 SMBALERT# / GPIO11
N34
AD1 NV_CE#1
BD1 BJ30
PERP1
FOR DDR3 SPD/CLOCK GEN
C44 AP15 BF29 H14 PCH_SMBCLK 2.2K/J_4 R285 EXPRESS CARD/MINI CARD
AD2 NV_CE#2 PETN1 SMBCLK
A38 AD3 NV_CE#3 BD8 BH29 PETP1
C36 C8 PCH_SMBDATA 2.2K/J_4 R281
AD4 SMBDATA
J34 AD5 NV_DQS0 AV9 22 PCIE_RXN2 AW30 PERN2
A40
AD6 NV_DQS1
BG8 MiniWLAN 22 PCIE_RXP2 BA30
PERP2
D45 C68 0.1U/10V_4 PCIE_TXN2_C BC30 J14 RSV_ICH_CL_RST1#
10K/J_4 R84
D AD7 22 PCIE_TXN2 PETN2 SML0ALERT# / GPIO60 D
E36 AP7 C62 0.1U/10V_4 PCIE_TXP2_C BD30
AD8 NV_DQ0 / NV_IO0 22 PCIE_TXP2 PETP2
H48 AP6 C6 SMB_CLK_ME0 2.2K/J_4 R286 0 FOR INTEL LAN
AD9 NV_DQ1 / NV_IO1 SML0CLK
E40 AT6 AU30
A
SMBus
AD10 NV_DQ2 / NV_IO2 22 PCIE_RXN3 PERN3
C40 AT9 AT30 G8 SMB_DATA_ME0 2.2K/J_4 R106
AD11 NV_DQ3 / NV_IO3 22 PCIE_RXP3 PERP3 SML0DATA
M48 BB1 3G C412 0.1U/10V_4 PCIE_TXN3_C AU32
AD12 NV_DQ4 / NV_IO4 22 PCIE_TXN3 PETN3
M45 AV6 C411 0.1U/10V_4 PCIE_TXP3_C AV32
AD13 NV_DQ5 / NV_IO5 22 PCIE_TXP3 PETP3
F53 AD14 NV_DQ6 / NV_IO6 BB3 SML1ALERT# / GPIO74 M14 LPD_SPI_INTR# 10K/J_4 R274
M40 BA4 BA32
AD15 NV_DQ7 / NV_IO7 PERN4
E10 SMB_CLK_ME1 2.2K/J_4 R283 1 FOR EC
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4 BB32 PERP4 SML1CLK / GPIO58
J36 AD17 NV_DQ9 / NV_IO9 BB6 BD32 PETN4
K48 BD6 BE32 G12 SMB_DATA_ME1 2.2K/J_4 R284
AD18 NV_DQ10 / NV_IO10 PETP4 SML1DATA / GPIO75
F40 BB7 A
PCI-E*
AD19 NV_DQ11 / NV_IO11
C42 BC8 26 PCIE_RXN5 BF33
AD20 NV_DQ12 / NV_IO12 PERN5 SML0CLK/SML0DATA:
K46
AD21 NV_DQ13 / NV_IO13
BJ8 NEW CARD 26 PCIE_RXP5 BH33
PERP5 CL_CLK1
T13
Controller
M51 BJ6 C386 0.1U/10V_4 PCIE_TXN5_C BG32 DG(V1.1) P255: The 82577 SMBus
AD22 NV_DQ14 / NV_IO14 26 PCIE_TXN5 PETN5 signals
J52 BG6 C387 0.1U/10V_4 PCIE_TXP5_C BJ32 T11
AD23 NV_DQ15 / NV_IO15 26 PCIE_TXP5 PETP5 CL_DATA1 (SMB_DATA and SMB_CLK) cannot be
K51
Link
AD24 connected to any other
L34 AD25 NV_ALE BD3 NV_ALE 11 19 PCIE_RXN6 BA34 PERN6 CL_RST1# T9
devices other than the PCH.
F42 AD26 NV_CLE AY6 NV_CLE 11 LAN 19 PCIE_RXP6 AW34 PERP6 Connect the SMB_DATA and SMB_CLK
J40 C43 0.1U/10V_4 PCIE_TXN6_C BC34
AD27 19 PCIE_TXN6 PETN6 pins
G46 C48 0.1U/10V_4 PCIE_TXP6_C BD34
AD28 19 PCIE_TXP6 PETP6
F44 AU2 H1 PEG_CLKREQ# T46 to the PCH SML0DATA and SML0CLK
AD29 NV_RCOMP PEG_A_CLKRQ# / GPIO47 pins,
M47 AT34
AD30 PERN7 respectively.
PCI
H36 AV7 AU34
AD31 NV_RB# PERP7
AU36 AD43
PETN7 CLKOUT_PEG_A_N
J50 AY8 AV36 AD45
C/BE0# NV_WR#0_RE# PETP7 CLKOUT_PEG_A_P
G42
C/BE1# NV_WR#1_RE#
AY5 PCIE port 7/8 are not support in HM55 .
H47 BG34 AN4 CLK_PCIE_3GPLLN 4
C/BE2# PERN8 CLKOUT_DMI_N
PEG
G34 C/BE3# NV_WE#_CK0 AV11 BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_PCIE_3GPLLP 4
BF5 BG36
T10 PCI_PIRQA# NV_WE#_CK1 PETN8
G38 PIRQA# BJ36 PETP8
PCI_PIRQB# H51 AT1
PIRQB# CLKOUT_DP_N / CLKOUT_BCLK1_N CLK_DREFSSCLKN 4
PCI_PIRQC# B37 H18 AT3
PIRQC# USBP0N CLKOUT_DP_P / CLKOUT_BCLK1_P CLK_DREFSSCLKP 4
T31 PCI_PIRQD# A44 J18 AK48
PIRQD# USBP0P CLKOUT_PCIE0N
A18 USBP1- 21 AK47
USBP1N CLKOUT_PCIE0P
From CLK BUFFER

PCI_REQ0# F51 C18 USB PORT 1(DB) AW24
C REQ0# USBP1P USBP1+ 21 CLKIN_DMI_N CLK_BUF_PCIE_3GPLLN 3 C
HDMI_PWR_CTRL A46 N20 CLK_PEG0_REQ# P9 BA24
T37 SB_WWAN_PCIE_RST# B45
REQ1# / GPIO50
REQ2# / GPIO52
USBP2N
USBP2P
P20
USBP2-
USBP2+
21
21 USB PORT 2(MB) A PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_BUF_PCIE_3GPLLP 3
USB_MCARD1_DET# M53 J20
REQ3# / GPIO54 USBP3N
L20 26 CLK_PCIE_MINI1N AM43 AP3 CLK_BUF_BCLK_N 3
PCI_GNT0# USBP3P CLKOUT_PCIE1N CLKIN_BCLK_N
F48 GNT0# USBP4N F20 USBP4- 21 NEW CARD 26 CLK_PCIE_MINI1P AM45 CLKOUT_PCIE1P CLKIN_BCLK_P AP1 CLK_BUF_BCLK_P 3
T5 GNT#1 K45 G20 USB PORT 4(MB)
GNT1# / GPIO51 USBP4P USBP4+ 21
T12 GNT#2 F36 A20 R399 0/J_4 CLK_PCIE_REQ2#_R U4
GNT2# / GPIO53 USBP5N 26 NEWCARD1CLK_REQ# PCIECLKRQ1# / GPIO18
GNT3# H53 C20 F18
11 GNT3# GNT3# / GPIO55 USBP5P CLKIN_DOT_96N CLK_BUF_DREFCLKN 3
USBP6N M22 CLKIN_DOT_96P E18 CLK_BUF_DREFCLKP 3
PCH_IRQH_GPIO2 B41 N22 USB port 6/7 are not support in HM55 . AM47
PIRQE# / GPIO2 USBP6P 22 CLK_PCIE_MINI2N CLKOUT_PCIE2N
T32 SB_WLAN_PCIE_RST# K53 B21 MiniWLAN AM48
PIRQF# / GPIO3 USBP7N 22 CLK_PCIE_MINI2P CLKOUT_PCIE2P
BT_DET# A36 D21 AH13
PIRQG# / GPIO4 USBP7P CLKIN_SATA_N / CKSSCD_N CLK_BUF_DREFSSCLKN 3
T35 PCH_IRQH_GPIO5 A48 H22 R303 0/J_4 MINI1CLK_REQ#_R N4 AH12
PIRQH# / GPIO5 USBP8N USBP8- 16 22 MINI2CLK_REQ# PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_DREFSSCLKP 3
USBP8P
J22 USBP8+ 16 CAMERA A
USB
PCI_RST# K6 E22
PCIRST# USBP9N USBP9- 21
PCIRST#: T21 F22 BT AH42 P41
USBP9P USBP9+ 21 22 CLK_PCIE_MINI3N CLKOUT_PCIE3N REFCLK14IN CLK_PCH_14M 3
DG(V1.0) P277 PCI_SERR# E44 A22 3G AH41
SERR# USBP10N USBP10- 26 22 CLK_PCIE_MINI3P CLKOUT_PCIE3P
PCI_PERR# E50 C22 NEW CARD CLKIN_PCILOOPBACK:
Can be left unconnected. PERR# USBP10P
USBP11N
G24
USBP10+ 26
USBP11- 22
A 22 3G_CLK_REQ#
R400 0/J_4 3G_CLK_REQ#_R A8
PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK
J42 CLK_PCI_FB PDG (V1.1): 22 ohm series resistor
is recommend
PCI_IRDY# USBP11P
H24 USBP11+ 22 WLAN
PAR: A42 L24 USBP12- 18
0214
IRDY# USBP12N XTAL25_IN
SC(V1.0) P36
PCI_DEVSEL#
H44
PAR USBP12P
M24 USBP12+ 18 CARD READER AM51
CLKOUT_PCIE4N XTAL25_IN
AH51
XTAL25_OUT
Can be left unconnected F46 A24 AM53 AH53 R211 *0/J_4
DEVSEL# USBP13N USBP13- 22 CLKOUT_PCIE4P XTAL25_OUT
PCI_FRAME# C46 C24 3G
if not using PCI. FRAME# USBP13P USBP13+ 22 A CARD_CLK_REQ#_R M9 PCIECLKRQ4# / GPIO26 XCLK_RCOMP AF38 XCLK_RCOMP +1.05V_PCH
PCI_PLOCK# D49 R49 90.9/F_4
PLOCK# USB_BIAS
PME: B25
PCI_STOP# USBRBIAS# R260 22.6/F_4 CLK_FLEX0 T1
DG(V1.0) P277 D41 AJ50 T45
PCI_TRDY# STOP# CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
Can be left unconnected. C48 D25 AJ52
TRDY# USBRBIAS CLKOUT_PCIE5P
PME# M7 CLK_PCIE_REQ5# H6 P43 CLK_FLEX1 T4
Clock Flex
T19 PME# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65
N16 OC0#
0214 PCI_PLTRST# OC0# / GPIO59 OC1#
D5 J16
PLTRST# OC1# / GPIO40 OC2# CLK_FLEX2 T2
F16 19 CLK_PCIE_LOMN AK53 T42
CLK_LPC_DEBUG R23 22/F_4 CLK_LPC_DEBUG_C N52 OC2# / GPIO41 OC3# CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66
22 CLK_LPC_DEBUG CLKOUT_PCI0 OC3# / GPIO42
L16 LAN 19 CLK_PCIE_LOMP AK51
CLKOUT_PEG_B_P
P53 E14 OC4#
B CLK_PCI_8502 R21 22/F_4 CLK_PCI_8502_C CLKOUT_PCI1 OC4# / GPIO43 OC5# R279 0/J_4 LOM_CLK_REQ#_R R223 33/J_4 B
25 CLK_PCI_8502 P46 G16 19 CLK_LAN_REQ# P13 N50 CLK_48M_CR 18
CLK_PCI_FB R22 22/F_4 CLK_PCI_FB_C CLKOUT_PCI2 OC5# / GPIO9 OC6# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67
P51 CLKOUT_PCI3 OC6# / GPIO10 F12
CLKOUT_PCI[0..4]: P48 T15 OC7# 0214
CLKOUT_PCI4 OC7# / GPIO14 IbexPeak-M_R1P0
22 ohm series resistor is recommend
(single & double load) on PDG v1.1 OC0#~OC7#: CLKOUT_PEG_A_P/N,CLKOUT_PEG_B_P/N, C288
IbexPeak-M_R1P0 DG(V1.0)P214 CLKOUT_DMI_P/N,support GEN-1 and GEN-2 EMI USE *10P_4
Pin Default Port Mapping PCIE Clock Request
OC0# Port0,Port1 +3V_S5
Reserve capacitor pads for
OC1# Port2,Port3
improving WWAN. OC2# Port4,Port5 R277 10K/J_4 3G_CLK_REQ#_R 2N7002E Q14
R97 10K/J_4 CARD_CLK_REQ#_R SMB_CLK_ME1 1 3 MBCLK_ME 25
R309 10K/J_4 CLK_PCIE_REQ5# CLKOUTFLEX3:
+3V_RUN R96 10K/J_4 CLK_PEG0_REQ# R353
R278 10K/J_4 LOM_CLK_REQ#_R 4.7K/F_4
A EDS(V1.0) :support 48MHz
33MHz and 14.31818MHz.
2
CLK_LPC_DEBUG 50 BT_DET# R235 8.2K/J_4 R108 10K/J_4 PEG_CLKREQ#
C33 *27P/50V_4 PCH_IRQH_GPIO2 R232 8.2K/J_4
CLK_PCI_8502 50 SB_WWAN_PCIE_RST# R229 8.2K/J_4 R310 *10K/J_4 +3V_RUN CLKOUTFLEX[0..3]:
C31 *27P/50V_4 SB_WLAN_PCIE_RST# R212 8.2K/J_4 PDG v1.1: 22 ohm series resistor is
+3V_RUN
A recommend (PCI & non PCI routing,
single & double load)
2
R317 10K/J_4 MINI1CLK_REQ#_R R343
+3V_S5 R297 10K/J_4 CLK_PCIE_REQ2#_R Q15 4.7K/F_4
RP2 SMB_DATA_ME1 1 3 MBDATA_ME 25
OC7# 6 5 PCIECLKRQ{0,3,4,5,6,7}# should have a
OC5# 7 4 OC2# 10K pull-up to +V3.3A.PCIECLKRQ{1,2} 2N7002E
OC3# 8 3 OC6#
should have a 10K pull-up to +3.3S
OC4# 9 2 OC1#
OC0# XTAL25_IN C283 18P/50_4
Non-iAMT Add Buffers as needed for +3V_S5
10 1
10P8R-8.2K
A Loading and fanout concerns.
1
R210 Y4
+3V_RUN R46 1K/J_4 PCI_GNT0# Q13 2N7002E 25.0000 MHz
RP3 R45 1K/J_4 GNT#1 PCH_SMBDATA 3 1 1M/F_4
2
22 PCH_SMBDATA CGDAT_SMB 3,14,15
+3V_RUN PCH_IRQH_GPIO5 6 5
A C108 0.1U/16V_4 PCI_REQ0# 7 4 PCI_TRDY# XTAL25_OUT C282 18P/50_4 A
PCI_PIRQB# 8 3 PCI_FRAME# R322
2
USB_MCARD1_DET# 9 2 HDMI_PWR_CTRL 2.2K/F_4
+3V_RUN 10 1 PCI_PIRQD#
5
U4 Boot BIOS Strap

2 10P8R-8.2K +3V_RUN
4 PLTRST# 4,18,19,22,26
PCI_GNT0# GNT#1 Boot BIOS Location
PCI_PLTRST# 1
+3V_RUN 0 0 LPC
MC74VHC1G08DFT2G RP1 R287
3
PCI_STOP# 6 5 0 1 PCI 2.2K/F_4
2
PCI_PIRQA# 7 4 PCI_SERR#
PCI_PIRQC# 8 3 PCI_PERR# 1 0 Reserved (NAND) Q12 2N7002E
PCI_IRDY# 9 2 PCI_PLOCK# PCH_SMBCLK 3 1
PROJECT : FH2
22 PCH_SMBCLK CGCLK_SMB 3,14,15
+3V_RUN 10 1 PCI_DEVSEL# 1 1 SPI Size Document Number Rev
1A
10P8R-8.2K
IBEX PEAK-M 3/6
5 4 3 2 1
5 4 3 2 1
S_GPIO Y3
U18F
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
BMBUSY# / GPIO0 CLKOUT_PCIE6N AH45
AH46
11
SIO_EXT_SMI# CLKOUT_PCIE6P
25 SIO_EXT_SMI# C38 TACH1 / GPIO1
25 SIO_EXT_SCI# SIO_EXT_SCI# D37 TACH2 / GPIO6

CLKOUT_PCIE7N AF48
MISC
T11 GPIO7 J32 AF47
TACH3 / GPIO7 CLKOUT_PCIE7P
D SWI# F10 D
25 SWI# GPIO8
GPIO12 K9 U2 SIO_A20GATE
LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE 25
PCH_GPIO15 T7 +3V_S5
GPIO15
SATA4GP AA2 AM3 +1.05V_VTT
SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLKN 4
GPIO45 R87 10K/J_4
T8 GPIO17 F38 AM1 TP_PCH_GPIO28 R68 10K/J_4
TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLKP 4
SWI# R94 10K/J_4
T18 GPIO22 Y7 BG10 PCH_GPIO15 R110 1K/J_4
SCLOCK / GPIO22 PECI H_PECI 4
GPIO
BIOS_WP# R104 10K/J_4
GPIO24 register not cleared by CF9h reset event. H10
GPIO24 RCIN#
T1 SIO_RCIN#
SIO_RCIN# 25
R69 GPIO12 R93 10K/J_4
GPIO27 reserve for internal VR. 56/J_4 DDR3_CORL_PCH R100 10K/J_4
R74 *10K/J_4 GPIO27 AB12 BE10
GPIO27 PROCPWRGD H_PWRGOOD 4,22
CPU
TP_PCH_GPIO28 V13 BD10 PCH_THRMTRIP#_R R71 56/J_4
GPIO28 THRMTRIP# H_THERM 4 +3V_RUN
T23 GPIO34 M11
STP_PCI# / GPIO34 GPIO7 R51 10K/J_4
(Both these should be close to PCH)
GPIO35 V6 GPIO17 R40 10K/J_4
SATACLKREQ# / GPIO35 GPIO22 R89 10K/J_4
SATA2GP AB7 BA22 GPIO34 R92 10K/J_4
SATA2GP / GPIO36 TP1 GPIO38 R88 10K/J_4
SATA3GP AB13 AW22 GPIO39 R318 10K/J_4
SATA3GP / GPIO37 TP2 SIO_EXT_SMI# R47 10K/J_4
T24 GPIO38 V3 BB22 SIO_EXT_SCI# R42 10K/J_4
SLOAD / GPIO38 TP3 SIO_RCIN# R320 10K/J_4
T43 GPIO39 P3 AY45 SIO_A20GATE R321 10K/J_4
SDATAOUT0 / GPIO39 TP4 SATA2GP R73 10K/J_4
C GPIO45 H3 AY46 TEMP_ALERT# R302 10K/J_4 C
PCIECLKRQ6# / GPIO45 TP5 SATA3GP R70 10K/J_4
GPIO46 F1 AV43 SATA4GP R301 10K/J_4
4 DDR3_CORL_PCH PCIECLKRQ7# / GPIO46 TP6
SV_SET_UP AB6 AV45
SDATAOUT1 / GPIO48 TP7
TEMP_ALERT# AA4 AF13
25 TEMP_ALERT# SATA5GP / GPIO49 TP8
BIOS_WP# F8 M18
25 BIOS_WP# GPIO57 TP9
N18
TP10
A4 AJ24
VSS_NCTF_1 TP11
A49
NCTF
VSS_NCTF_2 RSVD
A5 VSS_NCTF_3 TP12 AK41
A50
VSS_NCTF_4
DMI Termination Voltage
A52 AK42
VSS_NCTF_5 TP13
A53
VSS_NCTF_6 Set to Vcc when LOW
B2 M32
VSS_NCTF_7 TP14
B4 VSS_NCTF_8
NV_CLE
B52 N32 Set to Vcc/2 when HIGH +1.8V_RUN
VSS_NCTF_9 TP15
B53
VSS_NCTF_10
BE1 M30
VSS_NCTF_11 TP16 R79 *1K/J_4
BE53 VSS_NCTF_12 10 NV_ALE
BF1 VSS_NCTF_13 TP17 N30
BF53 R78 *1K/J_4
VSS_NCTF_14 10 NV_CLE
BH1 H12
VSS_NCTF_15 TP18
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17 TP19
AA23 Danbury Technology Enabled
BH53
VSS_NCTF_18
B BJ1
VSS_NCTF_19 NC_1
AB45 High = Enable B
BJ2 NV_ALE
VSS_NCTF_20
BJ4 AB38 Low = Disable
VSS_NCTF_21 NC_2
BJ49
VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42
BJ50
VSS_NCTF_24
BJ52 AB41
VSS_NCTF_25 NC_4
BJ53 VSS_NCTF_26
D1 T39
VSS_NCTF_27 NC_5
D2
VSS_NCTF_28
D53
VSS_NCTF_29 T22
E1 VSS_NCTF_30 INIT3_3V# P6
E53 VSS_NCTF_31
C10
TP24
IbexPeak-M_R1P0
+3V_RUN
R82 10K/J_4 GPIO35

R95 *1K/J_4 SWI# S_GPIO R299 10K/J_4 BMBUSY#:
If not used, require a weak pull-up (8.2- KΩ to 10 kΩ) to Vcc3_3.
R222 *1K/J_4 GNT3# 10 SV_SET_UP R90 10K/J_4 CRB(V1.0)P28: it has 1K PU and 100 ohm on this net for validation purpose.
A BMBUSY#:(Intel feedback) A
Follow CRB checklist, 1K is
for intel BIOS validation purpose.
A16 swap override Strap/Top-Block Integrated Clock Chip Enable
Swap Override jumper SV_SET_UP 1-X High = Strong (Default)
(Reserve to validate for future platforms)
Low = A16 swap Quanta Computer Inc.
override/Top-Block Enable when sampled low
GNT3# Swap Override enabled RSV_WOL_EN Disable when sampled high PROJECT : FH2
High = Default (GPIO8)
1A
IBEX PEAK-M 4/6
5 4 3 2 1
5 4 3 2 1
IBEX PEAK-M (POWER) +1.05V_PCH

VCCCORE=1.524A max
AB24
AB26
U18G
VCCCORE[1]
VCCCORE[2]
POWER
VCCADAC[1] AE50 +VCCA_DAC_1_2
L19
HCB1608KF-181T15
+3V_RUN VCCADAC = 100mA max
12
AB28 VCCCORE[3] VCCADAC[2] AE52
C26 C77 AD26 C293 C290 C292
VCCCORE[4]
CRT
10U/10V_8 AD28 AF53
10 1U/6.3V_4 VCCCORE[5] VSSA_DAC[1] 0.01U/25V_4 10U/6.3V_6 0.1U/16V_4
AF26 VCCCORE[6]
VCC CORE
AF28 AF51 6.3
VCCCORE[7] VSSA_DAC[2]
AF30
AF31
VCCCORE[8]
VCCCORE[9]
U18J POWER
AH26 VCCCORE[10]
D AH28 T36 VCCACLK AP51 V24 VCCIO = 3.208A max D
VCCCORE[11] VCCACLK[1] VCCIO[5] +1.05V_PCH
AH30 VCCCORE[12] VCCIO[6] V26
AH31 AH38 +3V_RUN AP53 Y24 C71
VCCCORE[13] VCCALVDS VCCACLK[2] VCCIO[7] 1U/6.3V_4
AJ30 VCCCORE[14] VCCIO[8] Y26
AJ31 VCCCORE[15] VSSA_LVDS AH39
VCCTX_LVDS = 0.066A max AF23 V28 +3V_S5 VCCSUS3_3 = 0.163A max
VCCLAN[1] VCCSUS3_3[1]
VCCSUS3_3[2] U28
AP43 L17 0.1uH +1.8V_RUN AF24 U26
VCCTX_LVDS[1] VCCLAN[2] VCCSUS3_3[3] C74 C72
VCCTX_LVDS[2] AP45 VCCSUS3_3[4] U24
AT46 C39 C41 C287 P28
LVDS
VCCTX_LVDS[3] DCPSUSBYP VCCSUS3_3[5] 0.1U/16V_4 0.1U/16V_4
+1.05V_PCH AK24 VCCIO[24] VCCTX_LVDS[4] AT45 Y20 DCPSUSBYP VCCSUS3_3[6] P26
VCCAPLLEXP = 100mA max N28
0.01U/25V_4 0.01U/25V_4 22U/6.3V_8 C87 VCCSUS3_3[7]
VCCSUS3_3[8] N26
T40 +1.05V_LAN_VCCAPLL_EXP BJ24 AD38 M28
VCCAPLLEXP VCC3_3 = 0.357A max 0.1U/16V_4 VCCME[1] VCCSUS3_3[9]
VCC3_3[2] AB34 +3V_RUN VCCSUS3_3[10] M26
VCCAPLLEXP: AD39 L28
USB
C44 VCCME[2] VCCSUS3_3[11]
This pin can be left as no connect in AN20 VCCIO[25] VCC3_3[3] AB35 VCCSUS3_3[12] L26
On-Die VR enabled mode (default). AN22 AD41 J28
HVCMOS
VCCIO[26] 0.1U/16V_4 VCCME[3] VCCSUS3_3[13]
AN23 VCCIO[27] VCC3_3[4] AD35 VCCSUS3_3[14] J26
AN24 VCCIO[28] AF43 VCCME[4] VCCSUS3_3[15] H28
+1.05V_PCH AN26 H26
VCCIO[29] VCCSUS3_3[16]
AN28 VCCIO[30] AF41 VCCME[5] VCCSUS3_3[17] G28
BJ26 VCCIO[31] VCCSUS3_3[18] G26
BJ28 VCCIO[32] AF42 VCCME[6] VCCSUS3_3[19] F28
C70 AT26 F26
10U/10V_8 C85 C67 C76 C75 VCCIO[33] VCCSUS3_3[20]
AT28 VCCIO[34] V39 VCCME[7] VCCSUS3_3[21] E28
Clock and Miscellaneous

VCCIO = 3.208A max 10 1U/6.3V_41U/6.3V_41U/6.3V_41U/6.3V_4 AU26 E26
805 VCCIO[35] VCCSUS3_3[22]
AU28 VCCIO[36] +1.05V_PCH V41 VCCME[8] VCCSUS3_3[23] C28
AV26 VCCVRM = 0.035A max C26
VCCIO[37] C275 C29 C45 VCCSUS3_3[24]
AV28 VCCIO[38] VCCVRM[2] AT24 +1.8V_RUN V42 VCCME[9] VCCSUS3_3[25] B27
AW26 VCCIO[39] VCCSUS3_3[26] A28
AW28 VCCDMI = 0.061A max 22U/6.3V_8 22U/6.3V_8 1U/6.3V_4 Y39 A26
VCCIO[40] VCCME[10] VCCSUS3_3[27]
DMI
C R63 0/J_4 C
BA26 VCCIO[41] VCCDMI[1] AT16 +1.05V_VTT
BA28 VCCIO[42] Y41 VCCME[11] VCCSUS3_3[28] U23
BB26 AU16 R60 *0/J_4 +1.05V_PCH
VCCIO[43] VCCDMI[2] VCCIO = 3.208A max
BB28 VCCIO[44] Y42 VCCME[12] VCCIO[56] V23 +1.05V_PCH
BC26 C93
VCCIO[45]
PCI E*
BC28 1U/6.3V_4 F24 +V5REF_SUS R56 1 2 100/J_4 +5V_S5
VCCIO[46] V5REF_SUS V5REF_SUS>1mA
BD26 VCCIO[47]
BD28 C100 0.1U/16V_4 DCPRTC V9 C83 D3 1 2 SDM10K45-7-F +3V_S5
VCCIO[48] DCPRTC 1U/6.3V_4
BE26 VCCIO[49] VCCPNAND[1] AM16
BE28 VCCIO[50] VCCPNAND[2] AK16
+3V_RUN BG26 AK20 VCCPNAND = 0.156A max K49 +V5REF R18 1 2 100/J_4 V5REF>1mA
VCCIO[51] VCCPNAND[3] V5REF +5V_RUN
BG28 AK19 AU24
PCI/GPIO/LPC
VCCIO[52] VCCPNAND[4] +1.8V_RUN +1.8V_RUN VCCVRM[3]
VCC3_3 = 0.357A max BH27 AK15 D2 1 2 SDM10K45-7-F +3V_RUN
VCCIO[53] VCCPNAND[5] C86 VCCADPLLA = 0.072A max C32
VCCPNAND[6] AK13 VCC3_3[8] J38
AN30 AM12 BB51 1U/6.3V_4
VCCIO[54] VCCPNAND[7] VCCADPLLA[1]
NAND / SPI
AN31 AM13 0.1U/16V_4 +1.1V_VCCADPLLA BB53 L38
C49 VCCIO[55] VCCPNAND[8] VCCADPLLB = 0.073A max VCCADPLLA[2] VCC3_3[9]
VCCPNAND[9] AM15
0.1U/16V_4 M36 +3V_RUN VCC3_3 = 0.357A max
+1.1V_VCCADPLLB VCC3_3[10]
AN35 VCC3_3[1] BD51 VCCADPLLB[1]
BD53 VCCADPLLB[2] VCC3_3[11] N36
VCCVRM = 0.035A max VCCIO = 3.208A max C60
VCCFDIPLL = 100mA max +1.8V_RUN AT22 +1.05V_PCH AH23 P36 0.1U/16V_4
VCCVRM[1] VCCIO[21] VCC3_3[12]
AJ35 VCCIO[22]
T42 +1.05V_VCCFDIPLL BJ18 AM8 VCCME3_3 = 0.085A max C40 C64 C51 AH35 U35
VCCFDIPLL VCCME3_3[1] VCCIO[23] VCC3_3[13]
VCCME3_3[2] AM9 +3V_RUN
FDI
+1.05V_PCH AM23 AP11 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF34

VCCIO[1] VCCME3_3[3] C46 VCCIO[2]
VCCME3_3[4] AP9 VCC3_3[14] AD13
AH34 VCCIO[3]
VCCIO = 3.208A max 0.1U/16V_4 C94
AF32 0.1U/16V_4
IbexPeak-M_R1P0 VCCIO[4]
VCCSATAPLL[1] AK3
C95 0.1U/16V_4 DCPSST V12 AK1 +1.05V_VCCSATAPLL
B VCCME3_3: DCPSST VCCSATAPLL[2] T44 B
EDS(V1.0)P84:supply for the Intel Management Engine.This is a separate power plane
that may or may not be powered in S3–S5 states. VCCIO = 3.208A max
This plane must be on in S0 C89 0.1U/16V_4 DCPSUS Y22
and other times the Intel Management Engine is used. DCPSUS
VCCIO[9] AH22 +1.05V_PCH
VCCVRM = 0.035A max
P18 AT20 +1.8V_RUN C69
VCCSUS3_3 = 0.163A max VCCSUS3_3[29] VCCVRM[4] 1U/6.3V_4
+3V_S5 U19
SATA
VCCSUS3_3[30]
PCI/GPIO/LPC
VCCIO[10] AH19
C73 U20 VCCSUS3_3[31]
VCCIO[11] AD20
0.1U/16V_4 U22 VCCSUS3_3[32]
VCCIO[12] AF22
VCC3_3 = 0.357A max AD19

PCH EDS(V1.0) P84 VCCIO[13]
+3V_RUN V15 VCC3_3[5] VCCIO[14] AF20
+NVRAM_VCCQ: VCCIO[15] AF19
1.8 V supply for Dual Channel NAND interface. C47 V16 AH20
VCC3_3[6] VCCIO[16]
This power is supplied by core
0.1U/16V_4 Y16 AB19
well. If unused, this pin should VCC3_3[7] VCCIO[17]
VCCIO[18] AB20
be connected to Vcc3_3. AB22
V_CPU>1mA VCCIO[19]
VCCIO[20] AD22
+1.05V_VTT AT18 V_CPU_IO[1]
L7 10uH +1.1V_VCCADPLLA AA34 VCCME = 1.998A max
CPU
+1.05V_PCH VCCME[13] +1.05V_PCH
C84 C92 C91 Y34
VCCME[14]
AU18 V_CPU_IO[2] VCCME[15] Y35
+ C30 C34 4.7U/25V_8 0.1U/16V_4
0.1U/16V_4 AA35
VCCME[16]
*220U/2.5V_3528 3528 1U/6.3V_4
RTC
A 0/J_4 R55 VCCSUSHDA = 6mA max A
+VCC_RTC A12 VCCRTC VCCSUSHDA L30 +3V_S5
HDA
C322 C323
C321 IbexPeak-M_R1P0 C61
L18 10uH +1.1V_VCCADPLLB 1U/6.3V_40.1U/16V_4
0.1U/16V_4 1U/6.3V_4
VCCRTC = 2mA max

+ C289 Quanta Computer Inc.
C294 C61 is required close the PCH ball
*220U/2.5V_3528 3528 1U/6.3V_4
PROJECT : FH2
1A
IBEX PEAK-M 5/6
5 4 3 2 1
5 4 3 2 1
13
U18I
AY7 H49
IBEX PEAK-M (GND) B11
B15
VSS[159]
VSS[160]
VSS[259]
VSS[260] H5
J24
VSS[161] VSS[261]
D B19 VSS[162] VSS[262] K11 D
B23 VSS[163] VSS[263] K43
B31 VSS[164] VSS[264] K47
B35 VSS[165] VSS[265] K7
B39 VSS[166] VSS[266] L14
B43 VSS[167] VSS[267] L18
B47 VSS[168] VSS[268] L2
B7 VSS[169] VSS[269] L22
BG12 VSS[170] VSS[270] L32
BB12 VSS[171] VSS[271] L36
U18H BB16 L40
VSS[172] VSS[272]
AB16 VSS[0] BB20 VSS[173] VSS[273] L52
BB24 VSS[174] VSS[274] M12
AA19 VSS[1] VSS[80] AK30 BB30 VSS[175] VSS[275] M16
AA22 VSS[3] VSS[82] AK32 BB38 VSS[177] VSS[277] N38
AM19 VSS[4] VSS[83] AK34 BB42 VSS[178] VSS[278] M34
AA28 VSS[7] VSS[86] AK43 BC10 VSS[181] VSS[281] M46
AB11 VSS[11] VSS[90] AK8 BC22 VSS[185] VSS[285] N24
AB15 VSS[12] VSS[91] AL2 BC32 VSS[186] VSS[286] P11
AB23 VSS[13] VSS[92] AL52 BC36 VSS[187] VSS[287] AD15
AB30 VSS[14] VSS[93] AM11 BC40 VSS[188] VSS[288] P22
AB31 VSS[15] VSS[94] BB44 BC44 VSS[189] VSS[289] P30
AB32 VSS[16] VSS[95] AD24 BC52 VSS[190] VSS[290] P32
AB39 VSS[17] VSS[96] AM20 BH9 VSS[191] VSS[291] P34
AB43 VSS[18] VSS[97] AM22 BD48 VSS[192] VSS[292] P42
C C
AB8 VSS[21] VSS[100] AM28 BE12 VSS[195] VSS[295] R2
AC2 VSS[22] VSS[101] BA42 BE16 VSS[196] VSS[296] R52
AC52 VSS[23] VSS[102] AM30 BE20 VSS[197] VSS[297] T12
AD11 VSS[24] VSS[103] AM31 BE24 VSS[198] VSS[298] T41
AD31 VSS[29] VSS[108] AM39 BE46 VSS[203] VSS[303] U30
AD32 VSS[30] VSS[109] AM42 BE48 VSS[204] VSS[304] U31
AD34 VSS[31] VSS[110] AU20 BE50 VSS[205] VSS[305] U32
AU22 VSS[32] VSS[111] AM46 BE6 VSS[206] VSS[306] U34
AD42 VSS[33] VSS[112] AV22 BE8 VSS[207] VSS[307] P38
AD46 VSS[34] VSS[113] AM49 BF3 VSS[208] VSS[308] V11
AD49 VSS[35] VSS[114] AM7 BF49 VSS[209] VSS[309] P16
AD7 VSS[36] VSS[115] AA50 BF51 VSS[210] VSS[310] V19
AE2 VSS[37] VSS[116] BB10 BG18 VSS[211] VSS[311] V20
AE4 VSS[38] VSS[117] AN32 BG24 VSS[212] VSS[312] V22
AF12 VSS[39] VSS[118] AN50 BG4 VSS[213] VSS[313] V30
Y13 VSS[40] VSS[119] AN52 BG50 VSS[214] VSS[314] V31
AH49 VSS[41] VSS[120] AP12 BH11 VSS[215] VSS[315] V32
AU4 VSS[42] VSS[121] AP42 BH15 VSS[216] VSS[316] V34
AF35 VSS[43] VSS[122] AP46 BH19 VSS[217] VSS[317] V35
AP13 VSS[44] VSS[123] AP49 BH23 VSS[218] VSS[318] V38
AN34 VSS[45] VSS[124] AP5 BH31 VSS[219] VSS[319] V43
AF45 VSS[46] VSS[125] AP8 BH35 VSS[220] VSS[320] V45
AF46 VSS[47] VSS[126] AR2 BH39 VSS[221] VSS[321] V46
AF49 VSS[48] VSS[127] AR52 BH43 VSS[222] VSS[322] V47
AF5 VSS[49] VSS[128] AT11 BH47 VSS[223] VSS[323] V49
AF8 VSS[50] VSS[129] BA12 BH7 VSS[224] VSS[324] V5
B AG2 AH48 C12 V7 B
VSS[51] VSS[130] VSS[225] VSS[325]
AG52 VSS[52] VSS[131] AT32 C50 VSS[226] VSS[326] V8
AH11 VSS[53] VSS[132] AT36 D51 VSS[227] VSS[327] W2
AH15 VSS[54] VSS[133] AT41 E12 VSS[228] VSS[328] W52
AH16 VSS[55] VSS[134] AT47 E16 VSS[229] VSS[329] Y11
AH24 VSS[56] VSS[135] AT7 E20 VSS[230] VSS[330] Y12
AH32 VSS[57] VSS[136] AV12 E24 VSS[231] VSS[331] Y15
AV18 VSS[58] VSS[137] AV16 E30 VSS[232] VSS[332] Y19
AJ19 VSS[62] VSS[141] AV34 E46 VSS[236] VSS[336] Y31
AJ23 VSS[66] VSS[145] AV49 F49 VSS[240] VSS[340] Y46
AJ26 VSS[67] VSS[146] AV5 F5 VSS[241] VSS[341] P49
AJ28 VSS[68] VSS[147] AV8 G10 VSS[242] VSS[342] Y5
AJ32 VSS[69] VSS[148] AW14 G14 VSS[243] VSS[343] Y6
AJ34 VSS[70] VSS[149] AW18 G18 VSS[244] VSS[344] Y8
AT5 VSS[71] VSS[150] AW2 G2 VSS[245] VSS[345] P24
AJ4 VSS[72] VSS[151] BF9 G22 VSS[246] VSS[346] T43
AK12 VSS[73] VSS[152] AW32 G32 VSS[247] VSS[347] AD51
AM41 VSS[74] VSS[153] AW36 G36 VSS[248] VSS[348] AT8
AN19 VSS[75] VSS[154] AW40 G40 VSS[249] VSS[349] AD47
AK26 VSS[76] VSS[155] AW52 G44 VSS[250] VSS[350] Y47
AK22 VSS[77] VSS[156] AY11 G52 VSS[251] VSS[351] AT12
AK23 VSS[78] VSS[157] AY43 AF39 VSS[252] VSS[352] AM6
AK28 VSS[79] VSS[158] AY47 H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
IbexPeak-M_R1P0 H30 AK45
VSS[255] VSS[355]
A H34 VSS[256] VSS[356] AK39 A
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IbexPeak-M_R1P0
PROJECT : FH2
1A
IBEX PEAK-M 6/6
5 4 3 2 1
5 4 3 2 1
5 M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
95
JDIM1A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
17
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ[63:0] 5
+1.5V_SUS
75
76
81
82
JDIM1B
VDD1
VDD2
VDD3
VSS16
VSS17
VSS18
44
48
49
54
14
M_A_A4 A3 DQ3 M_A_DQ4 VDD4 VSS19
92 A4 DQ4 4 87 VDD5 VSS20 55
+3V_RUN M_A_A5 91 6 M_A_DQ5 88 60
90 A6 DQ6 16 93 VDD7 VSS22 61
M_A_A7 86 18 M_A_DQ7 94 65
89 A8 DQ8 21 99 VDD9 VSS24 66
M_A_A9 85 23 M_A_DQ9 100 71
D
M_A_A10 A9 DQ9 M_A_DQ10 VDD10 VSS25 D
107 33 105 72
PC2100 DDR3 SDRAM SO-DIMM

R134 R135 M_A_A11 A10/AP DQ10 M_A_DQ11 VDD11 VSS26
84 A11 DQ11 35 106 VDD12 VSS27 127
*10K *10K M_A_A12 83 22 M_A_DQ12 111 128
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133
SMbus address A0 M_A_A14 80 34 M_A_DQ14 117 134
78 36 118 138

A15 DQ15 M_A_DQ16 VDD16 VSS31
DIMM0_SA1
DIMM0_SA0
DQ16 39 123 VDD17 VSS32 139

109 41 M_A_DQ17 124 144
5 M_A_BS0 BA0 DQ17 VDD18 VSS33 Intel is requesting that customers implement
108 51 M_A_DQ18 145
5 M_A_BS1 BA1 DQ18 VSS34 all methods (M1 and M2 and M3
79 53 M_A_DQ19 199 150
5 M_A_BS2 BA2 DQ19 +3V_RUN VDDSPD VSS35 described below) to generate and control
114 40 M_A_DQ20 151
5 M_A_CS0# S0# DQ20 VSS36 Reference voltage for Data/Strobe inputs
121 42 M_A_DQ21 77 155
5 M_A_CS1# S1# DQ21 NC1 VSS37 (VREFDQ) on Clarksfield based platforms.
101 50 M_A_DQ22 122 156
5 M_A_CLKP0 CK0 DQ22 NC2 VSS38 for fine tuning of the VREFDQ levels to
R137 R138 103 52 M_A_DQ23 125 161
5 M_A_CLKN0 CK0# DQ23 NCTEST VSS39 optimize the voltage and timing margins.
10K 10K 102 57 M_A_DQ24 162
5 M_A_CLKP1 CK1 DQ24 VSS40
104 59 M_A_DQ25 PM_EXTTS#0 198 167
5 M_A_CLKN1 CK1# DQ25 4 PM_EXTTS#0 EVENT# VSS41 M1:Fixed voltage resistor divider or
73 67 M_A_DQ26 30 168
5 M_A_CKE0 CKE0 DQ26 4,15 DDR3_DRAMRST# RESET# VSS42 DDR Voltage Regulator drives the Vref
74 69 M_A_DQ27 172
5 M_A_CKE1 CKE1 DQ27 VSS43 M2:A set of Digital potentiometers
115 56 M_A_DQ28 173 and op amps are added on the motherboard (one pair
5 M_A_CAS# CAS# DQ28 VSS44
110 58 M_A_DQ29 1 178 for each channel). This circuit is controlled by
5 M_A_RAS# RAS# DQ29 +SMDDR_VREF_DQ0 VREF_DQ VSS45
113 68 M_A_DQ30 126 179 SMBUS (SMB_CLK & SMB_DATA) on PCH.
5 M_A_WE# W E# DQ30 +SMDDR_VREF_DIMM0 VREF_CA VSS46
DIMM0_SA0 197 70 M_A_DQ31 184 M3:Intel investigating future processor
DIMM0_SA1 SA0 DQ31 M_A_DQ32 VSS47
201 SA1 DQ32 129 VSS48 185 VREF_DQ generation to replace M1 and M2. This
CGCLK_SMB 202 131 M_A_DQ33 2 189 would require routing processor signal balls
3,10,15 CGCLK_SMB SCL DQ33 VSS1 VSS49
CGDAT_SMB 200 141 M_A_DQ34 3 190 J17 and H17 to SO-DIMM connectors
3,10,15 CGDAT_SMB SDA DQ34 VSS2 VSS50
(204P)
143 M_A_DQ35 8 195 directly.
DQ35 M_A_DQ36 +1.5V_SUS +DDR_VTTREF VSS3 VSS51
5 M_A_ODT0 116 ODT0 DQ36 130 9 VSS4 VSS52 196
CGCLK_SMB 120 132 M_A_DQ37 13
5 M_A_ODT1 ODT1 DQ37 VSS5
140 M_A_DQ38 14
5 M_A_DM[7:0] DQ38 VSS6
C CGDAT_SMB M_A_DM0 11 142 M_A_DQ39 19 C
M_A_DM1 DM0 DQ39 M_A_DQ40 R128 R131 VSS7
28 DM1 DQ40 147 20 VSS8
(204P)
C144 M_A_DM2 46 149 M_A_DQ41 1K/J_4 *0/J_4 +SMDDR_VREF_DIMM0 25
C143 M_A_DM3 DM2 DQ41 M_A_DQ42 VSS9
63 DM3 DQ42 157 26 VSS10 VTT1 203 +0.75V_DDR_VTT
*33P/50V_4 *33P/50V_4 M_A_DM4 136 159 M_A_DQ43 31 204
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
M_A_DM6 170 148 M_A_DQ45 37 G1
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS13 G1
187 DM7 DQ46 158 38 VSS14 G2 G2
1
160 M_A_DQ47 R130 43
5 M_A_DQSP[7:0] DQ47 VSS15
M_A_DQSP0 12 163 M_A_DQ48 1K/J_4 C156
M_A_DQSP1 DQS0 DQ48 M_A_DQ49
29 165 0.1U/16V_4
2
47 DQS2 DQ50 175 16 2-2013311-1
M_A_DQSP3 64 177 M_A_DQ51
137 DQS4 DQ52 164
M_A_DQSP5 154 166 M_A_DQ53
171 DQS6 DQ54 174
M_A_DQSP7 188 176 M_A_DQ55
5 M_A_DQSN[7:0] DQS7 DQ55
M_A_DQSN0 10 181 M_A_DQ56
M_A_DQSN1 DQS#0 DQ56 M_A_DQ57
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ58
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ60
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ62
186 DQS#7 DQ63 194
2-2013311-1
DGMK4000056
B B
ddr-600025fb204g108zl-204p-ruv
+1.5V_SUS
Place these Caps near So-Dimm1. +SMDDR_VREF_DIMM0 +SMDDR_VREF_DQ0
C141 C137 C161 C138 C159 C164 C158
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 0.1U/10V_4 0.1U/10V_4 2.2U/6.3V_6 2.2U/6.3V_6
C163 + C202 C155 C154

10U/6.3V_6 *330U/2.5V_7343 0.1U/16V_4 +1.5V_SUS +DDR_VTTREF M1 VREF
7343 0.1U/16V_4
2.5
C153 C162 C160 C140 C139
10U/6.3V_6 10U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 R129 R136
1K/J_4 *0/J_6
+SMDDR_VREF_DQ0
+3V_RUN +0.75V_DDR_VTT R133 0_6

1
R132
C147 C151 C136 C133 C134 C135 C132 1K/J_4 C157
10U/10V_8 0.1U/16V_4
2
2.2U/6.3V_6 0.1U/16V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10 16

805
A A

PROJECT : FH2
1A
DDR3 DIMM-1
5 4 3 2 1
5 4 3 2 1
5 M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
98
97
96
95
JDIM2A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
17
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ[63:0] 5
+1.5V_SUS
75
76
81
82
87
JDIM2B
VDD1
VDD2
VDD3
VDD4
VSS16
VSS17
VSS18
VSS19
44
48
49
54
55
15
M_B_A4 A3 DQ3 M_B_DQ4 VDD5 VSS20
92 A4 DQ4 4 88 VDD6 VSS21 60
M_B_A5 91 6 M_B_DQ5 93 61
90 A6 DQ6 16 94 VDD8 VSS23 65
M_B_A7 86 18 M_B_DQ7 99 66
89 A8 DQ8 21 100 VDD10 VSS25 71
M_B_A9 85 23 M_B_DQ9 105 72

D
M_B_A10 A9 DQ9 M_B_DQ10 VDD11 VSS26 D
107 A10/AP DQ10 33 106 VDD12 VSS27 127
M_B_A11 84 35 M_B_DQ11 111 128
83 A12/BC# DQ12 22 112 VDD14 VSS29 133
+3V_RUN M_B_A13 119 24 M_B_DQ13 117 134
SMbus address A4 M_B_A15
80 A14 DQ14 34
M_B_DQ15
118 VDD16 VSS31 138
78 36 123 139

A15 DQ15 M_B_DQ16 VDD17 VSS32
DQ16 39 124 VDD18 VSS33 144
109 41 M_B_DQ17 145
5 M_B_BS0 BA0 DQ17 VSS34
108 51 M_B_DQ18 199 150
5 M_B_BS1 BA1 DQ18 VDDSPD VSS35
R145 R146 79 53 M_B_DQ19 151
5 M_B_BS2 BA2 DQ19 +3V_RUN VSS36
10K *10K 114 40 M_B_DQ20 77 155
5 M_B_CS0# S0# DQ20 NC1 VSS37
121 42 M_B_DQ21 122 156
5 M_B_CS1# S1# DQ21 NC2 VSS38
101 50 M_B_DQ22 125 161
5 M_B_CLKP0 CK0 DQ22 NCTEST VSS39
103 52 M_B_DQ23 162
5 M_B_CLKN0 CK0# DQ23 VSS40
M_B_DQ24 PM_EXTTS#1
DIMM1_SA1
DIMM1_SA0
5 M_B_CLKP1 102 CK1 DQ24 57 4 PM_EXTTS#1 198 EVENT# VSS41 167

104 59 M_B_DQ25 30 168
5 M_B_CLKN1 CK1# DQ25 4,14 DDR3_DRAMRST# RESET# VSS42
73 67 M_B_DQ26 172
5 M_B_CKE0 CKE0 DQ26 VSS43
74 69 M_B_DQ27 173
5 M_B_CKE1 CKE1 DQ27 VSS44
115 56 M_B_DQ28 1 178
5 M_B_CAS# CAS# DQ28 VREF_DQ VSS45
110 58 M_B_DQ29 126 179
5 M_B_RAS# RAS# DQ29 +SMDDR_VREF_DQ1 VREF_CA VSS46
113 68 M_B_DQ30 184
5 M_B_WE# W E# DQ30 +SMDDR_VREF_DIMM1 VSS47
R154 R155 DIMM1_SA0 197 70 M_B_DQ31 185
*10K 10K DIMM1_SA1 SA0 DQ31 M_B_DQ32 VSS48
201 SA1 DQ32 129 2 VSS1 VSS49 189
CGCLK_SMB 202 131 M_B_DQ33 3 190
3,10,14 CGCLK_SMB SCL DQ33 VSS2 VSS50
(204P)
CGDAT_SMB 200 141 M_B_DQ34 8 195
3,10,14 CGDAT_SMB SDA DQ34 +1.5V_SUS +DDR_VTTREF VSS3 VSS51
143 M_B_DQ35 9 196
DQ35 M_B_DQ36 VSS4 VSS52
5 M_B_ODT0 116 ODT0 DQ36 130 13 VSS5
120 132 M_B_DQ37 14
5 M_B_ODT1 ODT1 DQ37 VSS6
140 M_B_DQ38 19
5 M_B_DM[7:0] DQ38 VSS7
C M_B_DM0 11 142 M_B_DQ39 20 C
CGCLK_SMB M_B_DM1 DM0 DQ39 M_B_DQ40 R151 R153 VSS8
28 DM1 DQ40 147 25 VSS9
CGDAT_SMB
M_B_DM2
M_B_DM3
46
63
DM2
DM3
(204P) DQ41
DQ42
149
157
M_B_DQ41
M_B_DQ42
1K/J_4 *0/J_4
+SMDDR_VREF_DIMM1
26
31
VSS10
VSS11
VTT1
VTT2
203
204 +0.75V_DDR_VTT
M_B_DM4 136 159 M_B_DQ43 32
C184 M_B_DM5 DM4 DQ43 M_B_DQ44 VSS12
153 DM5 DQ44 146 37 VSS13 G1 G1
C183 M_B_DM6 170 148 M_B_DQ45 38 G2
*33P/50V_4 M_B_DM7 DM6 DQ45 M_B_DQ46 VSS14 G2
*33P/50V_4 187 DM7 DQ46 158 43 VSS15
1
160 M_B_DQ47 R150
5 M_B_DQSP[7:0] DQ47
M_B_DQSP0 12 163 M_B_DQ48 1K/J_4 C199
M_B_DQSP1 DQS0 DQ48 M_B_DQ49 0.1U/16V_4
29 165 2-2013290-1
2
M_B_DQSP2 DQS1 DQ49 M_B_DQ50 16
47 DQS2 DQ50 175
M_B_DQSP3 64 177 M_B_DQ51
M_B_DQSP4 DQS3 DQ51 M_B_DQ52
137 DQS4 DQ52 164
M_B_DQSP5 154 166 M_B_DQ53
M_B_DQSP6 DQS5 DQ53 M_B_DQ54
171 DQS6 DQ54 174
M_B_DQSP7 188 176 M_B_DQ55
5 M_B_DQSN[7:0] DQS7 DQ55
M_B_DQSN0 10 181 M_B_DQ56
M_B_DQSN1 DQS#0 DQ56 M_B_DQ57
27 DQS#1 DQ57 183
M_B_DQSN2 45 191 M_B_DQ58
62 DQS#3 DQ59 193
M_B_DQSN4 135 180 M_B_DQ60
152 DQS#5 DQ61 182
M_B_DQSN6 169 192 M_B_DQ62
186 DQS#7 DQ63 194
2-2013290-1
DGMK4000057
B B
ddr-600025fb204g103zl-204p-ruv
+1.5V_SUS
Place these Caps near So-Dimm2. +SMDDR_VREF_DIMM1 +SMDDR_VREF_DQ1
C177 C190 C189 C178 C174 C198 C195
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 2.2U/6.3V_6 2.2U/6.3V_6
+1.5V_SUS +DDR_VTTREF M1 VREF
C193 + C201 C200
10U/6.3V_6 *330U/2.5V_7343 C196
7343 0.1U/16V_4 0.1U/16V_4
2.5 R152 R149
C194 C175 C192 C191 C176 1K/J_4 *0/J_6
10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 +SMDDR_VREF_DQ1
R147 0_6
+3V_RUN +0.75V_DDR_VTT
1
R148
1K/J_4 C197
C187 C188 C170 C172 C169 C171 C168 0.1U/16V_4
2
10U/10V_8 16
2.2U/6.3V_6 0.1U/16V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10
805
A A

PROJECT : FH2
1A
DDR3 DIMM-2
5 4 3 2 1
5 4 3 2 1
Backlight Control(LDS) BACKLIGHT POWER LED Panel POWER SWITCH(LVDS) 16

80mils
+3V_RUN +VIN V_BLIGHT
D 2A/63VS_1206 D
F4
1 2
R188
10K + C236 C241 C240
+3V_RUN
10U/25V_1206 1000P/50V_4 0.1U/25V/X5R
BAS316 D10 U15

8,25 MPWROK
5
BAS316 D11 2
25 DLID#
4 DISPON 80mils
8 PANEL_BKEN 1
LCDVCC_1 LCDVCC
F5 2A/63VS_1206
3
MC74VHC1G08DFT2G 1 2
1
+3VPCU C238 C250 C249 C246
item19
*0.1u/10V_4 0.1u/10V_4 33p/50V_4 4.7U/10V_8
2
1 2 LID#
C LID# 25 C
MR1 +3V_RUN
C1 APX9132H AI-TRG
C2 A
+3V_S5
3
0.1U/10V_4 220p/10V_4
C255 U14 LCDVCC_1
1u/10V_6 6 1
U13 IN OUT
5
4 IN GND 2
8 ENVDD 2
4 INT_LVDS_DIGON_U 3 5
ON/OFF GND
8,25 MPWROK 1
R185 IC(5P) APL3512ABI-TRG
3
MC74VHC1G08DFT2G
LVDS/CCD item19
100K/J_4
+5V_RUN F6 CCD_POWER
MINI_PS-HS1
C253 10u/10V_8
+
2 1
+3VPCU LCDVCC
C251 1000p/50V_4
B B
C252 0.1u/10V_4
R187
V_BLIGHT LCDVCC *100K R186
L4 CON1 *22R/J/0603
3
*WCM-2012-900T +3V_RUN
USBP8- 40 39
10 USBP8- 2 2 1 1 38 37
3
3 4 USBP8+
10 USBP8+ 3 4 36 35
8 LCD_DDCCLK R181 0_4 DISPON 2 Q10
R180 0_4 34 33 LVDS_VADJ INT_LVDS_DIGON_U Q9 *2N7002E-T1-E3
8 LCD_DDCDAT 32 31 2
CAMERA
DMIC_CLK DMIC_CLK C248 *DTC144EU

24 DMIC_CLK 29 DMIC_DAT 0.1U
C9 USBP8- 30 27
1
USBP8+ 28
26 25 CCD_POWER
*1000p/50V_4
TXLOUT0- 24 23 TXLOUT1-
8 TXLOUT0- 22 21 TXLOUT1- 8
DMIC_DAT TXLOUT0+ TXLOUT1+
24 DMIC_DAT 8 TXLOUT0+ 20 19 TXLOUT1+ 8
C10 TXLOUT2- 18 17 TXLCLKOUT-
8 TXLOUT2- 16 15 TXLCLKOUT- 8
TXLOUT2+ TXLCLKOUT+
8 TXLOUT2+ 14 13 TXLCLKOUT+ 8
*1000p/50V_4
TXUOUT0- 12 11 TXUOUT1-
8 TXUOUT0- 10 9 TXUOUT1- 8
TXUOUT0+ TXUOUT1+
8 TXUOUT0+ 8 7 TXUOUT1+ 8
A A
R183 *0/J_4 LVDS_VADJ TXUOUT2- 6 5 TXUCLKOUT-
8 BIA_PWM 8 TXUOUT2- 4 3 TXUCLKOUT- 8
TXUOUT2+ TXUCLKOUT+
42
41
8 TXUOUT2+ 2 1 TXUCLKOUT+ 8
25 CONTRAST R184 0/J_4
C245
*1000PF
C244
0.1U/10V_4
PROJECT : FH2
LCD_CON40P Size Document Number Rev
87241-4001-40P-LUV 1A
DFWF40MR000 LCD/LED Panel/CCD
5 4 3 2 1
5 4 3 2 1
CRT CONN/DDC LEVEL SHIFT

40mils TBD CN5500 FOOTPRINT
17
C4 0.1U/10V_4
F1
5V_CRT2 CN3
16
+5V_RUN 2 1 2 3
CH411DPT D1
1.1A/6V_POLY CRT
6
D INT_CRT_RED L3 BK1608LL680_6 CRT_RED_L T26 D
8 INT_CRT_RED 1 11
7
INT_CRT_GRE L2 BK1608LL680_6 CRT_GRE_L 2 12
8 INT_CRT_GRE
8
INT_CRT_BLU L1 BK1608LL680_6 CRT_BLU_L 3 13
8 INT_CRT_BLU
9
4 14
R2 C254 R182 C7 R1 C243 C5 C6 C8 10
5 15
150/F_4 4.7P/50V_4 150/F_4 4.7P/50V_4 150/F_4 4.7P/50V_4 4.7P/50V_4 4.7P/50V_4 4.7P/50V_4
17
DFDS15FR072
dsub-070546fr015s272zr-15p-v
U1
5V_CRT2 1 16 CRT_VSYNC_Q R3 39/F_4 CRT_VSYNC_R L5 BLM18BA220SN1D CRT_VSYNC_L
VCC_SYNC SYNC_OUT2 CRT_HSYNC_Q R8 39/F_4 CRT_HSYNC_R L6 BLM18BA220SN1D CRT_HSYNC_L
SYNC_OUT1 14
+3V_RUN 7
C11 0.22U/10V_4 VCC_DDC
8 BYP
15 INT_CRT_VSYNC C239 C242
SYNC_IN2 INT_CRT_VSYNC 8
5V_CRT2 2 13 INT_CRT_HSYNC 5V_CRT2
VCC_VIDEO SYNC_IN1 INT_CRT_HSYNC 8
10P/50V_4 10P/50V_4
R4 R7
CRT_RED_L 3 10 G_CLK_DDC2
VIDEO_1 DDC_IN1 G_CLK_DDC2 8
CRT_GRE_L 4 11 G_DAT_DDC2 2.7K/J_4 2.7K/J_4
VIDEO_2 DDC_IN2 G_DAT_DDC2 8
CRT_BLU_L 5
VIDEO_3 CRTDCLK
DDC_OUT1 9
6 12 CRTDDAT
GND DDC_OUT2
CM2009 +3V_RUN
C237 C247
+5V_RUN +3V_RUN
C C
10P/50V_4 10P/50V_4
G_CLK_DDC2 R5 2.2K/J_4
C3 C12 G_DAT_DDC2 R6 2.2K/J_4
0.1U/10V_4 0.1U/10V_4
U27 U25 U29

A
TXC_HDMI+ R427 *100/J_4 TXC_HDMI-
HDMI_SCLK 1 10 HDMI_SCLK TX1_HDMI+ 1 10 TX1_HDMI+ TX0_HDMI- 1 10 TX0_HDMI-
TX0_HDMI+ R429 *100/J_4 TX0_HDMI- HDMI_SDATA IN1 IO1 IN1 IO1 IN1 IO1
2 9 HDMI_SDATA TX1_HDMI- 2 9 TX1_HDMI- TX0_HDMI+ 2 9 TX0_HDMI+
IN2 IO2 IN2 IO2 IN2 IO2 +5V_HDMIC
3 3 3
TX1_HDMI+ R430 *100/J_4 TX1_HDMI- HDMI_DET GND HDMI_DET TXC_HDMI+ GND TXC_HDMI+ TX2_HDMI- GND TX2_HDMI-
4 7 4 7 4 7
IN3 IO3 TXC_HDMI- IN3 IO3 TXC_HDMI- TX2_HDMI+ IN3 IO3 TX2_HDMI+
5 IN4 IO4 6 5 IN4 IO4 6 5 IN4 IO4 6
TX2_HDMI+ R431 *100/J_4 TX2_HDMI-
2
*RClamp0524J *RClamp0524J *RClamp0524J
D26
CH501H-40PT
reserve for EMI
1
Signals +3V_RUN
PDT CHR PIM A R422 R423
EMI 2.2K_4 2.2K_4
2
PC1 L22
Ra NC 4.7K NC
HDMI HDMI_SCLK HDMI_SDATA
B HDMI_CFG0 Rb NC NC NC B
U28
0_6
1
HDMI_CFG1 +3V_LS
Rc 4.7K NC NC 2
11
VCC
VCC
15
REXT Rd 499 1.2K 4.7K A 21
VCC
VCC A
26 CN9
VCC
33 20
C4572 C4573 C4574 C4575 C4576 C4577 C4578 C4579 VCC TX2_HDMI+ SHELL1
PC1 Re NC NC 4.7K 40
VCC POWER 1
D2+ SHELL2
21
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 46 +5V_RUN TX2_HDMI- 3
VCC TX1_HDMI+ D2-
4
D1+
2
HDMI_OE# TX1_HDMI-
Rf NC 4.7K NC 39 22 TX1_HDMI+ D25 TX0_HDMI+
6
7
D1-
8 IN_D1 IN_D1+ OUT_D1+ D0+
8 IN_D1# 38 23 TX1_HDMI- TX0_HDMI- 9
IN_D1- OUT_D1- D0-
PC0 Rg 4.7K 4.7K 4.7K D2 Shield
2
8 IN_CLK# 42 19 TXC_HDMI- CH501H-40PT 5
1
IN_D2+ OUT_D2+ TXC_HDMI+ D1 Shield
8 IN_CLK 41 IN_D2- OUT_D2- 20 D0 Shield 8
Vendor:PDT P/N:AL008101000 +3V_RUN TXC_HDMI+ 10 11
CK+ CK Shield
1
Vendor:CHR P/N:AL007318001 8 IN_D2 45 16 TX2_HDMI+ TXC_HDMI- 12 17
IN_D3+ OUT_D3+ TX2_HDMI- F11 CK- GND
Vendor:PIM P/N:ALP411LS004 8 IN_D2# 44 IN_D3- OUT_D3- 17
FUSE1A6V_POLY
+3V_RUN 48 13 TX0_HDMI+
8 IN_D0 IN_D4+ OUT_D4+
R410 R411 TX0_HDMI- HDMI_SCLK
Rg 4.7K_4 8 IN_D0# 47 14 15 13
2
R408 PC0 R409 *0_4 2.2K_4 2.2K_4 IN_D4- OUT_D4- HDMI_SDATA DDC CLK CE Remote
16 14
HDMI_SCLK DDC DATA NC
R412
Ra *4.7K_4 PC1 R413
Re *0_4
8 SDVO_CLK 9
SCL SCL_SINK
28
HDMI_SDATA
R414
Rb *4.7K_4 HDMI_CFG0 R415 *0_4
8 SDVO_DATA 8 SDA SDA_SINK 29
+5V_HDMIC 1A 18
SDVO_DATA HDMI_DET +5V
R416
Rc 4.7K_4 HDMI_CFG1 R417 *0_4
8 HDMI_HPD_CON 7
HPD HPD_SINK
30
SDVO_CLK +3V_RUN
R418 *4.7K/F_4 DDC_EN 32 C378 HDMI_DET 19
PC0 DDC_EN HP DET
A
Rd EQUALIZATION SETTING PC1
3
4
PC0 GND
1
5 *0.1U/10V_4 A
REXT R419 499/F_4 HDMI_CFG1 PC1 GND HDMI CONN
PC1:PC0=0:0 8dB 34 12
HDMI_CFG0 DDCBUF_EN GND DFHD19MR037
35 18
RT_EN# R420 *0_4 PC1:PC0=0:1 4dB Recommanded CFG GND
24 hdmi-hj103-19r-tagf-19p-ldv-v
PC1:PC0=1:0 12dB GND
HDMI_OE# R421
Rf *4.7K_4 RT_EN# GND
27
PC1:PC0=1:1 0dB 10
RT_EN# GND
31
HDMI_OE# 25 36
REXT OE# GND
6 REXT GND 37
GND GND
43
CFG = LOW: LOW-level input voltage: <0.40 V, LOW-level output voltage: 0.60 V CONTROL EPAD
49
CFG = HIGH: LOW-level input voltage: <0.44 V, LOW-level output voltage: 0.66 V
HDMI_CFG1 = LOW: Passive DDC buffer PS8101 PROJECT : FH2
HDMI_CFG1 = HIGH: Active DDC buffer Size Document Number Rev
1A
CRT CONN/HDMI
5 4 3 2 1
A B C D E
Card Reader 18
XD_CLE/CF_D3 43
R156 10K/J_4 U11 42
XD_CE#/CF_D11
+3V_RUN 13 CF_CD# XD_ALE/CF_D4 41
14 GPIO0
15 40 SP16
CF_D10 SD_DAT2/XD_RE#/CF_D12 SP15
16 CF_D9 SD_DAT3/XD_WE#/CF_D5 39
17 CF_D2 XD_RDY/CF_D13 38
18 CF_D8/SM_CD# SD_DAT4/XD_WP#/CF_D6 37
19 CF_D1/XD_CD#
SD_WP 20 36 SD_CMD
SD_CD# CF_D0/SM_WPM#/SD_WP SD_CMD
21 CF_A0/SD_CD# SD_DAT5/XD_D0/CF_D14 35
22 34 SP11
XD-D4 CF_DMACK# SD_CLK/XD_D1/MS_CLK/CF_D7 SP10
23 31
CF_A1/XD_D4 SD_DAT6/XD_D7/MS_D3/CF_D15
24 CF_DMARQ CF_CS0# 30
29 MS_CD#
R166 6.19K/F_4 RREF MS_INS#/CF_IORD# MS_DATA2
2 RREF SD_DAT7/XD_D2/MS_D2/CF_IOWR# 28
27 SP7
SD_DAT0/XD_D6/MS_D0/CF_RST# SP6
26
L16 SD_DAT1/XD_D3/MS_D1/CF_IORDY SP5
XD_D5/MS_BS/CF_A2 25
USBP12- 3 4 4
10 USBP12- 3 4 DM
USBP12+ 2 1 5 1 10mil at least
10 USBP12+ 2 1 DP AV_PLL_IN C229 C230
*WCM-2012-900T 0.1u/10V_4
1U/6.3V_4
10 CLK_48M_CR
C234 *18p/50V_4 XI R168 48 10 VREG
*0_4 XTLI VREG_OUT 20mil at least R159 *short_6
8 +3V_RUN
3V_IN
3 Vreg out 1.8V from Internal 3.3VLDO
Y2 R169 A3V3_ IN C219
*12MHz *270K_4 33 20mil at least C217
D3V3_ IN C222 0.1u/10V_4 4.7U/6.3V_6
47
C233 *18p/50V_4 XO XTLO 0.1u/10V_4 C224 *0.1u/10V_4
11
D3V3_OUT
+3V_RUN
MODE_SEL 45
MODE_SEL 0.1u/10V_4 C213 C220
4.7U/6.3V_6
7 +3V_RUN +3VCARD
R170 C232 A3V3_OUT
0/F_4
CARD_3V3_OUT 9 20mil at least +3VCARD
*47P/50V_4
6
AG33 C227 C221 C363 C205 C204 C214
46
AG_PLL C211
32
DGND2 *0.1u/10V_4 *10U/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
44 12
PLTRST# RST# DGND1 *0.1u/10V_4
4,10,19,22,26 PLTRST#
C231 0.1u/10V_4
Realtek RTS5159-GR
1U/6.3V_4
1 1
As close U8203 pin9 as possible
XD-D4 R158 short_4 SD_DAT1
For 5158E
A
+3VCARD
SP7 R162 short_4 MS_DATA0_SD_DAT0
CN2
14 SD-VCC
MS_DATA0_SD_DAT0 17
SD_DAT1 SD-DAT0
18
SD_DAT2 SD-DAT1
19
SP6 R161 short_4 MS_DATA1 SD_DAT3 SD-DAT2
11
SD_CLK SD-DAT3
15
SD_CMD SD-CLK
12
SD_CD# SD-CMD
20
SD_WP SD-C/D
22
SD-WP
13 SD-GND
16
SP16 R171 short_4 SD_DAT2 SD-GND
9
MS_DATA0_SD_DAT0 MS-VCC
4
MS_DATA1 MS-DATA0
3 MS-DATA1
SP5 R160 short_4 MS_BS MS_DATA2 5
MS_DATA3 MS-DATA2
7
MS_CLK MS-DATA3
8
MS_CD# MS-SCLK
6 MS-INS
MS_BS 2 23
SP15 R167 short_4 SD_DAT3 MS-BS GND
1 MS-GND GND 21
10 MS-GND
R164 short_4 SD_CLK CARD_READER_PROCONN

DFHD23MS0B6
SP11 R165 short_4 MS_CLK 3IN1-SD-47265-001-23P
1
C226
*22P +3VCARD +3VCARD
2
C209 C208 C207

SP10 R163 short_4 MS_DATA3 C210 R157 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
4.7U/6.3V_6 150K/F_4
PROJECT : FH2
1A
Card Reader RTS5159
A B C D E
A B C D E
LAN
R558
+1.05V_LAN
2.49K/F
VDD33
A
+1.05V_LAN VDD33 VDD33
CLK_LAN_REQ# 1
VDD33
X'tal 25MHz
LAN_XTAL2
LAN EEPROM
EECS_SCL
LED1_EESK
1
U3
CS VCC 8
VDD33
19
2 2 SK DC 7
R560 *10K Y5111 EEDI_SDA 3 6 C28
LAN_XTALI LED3_EDO DI ORG
2 1 4 DO GND 5 *0.1u/10V_4
PCIE_WAKE# 1 2
LAN_XTAL2
VDD33
LAN_XTALI
R561 *10K 25MHz *HT93LC46A
4 4
R190 1K
A C634 C635
LED1_EESK 27P 27P
50 50
NPO NPO
U16 10/100 Transformer
49
48
47
46
45
44
43
42
41
40
39
38
37
+1.05V_LAN_S L27
R573 75/F TXCT0 24 TXCT0
A
GND
LED1/EESK
RSET
GPO/SMBALERT
AVDD33
AVDD1
CKXTAL2
CKXTAL1
LED0
VDD3
AVDD33(NC)
AVDD3(AVDD1)
VDD1(NC)
VDD33 R574 75/F TXCT1 MCT0
1 TCT0
VDD33 R571 75/F TXCT2 23 RJ45-TX0+
+1.05V_LAN R572 75/F TXCT3 MDI0+ TX0+
2 TD0+
R564 22 RJ45-TX0-
MDI0+ 0 C650 MDI0- TX0-
1 MDIP0 SROUT1 36 R564 For Enable Switch Regulator. 3 TD0-
MDI0- 2 35 1000P 21 TXCT1
3
MDIN0 VDDSR
34
R563 For Disable Switch Regulator. 3KV 4
MCT1
MDI1+ AVDD1(NC) VDDSR Enable +1.05VLAN_S R563 *0_NC 1808 TCT1 RJ45-TX1+
4 MDIP1 ENSR 33 TX1+ 20
MDI1- 5 32 EEDI_SDA 2 1 MDI1+ 5
MDIN1 EEDI/SDA LED3_EDO R559 10K TD1+ RJ45-TX1-
6 AVDD1(NC) LED3/EDO 31 TX1- 19
MDI2+ 7 RTL8111EL 30 EECS_SCL 2 1 MDI1- 6
MDI2- MDIP2(NC) EECS/SCL R555 10K TD1- TXCT2
8 MDIN2(NC) DVDD1 29 +1.05V_LAN MCT2 18
VDD33 9 28 C6389 *6.8P_NC MDI3+ 7
AVDD1(NC) LANWAKEB PCIE_WAKE# 8,26 TCT2
MDI3+ 10 27 VDD33 C6393 *6.8P_NC MDI3- 17 RJ45-TX2+
MDI3- MDIP3(NC) VDD3 ISOLATE# C6410 *6.8P_NC MDI2+ MDI2+ TX2+
11 26 8
3 MDIN3(NC) ISOLATEB C652 *6.8P_NC MDI2- TD2+ RJ45-TX2- 3
SMBDATA(NC)
12 AVDD3(NC) PERSTP 25 PLTRST# 4,10,18,22,26 TX2- 16

SMBCLK(NC)
C651 *6.8P_NC MDI1+ MDI2- 9

REFCLK_M
TD2-
REFCLK_P
C649 *6.8P_NC MDI1- TXCT3

CLKREQB
Check point: C653 *6.8P_NC MDI0+ MCT3 15

10
GNDTX
DVDD1
EVDD1
1. LOM_CLK_REQ# and PCIE_WAKE# needsto be pull up TCT3

HSON
HSOP
+3V_RUN C648 *6.8P_NC MDI0- 14 RJ45-TX3+

HSIN
HSIP
+1.05V_LAN C654 MDI3+ TX3+

by PCH side 11 TD3+
Reserver for EMI 0.01U 13 RJ45-TX3-
TX3-
2. PCIE_TX must have AC cap at PCH side 25 MDI3- 12
13
14
15
16
17
18
19
20
21
22
23
24
R562 TD3-
1K/F LFE9276C-R
A A
+1.05V_LAN
ISOLATE#
R565 *100/F RJ45
10 CLK_LAN_REQ# LAN_PCIE_PWR_CTRL# 25 VDD33
R566
A 10 PCIE_TXP6
15K/F 2 1
CON10
1
R557 RJ45-TX3-
10 PCIE_TXN6 8
D27 *RB501V-40_NC RJ45-TX3+
10K C421 C265 RJ45-TX1- 7
10 CLK_PCIE_LOMP 6
Isolate# is for power saving. 4.7U 0.1U RJ45-TX2-
10 CLK_PCIE_LOMN 5
C658 0.1U 6.3 10 RJ45-TX2+
10 PCIE_RXP6
2
10 It needs to pull low when system state in S3, S4, and S5. X5R X5R RJ45-TX1+ 4 12
3 11
2 10 PCIE_RXN6
C659 0.1U
10
pull high when system at S0 state RJ45-TX0-
RJ45-TX0+ 2 10 2
1 9
GND_LAN
R189 0 RJ45
LAN Power VDD33

0603
+3VSUS
Place Close to LAN chip,
RJ45-100086FR008S103ZL-8P
DFTJ08FR791
R193 *0
pin 34 and 35
+3V_S5
0603
A
0603
VDD33 R195 0
+1.05V_LAN_S
+1.05V_LAN 0603
+1.05V_LAN R194 0
4.7uH_680mA_DCR=0.12 @7.96MHz 0603

R192 0
L50
C383 C381 C379 C382 C267 C266 C384 C264 C261 C258 C259 C262 C260
C420 C380 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U C256 C257 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U GND_LAN
4.7U 0.1U 10 10 10 10 10 10 10 1U 0.1U 10 10 10 10 10 10
1 6.3
X5R
10
X7R
X7R X7R X7R X7R X7R X7R X7R 6.3
X5R
10
X5R
X5R X5R X5R X5R X5R X5R
1

For L50, C420, C62 need to check layout guild Close to pin 3, 6, 9, 13, 29, 41 and 45 Place connect to Pin21 Place Close to LAN chip, pin 12, 27, 39, 42, 47 48
PROJECT : FH2
1A
REQ by layout LAN_RTL8111E-GR/RJ45
A B C D E
5 4 3 2 1
2.5" SATA HDD

CN6
SATA ODD
20
1
GND1
TXP
TXN
2
3
SATA_TXP0_C C225
SATA_TXN0_C C223
0.01U/25V_4
0.01U/25V_4
SATA_TXP0 9
SATA_TXN0 9
ODD CONN
D GND2 4 D
5 SATA_RXN0_C C218 0.01U/25V_4 CON8
RXN SATA_RXN0 9
6 SATA_RXP0_C C215 0.01U/25V_4 1 8
RXP SATA_RXP0 9 GND DP 3A/32VS_1206
F7
GND3 7
0.01U/25V_4 C115 SATA_TXP1_C 2 9 ODD_5V
80 mils 1 2
9 SATA_TXP1 TX VCC5 +5V_RUN
8 Place these SATA AC Cap close to device , not SB 0.01U/25V_4 C114 SATA_TXN1_C 3 10
3.3V 9 SATA_TXN1 TX# VCC5
9 f3_18x1_52-2_665
3.3V C320 C324 C325
3.3V 10 4 GND MD 11
11 0.1U/10V 0.1U/10V 10U/10V_8
GND 0.01U/25V_4 C113 SATA_RXN1_C
GND 12 9 SATA_RXN1 5 RX# GND 12
13 0.01U/25V_4 C112 SATA_RXP1_C 6 13
GND
5V 14 0.94A(80mils) +5V_SATA
9 SATA_RXP1 RX GND
GND 14
5V 15 7 GND GND 15
5V 16 GND 16
GND 17 GND 17
25 XX RSVD 18
26 XX GND 19
20 +5V_SATA +5V_RUN
12V F8 2A/63VS_1206
23 XX 12V 21
24 XX 12V 22 1 2
C359 C358 C355

SATA_HDD SLS-13DD1G
sata-127072fr022g212zr-22p-r *0.1u/10V_4 0.1u/10V_4 10u/10V_8
C DFHS22FR183 DFHS13FR026 C
bat-sls-13dd1g-13p-r-smt
Hole CN15 CRT Bare Cu Decoupling Cap

H2 H15 H14 H9 H10 H7 H26 H28 H73 H6 H31 H32 H35 H36 H33 H34
FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1
EMI request
+VIN
B B
1
1
GND_LAN C13 C142 C15 C19 C272 C14 C27 C150 C270
H11 H8 H5 H21 H29 H30 H12 H27 H25 FAN
FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 FH1 H37 *.1U/25V_4 *.1U/25V_4 *.1U/25V_4 *.1U/25V_4 *.1U/25V_4 *.1U/25V_4 *.1U/25V_4 *.1U/25V_4 *.1U/25V_4
FH1
1
ESD EMI(Decoupling Cap)

H1 H13 H16 H17 H18 H19 H20 H22 H23
1 9 1 9 1 9 1 9 1 9 1 9 1 9 1 9 1 9 +3V_RUN +3V_RUN +5VPCU
2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 8 2 8
3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7
C371 C372 C373
4
5
6
4
5
6
4
5
6
4
5
6
4
5
6
4
5
6
4
5
6
4
5
6
4
5
6 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4
A A
H3 H24 H4
1 9 1 9 1 9
2 8 2 8 2 8 Quanta Computer Inc.
3 7 3 7 3 7
10 PROJECT : FH2
4
5
6
4
5
6
4
5
6
FH2 Size Document Number Rev

1A
HDD/ ODD/HOLE
5 4 3 2 1
5 4 3 2 1
BuleTooth (BTM) 21
+3V_RUN Q18 VCC3_BT +3VPCU VCC3_BT VCC3_BT
C364
6 IN OUT 1
D 4 2 R358 D
0.1U/16V_4 IN GND R357
3 5 *100K_4 *22R/J/0603 CON5
ON/OFF GND
1
3
R356 AAT4280IGU-3-T1/G5241 L15 *WCM-2012-900T 2
1
C367 C365 2 2
*100K_4 10 USBP9+ 1 1 3
10 USBP9- 3 3 4 4 4
RF_SW_R 2 0.1U/10V 4.7U/10V 5
2
6
Q20
1 3 *2N7002E
Bluetooth CN
1
Q19 C366 87213-0600-6p-l
*DTC144EU *0.22uF DFHD06MR751
2
BT_ON
25 BT_ON
C C
USB Connector
+5VSUS +5V_USB A +5V_USB CON9
L10
F9 DLW21HN900SQ2L 60mils 1 4
MINI_PS-HS1 USBP2- USBP2_R- 1 4
10 USBP2- 3 3 4 4 2 2 GND 5
2 1 USBP2+ 2 2 USBP2_R+
10 USBP2+ 1 1 3 3 GND 6
GND 7
GND 8
C351 + C349 U7 USB
C354 USBP2_R- 1 6 USBP2_R+ USB-020173MR004XX52ZR-4P-R-V
4.7u/10V_6 150U/10V 0.1u/10V_4 Z1 Z4 +5V_USB DFHS04FR920
2 GND VB 5
3 Z2 Z3 4
IP4220CZ6
Place close to the CONN side
B B
+5V_USB2 CON12
+5VSUS +5V_USB2 A L13
DLW21HN900SQ2L 60mils 1 4
F10 USBP4- USBP4_R- 1 4
10 USBP4- 3 3 4 4 2 2 GND 5
MINI_PS-HS1 USBP4+ 2 2 USBP4_R+
10 USBP4+ 1 1 3 3 GND 6
2 1 GND 7
GND 8
C360 + C356 USB
C361 U9 USB-020173MR004XX52ZR-4P-R-V
4.7u/10V_6 150U/10V 0.1u/10V_4 USBP4_R- 1 6 USBP4_R+ DFHS04FR920
Z1 Z4 +5V_USB2
2 GND VB 5
3 Z2 Z3 4
IP4220CZ6
+5V_USB3
L14 JP1
DLW21HN900SQ2L 60mils
+5VSUS +5V_USB3 USBP1- USBP1_R- 1
10 USBP1- 2 2 1 1 2
USBP1+ 3 4 USBP1_R+
F3 10 USBP1+ 3 4 3
MINI_PS-HS1 4
A 2 1 53048-0410 A
53398-0410-4P-L
C203 DFHD04MR701
C206
4.7u/10V_6 + U10
C362 0.1u/10V_4 USBP1_R- 1 6 USBP1_R+
150U/10V 2
Z1
GND
Z4
VB 5 +5V_USB3 Quanta Computer Inc.
3 Z2 Z3 4
IP4220CZ6
PROJECT : FH2
1A
USB/BLUE TOOTH
5 4 3 2 1
5 4 3 2 1
MINI CARD (WLAN) XDP

+1.5V_RUN
R17 *0_8
+1.5V_WLAN
22
+3V_RUN +3V_RUN
CON7
CN5
51 52
Reserved +3.3V
49 50
Reserved GND
47 48 1 2
Reserved +1.5V GND0 GND1
45 46 4 XDP_PREQ# 3 4
Reserved LED_WPAN# OBSFN_A0 OBSFN_C0
43 44 4 XDP_PRDY# 5 6
D Reserved LED_WLAN# OBSFN_A1 OBSFN_C1 D
41 42 7 8
Reserved LED_WWAN# GND2 GND3
39 40 4 XDP_OBS0 9 10
Reserved GND R207 *0 OBSDATA_A0 OBSDATA_C0
37 38 4 XDP_OBS1 11 12
Reserved USB_D+ R206 *0 USBP11+ 10 OBSDATA_A1 OBSDATA_C1
35 36 13 14
GND USB_D- USBP11- 10 GND4 GND5
10 PCIE_TXP2 33 34 4 XDP_OBS2 15 16
PETp0 GND OBSDATA_A2 OBSDATA_C2
10 PCIE_TXN2 31 32 4 XDP_OBS3 17 18
PETn0 SMB_DATA PLTRST#_R R203 0_4 OBSDATA_A3 OBSDATA_C3
29 30 PLTRST# 4,10,18,19,26 19 20
GND SMB_CLK GND6 GND7
27 28 21 22
GND +1.5V OBSFN_B0 OBSFN_D0
10 PCIE_RXP2 25 26 23 24
PERp0 GND R202 *10K OBSFN_B1 OBSFN_D1
10 PCIE_RXN2 23 24 +3V_RUN 25 26
PERn0 +3.3Vaux GND8 GND9
21 22 4 XDP_OBS4 27 28
GND PERST# OBSDATA_B0 OBSDATA_D0
10 CLK_LPC_DEBUG 19 20 RF_EN# 25 4 XDP_OBS5 29 30
Reserved Reserved D12 BAS316 OBSDATA_B1 OBSDATA_D1
T30 17
Reserved GND
18 item55 31
GND10 GND11
32
4 XDP_OBS6 33 34
OBSDATA_B2 OBSDATA_D2
15 16 LAD0 9,25 4 XDP_OBS7 35 36
GND Reserved OBSDATA_B3 OBSDATA_D3 +1.05V_VTT
10 CLK_PCIE_MINI2P 13 14 LAD1 9,25 37 38
REFCLK+ Reserved +1.05V_VTT R261 1K/J_4 H_CPUPWRGD_XDP GND12 GND13 BCLK_ITP_R
10 CLK_PCIE_MINI2N 11 12 LAD2 9,25 4,11 H_PWRGOOD 39 40 CLK_BCLK_ITPP 4
REFCLK- Reserved PWRGOOD/HOOK0 ITPCLK/HOOK4 BCLK_ITP#_R
9 10 LAD3 9,25 41 42 CLK_BCLK_ITPN 4
GND Reserved HOOK1 ITPCLK#/HOOK5
10 MINI2CLK_REQ# 7 8 LFRAME# 9,25 43 44
CLKREQ# Reserved R269 0/J_4 PCIE_CLK_XDP_P VCC_OBS_AB VCC_OBS_CD XDP_RST#_R R268 1K/J_4
T29 5 6 4 H_PWRGD_XDP 45 46 H_CPURST# 4
Reserved +1.5V C305 HOOK2 RESET#/HOOK6
T28 3 4 47 48 XDP_DBRESET# 4,8
Reserved GND *0.1U/10V_4 HOOK3 DBR#/HOOK7 C298
T27 1 2 49 50
WAKE# +3.3V GND14 GND15 *0.1U/10V_4
10 PCH_SMBDATA 51 52 XDP_TDO 4
67910-0002 SDA TDO
10 PCH_SMBCLK 53 54 XDP_TRST# 4
DFHD52MS049 SCL TRSTN R262 51/J_4
55 56 XDP_TDI 4
R201 MIPCIEXP-AS0B22X-S80N-XX-52P TCK1 TDI
4 XDP_TCLK 57 58 XDP_TMS 4
*22 TCK0 TMS
59 60
GND16 GND17
R262 near the XDP connector
C271 *Samtec BSH-030-01_NC
*10P
It is for debug. requesst vendeer provide 200 pcs sample.

C C
+3V_RUN
C279 C278 C263 C274 C284
*10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
Mini Card2-3G(MNC)
+3V_RUN
+1.5V_3G
+3V_RUN
+3V_RUN
1
CN15 C388 C391 C352 C269 C389 C385
51 52
Reserved +3.3V 10u/10V_8@3G 0.1u/10V_4@3G 0.1u/10V_4@3G 0.1u/10V_4@3G 0.47u/6.3V_4@3G *10p/50V_4@3G
49 50
2
Reserved GND
47 48
Reserved +1.5V
45 46
Reserved LED_WPAN#
43 44
Reserved LED_WLAN#
41 42
B Reserved LED_WWAN# B
39 40
Reserved GND USBP13+
37 38 USBP13+ 10
Reserved USB_D+ USBP13-
35 36 USBP13- 10
GND USB_D-
10 PCIE_TXP3 33 34
PETp0 GND +1.5V_RUN +1.5V_3G
10 PCIE_TXN3 31 32
PETn0 SMB_DATA
29 30
GND SMB_CLK R141 *0_8@3G
27 28
GND +1.5V
10 PCIE_RXP3 25 26
PERp0 GND C390 C353 C395
10 PCIE_RXN3 23 24
PERn0 +3.3Vaux 3G_PLTRST_R R241 0_4
21 22 PLTRST# 4,10,18,19,26
GND PERST# *1n/50V_4@3G *0.1u/10V_4@3G *10u/10V_8@3G
19 20 3G_EN 25
UIM_C4 W_DISABLE#
17 18
UIM_C8 GND
15 16 UIM_VPP
GND UIM_VPP UIM_RST
10 CLK_PCIE_MINI3P 13 14
REFCLK+ UIM_RST UIM_CLK
10 CLK_PCIE_MINI3N 11 12
REFCLK- UIM_CLK UIM_DATA +3V_RUN
9 10
GND UIM_DATA UIM_PWR
10 3G_CLK_REQ# 7 8
CLKREQ# UIM_PWR
5 6
Reserved +1.5V C350
3 4
GND
GND
Reserved GND + C268 C296

1 2
WAKE# +3.3V *100u/6.3V_3528@3G
0.1u/10V_4@3G 10u/10V_8@3G
53
54
67910-0002@3G
DFHD52MS049
MIPCIEXP-AS0B22X-S80N-XX-52P
JSIM1
UIM_CLK 6 1 UIM_PWR C398 *27p/50V_4@3G +3V_RUN
CLK(C3) GND(C5) UIM_PWR
7 2
N/A(C8) VCC(C1) UIM_VPP
8 3
N/A(C4) VPP(C6) UIM_RST U17
9 4
CT RST(C2) UIM_DATA UIM_DATA C409 *10p/50V_4@3G UIM_RST UIM_VPP
A 10 5 1 6 A
CD DATA(C7) CH1 CH4
GND
GND
GND
GND
2 5
VN VP UIM_PWR
SIM-Conn-CE015@3G UIM_RST C396 *27p/50V_4@3G UIM_CLK 3 4 UIM_DATA
13
11
12
14
DFHS10FR381 CH2 CH3

2
sim-ce01x-3-14p-smt C408 *CM1293-04SO@3G C410

2
C397
*10p/50V_4@3G *33p/50V_4@3G
1
*1u/10V_6@3G
1

A PROJECT : FH2
1A
MINI CARD(WLAN/3G)/XDP
5 4 3 2 1
5 4 3 2 1
Touch Pad
Keyboard(KBC)
+5V_TP 40mils
F2
+5V_RUN
SW2
DHP00533B00
sw-tme-532-v-6p
A 23
1 2 SWR# 3 1
4 2
C118 1.1A/6V_POLY C131 5
6
0.1u/10V_4 *0.1u/10V_4 +5V_RUN
D D
CON4 R120 R119

1 sw-tme-532-v-6p
2 SWL# 4.7K_4 4.7K_4 SW1 DHP00533B00
3 +5V_TP SWL# 3 1
CN1 4 TPDATA_8 L9 NHCB2012KF-131T10/1A/130ohm_8 4 2
TPDATA 25
27 5 TPCLK_8 L8 NHCB2012KF-131T10/1A/130ohm_8 5
TPCLK 25
MY0 1 6 SWR# 6
25 MY0
MY1 2
25 MY1
MY2 3 88501-0601-6P-L-AQ1 C117 C116
25 MY2
MY3 4 88502-06xx-6p-l-nb3
25 MY3
MY4 5 DFFC06FR022 C374 C377 10p/50V_4 10p/50V_4
25 MY4
MY5 6 0.1u/10V_4 0.1u/10V_4
25 MY5
MY6 7
25 MY6
MY7 8
25 MY7
MY8 9
25 MY8
MY9 10
25 MY9
MY10 11
25 MY10
MY11 12
25 MY11
MY12 13
25 MY12
MY13 14
25 MY13
MY14 15
25 MY14
MY15 16
25 MY15
MY16 17
25 MY16
MY17 18
25 MY17
MX0 19
25 MX0
MX1 20
25 MX1
MX2 21
25 MX2
MX3 22
25 MX3
MX4 23
25 MX4
MX5 24
25 MX5
MX6 25
25 MX6
MX7 26
25 MX7
28
KB_CONN
C 88513-2641-26p-l C
DFFC26FR016
For EMI Reserve Caps for debug

+3V_RUN
MY3
CP1
7 8
CP6
8 7 MX7
LED
MY2 5 6 6 5 MX6
MY1 3 4 4 3 MX5 R172
MY0 1 2 2 1 MX4 10K
*100p_8P4R *100p_8P4R
CP4 CP3 SATA_LED

MY15 7 8 7 8 MY8
MY14 5 6 5 6 MY9
Blue
3
MY13 3 4 3 4 MY10
2
MY12 1 2 1 2 MY11 Q8 LTST-C190TBKT/BLUE
2 DDTC144EUA-7-F LED3
9 SATA_LED#
*100p_8P4R *100p_8P4R SATA_LED#_D R176 1 220_6
HDD/ODD 1 3 1 2 2 +5V_RUN
CP5 CP2 Q7
1
MX0 8 7 7 8 MY4 2N7002E
MX1 6 5 5 6 MY5
MX2 4 3 3 4 MY6
MX3 2 1 1 2 MY7 Blue
*100p_8P4R *100p_8P4R
R177
CAPSLED# 1N4148WS LTST-C190TBKT/BLUE LED4 1 1 220_6
CAPS LED 25 CAPSLED#
D23
2 2 +5V_RUN
B
Blue B
R173
NUMLED# 1N4148WS LTST-C190TBKT/BLUE LED6 1 1 220_6
NUM LED 25 NUMLED#
D22
2 2 +5V_RUN
Blue
R178
LED_WLAN# 1N4148WS LTST-C190TBKT/BLUE LED2 1 1 220_6
WLAN 25 LED_WLAN#
D21
2 2 +5V_RUN
A 25 LED_3G#
LED_3G# *1N4148WS
Blue
D28
3G
AMBER
R175
BAT_LED1# LTST-C191KFKT/AMBER LED1 1 2 2 1 220_6 +3VPCU
25 BAT_LED1#
R179
Battery 25 BAT_LED0#
BAT_LED0# 1N4148WS LTST-C190TBKT/BLUE LED7 1 2 2 1 220_6 +5V_RUN
D20
Blue
Blue
R174 220_6
PWRLED0# 1N4148WS LTST-C190TBKT/BLUE LED5 1 2 PWRLED0_R# 2 1 +5VSUS
25 PWRLED0#
D19
Power Status
A A

PROJECT : FH2
1A
KB/TOUCH PAD/LED
5 4 3 2 1
A B C D E
ALG_LI_VR_R
MIC ALG_LI_VR_L
Codec ALC269
ALG_MIC_SENSE
AR7
2.2K/F_4
AR6
2.2K/F_4 ALG_LI_VR_L AR24
Rc
*0/J_4 AR23
Re
0/J_4 GNDAUD
24
8 5
4 AC21 4.7U/10V/8
Cd
3 MICIN_JACK_R AL2 HCB1608KF-601T10 AR11 1K/F_4
1 2ALG_MAIN_IN_R ALG_LI_VR_L AR25
Rd 0/J_4
AC22 4.7U/10V/8 AC36 *10U/6.3V/X5R/0805
6
2 MICIN_JACK_L AL3 HCB1608KF-601T10 AR12 1K/F_4
1 2ALG_MAIN_IN_L
U23 Ra Rb Rc Rd Re Ca Cb Cc Cd Da La Ua
7 1 GND_MIC ALG_LI_VR_R
GNDAUD
4 ACON1
ALC269Q-VA 4
DFTJ06FR141 ALG_HP_L
phjk-2sj-s351-015-8p-v
AL1 AC5 AC6
ALC269Q-VB ALG_HP_R AC9
GMLB-160808-0600A-N8 *100P/50V/NPO *100P/50V/NPO AC25
GNDAUD 0.1U/25V/X7R 10U/6.3V/X5R/0805
AC19 ALG_VREF
AC20
GNDAUD GNDAUD GNDAUD 2.2U/16V/X5R
2.2U/16V/X5R AR14 AC17
PWR_AUD AC23
0_6 0.1U/25V/X7R 10U/6.3V/X5R/0805
HP U23
ALC269Q-VA6-GR
36
35
34
33
32
31
30
29
28
27
26
25
GNDAUD
HP-OUT-L
MIC1-VREFO-L
AVSS1
AVDD1
CBN
HP-OUT-R
MIC1-VREFO-R
CPVREF
MIC2-VREFO
VREF
CBP
CPVEE
8 5 ALG_HP_SENSE
4 GNDAUD
3 HPOUTR_CN AL5 HCB1608KF-601T10ALG_HEADPHONE_RPR206 47R/F_4 ALG_HP_R
6 10U/6.3V/X5R/0805 37 24
HPOUTL_CN AL4 HCB1608KF-601T10ALG_HEADPHONE_LPR205 47R/F_4 ALG_HP_L PWR_5VAMP AC18 AVSS2 LINE1-R
2
7 1 GND_HP GNDAUD AC24 0.1U/25V/X7R 38 23
AVDD2 LINE1-L
ACON2 39 22 ALG_MAIN_IN_R
DFTJ06FR141 PVDD1 MIC1-R
AL000269001
phjk-2sj-s351-015-8p-v AC26 AC27 ALG_SPKOUTL+ 40 21 ALG_MAIN_IN_L
AC10 AC11 AR8 AR9 4.7U/25V/X5R/0805 0.1U/25V/X7R SPK-L+ MIC1-L
AR5 100P/50V/NPO 100P/50V/NPO *1K/F/4 *1K/F/4 ALG_SPKOUTL- 41 20
SPK-L- MONO-OUT PR207
*short
42 19 20K/F/4 GNDAUD
PVSS1 JDREF
43 18 T54
GNDAUD GNDAUD GNDAUD GNDAUD GNDAUD PVSS2 Sense B
ALG_SPKOUTR- 44 17
SPK-R- MIC2-R
3 PWR_5VAMP 3
ALG_SPKOUTR+ 45 16
SPK-R+ MIC2-L
46 15
SPKR AC28 AC29 T55 EAPD#

PVDD2 LINE2-R
GPIO0/DMIC-DATA
47 14
SPDIFO2/EAPD LINE2-L
GPIO1/DMIC-CLK
4.7U/25V/X5R/0805 0.1U/25V/X7R
48 13 SENSE_A AR17 39.2K/F_4 ALG_HP_SENSE
SPDIFO Sense A
SDATA-OUT
ACON3
SDATA-IN
4 SPKOUTL-_CN AR1 0_4 ALG_SPKOUTL- 49
DVDD-IO
PCBEEP
4 PGND
RESET#
BIT-CLK
5 3 SPKOUTL+_CN AR2 0_4 ALG_SPKOUTL+
DVDD1
DVSS2
5 3
SYNC
6 2 SPKOUTR+_CN AR3 0_4 ALG_SPKOUTR+ AR16 20K/F_4 ALG_MIC_SENSE
PD#
6 2 SPKOUTR-_CN AR4 0_4 ALG_SPKOUTR-
1
1 A
TUNER-PWR AC3
AGND
10
11
12
DFHD04MR000 470P/50V/X7R
88263-040L-4P-L AC1
470P/50V/X7R AC4
DGND
470P/50V/X7R
GNDAUD
16 DMIC_DAT
AC2 AMP_PD# AR13
470P/50V/X7R AR19 short
A 16 DMIC_CLK
33/J_4
9 ACZ_SDOUT_R +5V_RUN PWR_5VAMP
AR26 0/J_4 AR15
9 ACZ_BIT_CLK_R
BEEP 9 ACZ_SDIN0
9 ACZ_SYNC_R
short
9 ACZ_RST#_R
AR18 18K/4 ALG_BEEPIN_B ALG_BEEP_IN
9 PCBEEP
AC31 ALG_BEEP_IN
0.1U/25V/X7R AC33
10P/50V/NPO
+3V_RUN AR20 0/J_4
2 2
AC13 AR10 AC30
100P/50V/NPO 1K/F_4 *0.01U/50V/X7R AC14 AC32
+3V_RUN*10P/50V/NPO *22P/50V/NPO
C368 AC35
0.1U/25V/X7R 10U/6.3V/X5R/0805
C235
0.1U/25V/X7R
VOLMUTE +3V_RUN
L21
R359
La
+3V_RUN *BLM18PG121SN
100K/J_4
+3V_RUN +5V_RUN Da D9 PWR_AUD
ACZ_RST#_R AD2 *BAS316 1SS355
U12
1 4
SHDN VO
5
AC15
5
AU2A AU3B EAPD# AD1 BAS316 1000P/50V/X7R

2 2
AMP_PD# GND
4
25 VOLMUTE#
VOLMUTE# AR21 560K_6 1 6 3 4 VOLMUTE#_Delay 1 AC7 3
VIN SET
5 Ra PR110
AU1 1000P/50V/X7R
C212 C216 G913-C 28K/F/4
3
7WZ14 7WZ14 TC7SH08FU(F) AC8 0.1u/10V_4 10U/6.3V_8 ADJ C228

AC34 1000P/50V/X7R
Ua 10U/6.3V_8
1U/10V_6
Ca Cb
AC12 PR111
1
1000P/50V/X7R
Cc 1
Rb 10K/F/4
AR22 *0_4 AC16
1000P/50V/X7R Vo=1.25*(1+Ra/Rb)
GNDAUD GNDAUD
GNDAUD

PROJECT : FH2
1A
CODEC (ALC269)
A B C D E
5 4 3 2 1
EC(KBC)
+3VPCU
Layout Note:
Place all capacitors close to IT8502.
C348
1000p/16V_4
C346
0.1u/10V_4
AVCC_EC L20
C339
HCB1608KF-121T20 +3VPCU
+3VPCU
25
C341 C347 C336 C342 C343 C340 0.1u/10V_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 +3VPCU
CRISIS SIO_SLP_S5# 8
SUSD#
3G_EN 22
MBCLK2 R370 *4.7K_4
D
MY16
MY17
23
23
A A MBDATA2 R369 *4.7K_4
D
Layout Note: HWPG MBCLK R335 6.8K_4
HWPG 4,27
MBDATA R334 6.8K_4
net "3VPCU" and "RTC_VCC" VOLMUTE# 24
SUSC# NBSWON# R117 10K_4
minimum trace width 12mils. SIO_SLP_S4# 8
MPWROK 8,16
+VCC_RTC ACIN R328 *10K/F_4
ICH_RSMRST# 8
BAT/AC# R333 *10K/F_4
VRON 29
+3V_RUN +3VPCU LID# R324 10K_4
MAINON 28,33
CLK_PCI_8502
SUSON 32,33
R116 C335
MAINON2 28,30,32,33
C119 *22_4 T57 T56 DNBSWON#
*10p/50V_4 0.1u/10V_4 MPWROK
SIO_SLP_S3#
C333 C345 C344
114
121
127
107
11
26
50
92
74
84
83
82
56
57
33
19
20
99
98
97
96
95
94
93
3
U21 IT8502 *39p/50V_4 *39p/50V_4 *39p/50V_4
10 110 MBCLK MBCLK2 R365 0/J_4
KSO16/GPC3
KSO17/GPC5
GINT/GPD5
L80HLAT/GPE0
L80LLAT/GPE7
GPG1/ID7
GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3
GPH2/ID2/BADDR1
GPH1/ID1/BADDR0
VCC
AVCC
GPE1/ISAD
VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
GPE3/ISCLK
GPE2/ISAS
GPH0/ID0/SHBM
9,22 LAD0 LAD0 SMCLK0/GPB3 MBCLK 34
9 111 MBDATA MBDATA 34 MBCLK R367 *0/J_4 MBCLK_ME MBCLK_ME 10
9,22 LAD1 LAD1 SMDAT0/GPB4
8 115 D16 DNBSWON# MBDATA2 R368 0/J_4 MBDATA_ME MBDATA_ME 10
9,22 LAD2 LAD2 SMCLK1/GPC1 DNBSWON# 8
7 116 1N4148WS T58 MBDATA R366 *0/J_4
9,22 LAD3 LAD3 SMDAT1/GPC2
SM BUS
LID# 22 117 MBCLK2
16 LID# LPCRST#/WUI4/GPD2 SMCLK2/GPF6
CLK_PCI_8502 13 118 MBDATA2
10 CLK_PCI_8502 LPCCLK SMDAT2/GPF7
9,22 LFRAME# 6
LFRAME#
85 RF_EN# 22
T67 PS2CLK0/GPF0
17 86 BAT_LED0# 23
LPCPD#/WUI6/GPE6 PS2DAT0/GPF1 BAT_LED1#
87 BAT_LED1# 23
D14 1N4148WS PS2CLK1/GPF2
11 SIO_A20GATE 126
GA20/GPB5 GPIO PS2DAT1/GPF3
88 PWRLED0# 23
9 IRQ_SERIRQ 5 89 TPCLK 23
SERIRQ PS2CLK2/GPF4
PS/2
D4 1N4148WS 15 90 TPDATA 23
11 SIO_EXT_SMI# ECSMI#/GPD4 PS2DAT2/GPF5
D5 1N4148WS 23 LPC
11 SIO_EXT_SCI# ECSCI#/GPD3
PCURST# 14
D6 1N4148WS WRST#
11 SIO_RCIN# 4
KBRST#/GPB6
16
23 LED_WLAN# PWUREQ#/GPC7 A
24 LED_3G# 23
PWM0/GPA0
25
C
33
21
S5_ON
BT_ON
BT_ON
119
123
GPC0/CRX
GPB2/CTX CIR
IT8502 PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
28
29
30
T59
AC_PRESENT_R
CAPSLED# 23
NUMLED# 23
AC_PRESENT 8
C
31 D13 1N4148WS
PWM5/GPA5 DDR3_CORL_EC 4
32 UI1
PWM6/GPA6
Note 1 : Since all GPIO belong to VSTBY power domain, and PWM PWM7/GPA7
34 CONTRAST 16
+3VPCU there are some special considerations below:
47 FANSIG 26
(1) If it is output to external VCC derived power domain TACH0/GPD6
48 BAT/AC#
circuit, this signal should be isolated by a diode such as TACH1/GPD7 BAT/AC# 34
R326 KBRST# and GA20. 120 SWI#_R SWI#
TMR0/WUI2/GPC4 SWI# 11
470K_6 124 D15 1N4148WS
(2) If it is input from external VCC derived power domain TMR1/WUI3/GPC6 DLID# 16
circuit, this external circuit must consider not to float the
item60
PCURST# GPIO input.
C332 PWRSW/GPE4
RI1#/WUI0/GPD0
125
18
NBSWON#
SIO_SLP_S3#
ACIN
SUSB#
NBSWON# 26 BIOS Write Protect
WAKE UP RI2#/WUI1/GPD1
21
0.1u/10V_4 Note 2 : +3VPCU
35 PCUHOLD#
(1) Each input pin should be driven or pulled. WUI5/GPE5
112 T60
(2) Each output-drain output pin should be pulled. RING#/PWRFAIL#/LPCRST#/GPB7
A
109 R355 R344
TXD/GPB1 LAN_PCIE_PWR_CTRL# 19
UART RXD/GPB0
108 T61 10K/J_4 10K/J_4
U22
66 8512_SCE# 1 8
ADC0/GPI0 TEMP_MBAT 34 CE# VDD
R336 10K/F_4 106 67 T62 8512_SCK R345 47/F_4 8512_SCK_R 6
8512_SCK FLRST#/WUI7/GPG0/TM ADC1/GPI1 8512_SI R346 47/F_4 8512_SI_R SCK C357
105 68 TEMP_ALERT# 11 5
T15 FLCLK/SCK ADC2/GPI2 8512_SO R354 15/J_4 8512_SO_R SI
104 69 ICM 34 2 7
8512_SO FLAD3/GPG6 ADC3/GPI3 SO HOLD# 0.1u/10V_4
103
FLAD2/SO FLASH ADC4/GPI4
70 SUS_PWR_ACK 8
8512_SI 102 71 MODEL_ID0 3 4
8512_SCE# FLAD1/SI ADC5/GPI5 MODEL_ID1 WP# VSS
101 72
R337 *100K/F_4 FLAD0/SCE# ADC6/GPI6 KBC_HL1 W25X16AVSSIG
100
FLFRAME#/GPG2 A/D D/A ADC7/GPI7
73
36 +3VPCU
B
23
23
MY0
MY1 37
38
KSO0/PD0
KSO1/PD1
2MB B
23 MY2 KSO2/PD2
23 MY3 39 76 MEFW_OVERRIDE 9
KSO3/PD3 DAC0/GPJ0 D24 1N4148WS R124
23 MY4 40
KSO4/PD4 KBMX DAC1/GPJ1
77 CPUFAN# 26
41 78 T63 *8.2K
23 MY5 KSO5/PD5 DAC2/GPJ2
23 MY6 42 79 T64
KSO6/PD6 DAC3/GPJ3
23 MY7 43 80 T65
KSO7/PD7 DAC4/GPJ4
23 MY8 44 81 T66
KSO8/ACK# DAC5/GPJ5
23 MY9 45
3
KSO9/BUSY
23 MY10 46
KSO10/PE
3
51 2 PMUX2 Q6 Q5
23 MY11
KSI3/SLIN#
KSO11/ERR# CK32KE
KSI1/AFD#
KSI0/STB#
KSI2/INIT#
52 CLOCK 128 PMUX1

23 MY12 KSO12/SLCT CK32K
VCORE
23 MY13 53 11 BIOS_WP# 2 2
KSO13
AVSS
54 PMUX2
KSI4
KSI5
KSI6
KSI7
VSS
VSS
VSS
VSS
VSS
VSS
23 MY14 KSO14
23 MY15 55
KSO15 PMUX1 *2N7002E
4 1
1
3 2 *DTC144EU
58
59
60
61
62
63
64
65
1
12
27
49
91
113
122
75
1
23 MX0 Y6
23 MX1 C337 32.768KHZ/10PPM C338
23 MX2
23 MX3 15p/50V_4 15p/50V_4
23 MX4
23 MX5
23 MX6 Layout Note:
23 MX7 C334 32.768kHz clock lines:
0.1u/10V_4
a. If possible, please avoid using any through-hole.
b. Please make the trace length short, and the trace width wide enough. Near ROOM DOOR
c. The spacing to the closest neighbor should be wide enough.
UI1 +3VPCU
PCB REV MODEL_ID0 MODEL_ID1 *1K R122 *100K R123
2
C LOW LOW *0.1U/10V_4 *0.1U/10V_4
+3VPCU +3VPCU C129 C130

D HIGH LOW
1
+3VPCU
A E LOW HIGH +3V_RUN
A
F HIGH HIGH
1
R342 R341 R118

*10K/F_4 *10K/F_4 *100K
NBSWON# 2 Q4 R340
DTA124EUA 10K/J_4
A MODEL_ID0 KBC_HL1
MODEL_ID1 T53
3
34 ACIN ACIN D8 PCUHOLD# CRISIS 2 1

2
*0.1U/10V_4
R339 R338
SIO_SLP_S3# D7
1SS355
R121
C123 PAD
R352
*10K/F_4 *10K/F_4 8 SIO_SLP_S3#
1
1SS355
100K/J_4
0_4 PROJECT : FH2
1A
EC_ITE8502
5 4 3 2 1
1 2 3 4 5 6 7 8
NEW CARD
U26 W83L351YG
A
SW BOARD CON
26
1 STBY# SHDN# 20
+3V_RUN 100mil 2 19 R428 2K +3VSUS CON2 C375 0.1U

3.3VIN OC# 88501-0401 1 2
A A
PWR_3.3VPEC 100mil 3 3.3VOUT RCLKEN 18
1 +5V_RUN
C392 4 17 30mil +3VSUS
3.3VIN AUXIN 2 NBSWON#
3 NBSWON# 25
0.1U/10V 5 16
3.3VOUT NC 4 C376 0.1U
6 15 30mil PWR_3.3VPECAUX DFFC04FR018 1 2
4,10,18,19,22 PLTRST# SYSRST# AUXOUT 88502-040n-4p-l
7 GND 1.5VIN 14
EXC_RST# 8 13
PERST# 1.5VOUT
CPUSB# 9 12 60mil +1.5V_RUN
CPUSB# 1.5VIN
CPPE# 10 11 60mil PWR_1.5VPEC
TML
CPPE# 1.5VOUT
QFN20-4X4-5-21P C394
CPU FAN CTRL
21
AL083351000 C393
0.1U/10V
0.1U/10V
B B
PWR_3.3VPECAUX
+5V_RUN
CN8 130805-1 FANPWR = 1.6*VSET
GND_1 1 A
2
USB- 2 USBP10- 10
Q22 U2
VSET >= 1V, Enable FAN_CONN.
USB+ 3 USBP10+ 10
4 CPUSB# DTC144EUEUA-7-F 2 3 +5V_FAN
CPUSB# VIN VO 1
RSV_0 5 GND 5 2
RSV_1 6 1 3 1 FON# GND 6 3
1
7 SMB_CLK_EXC RC0402 R397 4.7K 7 C25 C24
SMBCLK SMB_DATA_EXC GND
8 PWR_3.3VPECAUX 4 8 CN4
SMBDATA RC0402 R398 4.7K 25 CPUFAN# VSET GND 10u/10V_8 0.1U/25V/X7R 53398-0310-3P-L
9
2
+1.5V PWR_1.5VPEC APL5606KI-TRG DFWF03MS091
+1.5V 10
11 PWAKE# RC0402 R378 *10
WAKE# PCIE_WAKE# 8,19
12 PWR_3.3VPECAUX AL005606000
+3.3VAUX EXC_RST# +3VPCU +5V_RUN
PERST# 13
14 PWR_3.3VPEC
+3.3V_1
+3.3V_2 15
2
16 NEWCARD1CLK_REQ#
CLKREQ# NEWCARD1CLK_REQ# 10
17 CPPE# R205 R204
CPPE# 100K/J_4 10K
REFCLK- 18 CLK_PCIE_MINI1N 10
C
REFCLK+ 19 CLK_PCIE_MINI1P 10 C
20 25 FANSIG
1
GND_2
PERn0 21 PCIE_RXN5 10
3
PERp0 22 PCIE_RXP5 10
23 Q11
GND_3 2N7002E-LF
PETn0 24 PCIE_TXN5 10
25 PCIE_TXP5 10 2
NC4
NC3
NC2
NC1
PETp0
GND_4 26
C273
30
29
28
27
1
NCARD-131851-A-26P-L 2200p/50V_6
DFHD26MR014
PWR_3.3VPECAUX PWR_3.3VPEC PWR_1.5VPEC

1
C399 C400 C401 C402 C403 C404 C405 C406 C407

*10U/6.3V 0.1U/10V *4.7U/10V *10U/6.3V 10U/6.3V 0.1U/10V 10U/6.3V *10U/6.3V 0.1U/10V
D D
2

PROJECT : FH2
1A
FAN/SW/NEWCARD
1 2 3 4 5 6 7 8
5 4 3 2 1
DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW

Place these CAPs
close to FETs
+VIN
Place these CAPs
close to FETs
27
PD4
PR90 PR91
1 2
8206ON_LDO
1K/F_4 150K/F_4 + PC182 + PC181
2
D PC80 PC77 PC79 PC78 PC82 UDZ5V6B-7-F *15U/25V_R6 *15U/25V PC83 PC84 PC75 PC76 D
2200P/50V_4
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
+5V_VCC1
*4.7U/25V_8
1
2
PC67 +3VPCU +/- 5%
1
0.1U/25V_4
Countinue current:5.1A
1
PC69
1U/6.3V_4
Peak current:6A
2
+5VPCU +/- 5%
OCP minimum 7.5A
Countinue current:4.9A +5VALW
+2VREF +3VPCU
Peak current :8A
1
PC68
5
*.1U/10V_4
OCP minimum :10A PC71 PQ17
2
PC70 AON7410
8
7
6
5
4.7U/6.3V_6 +5V_VCC1
+5VPCU 0.1U/10V_4 4
8
7
6
5
4
3
2
1
1
4
PR93 PL8
LDOREFIN
LDO
IN
N.C1
ONLDO
VCC
TON
REF
3
2
1
0_4 2.2UH/8A
PQ20 +3VPCU
AO4496
2
PR95
2
9 32 200K/F_4
BYP REFIN2
5
PL10 10 31 1 2
1
2
3
OUT1 ILIM2
2
2.2UH/12A PR98 5V_FB1 11 30 3V_FB2 PR196
FB1 OUT2
330u/6.3V_6X5.7
1 2 12 PU6 29 *2.2_8
309K/F_4 PGOOD1 ILIM1 RT8206B SKIP PGOOD1 PR190 PC185
13 28
1
PGOOD1 PGOOD2
2
8
7
6
5
C 14 27 4 0_4 + C
ON1 ON2
2
5V_DH 15 26 3V_DH
1
DH1 DH2
0.1U/10V_4
PR197 5V_LX 16 25 3V_LX PC180 PC186
LX1 LX2
*1500P/50V_4
PC92 PR191 *2.2_8 4 37
3
2
1
PC188 + *0_4 PAD1
36
PAD10
1
PAD2
AGND
PGND
0.1U/10V_4
PAD5
PAD6
PAD7
PAD8
PAD9
BST1
BST2
39
N.C2
VDD
1
PAD3
1
2
DL1
DL2
330u/6.3V_6X5.7
PC90 40
PAD4
2
10uF PC183 PQ21 PC177 PQ18 PR192
2
*1500P/50V_4
0.1U/25V_4
AO4712 PC176 AON7702 *0_4
2
38
35
34
33
17
18
19
20
21
22
23
24
42
41
0.1U/25V_4
PR189
1
2
3
1
0_4
1
PR193
1
PR194
1 2 5V_BST1 3V_BST2 1 2
2_6 2_6
5V_DL 3V_DL
1 +5VALW
PC72
PD6 3 2 1
BAV99
1
+10VALW 2 0.01U/25V_4
PC74
1U/6.3V_4
2
2
1
PC65 PC66
0.1U/25V_4
PD8 PD5 3 1 2
1
+5VALW 1SS355 BAV99

1 2 2 0.01U/25V_4
B PR89 B
PGOOD1 2 1 51427PG
PR99
1 2 +15VALW
0_4/S 100K/F_4
1
PC73 PC64
2.2U/6.3V_6 1U/25V_6
2
PR100 0R_4 EN0

(4) SYS_SHDN#
EMI
+VIN
+3VPCU
2
C415
2
2
C418 C419 C413 C414 C416 C417
PU5 *0.1U/25V_6
1
5
*0.1U/25V_6 *0.1U/25V_6 *0.1U/25V_6 *0.1U/25V_6 *0.1U/25V_6 *0.1U/25V_6

1
1
(31,32) 51427PG 2
4 HWPG
HWPG (4,25)
(28,30) HWPG_1.05V 1
A A
3
MC74VHC1G08DFT2G

PROJECT : FH1
1A
+5V/+3V (RT8206B)
5 4 3 2 1
5 4 3 2 1
28
D D
+VIN
+5V_S5 +1.05V _PCH+/- 5%
PD14
PR151
2 1 RTBST Countinue current:6.541A
RTVDD
10_6
PC139 Peak current:7.5A
PC134 RB501V-40 PC120 PC118 PC116
1U/6.3V_4
OCP minimum 9A
1U/6.3V_4
B
2200P/50V_4
.1U/25V_4
4.7U/25V_8
5
6
7
8
+3V_S5 +1.05V_PCH
RTBST_1 PR136 PC130
PR55 0R_4
.1U/25V_4
10_6
(27,30) HWPG_1.05V PR137 4
2
13
1M_4
9
PR156 PU7 PR179
10K/F_4 12 RTDH PQ52 RL3720WT-R001
VDD
VDDP
BST
RTTON DH AO4496
16 TON
C C
HWPG_S2A 4 11 RTLX PL4
3
2
1
1
PGOOD LX 1.5UH/SIL-1040-10A
RT8204C PR148
PR157 0_4 HWPG_S2B 5 10 RTILIM
LPGOOD ILIM 10K/F_4
1
MAINON2 PR138 10_4 RTEN 15 8 RTDL
(25,30,32,33) MAINON2 EN/DEM DL
5
6
7
8
VOUT
+ + PC153
LDRI
LEN
2
LFB
17 3 PC54 PC160 PC163 PC29
PR139 PAD FB
.1U/10V_4
10U/6.3V_8
10U/6.3V_8
RTFB
2
*1M/F_4 4 PR49
14
1
2.2_8
PQ35
1
AO4712 *330U_2.5V_7343 390u/2.5V_R6_10
PR51 PR50
PC32
4700P/50V_4
PR141 4.02K/F_4 10K/F_4
3
2
1
MAINON RTLEN
(25,33) MAINON PC31
10_4
PR140 *100P/50V_4
*1M/F_4
+3V_S5
Vo=0.75(R1+R2)/R2
RTLDRI
+1.8V_RUN Volt +/- 5%
Countinue current:1A
5
6
7
8
PC150 PC148
.1U/10V_4
*10U/6.3V_8
B Peak current:2A B
PR160 4 OCP minimum 3A

100/F_4
PC143
33P/50V_4
PQ43
AO4496
+1.8V_RUN
3
2
1
PC147
.033U/10V_4
PC142 PR158
14K/F_4
*39P/50V_4 PC157 PC154 PC151
10U/6.3V_8
.1U/10V_4
*10U/6.3V_8
RTLFB
Vo=0.75(R1+R2)/R2 PR159
10K/F_4
A A

PROJECT : FH1
1A
+1.05V/+1.8V (RT8204C)
5 4 3 2 1
5 4 3 2 1
+VIN
29
OSRSEL = GND 110mV
OSRSEL = REF 145\mV
OSRSEL = 3.3V 190\mV

+3V_S5 +3V_S5
1
OSRSEL = 5V OFF
1
PC141 PC38 PC37 + PC152 + PC137 PC34 PC35
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
100U/25V L-F
100U/25V L-F
2
2
PR167 PR162
1.91K/F_4 1.91K/F_4
D PQ4 D
5
(4,8) IMVP_PWRGD RJK03B9
D
4
G Countinue current:48A
(3) VR_PWRGD_CLKEN# +3V_S5 S
+VCC_CORE
(25) VRON
1
2
3
PL3
51621_5VFILT
0.36UH PCMC104T-R36MN 30A
PC189 1 2
2.2U/6.3V_6 AGND_51621
2
AGND_51621 1 2 51621_5VFILT 3 4
PQ3 PQ41 PR48
5
RJK03D3 RJK03D3 *2.2_8
249K_0402_1%
51621_REF D D
1
16.2K/F_4
G G
1
PR216
PR219
PR215 5.9K/F_4 4 4 + +
S S PC62 PC61 PC165
0_4
*0_4
PR217
PR218
PC27
1
2
3
1
2
3
2
PC190 33P/50V_4
0.1U/10V_4
330U_2.5V_7343
330U_2.5V_7343
2
2 1 51621_DROOP
*1500P/50V_4
+5V_S5
PR221 0_4
PR220 0_4
PR222
51621_ISLEW
AGND_51621 1 2 511K/F_4
PC191
0.22U/6.3V_6 +5V_S5
PR210
PR223
2
28K/F_4 100K_6 NTC
*RB501V-40
41
40
39
38
37
36
35
34
33
32
31
PD15
1 2
TONSEL
CLK_EN#
OSRSEL
TRIPSEL
PAD
VR_ON
PGOOD
VREF
V5FILT
ISLEW
DROOP
PC194
0.033U/16V_4
470F_4
470F_4
1 30 PC52
MODE DRVH2
PR224
PR228
AGND_51621 PR54 0.22U/25V_6
C 2 29 1 2 C
GND VBST2 +VIN
2_6
3 28
PC195 33P/50V_4 51621_CSP2 CSP2 LL2
AGND_51621 2 1
4 27 PC197
PC196 33P/50V_4 51621_CSN2 CSN2 DRVL2 51621_CSN2
AGND_51621 2 1 1 2
5 CSN1 V5IN 26 +5V_S5
AGND_51621 PC192 33P/50V_4 2 1 51621_CSN1 1 2 100p/25V_4
1
6 PU4 25
PC193 33P/50V_4 51621_CSP1 CSP1 TPS51621RHAR_QFN40_6X6 PGND PC42 4.7U/6.3V_6 PC49 PC47 PC48 PC46 PC50 51621_CSP2
AGND_51621 2 1
7 24
2
100_4 PR227 0_4 GNDSNS DRVL1
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
AGND_51621 PR226 8 23 PC36
PR225 0_4 VSNS LL1 0.22U/25V_6
(6) VSSSENSE PR68
51621_THEM 9 22 1 2
THERM VBST1
2_6
DPRSLPVR
(6) VCCSENSE 10 21
PR209 VR_VTT# DRVH1 PQ45
5
IMON
10K_6 NTC RJK03B9

VID6
VID5
VID4
VID3
VID2
VID1
VID0
PSI#
+VCC_CORE D
*RB501V-40
G
PR229 100_4 4
11
12
13
14
15
16
17
18
19
20
PD16
1
2
3
PR230
5.1k_4
PL7 +VCC_CORE
PROC_DPRSLPVR
0.36UH PCMC104T-R36MN 30A

1 2
+5V_S5 PQ7 PQ44 3 4
2
AGND_51621 RJK03D3 RJK03D3
0_4
D D PR79
1
G G *2.2_8
(6) I_MON + +
16.2K/F_4
4 4
0.22U/6.3V_6
S S
PR231
PR233
(4) H_PROCHOT#_D PC59 PC58 PC53
1
2
PC198
PR232
11.8K_4
1
2
3
1
2
3
2
0_4
PC60
0.1U/10V_4
330U_2.5V_7343
330U_2.5V_7343
B B
(6)
(6)
(6)
(6)
(6)
(6)
(6)
VID6
VID5
VID4
VID3
VID2
VID1
VID0
1
*1500P/50V_4
68_4
PR236
PR235
PR234
511K/F_4
PR237
PR208
0_4
(6)
(6)H_PSI#
+1.05V_VTT PR238
28K/F_4 100K_6 NTC
1 2
VSSSENSE
PC199
(6)
0.033U/16V_4
DPRSLPVR
AGND_51621
470F_4
470F_4
PR239
PR240
PC200
1 2 51621_CSN1
100p/25V_4
51621_CSP1
VID
VID5=1
A
VID4=0 A
VID3=0

PROJECT : FH1
1A
CPU Core (TPS51621)
5 4 3 2 1
5 4 3 2 1
PQ51 *DTC144EUA 30
3
PR213
*1K/F_4
2 H_VTTVID1 6
D D
PR214
1
PR212 *100K/F_4
PR211
*820K/F_4 *100K/F_4
PR182
*0_4
VTT_SENSE- VSS_SENSE_VTT 6
PR149
OE_1.1
MAINON2 25,28,31,32
0_4
PR166
PR163
PR161
PC140
1
2
PC132
+1.05V_VTT +/- 5%
.01U/16V_4
2
1
44.2K/F_4
6.49K/F_4
38.3K/F_4
2200P/50V_4
Countinue current:18.2A
VDES_1.1 2
R_SEL_1.1
C Peak current:20A C
BIAS_1.1
OCP minimum 22A
+1.05V_VTT
A1
A2
A3
A5
PR165 PU8
*0_4/S +1.05V_VTT
BIAS
VDES
OE
R_SEL
PR168
1 2 IRIPL_1.1 B2
40.2K/F_4 IRIPL
B4 D1 PL6
TEMP VX1 0.22uH_MPL73-0R22
VX2 D2
PR150 0_4 STAT_1.1 B5 VT357 D3 LX_1.1 1 2
27,28 HWPG_1.05V STAT VX3
D4 PC167 PC166
+5VPCU VX4 PR183 0_4 +1.05V_VTT
*22U/6.3V/X5R_8
*22U/6.3V/X5R_8
E5 VDD4 VX5 D5
C5 VDD3
C4 A4 PR184 *0_4 VTT_SENSE 6
+5VPCU VDD2 VSENSE+
E4 VDD1
AGND
GND1
GND2
GND3
GND4
GND5
GND6
AVDD
PC159 PC162 PC161 PC158 PC164
6800P/25V_4
.1U/10V_4
PR181
22U/6.3V/X5R_8
*22U/6.3V/X5R_8
*22U/6.3V/X5R_8
PC138 PC136 PC145 PC135 PC133 VTT_SENSE-
B 0_4 B
B3
B1
C1
C2
C3
E1
E2
E3
1U/6.3V_4
.1U/10V_4
.1U/10V_4
22U/6.3V/X5R_8
22U/6.3V/X5R_8
PR154
10/J_6
AVDD_1.1
PC144
.22U/6.3V_4
A A

PROJECT : FH1A
1A
+1.05V_VTT (VT358)
5 4 3 2 1
5 4 3 2 1
31
PR128 8152VCCGFX +5V_S5
D PR131 D
0_4/S
+VIN
10_6
+VIN
PC107 PC18
PR2 0_4 1U/6.3V_4 1U/6.3V_4
(6) VGAU_VID0
PR40
PR5 0_4
19
(6) VGAU_VID1 10_6 Countinue current:22A
7
PR22 0_4 PR130 120K/F_4 PC19 PC117 PC125 PC121
VCC
PVDD
(6) VGAU_VID2
2200P/50V_4
8152TONGFX PQ36
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
TON 17 OCP minimum:26A
560P/50V_4 PC202 RJK0392DPA
5
PR32 0_4 GFXVR_VID_0_R 31 PC112
(6) VGAU_VID3 VID0 0.1U/25V_4 D
560P/50V_4 PC203 GFXVR_VID_1_R 30 +VCC_GFX_CORE
VID1 G
23 8152UGATEGFX 4
PR33 0_4 GFXVR_VID_2_R UGATE S
(6) VGAU_VID4 29 VID2
24 8152BOOTGFX
1 2 PL5
1
2
3
560P/50V_4 PC204 GFXVR_VID_3_R BOOT 0.56U25A(PCMC104T-R56MN)
28 VID3 PR129 2_6 PC115
PR36 0_4 GFXVR_VID_4_R 27
(6) VGAU_VID5 VID4
2
0.1U/25V_4
1
560P/50V_4 PC201 GFXVR_VID_5_R 26 PU2 22 8152PHASEGFX D D PR147
VID5 PHASE 2.2_8 PR145 + + +
G G
PR39 0_4 GFXVR_VID_6_R 25 RT8152C 20 8152LGATEGFX 4 4 PC146 PC149 PC155 PC39
(6) VGAU_VID6 VID6 LGATE S S 4.12K/F_4
330U_2.5V_7343
330U_2.5V_7343
0.1U/10V_4
*330U_2.5V_7343
1
2
PQ40 PQ37
1
2
3
1
2
3
RJK03D3 RJK03D3 PC127 PC17
4700P/50V_4
C PR120 0_4 8152DPRSLPVRGFX 3 C
(6) VGAU_DPRSLPVR DPRSLPVR 0.1U/25V_4
(6) VGA_ON PR119 0_4 GFXVR_EN_R 4 VRON PR37
6 16 8152ISENGFX *6.65K/F_4
PR121 10K/F_4 CLKEN ISEN +VCC_GFX_CORE
+3VPCU ISEN_N 15
PC14
(27,32) 51427PG PR118 0_4 8152PGOODGFX 5 0.1U/25V_4
PGOOD PC7 *56p/50V_4
+1.05V_PCH PR1 10K/F_4 8152VRTTGFX 32 VRTT
PR124
11 8152CMSETGFX
8152NTCGFX CMSET
1 NTC 12K/F_4
12 8152VSENGFX
VSEN PC12 PC9
PR117 PR116 PR122
8152VCCGFX 8152OCSETGFX 2 13 8152FBGFX 56PF/50V_4
OCSET FB
10K/F_4 2.2K/F_4 4.64K/F_4
*.1U/25V_4
PR115
PR146 PR31 PR21 PR125
6.98K/F_4 +VCC_GFX_CORE
10K/F_NTC_0603 10K/F_4 14K/F_4 10_4
PC10 82PF/50V_4
B
VGAU_VCCSENSE (6)
PR144
10K/F_NTC_0603 VGAU_VSSSENSE (6)
14 8152COMPGFX PR127
COMP 48.7K/F_4
PR3
RGND 9
B 10_4 B
PC106
8 8152SOFTGFX 1 2 +1.05V_VTT
SOFT
5600p/25V_4
10 8152CMGFX VGAU_IMON (6)
CM
1
PR123 PR24 PR25 PR26 PR30 PR29 PR27 PR28 PR114

PAD10
1
PGND
86.6K/F_4 *1K *1K *1K *1K *1K *1K *1K *1K

PAD1
PAD2
PAD3
PAD4
PAD5
PAD6
PAD7
PAD8
PAD9
GND
PC1
0.01U/25V_4
2
GFXVR_VID_0_R
18
33
35
34
36
37
38
39
40
41
42
21
GFXVR_VID_1_R
GFXVR_VID_2_R
GFXVR_VID_3_R
GFXVR_VID_4_R
GFXVR_VID_5_R
GFXVR_VID_6_R
GFXVR_EN_R
PR6 PR7 PR8 PR9 PR10 PR11 PR12 PR113 PC105

*1K *1K *1K *1K *1K *1K *1K *1K *1000P/50V
A A

PROJECT : FH1
1A
UMA GPU CORE (RT8152C)
5 4 3 2 1
1 2 3 4 5
32
A A
+VIN
+5V_S5 +1.5V_SUS +/- 5%

+1.5V_SUS
Countinue current:4A
25
Peak current:8A
2
( VTT/1A ) PU9
1 24 PD9 PC85 PC87 PC88 PC86
OCP minimum 12A
GND
+0.75V_DDR_VTT VTTGND VTT
2200P/50V_4
PC179 *RB501V-40 PQ42
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
5
*10U/6.3V_8 RJK03B9
2 23 D +1.5V_SUS
1
VTTSNS VLDOIN
G
1
PC178 4
PC175 PC174 1116VBST PR195 S
3 GND VBST 22 1 2
+1.5V_SUS
10U/6.3V_8
10U/6.3V_8
2_6
2
1
2
3
PR97 0.1U/25V_4
2 1 4 21 1116DRVH
MODE DRVH PL9
*0_4/S
CV-10L0MZ01/DC-10F0M102
+DDR_VTTREF 5 20 1116LL
VTTREF LL
1
1
B ( 20mA ) B
1
PC172 6 19 1116DRVL PQ50 PR101 + PC184 PC170
COMP DRVL
1
*2.2_8 + PC205 PR188 PC168
0.1U/10V_4
0.1U/10V_4
2
1
RJK03D3 D 10K/F_4
B
2
390u/2.5V_R6_10
*100P/50V_4
7 18 G
1
NC PGND
4
2
S
2
8 17 PC81 *330U_2.5V_7343
1
2
3
VDDQSNS CS_GND
*1500P/50V_4
V5FILT PR185 1116VDDQSET 1116CS PR96
9 VDDQSET CS 16
*0_4 +5V_S5
7.5k/F_4
1
PC173
10 15 2 1 PR187
S3 V5IN 10K/F_4
1U/6.3V_4
(25,33) SUSON V5FILT PR94
11 14
2
S5 V5FILT
10_6
1
1116TONSET
12 NC 13 PC171
PGOOD 51427PG (27,31)
1U/6.3V_4
2
PD7 RT8207GQW
1 2 B
*1SS355 PR186
619K/F_4
MAINON2 PR92
0_4
+VIN
C C
1
PC169
*0.1U/10V_4
2
MAINON2
(25,28,30,33) MAINON2
D D

PROJECT : FH1
1A
DDR3 (RT8207)
1 2 3 4 5
5 4 3 2 1
+VIN +5V_RUN +3V_RUN +1.8V_RUN +1.5V_RUN +15VALW +5VPCU

MAIND +3VPCU PQ22
33
AOL1448
3
3.65A
S
PR82 PR104 +1.5V_SUS 5 2 +1.5V_RUN
5
6
7
8
560K_4 PC103 442K_4 1
5
6
7
8
D D
PC91
.1U/10V_4
G
PR62 PR81 PR69 PR80 PR77
.1U/10V_4
1M_4 22_8 22_8 22_8 22_8 MAIND 4
4
MAIND-3VRUN 4
PR103
1
PQ10 PQ6 PQ9 PQ8 PQ11 PQ31 3.392A 5.876A MAIND
1
DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 PC63 AO4496 PQ23
*2200P/50V_4
+5V_RUN PC93 AO4496 +3V_RUN 680_4
*2200P/50V_4
2 2 2 2 2 PC89
3
2
1
3
2
1
330P/50V_4
3
PC104
1
.1U/10V_4 PC94
2 PR65 .1U/10V_4
25,28 MAINON 1M_4
+5VPCU
PQ5
1
DTC144EUA
1
2
5
6
PQ32
+VIN +1.05V_PCH +1.05V_VTT +0.75V_DDR_VTT 3 ME3424
+VIN +5V_S5 +3V_S5 +15VALW
4
+5V_S5
C +3VPCU C
1mA
1
PR84 PR85 PR87 PR86 PR204
1M_4 22_8 22_8 22_8 560K_4 PC102
1
2
5
6
.1U/10V_4
2
PR202 PR200 PR201 PR112 442K_4 PQ25
3
3
PQ13 PQ15 PQ14 1M_4 22_8 22_8 S5_OND 3 ME3424D
DMN601K-7 DMN601K-7 DMN601K-7 S5_OND
3
2 2 2 PQ47 PQ48 PQ46 +3V_S5
4
DMN601K-7 DMN601K-7 DMN601K-7 PC187 0.37A
1
2 2 2 PC98
3
*2200P/50V_4
*2200P/50V_4
1
1
2 PR88 PC97
3
25,28,30,32 MAINON2 1M_4
.1U/10V_4
1
2
PQ12 2 PR199
25 S5_ON
1
DTC144EUA 1M_4
S5_ONG
PQ49
1
DTC144EUA
B +5VPCU B
+VIN +5VSUS +3VSUS +15VALW
+3VPCU
PR108 PR106 PR107 PR105
5
6
7
8
1M_4 22_8 22_8 1M_4
SUSD 4
1
2
5
6
PC100
3
PQ26 PQ27 PQ29 PQ30 .1U/10V_4

DMN601K-7 DMN601K-7 DMN601K-7 PQ24 SUSD 3 ME3424D
1
AO4496
3
2 2 2
PC95
2
3
2
1
4
1
2 PR109 2200P/50V_4
25,32 SUSON 1M_4
PC99 +3VSUS
1
2
PQ28 2200P/50V_4 0.5A
1
DTC144EUA 1.5A
SUSON_G
+5VSUS
PC101
.1U/10V_4
A PC96 A
.1U/10V_4

PROJECT : FH2
1A
DISCHARGE/3VS5/5VS5/LAN
5 4 3 2 1
1 2 3 4 5
VA
PD12
SSM34PT 40V
PR23
0.01_3720
PQ33
FDS6675BZ +VIN
PQ34
FDS6675BZ
34
1 2 VA2 1 8 1 8 BAT-V
2 7 2 7
A A
3 6 3 6
PC15 PR35 5 5
PC113 PC114 PR134
0.1u/50V_6 220K/F_6
PD11
4
*0.1u/50V_6 2200p/50V_6 33K_6
1
SSM34PT 40V
PL2 PD3
HI0805R800R-10/5A/80ohm_8 1 6 PR142
P4SMAJ20A
PA1 PD10 10K_6
VA PR38
2
PJ1 2 5
1N4148WS 220K/F_6
1 3 4
3
2 PR132
3 PQ1
2200p/50V_6
*0.1u/50V_6
10K_4
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
4
PC129
IMD2AT108
PC128
PC122
PC123
PC126
VA2 2
+3VPCU (25) BAT/AC#
DFHS04FR741
87501-0400-4P-L PQ38
CSIP_1 2N7002K
1
+VIN
PR34
PR19 PR20
10K/F_6 10/F_6 10/F_6 PC119 1U/6.3V_4
1 2
PC11
ACIN PC30 PC28 PC131
(25) ACIN 0.1u/50V_6
PR133 2200p/50V_6 *0.1u/50V_6 10u/25V_1206
4.7_6
PC124 1U/6.3V_4
B 88731_VDDP B
1 2
+3VPCU CSIP CSIN
33
32
31
30
28
27
26
21
PC13
1
PD13
0.1u/50V_6
CSSP
VDDP
NC
GND
GND
GND
GND
CSSN
VCC
RB500V-40
PR41 PC23
2.7_6
0.1u/50V_8 PQ2 PR42
(25) MBDATA 11 25
VDDSMB BOOT 0.01_3720
1 D1 G1 8 PL1
9 24 88731_DH 6.8uH/4.5A_7X7X3
(25) MBCLK SDA UGATE BAT-V
2 D1 S1/D2 7 1 2
10 23 88731_LX 3 G2 6
SCL PHASE
2
4 S2 5 PR44
13 20 88731_DL 2.2/F_6 PC26
ACOK LGATE 0.01u/50V_6
PC111 SI4914BDY-T1-E3
1
PC21
PR126 0.1u/50V_6
19 *0.001U/_4
PGND PC25
49.9/F_6
DCIN DCIN 22 2200p/50V_6 PC16
DCIN 2200p/50V_6
PR46
PR14 PC20 PC22
10/F_6
82.5K/F_6 18 CSOP CSOP_1 10u/25V_1206 10u/25V_1206
PU3 CSOP
2
ACIN ISL88731A PC24
0.1u/50V_6
PC110 3
PR4 VREF CSON BAT-V
17
C CSON C
2 1 22K/F_6 PR45
4 CSOP_1
0.1u/50V_6 ICOMP 10/F_6
PJP1 NC
16
1 MBAT+ BAT-V 5 PR43 BAT-V

BATT NC
Short_4
2 15 BAT-V
VS VBF
6 PR47
VCOMP
3 29
SWT+ GND 100_4
GND
*0.01u/50V_6
0.01u/50V_6
ICM
NC
NC
4 TEMP_MBAT_C
*1u/16V_6
POWER TEMP_MBAT (25)

PC3
5
7
14
12
PC108
PC109
CLOCK
PR13
6
DATA 2.21K/F_6
7
SC#T- PC8
PC6 ICM (25)
8 +3VPCU PC2
GND 47p/50V_6 47p/50V_6
0.01u/50V_6
2
PR15 PR16 PR18 PC4

DFAD08MR001 100K/F_6
BAT-1746498-2-8P-L 100_4 100_4 3300p/50V_4
1
MBCLK
MBDATA
PU1
*CM1293A-04SO
1
D MBCLK D
1 6
1
PD2 PD1 CH1 CH4

PR17 PC5
ZD5.6V ZD5.6V 2 5
100K/F_6 VN VP +3VPCU
0.01u/25V_4
2
TEMP_MBAT_C 3 4 MBDATA
2
CH2 CH3

PROJECT : FH1
1A
CHARGER (ISL88731)
1 2 3 4 5
5 4 3 2 1
35
CK505 CLK_CPU_BCLKP CPU
CLKOUT_BCLK0_N/CLKOUT_PCIE8N BCLK
D
SLG8SP585VTR CLKOUT_BCLK0_P/CLKOUT_PCIE8P
133MHz BCLK BCLK# D
133MHz BCLK CLK_CPU_BCLKN

PLL1
CLKOUT_DMI_P
CLK_PCIE_3GPLLP PEG_CLK
100MHz DMI
CLKOUT_DMI_N 100MHz DMI PEG_CLK#
PLL2 CLK_PCIE_3GPLLN
100MHz SATA PCH
PLL3 CLKOUT_DP_N/CLKOUT_BCLK1_N CLK_DREFSSCLKP DPLL_REF_SSCLK
120MHz DP DPLL_REF_SSCLK#
96MHz DOT CLKOUT_DP_P/CLKOUT_BCLK1_P CLK_DREFSSCLKN
PLL4
CLKOUT_PCIE6P
CLKOUT_PCIE6P
100MHz PCIE
REFCLK_P LAN
CLKOUT_PCIE6N REFCLK_N
CLKOUT_PCIE6N
C C
14.318MHz Ref
CLKOUT_PCIE2P CLK_PCIE_MINI1P MiniWLAN

100MHz PCIE REFCLK+
REFCLK-
CLKOUT_PCIE2N CLK_PCIE_MINI1N
14.318
Xtal DEBUG CARD
CLK_LPC_DEBUG RESERVED
CLKOUT_PCI0 33MHz PCI
ITE EC8502
CLKOUT_PCI2
CLK_PCI_8502 LPCCLK
B
33MHz PCI B
CLK_48M_CR Card Reader

CLKOUTFLEX3 PE_REFCLKP
33MHz PCI
CLK_PCI_FB
CLKOUT_PCI3 33MHz PCI
CLKIN_PCIL00PBACK
Buffered A
mode
PROJECT : FH2
1A
Clock Distribution
5 4 3 2 1
5 4 3 2 1
Power Tree Table PWM +5VPCU +-5%

AC/DC Insert enable
MOS SW
P.33
+5V_S5 +-5%
S5_OND enable
36
AC System
Charger +5V_RUN +-5%
RT8206B MAIND enable
ISL88731A
D MOS SW D
DC P.34 P.33
+3VPCU +-5%
AC/DC Insert enable
+5VSUS +-5%
SUSD enable
P.27 MOS SW
P.33
+3V_S5 +-5%
+1.05V_VTT +-2% MOS SW S5_OND enable
PWM MAINON2 enable
VIN VT358 P.33
P.30 MAX 18.1A +3VSUS +-5%
SUSD enable
C
MOS SW C
+1.05V_PCH +-5% P.33

PWM MAINON2 enable
RT8204C +3V_RUN +-5%
MAX 6.5A
MOS SW MAIND enable
P.28
P.33
+1.8V_RUN +-5%
+VCC_GFX_CORE LDO
PWM (RT8204C) MAINON enable
RT8152C VGAON enable
P.28
P.31 MAX 22A
VCC_CORE
± [VID*1.5%] VCC > 0.7500V
± [11.5mV] 0.5000V < VCC =0.7500V
PWM
ADP3212 VRON enable
B B
P.29 MAX 48A
+0.75V_DDR_VTT
MAINON2 enable
PWM
+DDR_VTTREF
RT8207GQW SUSON enable
P.32
+1.5VSUS +-3% +1.5VRUN
SUSON enable MOS SW MAIND enable
MAX 7.3A
P.33 MAX 3A
A A

PROJECT : FH2
1A
Power Tree
5 4 3 2 1
5 4 3 2 1
Slave ADDRESS :09H Slave ADDRESS :16H

37
CHARGER
BATTERY
+3VPCU +3VPCU ISL88731A
D D
+3VPCU +3VPCU
R R
+3V_S5 +3V_S5
+3V_S5
MBCLK
EC R R R R
MBDATA
ITE G
ITE8502 MBCLK_ME D
NMOS
S
(128 Pin LQFP)

16mm x 16 mm
MBCLK_ME D S
NMOS
C C
+3V_S5 +3V_S5
SMB_CLK_ME0
PCH
SMB_DATA_ME0
INTEL
82801IBM
(HM55) SMB_CLK_ME1
27mm X 25mm
SMB_DATA_ME1
B Slave ADDRESS :D2H B
CLOCK GEN
SLG
+3V_S5 +3V_S5 +3V_RUN +3V_RUN
SLG8SP585VTR
Slave ADDRESS :A0H Slave ADDRESS :A4H
(64-pin QFN) DDR3-SODIMM DDR3-SODIMM
+3V_RUN 9 mm x 9 mm CH.A(STD) CH.B(STD)
R R R R
G
PCH_SMBCLK D
NMOS
S CGCLK_SMB
PCH_SMBDATA D S CGDAT_SMB
NMOS
A A

PROJECT : FH2
1A
SM BUS
5 4 3 2 1
5 4 3 2 1
CHANGE HISTORY
A
PAGE4 : C370 change to 0.047uF from 1uF
38
PAGE9 : change R291 and R314 to 3.3K from 10K for intel suggest
PAGE10 : 1.change U4 to MC74VHC1G08DFT2G from TC7SZ32FU(T5L,F,T)
2. R86 non-stuff
3. R283 and R284 change to 2.2K from 6.8K
4. add R353 and R343 4.7K and change SMBus_ME1 pull high to +3VRUN
PAGE11 : change CON11 to battery socket from connector
PAGE 16 : change U14 to IC(5P) APL3512ABI-TRG from G5243AT11U for cost down
PAGE 17 : 1. reserve R427, R429, R430 and R431 for EMI
2. add 1uF C4578,C4579, change C4573, C4574, C4575, C4576 and C4577 to 1uF.
3. change R422 and R423 to 2.2K from 2K.
D D
4. resever U25, U27 and U29 for ESD

PAGE 18 : change CN2 to DFHD23MS0B6
PAGE 19 : 1.mount R562, R565 no stuff for ISOLATE# signal control
2. delete C567, C656 and C655
3. mount R557, delete R576,R191, C567,C656,C655, and reserve R561,R560.
4. delete R585 and R586.
5.add R194, R195 for LAN GND
PAGE 21 : swap L10 and L13 usb signal for layout.
PAGE 22 : 1.change JSIM1 footprint to SIM-CE01X-3-14P-SMT
2. change +3V_3G to +3V_RUN
PAGE 23 : reserve D28 for 3G LED
PAGE 24 : 1. add AR23, AR24, AR25 and AC36 for ALC269-VA and AL269-VB co-layout
2. change U23 footprint to QFN48-7X7-5-49P-SMT
3. add AC26 0 ohm.
PAGE 25 : 1.add T15, T56, T57, T58, T59, T60, T61, T62, T63, T64, T65 and T66 for debug
2. add PCB revsion table
3. mountR365 and R368; non-stuff R367, R366, R369 and R370
PAGE 26 : 1. change U2 to APL5606KI-TRG from G995 for cost down
2. U26 connect Pin4 to +3V_RUN, Pin5 to PWR_3.3VPEC, Pin13 to PWR_1.5VPEC and Pin14 to +1.5V_RUN
PAGE 27 : 1.PL8 changed to choke SMD 5.2UH 5.5A,30% SCDS104R-5R2T-N
2. VIN to GND add C413, C414, C415, C416, C417, C418 and C419 01.uF for EMI
3. PL8 keep original choke (no change)
4. PC181,PC182 non-stuff
5. PQ17 change to AON7410 (BAM74100001)
6. PQ18 change to source AON7702 (BAM77020000)
7. PQ20 change to source AO4496 (BAM44960000)
C
7.delete PR203,PR102 C
8.delete PC181, PC182

PAGE 28 : 1.PL4 change to choke coil 1.5UH30%10A (SIL104R-1R5PF) footprint change to choke-etqp4l
2.PC153 change to 390U/2.5V_6X5.8ESR10
3. PL4 change to CHOKE COIL 1.5UH30%10A (SIL104R-1R5PF)
4. PC153 change to 390U/2.5V_6X5.8ESR10
5. delete PC54 BOM
6. PQ35 change to AO4496 (BAM44960000)
9. delete PR179
PAGE 29 : 1.change PR235 to 68ohm from 58 no stuff
2. PR235 change to RES CHIP 68 1/16W +-1 %( 0402)
3. PQ4, PQ45 change to RJK03B9DPA (BAM03B90000)
4. PQ3, PQ7, PQ41, PQ44 change to RJK03D3DPA (BAM03D30000)
5. PR215 changed to 5.9K RES CHIP 5.9K 1/16W +-1 %( 0402) (CS25902FB10)
6. PC194 and PC199 changed to CAP CHIP 0.033U 16V (+-10%, X7R, 0402)33nF CH3333K1B02
7. Delete PJP0
PAGE 30 : 1.PU8 changed to IC CTRL (25P) VT357FCX-ADJ (CSP-25)
2. PU8 change to IC CTRL (25P) VT357FCX-ADJ (CSP-25)
3. PR168 change to 31.6KF
4.Delete PR180,PJP2
5. PR168 CHANGED TO 40.2K
PAGE 31 : 1.add PC156,PC201,PC202 and PC203 to CAP CHIP 560P 50V(+-10%,X7R,0402)PAL ASN
2. add PC201, PC202, PC203, PC204 560PF
3. PQ36 change to RJK03B9 (BAM03B90000)
B
4. PQ37, PQ40 change to RJK03D3 (BAM03D30000) B
PAGE 32 : 1. change PC184 to 390U/2.5V_6X5.8ESR10

2. PC205=390U/2.5V_6X5.8ESR10.
3. PQ42 change to RJK03B9 (BAM03B90000)
4. PQ50 change to source RJK03D3 (BAM03D30000)
5. delete PC184.
6. add 2nd source PN: DC-10F0M102,(CHOKE 1.0UH +-20% 15A(PCMC104T-1R0MN).
7. delete PD7 BOM
8. delete PR198
9. changed PL9 to DC-33B0M003 CHOKE 3.3UH 11A +-20 %( PCMB104E-3R3MS)
PAGE 33 : 1.PQ24 changed to TRANS MOSFET FDS6690AS (30V,10A)
2. add PQ8 in BOM
3. PQ23, PQ24, PQ31 change to AO4496 (BAM44960000)
4. PQ30, PQ25 change to ME3424D
5. PQ22 CHANGED TO AOL1448 (BAM14480000)
6. PR82 and PR204 CHANGE TO 560K (CS45602FB04)
7. PR104 and PR112 CHANGE TO 442K (CS44422FB00)
PAGE 34 : 1.change PU3 footprint to 'QFN28-5X5-5-33P-smt
2. PC119, PC124 CHANGED TO 0402 TYPE PN: CH5101K9B01
3. delete PF1,PF2
A A

PROJECT : FH2
1A
CHANGE HISTORY
5 4 3 2 1

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1 2 3 4 5 6 7 8

C 27mm X 25mm PCIEx1 C

GLAN 10/100/1000 LAN

Audio Audio FLASH

FLASH Touchpad Quanta Computer Inc.

T1: RVCCON TO RSMRST# = 30ms (spec:mini 10ms)

L11 BLM21PG600SN1D 40mil +3.3V_CLK_VDD 1 VDD_USB CLK_BUF_BCLK_P

Place the 33 ohm XTAL_OUT 27

10,14,15 CGDAT_SMB 31 SDATA GND 33

HP: 10u x2pcs

C182 SLG,IDT: +1.05V Place each 0.1uF cap as close as

the 10uF caps on the VDD_IO plane.

Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V.

PIN 30 CPU_0 CPU_1 SLG date sheet (V0.2) P15:

Low Voltage: Min Vss-0.3V, Max 0.35V.

EMI Capacitor Size Document Number Rev

FDI_TXN7 G18 D31 22 H_CPURST# H_CPURST# AP26 AP28 XDP_TMS XDP_TMS 22

JTAG & BPM

H_COMP2 SM_RCOMP_0 PM_THRMTRIP# STUP AS SHORT AS PASSPBLE

M_A_DQ35 AK7 F8 M_A_DQSN1 M_B_DQ37 AG3 L4 M_B_DQSN3

DDR SYSTEM MEMORY - B

CPU Core Power

+1.05V_VTT=1.8 max +1.05V_VTT

1.1V RAIL POWER

PEG & DMI

VCC62 VTT1_52 VTT1_68

R28 VCC88 VCC_SENSE AJ34 VCCSENSE 29

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER) Quanta Computer Inc.

ARRANDALE PROCESSOR (GND) ARRANDALE PROCESSOR( RESERVED, CFG)

VSS1 VSS81 AE34

IBEX PEAK-M (DMI,FDI,GPIO) IBEX PEAK-M (LVDS,DDI)

Digital Display Interface

System Power Management

D9 E4 INT_CRT_BLU AA52 U50

PM_BATLOW# R289 8.2K/J_4

AC_PRESENT R111 8.2K/J_4

SUS_PWR_ACK R109 8.2K/J_4

Quanta Computer Inc.

INTVRMEN(Internal Voltage Regulator Enable) : ACZ_BIT_CLK A30 HDA_BCLK

SPI_SI AY1 Y9 R66 1 2 10K/J_4 +3V_RUN

RESET JUMP (Near ROOM DOOR)

R316 R307 R290 R304 C328 3 4

IBEX PEAK-M (PCI,USB,NVRAM)

From CLK BUFFER

U4 Boot BIOS Strap

PCI_STOP# 6 5 0 1 PCI 2.2K/F_4

25 SIO_EXT_SCI# SIO_EXT_SCI# D37 TACH2 / GPIO6

R82 10K/J_4 GPIO35

IBEX PEAK-M (POWER) +1.05V_PCH

Clock and Miscellaneous

+1.05V_PCH AM23 AP11 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF34

VCC3_3 = 0.357A max AD19

VCCRTC = 2mA max

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DQ16 39 123 VDD17 VSS32 139

C163 + C202 C155 C154

+3V_RUN +0.75V_DDR_VTT R133 0_6

0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6