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Spos As1 305a027 Gadewar Parth 01

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Assignment No.

: 01

Problem Statement: Design suitable data structures and implement pass-I of a two-pass
assembler for pseudo machine in Java/C++ using object oriented feature. Implementation should
consist of a few instructions from each category and few assembler directives.

Objectives:
1. To study the design and implementation of 1st pass of two pass assembler.
2. To study the categorized instruction set of assembler.
3. To study the data structure used in assembler implementation.

Theory:

Following figures show the various data formats:

Instruction Formats:
IBM 360 has logical, control and special purpose instructions. Instructions are of two types:
register operands and storage operands.
RR – Register to register

A.] 2 bytes instruction format


RX – Register to Indexed storage
RS – Register to storage
SI – Storage immediate

B.] 4 bytes instruction format


SS – Storage to storage

Pass 1 Data Structures are as follows:


A.] Source Program is used as an input.
B.] Location Counter is used for keeping track of each instruction location.
C.] Machine Operation Table (MOT) is used to indicate the symbolic mnemonic for each
instruction with its length. An instruction length is 2, 4 or 6 bytes.

Algorithm/Flowchart:
Input:
Source code of Assembly Language
SAMPLE START 100
USING *, 15
L 1, FOUR
A 1, =F’3’
ST 1, RESULT
SR 1, 2
LTORG
L 2, FIVE
A 2, =F’5’
A 2, =F’7’
FIVE DC F’5’
FOUR DC F’4’
RESULT DS 1F
END

Output:
100 SAMPLE START 100
100 USING *, 15
100 L 1, FOUR
104 A 1, =F’3’
108 ST 1, RESULT
112 SR 1, 2
114 LTORG
124 L 2, FIVE
128 A 2, =F’5’
132 A 2, =F’7’
136 FIVE DC F’5’
140 FOUR DC F’4’
144 RESULT DS 1F
152 5
156 7
160 END

Machine Opcode Table (MOT)


Mnemonic Hex / Binary Length (Bytes) Format
Code
L 5A 4 RX
A 1B 4 RX
ST 50 4 RX
SR 18 2 RR

Pseudo Opcode Table (POT)


Pseudo op Address / Name of Procedure to implement pseudo
operation
START PSTART
USING PUSING
DC PDC
DS PDS
LTORG PLTORG
END PEND
Symbol Table (ST)
Sr. No Symbol name Address Value Length Relocation
1 SAMPLE 100 -- 160 R
2 FIVE 136 5 4 R
3 FOUR 140 4 4 R
4 RESULT 144 4 R

Literal Table (LT)


Sr. No Literal Address Length
1 3 120 4
2 5 152 4
3 7 156 4
Instructions :
Not specific

Test Cases:
1. Check syntax of instruction (Correct and wrong)
2. Symbol not found
3. Wrong instruction
4. Duplicate symbol declaration
5. Test the output of program by changing value of START pseudo opcode.
6. Test the output of program by changing position of LTORG pseudo-op.

Software Requirement:
1. Fedora
2. Eclipse
3. JDK

Hardware Requirement:
Not specific
Frequently Asked Questions:
Conclusion:
Input assembly language program is processed by applying Pass-I algorithm of assembler and
intermediate data structures, Symbol Table, Literal Table, MOT, POT, BT, etc. are generated.

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