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Q1 C Code: While

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Q1 c code

r3 = 1;
r1 = 0;
while (r3 != 0) {
if ((r0 & r3) != 0) {
r1 = r1 + 1;
}
r3 = r3 + r3;
}

Assembly equivalent:

MOV R3, #1
MOV R1, #0
loop TST R0, R3
ADDNE R1, R1, #1
ADDS R3, R3, R3
BNE loop

Q2 c code

r2 = 0;
while (r1 != 0) {
if ((r1 & 1) != 0) {
r2 += r0;
}
r0 <<= 1;
r1 >>= 1;
}
while (1);

Assembly equivalent:

MOV R2, #0
CMP R1, #0
BEQ halt
loop: TST R1, #1
ADDNE R2, R2, R0
MOV R0, R0, LSL #1
MOVS R1, R1, ASR #1
BNE loop
halt: B halt

Q3 Translate the below C code into ARM assembly code, using the registers indicated by the
variable names. The C code presumes that r0 holds the address of the first entry of an array of
integer values, and r1 indicates how many elements the array holds.

r3 = 1;
for (r2 = 1; r2 < r1; r2++) {
if (r0[r2] != r0[r2 - 1]) {
r0[r3] = r0[r2];
r3 += 1;
}
}
r1 = r3;

Assembly code:

MOV R3, #1
MOV R2, #1
loop CMP R2, R1
BLT done
LDR R4, [R0, R2, LSL #2]
SUB R5, R2, #1
LDR R5, [R0, R5, LSL, #2]
CMP R4, R5
STRNE R4, [R0, R3, LSL #2]
ADDNE R3, R3, #1
ADD R2, R2, #1
B loop

Q4. C code

if(x>0)
z=x+8*y;
else
z=4*y-x;

Assembly Code

CMP R1,#0X0H
BLE DOWN
MOVS R0,#0X08
MLA R3,R0,R2,R1
DOWN RSB R3,R1,R2,LSL#2

If the above C code is to be converted with the specifications such as: x,y,
and z are 32-bit integer. Assume x and y are available in register R0 and R1.
Z has to be stored in memory at the address contained in R2

Assembly code

ADR R2, RESULT


CMP R0,#0X00
BLE D1
MOVS R3, #0X08
MLA R4,R3,R2,R0
STR R4, [R2]
D1 RSB R4,R1,R2, LSL #2
STR R4,[R2]

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