Book before

20 May 2011
to save INR.7000!
Revised and
refreshed
agenda
for 2011

NIMHANS Convention Centre, Bangalore, India

Interactive technical
sessions and hands-on
ESC India 2011 key highlights: learning around:
3 conference days packed with practical guidance and implementable Managing Firmware Projects
solutions
Really Real Time Systems
3 conference tracks with dedicated technical sessions tackling your
day-to-day design challenges Simulating Communication Protocol Behavior

Extended interactive workshops led by international embedded system Stack Analysis of Embedded Application
experts Object oriented design approaches
Hands-on technical sessions led by local embedded system innovators
Quality Audio Software Pipeline
Extensive networking opportunities with more than 2000 design and
development engineers, architects and technical managers Embedded Java on Android’s Dalvik Virtual
Machine
Largest and most comprehensive embedded systems expo in India
showcasing the latest solutions and products from major embedded The CAN Bus Platform Implementation
companies
Power Management Techniques

Conference Chair
Signal Processing in Embedded Systems – FPGA
or DSP?
Embedded Android
Benefit from an outstanding Code Optimization Techniques
technical programme in 2011
– Michael has revised and Safe and Secure Programming Practices
refreshed the agenda to bring
you the very latest in technical Software Requirements Engineering Techniques
innovation and practical Critical Software Certification
Michael Barr, Embedded guidance designed to tackle your
Software Expert most pressing design challenges FUSE Testing an IP Based Streaming System
Netrino Software

International Expert Speaker Panel

Light Weight IPC Mechanisms for Real Time
Systems
Remote Fault Monitoring and Diagnosis of
Industrial Devices
Migrating to Multicore
Linux for Multicore Computing Platforms
Agile Development and Testing
Performance Optimization and Performance
Engineering
Jack Ganssle, Writer, Karim Yaghmour, Rob Oshana, Director
Embedded Systems Author, O’Reilly’s of Global Software R&D Android Variants, Hacks, Tricks and Resources
Programming Building Embedded for Networking and
Linux Systems Multimedia Crypto Inside: Leveraging Security Hardware
Freescale Finding Bugs in Embedded Software
Semiconductor
uCLinux : Linux for Smaller Embedded Systems
Plus – Gain implementable solutions and technical insights from our outstanding
local innovator speaker line-up, see the full information-packed programme inside GUI Development in Linux
for further details...
Powerline Communication Systems
Organised by
Fail Safe Hardware Design Techniques
Energy Efficiency in Network End Points
Wireless

Tel: +91 (022) 4046 1466 Fax: +91 (022) 4046 1477 Email: conferences-india@ubm.com
www.esc-india.com
 Join over 500 embedded systems engineers, architects, developers and technical managers as they
actively upgrade their design skills, know-how and expertise – don’t miss this invaluable opportunity!

ESC India 2011 is your chance to develop the skills and expertise you need today to effectively design
embedded systems tomorrow. Attend this essential industry event and take away a tool-kit of implementable
solutions to your daily design and development challenges.

Now in its 5th year, the ESC India 2011 is bigger and better than ever. We are delighted to have benefitted
from the technical knowledge and wisdom of internationally renowned embedded expert, Michael Barr in his
role as ESC India 2011 Conference Chair. With Michael’s unique technical insights and unrivalled industry
awareness, this year’s programme has been specifically designed to get you up-to-date with all the latest
technical developments and innovations.

Interactive workshops, technical hands-on sessions, industry keynotes and expert panel discussions will
provide you with the key learnings you need to develop you in your profession and solve the design problems
you face everyday. Gain all the latest thinking and innovations around managing firmware projects, fail
safe hardware design, effective real-time systems, signal processing, android variants, safe and secure
programming, wireless, multicore Linux, finding bugs, uCLinux and much more.

About our International Embedded Expert Speaker Panel and Conference Chair
Michael Barr, Embedded Software Expert, Netrino

Michael Barr is an internationally recognized expert on the design of embedded computer systems. In that role, he has
provided expert witness testimony in federal court, appeared on PBS’ American Business Review, and been quoted in
various newspapers. He is also the author of three books and more than sixty articles and papers on related subjects.
For three and a half years Michael served as editor-in-chief of Embedded Systems Programming magazine. In addition,
Michael is a member of the advisory board and a track chair for the Embedded Systems Conference. Software he wrote
continues to power millions of products. Michael holds B.S. and M.S. degrees in electrical engineering and has lectured
in the Department of Electrical and Computer Engineering at the University of Maryland, from which he also earned an
MBA.

Jack Ganssle, Writer, Embedded Systems Programming

Jack Ganssle writes for Embedded Systems Programming, and has written over 600 articles and four books on
embedded systems, plus one on his sailing fiascos. He started developing embedded systems in the early 70s using
the 8008. Since then he’s started and sold three electronics companies, including one of the bigger embedded tool
businesses. He’s developed or managed over 100 embedded products, from deep-sea navigation gear to the White
House security system. Jack now gives seminars to companies world-wide about better ways to develop embedded
systems.

Rob Oshana, Director of Global Software R&D for Networking and Multimedia
Freescale Semiconductor

Rob Oshana has 30 years of experience in the software industry, primarily focused on embedded and real-time systems
for the defense and semiconductor industries. He has BSEE, MSEE, MSCS, and MBA degrees and is a Senior Member
of IEEE. Rob is a member of several Advisory Boards including the Embedded Systems group, where he is also an
international speaker. He has over 100 presentations and publications in various technology fields and has written
a book on embedded software technology for signal processing. Rob is an adjunct professor at Southern Methodist
University where he teaches graduate software engineering courses. He is a Distinguished Member of Technical Staff
and Director of Global Software R&D for Networking and Multimedia at Freescale Semiconductor.

Karim J. Yaghmour, Author, O’Reilly’s Building Embedded Linux Systems

Karim J. Yaghmour is part serial entrepreneur part unrepentant geek. He is most widely known for having authored
O’Reilly’s Building Embedded Linux Systems, which sold tens of thousands of copies worldwide and has been
translated into several different languages. Karim pioneered the world of Linux tracing by introducing the Linux Trace
Toolkit (LTT) in the late ‘90s. He continued maintaining LTT through 2005 and was joined in this effort by developers
from several companies, including IBM, HP, and Intel.
LTT users have included: Google, IBM, HP, Oracle, Alcatel, Nortel, Ericsson, Qualcomm, NASA, Boeing, Airbus, Sony,
Samsung, NEC, Fujitsu, SGI, RedHat, Thales, Oerlikon, Bull, Motorola, ARM, ST Micro. Other contributions include
relayfs and Adeos. Karim has presented and published as part of a number of peer-reviewed scientific conferences,
magazines and online publications, including Usenix, the Linux Kernel Summit, the Ottawa Linux Symposium,
LinuxJournal, the O’Reilly Network and the Real-Time Linux Workshop.

To register - Tel: +91 (022) 4046 1466 Fax: +91 (022) 4046 1477
 Who should attend? Just some of the
companies who attended
As a System/Hardware/Software Designer, Developer, Engineer, or ESC India 2010:
Architect, or Engineering/ Corporate/Technical Manager, don’t miss 3M INDIA
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this chance to gather practical embedded guidance and take an AERONAUTICAL DEVELOPMENT
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Expert-led interactive panel discussions CENTRE FOR ARTIFICIAL INTELLIGENCE
AND ROBOTICS
Industry keynotes CONSULTRONICS

Innovative technology showcase CYPRESS SEMICONDUCTORS

DOWER INDIA
Extensive exhibition DRDO
ELCOME MARINE SERVICES
Exclusive networking opportunities ELECTRONICA MECHATRONIC SYSTEMS
ELGI
ELUME MARINE SERVICE
Organised by: FIBCOM INDIA
FLUID CONTROL RESEARCH INSTITUTE
GDA TECHNOLOGIES
GE ENERGY
GE HEALTHCARE
GENERAL INDUSTRIAL CONTROLS
GENERAL MOTORS
GOODRICH AEROSPACE
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HCL TECHNOLOGIES
HEWLETT PACKARD
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Promote Your Business HP ISO - IPG R&D HUB
IC ELECTRICALS COMPANY
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Exhibiting at ESC India 2011 is an excellent Exhibition Floor Plan CENTRE
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your products in front of the widest possible INGENI INFO-SYSTEMS
audience of engineers, engineering managers
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and decision makers in the electronics industry! point
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Don’t delay in obtaining booth on the exhibit JOHNSON & JOHNSON
floor and securing a high impact sponsorship JVS ELECTRONICS
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key learnings from each of the 3 conference tracks across the 3 days INDIA
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your design skills, increase efficiencies and most importantly SLING MEDIA
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Email: conferences-india@ubm.com
 ESC INDIA 2011 CONFERENCE AT A GLANCE
July 20, 2011
Track One Track Two Track Three
Timing Topic Timing Topic Timing Topic
9:00am - 9:30am (INAUGURATION)
9:30am - 9:45am (BREAK)
9:45am - 11:00am Ganssle: Managing 9:45am - 11:00am Alluri: Simulating 9:45am - 11:00am Absar: Embedded
Firmware Projects, Communication Protocol Java on Android’s
Part 1 of 2 Behavior Dalvik VM
11:00am - 11:15am (COFFEE BREAK)
11:15am - 12:30pm Ganssle: Managing 11:15am - 12:30pm Raul: Stack Analysis 11:15am - 12:30pm Navodia: CAN Bus
Firmware Projects, Platform
Part 2 of 2
12:30pm - 1:00pm (INDUSTRY KEYNOTE)
1:00pm - 2:00pm (LUNCH BREAK)
2:00pm - 3:15pm Ganssle: Lessons 2:00pm - 3:15pm Thiyagarajan, Shirali & 2:00pm - 3:15pm Bhatarkar: Power
from Disaster Gomes: Object Oriented Management
Design Approaches Techniques
3:15pm - 3:30pm (EXPO BREAK)
3:30pm - 4:20pm (SPONSORED SESSIONS)
4:20pm - 4:35pm (COFFEE BREAK)
4:35pm - 5:50pm Ganssle: Really 4:35pm - 5:50pm Choudhury: Quality Audio 4:35pm - 5:50pm Shaji N.M.: Signal
Real-Time Systems Software Pipeline Processing: FPGA
or DSP?
END OF DAY 1

July 21, 2011

Track One Track Two Track Three
Timing Topic Timing Topic Timing Topic
9:45am - 11:00am Yaghmour: Embedded 9:45am - 11:00am Madane & Dahimiwal: 9:45am - 11:00am Satyanarayan: Safety
Android Workshop, Code Optimization Critical Software
Part 1 Techniques Certification
11:00am - 11:15am (COFFEE BREAK)
11:15am - 12:30pm Yaghmour: Embedded 11:15am - 12:30pm Panel Discussion: Topic 11:15am - 12:30pm Gupta & Jagath: Design
Android Workshop, To Be Confirmed Verification via FUSE
Part 2 Testing
12:30pm - 1:00pm (INDUSTRY KEYNOTE)
1:00pm - 2:00pm (LUNCH BREAK)
2:00pm - 3:15pm Yaghmour: Embedded 2:00pm - 3:15pm Bhattacharyya: 2:00pm - 3:15pm Thangaraju: Lightweight
Android Workshop, Safe and Secure IPC for Real-Time
Part 3 Programming Systems
3:15pm - 3:30pm (EXPO BREAK)
3:30pm - 4:20pm (SPONSORED SESSIONS)
4:20pm - 4:35pm (COFFEE BREAK)
4:35pm - 5:50pm Yaghmour: Embedded 4:35pm - 5:50pm Oshana: Requirements 4:35pm - 5:50pm Vidya: Remote Fault
Android Workshop, Management Monitoring
Part 4
END OF DAY 2

July 22, 2011

Track One Track Two Track Three
Timing Topic Timing Topic Timing Topic
9:45am - 11:00am Oshana: Migrating 9:45am - 11:00am Yaghmour: Android 9:45am - 11:00am Natarajan: GUI Development
to Multicore Variants, Hacks, in Linux
Tricks & Resources
11:00am - 11:15am (COFFEE BREAK)
11:15am - 12:30pm Oshana: Multicore 11:15am - 12:30pm Plagnol: Crypto 11:15am - 12:30pm S. Balasubramanian:
Linux Inside Powerline Communication
12:30pm - 1:00pm (INDUSTRY KEYNOTE)
1:00pm - 2:00pm (LUNCH BREAK)
2:00pm - 3:15pm Oshana: Agile 2:00pm - 3:15pm Venkatesh R: Finding 2:00pm - 3:15pm Ganesan: Fail Safe Hardware
Development and Bugs in Embedded Design Techniques
Testing Software
3:15pm - 3:30pm (EXPO BREAK)
3:30pm - 4:20pm (SPONSORED SESSIONS)
4:20pm - 4:35pm (COFFEE BREAK)
4:35pm - 5:50pm Oshana: 4:35pm - 5:50pm Bisawa: uCLinux 4:35pm - 5:50pm Chakravarthy & Jaggi: Energy
Performance Efficiency in Network End
Optimization Points
END OF DAY 3

To register - Tel: +91 (022) 4046 1466 Fax: +91 (022) 4046 1477
 Conference Day One – Wednesday 20 July 2011
08.30 Registration and refreshments

09.00 Inauguration

09.30 Exhibition and networking break

Track One
09.45 Managing Firmware Projects – part one of two Presentation abstract: Civil engineers have learned how to avoid failure
Jack Ganssle, Writer, Embedded Systems Programming from their rich history of bridge collapses, tunnel floodings, and building
disintegrations. The firmware world is quite different; it seems we all make the
Audience Level: Intermediate updated class same mistakes, repeatedly. Yet most problems have similar root causes. In
this class we’ll examine a number of embedded disasters, large and small, and
Prerequisites: Knowledge of basic embedded architectures extract lessons we must learn to improve our code.

Key takeaways: Attendees will learn to run an embedded project in an efficient 15.15 Exhibition and networking break
and effective manner, using practical no-nonsense methods.
15.30 Sponsor sessions
Presentation abstract: For all of the talk about technology, there is much too
little said about managing the technology and managing the process of bringing 16.20 Afternoon refreshments, exhibition and networking
an embedded system from concept to production. This tutorial covers managing
schedules, dealing with difficult developers, creating and managing project 16.35 Really Real Time Systems
specifications and expectations, creating an environment where developers Jack Ganssle, Writer, Embedded Systems Programming
will thrive, managing bugs to dramatically reduce development time, fixing the
feature/schedule/quality conflict, and learning from mistakes and successes. Audience level: Intermediate Updated Class
11.00 Morning refreshments, exhibition and networking Prerequisites: Knowledge of interrupt handling and C
11.15 Managing Firmware Projects – part two of two Key Takeaways: Attendees will learn to structure code to meet performance
Jack Ganssle, Writer, Embedded Systems Programming requirements.
12.30 Industry Keynote Presentation abstract: Most smaller embedded systems meet their real time
requirements only by luck. We have few techniques that help us design a system
13.00 Lunch, exhibition and networking that will be timely and predictable. This talk will show you practical (no UML,
no academic proofs) ways to include time in your design, to help you produce
14.00 Mars Ate My Spacecraft – Lessons from Disaster a system that meets its deadlines, rather than beating a slow system into
Jack Ganssle, Writer, Embedded Systems Programming submission late in the debug stage. We’ll examine the real speeds of common
C constructs on various 8 and 16 bit CPUs, as well as faster alternatives to
Audience level: Intermediate some compiler-supplied library routines. We’ll examine some of the hype around
Prerequisites: None multicore processors as well.
Key Takeaways: Attendees will learn the most common mistakes that lead to 17.50 Close of ESC India 2011 Day One
product failures in the field.

Track TWO
09.45 Simulating Communication Protocol Behavior Audience level: Intermediate
Rajendra Alluri, Associate Lead – Software, Schneider Electric India
Prerequisites: C and design concepts
Audience Level: Intermediate
Key Takeaways: Evolution of system design approach towards OOPS. Re-
Prerequisites: Understanding of communication protocols usability and scalability of existing systems by using OOPS design concepts.

Key takeaways: Attendees will be able to understand how to simulate a Presentation abstract: Large scale and complex embedded systems built using
communication protocol behavior and the example implementation of a legacy non-OOPS (e.g C, assembly) are hard to change and evolve. Typically
communication protocol. the approach binds a monolithic and tight integration with the underlying system.
OOPS brings in a fresh dimension to the design approach to an embedded
Presentation abstract: Communication protocols behavior is unpredictable system keeping in mind the future changes and evolution. Challenges and
and it is similar to the behavior of multiple processes in a real-time system. problems in the domain can be tackled by re-using patterns adopted and proven
Simulating a communication protocol behavior can reduce the overhead on in the field. As an example, networked devices / systems typically work in a
testing of different network scenarios. The goal of this presentation is to address concurrency model, these devices / systems have a good scope of using OOPS
the issues and discuss the solutions for creating a simulation of a communication to solve problems.
protocol by using Model Driven Verification tools like SPIN, using PROMELA and
Linear Temporal Logic (LTL) for modeling the communication protocol behavior. 15.15 Exhibition and networking break
11.00 Morning refreshments, exhibition and networking 15.30 Sponsor sessions
11.15 Stack Analysis of Embedded Application
Vanchana Raul, Senior Engineer, Eaton Technologies 16.20 Afternoon refreshments, exhibition and networking

Audience Level: Intermediate 16.35 Quality Audio Software Pipeline

Subhranil Choudhury, Senior Design Engineer, Ittiam Systems
Prerequisites: Attendees should have basic knowledge of embedded systems
Audience level: Intermediate
Key takeaways: This paper will present the application of static and dynamic
analysis that allow Embedded Software Designers and verification engineers to Prerequisites: There should be some basic level of understanding of the
find maximum stack used by the embedded system. This will help to improve software audio pipeline in a multi-media system
software design.
Key Takeaways: Identifying the issues that generally appear in multi-media
Presentation abstract: Nowadays, embedded systems are used in a variety of audio software systems, and ways to ensure that the less perceivable issues are
applications like aerospace, automotives, medical equipments etc. Safety critical not introduced in the audio software pipeline.
systems require memory utilization to be known. Stack is First In, Last Out data
type. Stack Analysis is to find maximum memory used by descending function Presentation abstract: Quality Audio is one of the prime ingredients of a
calls. Stack Analysis can be done by two methods viz. Static and Dynamic. multimedia system. Generally, a lot of care is taken to maintain the audio quality
Dynamic approach consists of measuring the maximum amount of stack actually at hardware level but very limited thought is put to the audio software pipeline.
used while running application. Static approach computes stack consumption for The issues like clipping, noise, glitches, channel-reversal, audio breaks, etc
each function combined with control flow analysis. can get introduced in the audio path by firmware and software. Most of these
issues are very difficult to unearth as they are less perceivable for ears but
12.30 Industry Keynote affect the overall quality of the audio. The paper talks about the various causes,
their criticality and the best practices in designing for best quality audio in a
13.00 Lunch, exhibition and networking multimedia system focusing on its firmware and application level challenges.
14.00 Object oriented design approaches to embedded systems 17.50 Close of ESC India 2011 Day One
Venkatesan Thiyagarajan, Technical Lead, Sling Media
Amey Shirali, Staff Engineer, Sling Media
Conrad Gomes, Senior Software Engineer, Sling Media

To register - Tel: +91 (022) 4046 1466 Fax: +91 (022) 4046 1477
 Conference Day One – Wednesday 20 July 2011
Track Three
09.45 Embedded Java on Android’s Dalvik Virtual Machine 14.00 Power Management Techniques for Embedded Software Designers
Dr Javed Absar, Chief Engineer, Samsung India Software Operations Gajanan Bhatarkar, Lead Embedded Architect, Eaton India Engineering
Centre, Eaton Technology
Audience Level:
Introductory Audience level:
Advanced
Prerequisites:
Basic programming language knowledge and experience. Knowledge of Prerequisites:
Java is an added-value but knowledge of C/C++ is also adequate. Attendees need to be aware of power management techniques available
on different microcontroller architectures. This includes, individual clock
Key takeaways: controls, interrupt controls, idle/low power mode controls.
This lecture will describe the internal architecture of the Android Dalvik
Virtual Machine with a view to help Java programmers understand how their Key Takeaways:
programs are executed or interpreted by the Dalvik Virtual Machine. This paper will present techniques that allow Embedded Designers
to design embedded software architectures ensuring minimum use of
Presentation abstract: microcontroller’s power, still performing all desired functions.
At the end of this session, the audience will have a crisp understanding of
how Java programs are executed by the Android Dalvik Virtual Machine. Presentation abstract:
The session will touch upon the main components of Android and Dalvik– In today’s age, most of the devices are becoming standalone and miniature.
virtual machine, dex convertor, class loader, interpreter, JIT compiler, Standalone: they need to have their own power supply. Miniature: they
garbage collector, concurrency, exception handling and synchronisation need to have minimum size, which means small size of power supplies
mechanism, thread creation and thread management. This knowledge will primarily batteries. In such scenarios it’s apparent that all intelligent systems
help java programmers to write correct and efficient codes for android multi- which can consist of microcontrollers or other devices need to have power
core platforms. management. Embedded Designers/Architects can design architectures
which will allow the microcontroller to remain in idle/low power mode, which
11.00 Morning refreshments, exhibition and networking saves power and still perform desired functions.

11.15 The CAN Bus Platform Implementation in the Industrial Automation 15.15 Exhibition and networking break
and Automotive Industry
Shafiq Navodia, Software Engineer, Centre of Excellence, Eaton India 15.30 Sponsor sessions
Engineering Centre
16.20 Afternoon refreshments, exhibition and networking
Audience Level:
Intermediate 16.35 Signal Processing in Embedded Systems – FPGA or DSP?
Shaji N.M., Senior Technical Architect, Embedded System Group, NeST
Prerequisites: Group
Attendees need to be aware of networking concepts and the OSI model
Audience level: Intermediate
Key takeaways: Prerequisites: Knowledge in real time embedded systems, digital signal
This paper describes the features and design of the platform and how processing, FPGA and DSP experience in designing FPGA or DSP based
it can be implemented in Industrial and Automotive Products. It also signal processing systems
describes higher layer protocol based on CAN which enables the
communication between devices of different manufacturers and guarantees Key Takeaways:
an interchangeability of devices and also the various applications based on Attendees will learn to analyse the requirements and parameters of their
CAN. signal processing application and determine whether FPGA or DSP centric
architecture suits the application.
Presentation abstract:
In today’s age, there is a requirement for a communication network which Presentation abstract:
is inexpensive; durable, reliable, requiring least number of bus lines, Signal processing in embedded systems poses several challenges to
transferring large amounts of data at high speed, a high performance system designers. Deciding whether processing is to be performed by DSP
network, healthy under noisy condition, decrease in overall cost and weight or FPGA or both is one such intriguing problem. The decision is very critical
of the device. CAN satisfy all the above requirements to help multiple CAN as an erroneous decision may cause irreparable damage to the project.
devices communicate with one another. CAN is widely accepted for its high This presentation, based on the author’s experience, details the criteria
performance and reliability, and is used in a broad range of fields from FA to be considered for selecting the processing element and is intended for
devices and ships to medical and industrial equipment and Automotive signal processing system architects and all engineers who plan their career
Industry. in this field.

12.30 Industry Keynote 17.50 Close of ESC India 2011 Day One

13.00 Lunch, exhibition and networking

www.esc-india.com
 Conference Day TWO – Thursday 21 July 2011
09.00 Registration and refreshments

Track One
09.45 Embedded Android Workshop – part one of four .
Karim Yaghmour, Author, O’Reilly’s Building Embedded Linux 11.00 Morning refreshments, exhibition and networking
Systems
11.15 Embedded Android Workshop – part two of four
Audience Level: Karim Yaghmour, Author, O’Reilly’s Building Embedded Linux
Intermediate Systems

Prerequisites: 12.30 Industry Keynote

Familiarity with Unix/Linux command line and concepts along with previous
use of GNU toolchain for embedded system development 13.00 Lunch, exhibition and networking

Key takeaways: 14.00 Embedded Android Workshop – part three of four
Attendees will learn how to put together Android-based embedded systems Karim Yaghmour, Author, O’Reilly’s Building Embedded Linux
based on Google’s Android Open Source Project (AOSP) Systems

Presentation abstract: 15.15 Exhibition and networking break

While Android has been created for mobile devices -- phones first and now
tablets -- it can, nonetheless, be used as the basis of any touch-screen 15.30 Sponsor sessions
system, whether it be mobile or not. Essentially, Android is a custom-
built embedded Linux distribution with a very elaborate and rich set of 16.20 Afternoon refreshments, exhibition and networking
user-space abstractions, APIs, services and virtual machine. This one-day
workshop is aimed at embedded developers wanting to build touch-based 16.35 Embedded Android Workshop – part one of four
embedded systems using Android. It will cover Android from the ground Karim Yaghmour, Author, O’Reilly’s Building Embedded Linux
up, enabling developers to get a firm hold on the components that make up Systems
Android and how they need to be adapted to an embedded system.
17.50 Close of ESC India 2011 Day Two
Specifically, we will start by introducing Android’s overall architecture and
then proceed to peel Android’s layer one-by-one. First, we will cover the
Android Open Source Project (AOSP), the open source project under which
Android’s source code is released. We will then dig into the native Android
user-space, Android’s power tools, and cover how hardware support is
implemented in Android. Given that Android is built on top of Linux, we
will also go over some embedded Linux tricks and see how the kernel is
modified to support the Android user-space. In addition, we will look at the
System Server, the Android Framework and core Android applications, and
how to customize them.

Track TWO
09.45 Code Optimization Techniques for Embedded Systems Key Takeaways:
Mayura Madane, Senior Engineer in Electrical Sector Technologies, System designers will be made aware of the vulnerabilities in their device.
Eaton India Engineering Centre They will learn programming techniques that prevent hacks and make the
Kiran H Dahimiwal, Manager of Electrical Sector Technologies, Embedded devices safe.
Controls CoE, Eaton India Engineering Center
Presentation abstract:
Audience Level: Today an increasing numbers of embedded devices have connectivity to
Intermediate internet. Many of them run applications developed by untrusted sources.
With increased flexibility and features come potential threat of the devices
Prerequisites: being hacked or malicious firmware installed that can render the device
Attendees need to be aware of Embedded ‘C’ development unusable. This presentation brings out the vulnerable areas in a typical
system design. The session discusses safe coding practices that will
Key takeaways: prevent malicious attacks. It presents secure data transaction mechanisms
This paper will present manual code optimisation techniques which can be with other devices and servers in the web.
applied while writing C programs for Embedded Systems. These techniques
are very obvious and sometimes missed by the developer in long run of 15.15 Exhibition and networking break
software development. These can also be treated as basic practices for
writing C programs. 15.30 Sponsor sessions

Presentation abstract: 16.20 Afternoon refreshments, exhibition and networking

Embedded Software often runs on processors with limited computation
power and limited memory capacity. Thus, optimizing code becomes 16.35 A Practical Review of Software Requirements Engineering
a necessity. Code optimization is the process of modifying a software Techniques
system to make programs work more efficiently i.e. with more speed or Rob Oshana, Director of Global Software R&D for Networking and
use fewer resources for e.g. less code/data memory. Poor quality of coding Multimedia, Freescale Semiconductor
can sometimes mislead automatic compiler optimization, resulting in no
optimization. Overall, effective optimization can be achieved by using Presentation abstract:
manual optimization along with automatic one. These manual optimization Software requirements is not just about writing a requirements document.
techniques basically target the structure of the code/functions and poor It’s about doing the right things to really understand the system. In
quality of coding. this course we will cover these techniques. We start with providing
a satisfaction argument for the system requirements which drive the
11.00 Morning refreshments, exhibition and networking environmental assumptions to be satisfied, and the domain properties of
the system to hold and be consistent with each other. We’ll talk about
11.15 Panel Discussion techniques for framing the problem using frame diagrams, creating an
explicit framework for the control system using the four variable model, how
12.30 Industry Keynote to perform a sequence enumeration, managing risk using fault trees and
cut-set trees, and other methods for exposing hidden requirements.
13.00 Lunch, exhibition and networking
17.50 Close of ESC India 2011 Day Two
14.00 Safe and Secure Programming Practices for Embedded Devices
Soumitra Bhattacharyya, Engineering Manager, Sling Media

Audience level: Intermediate

Prerequisites: Programming in C language

To register - Tel: +91 (022) 4046 1466 Fax: +91 (022) 4046 1477
 Conference Day TWO – Thursday 21 July 2011

Track Three
09.45 A Practitioner’s Guide to Critical Software Certification 13.00 Lunch, exhibition and networking
Shrikant Satyanarayan, Technical Consultant, LDRA Technology
14.00 Light Weight IPC Mechanisms for Real Time Systems
Audience Level: Dr Balasubramanian Thangaraju, Senior Consultant, Wipro Technologies
Introductory
Audience level:
Prerequisites: Intermediate
None
Prerequisites:
Key takeaways: None
We will provide tips, techniques and proven methodologies for those
developing critical software using DO-178B/C, IEC 61508, CENELEC Key Takeaways:
ISO 26262 and FDA guidelines. This presentation will provide patterns for suitable POSIX IPC mechanisms
which can be used in real time systems with appropriate scenario
Presentation abstract: illustrations. This will help the audience to understand the improvement in
Covering technical tips and techniques for developing critical software in effectiveness when moving from a POSIX IPC to System V IPC in a real
compliance with DO-178B/C, IEC 61508, CENELEC, ISO 26262 and FDA time system.
guidelines, we will highlight the processes, procedures and tools used
to achieve critical software certification. Using practical examples, we Presentation abstract:
remove the mystery and confusion surrounding development, verification, It is a very demanding task to find suitable Light Weight IPC mechanisms
configuration management and quality assurance. We pay special attention which can be used in Real Time Systems. This involves lot of tradeoffs such
to requirements traceability, coding standards adherence, independence as the classical Speed Vs Reliability tradeoffs that need to be addressed
criteria, testing and structural coverage analysis. Finally, we discuss how during system design itself. This presentation will provide patterns for
these can assist in the next generation of certification. suitable POSIX IPC mechanisms which can be used in real time systems
with appropriate scenario illustrations. This presentation further discusses
11.00 Morning refreshments, exhibition and networking the improvement in effectiveness when moving from a POSIX IPC to
System V IPC in a real time system.
11.15 FUSE Testing an IP Based Streaming System Software
Puneet Gupta, Principal Engineer, Application Specific Media Systems 15.15 Exhibition and networking break
Group, Ittiam Systems
Chandrika B Jagath, Senior Engineer (Product Test), Ittiam Systems 15.30 Sponsor sessions

Audience Level: 16.20 Afternoon refreshments, exhibition and networking

Introductory
16.35 Remote Fault Monitoring and Diagnosis of Industrial Devices
Prerequisites: Meenakshi Vidya, Lecturer, Easwari Engineering College
Basic familiarity with streaming systems and steps that one usually follows
in testing an embedded system Audience level: Intermediate
Prerequisites: Familiarity of embedded microcontrollers
Key takeaways:
The attendee would learn a holistic approach towards testing streaming Key Takeaways:
system software - thorough, efficient and well structured. Attendees will learn how to view and track online changes in particular
parameters, and control Global Parameters using relay circuitry when they
Presentation abstract: exceed their specified limits.
Developers and testers of multimedia systems can relate to the irony of
a ‘supposedly’ well-tested product failing to perform in the expected way Presentation abstract:
on the field. Typically, a problem reported by a customer or found during a Continuous monitoring and diagnosis of industrial systems avoids
particular certification test cycle could have actually been found and rectified unexpected failures and greatly improves system reliability and
at a much earlier stage, and possibly with a much lower cost impact. The maintenance. This project aids in the measurement and control of various
most common source of shortcomings in such software entities arises Global Parameters and a serial interface to the PC. This project is designed
from the lack of understanding “how” to test and “what” to test for. In this using the dsPIC Microcontroller that aids in the measurement and control
paper, we shall cover various aspects related to addressing these two of various Global parameters with the help of sensors. This enables us to
questions, with specific examples to illustrate these points. The approach view and track the online changes encountered in the particular parameter
that is described in this document shall be referred to as the FUSE Testing, of all the parameters. It allows us to maintain a data base of the changes
and focuses on four main aspects – Functionality, Usage, Stability and encountered in the parameter and also allows us to control the parameters
Exactness. using relay circuitry when they exceed their specified limits.

12.30 Industry Keynote 17.50 Close of ESC India 2011 Day Two

Email: conferences-india@ubm.com
 Conference Day THREE – Friday 22 July 2011
09.00 Registration and refreshments

Track One
09.45 Migrating to Multicore – Case studies from Industry on the migration of
single core software applications to multicore Key takeaways: Learn how to effectively use agile techniques for developing
Rob Oshana, Director of Global Software R&D for Networking and Multimedia, and testing embedded system software.
Freescale Semiconductor
Presentation abstract: Embedded software developers deal with many of
Presentation abstract: Legacy migration to multicore software applications the same problems as the non-embedded software developer. But there are
comes with its share of challenges, but they can be mitigated when embedded other difficulties with embedded software including important time constraints,
developers divide and conquer the problem, use the right processes, and limited resources, late in the cycle integration with hardware to name a few.
leverage the right tools for the job. In this course, we will survey two case studies Agile development techniques can be used effectively on embedded software.
from industry, one a DSP video application, and the other a processor based The keys concepts of agile can be applied; deliver customer valued and tested
networking application. We will review the process and methodology used to software early and continuously, measure progress by passing customer
convert these applications from single core to multicore, and the lessons learned approved, acceptance tests executed during demos, and have the customer
from each. Topics include identification of multicore software “patterns” in the participate in the planning effort to name a few. In this course we will focus on
application, software partitioning, system configuration, application profiling and key agile techniques for embedded software including user stories, test driven
optimization, debugging, and integration challenges, and tools support. development, iterative deliveries and the agile software lifecycle.

11.00 Morning refreshments, exhibition and networking 15.15 Exhibition and networking break

11.15 Linux for Multicore Computing Platforms 15.30 Sponsor sessions

Rob Oshana, Director of Global Software R&D for Networking and Multimedia,
Freescale Semiconductor 16.20 Afternoon refreshments, exhibition and networking

Presentation abstract: Embedded Linux has been used in time constrained 16.35 Performance Optimization and Performance Engineering for Embedded
systems for some time now. The trend towards multicore embedded systems Systems
allows for Linux hosted embedded applications to have more flexibility in Rob Oshana, Director of Global Software R&D for Networking and Multimedia,
the programming model by using a RTOS for parts of the solution space, Freescale Semiconductor
running time-critical tasks on dedicated CPUs, and by expanding the system
configuration and software partitioning options. In this course we will delve Presentation abstract: The proper way to manage software performance is to
deeper into some of the multicore support options of Linux, look at the systematically plan for and predict the performance of the emerging software
differences in SMP and AMP programming models using Linux, and review some throughout the development process. This is important in embedded real-time
of the other embedded, real-time support offered by Linux for multicore systems systems where performance is an explicit, measurable requirement. Software
such as the Real-Time Patch, support for TLBs, and Linux power management performance engineering is a comprehensive way of managing performance that
features. An industry case study will be reviewed showing multicore Linux. includes principles for creating responsive software. This course will present a
set of simple techniques and industry examples that you can use to manage the
12.30 Industry Keynote performance of your software. We will discuss how to set up a benchmarking
program for your embedded project, profiling the application, using the
13.00 Lunch, exhibition and networking information to optimize the system, and tips for modeling the application and
spotting optimization blockers early in the process.
14.00 Agile Development and Testing
Rob Oshana, Director of Global Software R&D for Networking and Multimedia, 17.50 Close of ESC India 2011 Day Three
Freescale Semiconductor

Track TWO
09.45 Android Variants, Hacks, Tricks and Resources
Karim Yaghmour, Author, O’Reilly’s Building Embedded Linux Systems Audience level: Intermediate
Audience level: Introductory Prerequisites: Some experience in developing/managing development of
Prerequisites: None embedded code using C as programming language
Key Takeaways: Attendees will get a good overview of all the Android variants Key Takeaways: The talk will focus on the state-of-the-art techniques and tools
and variations out there and how they can use those to their benefit when they to find bugs with assurance and also verifying that a functionality is implemented
set out to create an Android-base embedded system. correctly.
Presentation abstract: While Google makes periodic code drops to the Android Presentation abstract: Embedded software developers face the challenge of
Open Source Project (AOSP), the bulk of the work done on Android occurs developing software with increasing complexity without compromising on quality.
behind closed-doors. There are, therefore, only a limited numbers of parties who This talk will present how modern tools for static analysis, model checking and
can meaningfully influence Android’s future at any point in time. This, though, test case generation can be used to find all occurrence of certain category of
hasn’t stopped 3rd parties and enthusiastic developers from customizing and errors as well as show that certain functionality has been implemented correctly.
extending Android in a variety of different ways. This talk provides an overview The talk will also share findings from applying these techniques to large
of 3rd party projects, resources, tools, etc. that embedded developers may want embedded code.
to look at if they intend to build Android-based embedded systems. Amongst
other things, this talk will go over the Cyanogenmod project, one of the more 15.15 Exhibition and networking break
prominent Android derivatives.
15.30 Sponsor sessions
11.00 Morning refreshments, exhibition and networking
16.20 Afternoon refreshments, exhibition and networking
11.15 Crypto Inside: Leveraging Security Hardware in Modern Embedded Devices
Serge Plagnol, Senior FAE, Southern Europe & India, Green Hills Software 16.35 uCLinux : Linux for Smaller Embedded Systems
Jagdish Bisawa, CTO, Ubisys Technologies
Audience level: Intermediate
Prerequisites: General knowledge of cryptography and key management Audience level: Intermediate
concepts
Prerequisites: Prior experience of Linux OS usage, concept of usage of an OS
Key Takeaways: Learn about the various options for hardware crypto offload in embedded applications, embedded application development exposure
and related security functionality available in modern embedded designs.
Key Takeaways: Knowing about using Linux in small, not very rich in memory
Presentation Abstract: With the increasing role of security in embedded embedded systems, software tools for uCLinux, configuring and compiling
systems, cryptography and key management in some form has become uClinux, downloading to the target hardware, differences between uClinux and
a ubiquitous requirement. However, embedded systems designers must Linux, applications available for uCLinux, writing applications for uCLinux, and
incorporate this functionality without blowing the budget on footprint, demonstration of uCLinux on an ARM7 board.
performance, and cost. This class will provide an overview of the security
hardware capabilities, from basic on-chip symmetric key accelerators to Trusted Presentation abstract: We start the class exploring uCLinux, a bit of its history
Platform Modules (TPMs) and hardware security modules (HSMs), available in and how it is different from Linux. We then move on to exploring more features
popular embedded microprocessors. The relative tradeoffs in cost, power, and of uCLinux, the tools that are available for configuring, building and downloading
performance will be described as well as ramifications to software and system (from host to target) uCLinux, application development process. In addition,
design. we move on to explore memory allocation/usage in uCLinux, how the uCLinux
executables are different than Linux executables, porting issues in uCLinux
12.30 Industry Keynote and the advantages / disadvantages of using uCLinux over Linux. All along, we
will be looking at practical examples, wherever possible. We also look at how a
13.00 Lunch, exhibition and networking bootloader application can help us in loading the uCLinux image onto the board
RAM/Flash. Finally, we wind-up the session with examples of how uCLinux has
14.00 Finding Bugs in Embedded Software been used in setting up a BOA webserver and a graphical application using an
Venkatesh R, Head of Embedded Software Research Centre, Tata Research open-source GUI called MiniGUI.
Development and Design Centre (TRDDC), TCS Innovation Labs

To register - Tel: +91 (022) 4046 1466 Fax: +91 (022) 4046 1477
 Conference Day THREE – Friday 22 July 2011

Track Three
09.45 GUI Development in Linux
Thangeswaran Natarajan, Technical Manager, HCL Technologies 12.30 Industry Keynote

Audience Level: 13.00 Lunch, exhibition and networking

Introductory
14.00 Fail Safe Hardware Design Techniques
Prerequisites: Kamalanaban Ganesan, Regional SBU Head, CMC Limited
The audience must have a basic idea on Linux Operating system
architecture Audience level:
Intermediate
Key takeaways:
This will help the audience to understand the concepts like Framebuffer, Prerequisites:
Linux Window System (X Server), Windows Manager (FVWM), and criteria The participant shall have basic embedded knowledge and minimum of
for selecting the GUI for development in Linux. They will also hear about 8-10 months experience
comparing the GUI tools like QT, GTK and JAVA.
Key Takeaways:
Presentation abstract: At the end our session, the audience will get design techniques, thumbrules,
GUI forms the vital part of any embedded products and Embedded GUI and complaints specific information used for first run complaint hardware
is getting revolutionized (for example, IPhone creates a revolution in User design.
Interface in the mobile market). Considering the importance of GUI, the
objective of the presentation is to present how the Graphics system works in Presentation abstract:
Linux using graphic hardware-independent abstraction (Framebuffer), how The objective of this paper is to share our enriched experience and
the windowing system is managed using X11, how the multiple session or techniques used for designing fail safe hardware embedded systems.
window management is performed using FVWM, and what are the criteria Safety Standards like CENELEC, DO are covered in this paper.
required for analysis and selecting the GUI tool best fit for development
in Linux Platform. The presentation also covers a case study with the 15.15 Exhibition and networking break
comparison of GUI tools like Qt, GTK and Java with internal details like
how it interacts with the backend layers and hardware. Finally, it will cover 15.30 Sponsor sessions
the Touch Screen interfacing and interacting with the GUI through touch
Screen. 16.20 Afternoon refreshments, exhibition and networking

11.00 Morning refreshments, exhibition and networking 16.35 Energy Efficiency in Network End Points
Kalyan Chakravarthy, System Architect, Freescale Semiconductor
11.15 Powerline Communication Systems Manish Jaggi, Embedded Software Engineer, Freescale Semiconductor
Shankar Balasubramanian, Senior Design Engineer, Hardware Group,
Sling Media Audience level:
Introductory
Audience Level: Introductory
Prerequisites: Technology savvy mindset Prerequisites:
Understanding of System Software and SoC Architecture
Key takeaways:
Benefits and challenges faced in PLC, homeplug standards, bandwidth Key Takeaways:
limitations and data rates achievable in user scenario, and a comparison Power modes tuned to application workloads.
between wireless and PLC data rates.
Presentation abstract:
Presentation abstract: Energy efficiency requirements for networking end points are two
The demand for home connectivity is exploding everyday which has led dimensional. First is driven by energy star, which mandates less than
to the need for simple, reliable solutions for moving content around the 1W consumption in standby mode. The second, driven by Energy using
digital home. Powerline communication (PLC) technology uses the existing Product (EuP), which requires the product to consume less power under low
electrical wiring and outlets in a home. In effect, every electrical outlet performance conditions. Systems can be designed to support low power
becomes an Ethernet jack or network connection point - without adding modes which can be tuned with application workload. This paper discusses
any new wires! How good is powerline as a communication channel? such low power techniques for typical use cases such as Network attached
Powerline network has a very dynamic transfer function and varies with printer or NAS Box.
time and length. Is this technology rugged enough to work well in noisy
Indian powerlines? To be discussed: The advantages and benefits of using 17.50 Close of ESC India 2011 Day Three
power line as medium of data transmission at homes. Brief discussion on
technologies in PLC including special modulation schemes used. How
secure is this communication, QoS and ease of installation compared
with wireless technology? Why to use valuable Wi-Fi bandwidth for
fixed devices, if these could be served by PLC? Various standards and
regulations. Specific areas in which PLC is used and could be used in
future (including BPL). Is it possible to have multiple HD streams using this
technology?

www.esc-india.com
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