IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 68, NO.

12, DECEMBER 2021 3483

AI Technology for NoC Performance Evaluation

Biswajit Bhowmik , Senior Member, IEEE, Pallabi Hazarika, Prachi Kale, and Sajal Jain

Abstract—An on-chip network has become a powerful plat- be avoided using alternate technology like machine learn-
form for solving complex and large-scale computation problems ing (ML)-based methods. Recent researches in this way are
in the present decade. However, the performance of bus-based discussed in [4], [5], [6], [7], [8], [9], [10], [11], [12]. These
architectures, including an increasing number of IP cores in
systems-on-chip (SoCs), does not meet the requirements of schemes are comparative to each other. However, they are not
lower latencies and higher bandwidth for many applications. A adequate to the expected level. For example, their prediction
network-on-chip (NoC) has become a prevalent solution to over- error and speedup ranges from 9-45% and 2-1300×, respec-
come the limitations. Performance analysis of NoC’s is essential tively, including high evaluation time. It motivates to design a
for its architectural design. NoC simulators traditionally investi- practical framework to improve these parameters and quickly
gate performance despite they are slow with varying architectural
sizes. This work proposes a machine learning-based framework estimate vagarious performance metrics in NoCs of larger size.
that evaluates NoC performance quickly. The proposed frame- This brief proposes an ML-based performance evaluation
work uses the linear regression method to predict different scheme for NoCs. The scheme uses a Linear Regression algo-
performance metrics by learning the trained dataset speedily and rithm trained by data collected from the BookSim simulator.
accurately. Varying architectural parameters conduct thorough Several rounds of experiments are conducted at a varying
experiments on a set of mesh NoCs. The experiments’ highlights
include the network latency, hop count, maximum switch, and system configuration to predict multiple performance param-
channel power consumption as 30-80 cycles, 2-11, 25µW, and eters for a set of mesh NoCs. The anticipated results by
240µW, respectively. Further, the proposed framework achieves the proposed scheme highlight that average network latency
accuracy up to 94% and speedup of up to 2228×. and hop count are about 30-80 cycles, and 2-11, respectively.
Index Terms—Networks-on-chip, machine learning, linear Other metrics like the total area, maximum switch, channel,
regression, dataset, performance evaluation. and total power consumption are predicted as 0.08-5µm2 ,
25µW, 240µW, and 300µW, respectively. The advantages of
the proposed approach are that it achieves a minimum speedup
I. I NTRODUCTION of 260× and a maximum speedup of 2228× compared to
OWADAYS, multiprocessor SoCs (MPSoCs) cannot
N meet the high performance and scalability requirements
to handle the complicated on-chip communications due to
the BookSim simulator. Also, the prediction error lies in the
range of 6-8% resulting in up to 94% accuracy. Compared to
previous works, the proposed prediction framework provides
communication bottleneck. An NoC fabric has become a up to 44% more accuracy and renders up to 2200× more
prevalent solution interconnecting hundreds to thousands of speedup than the previous ones. Note that these improvements
cores in many-core systems [1], [2]. The primary way of grow with the NoC size.
evaluating an NoC architecture is to measure its performance. The rest of this brief is organized as follows. Section II
The performance is traditionally evaluated via simulations [3]. presents the proposed scheme. Section III provides the exper-
Researchers use various cycle-accurate NoC simulators like imental results. Section IV concludes this brief.
BookSim, Nirgam, Noxim, etc. [4]. However, the time
increases for providing the results by these simulators while II. P ROPOSED W ORK
the NoC size increases. Thus, there is a need to develop a
Artificial intelligence (AI) technology such as machine
faster performance evaluation scheme for NoCs.
learning has surpassed human efforts and become a signifi-
Conventional performance measurement approaches rely on
cant milestone for many applications, including VLSI systems
simulations at lower abstraction levels to run the architec-
and applications like performance evaluation in NoCs. The
tures for accurate results. But running at lower abstraction
proposed performance evaluation framework using a machine
levels takes a long time. On the other hand, running simu-
learning technique is based on the linear regression algo-
lations at higher abstraction levels is time efficient but could
rithm. The proposed framework is expected to predict multiple
not deliver accurate results [5]. So traditional approaches can
performance metrics in an NoC having a large size and
Manuscript received September 15, 2021; revised October 23, 2021; increase the computing flexibility of the NoC platform.
accepted October 25, 2021. Date of publication November 1, 2021; date
of current version November 24, 2021. This brief was recommended
by Associate Editor Y. Ha and E. Bonizzoni. (Corresponding author: A. Linear Regression Framework for NoCs
Biswajit Bhowmik.)
The authors are with the Department of Computer Science and Engineering, Linear Regression (LR) is a supervised machine learning
National Institute of Technology Karnataka, Mangalore 575025, India (e-mail: algorithm that predicts continuous/actual or numeric values. It
brb@nitk.edu.in). is advantageous and easier to interpret, implement, and train
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TCSII.2021.3124297. efficiently. It handles overfitting well using reduction tech-
Digital Object Identifier 10.1109/TCSII.2021.3124297 niques, regularization, and cross validation [13] dimensionally.
1549-7747 
c 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
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3484 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 68, NO. 12, DECEMBER 2021

Algorithm 1 Dataset_Generation
1: procedure DatasetGenerator()
2: Set V← setVirtualChannel(), B← setBufferSize(), R←
setRoutingAlgorithm(), T← setTopologyType(), F←
setTrafficPattern(), I← setInjectionRate(), S← setTopolo-
gySize(), P← setPacketSize(), and A← setSamplePeriod()

3: C← loadConfiguration(V,B,R,T,F,I,S,P,A)
4: for each(s∈ S|S={2×2, ..., 15×15}) do
5: for each(t∈ T|T={uniform,tornado}) do
6: for each(v∈ V|V={2,3,4,5}) do
7: for each(b∈ B|B={6,8}) do
8: for each(i∈ I|I={0.001,..,0.009}) do
9: beginSimulation(command, C)
10: result←read(APL,ANL,AHC,
CWPC,SPC,TPC,TA)
11: dataset←appendResult(result)
12: end for
Fig. 1. Proposed LR Framework. 13: end for
14: end for
15: end for
The LR has two parameters- weight (regression coefficient) 16: end for
m and bias c. Regression coefficients are estimates of the 17: end procedure
unknown dataset parameters. In other words, it is the scale
factor to each input data. Bias is a factor that offsets all
predictions. The prepared data is divided into “attributes”
generation and collection. This work employs BookSim
and “labels”. Attributes are the independent variables, while
2.0 simulator to generate the training dataset for the
labels are dependent variables whose values are predicted–the
set of NoCs taken. Various performance metrics are
algorithm models a target prediction value for the dependent
measured via simulations, and the proposed scheme pre-
variables (labels) based on the attributes. We need to check for
dicts the same. These parameters are average packet
variables that have some linear relationship between the labels
latency (APL), average network latency (ANL), aver-
and the attributes from our dataset. And accordingly, we select
gare hop count (AHC), channel wire power consumption
the attributes that are required to build the model. By training
(CWPC), switch power consumption (SPC), total power
our model on the selected pair of attributes and labels, the
consumption (TPC), and total area (TA). The collected
algorithm learns the best combination of m and c. The best
dataset is now ready to train the model using the Linear
combination of values makes the most accurate predictions
Regression algorithm. In other words, the model learns
with a minor error. Training gets completed when the model
the parameters from the trained dataset.
returns an acceptable error value. The model finds the best-
• Testing Phase-The second phase is the testing phase. The
fit regression line that best fits the data points. The evaluation
underlying regression model is trained to validate the
framework calculates this metric through the mean square error
results predicted for networks under consideration. The
(MSE) cost function. The metric finds the error (difference)
validation in this phase is mainly performed by compar-
between the actual results and the predicted results.
ing the simulation and predicted results generated for the
networks.
B. Designing Prediction Framework The simulation results may differ from the predicted results
Figure 1 describes the steps for designing the proposed by the framework for an NoC. This difference in the MSE is
prediction framework. The framework consists of two phases: measured using the Gradient descent. The MSE is defined in
the training and testing phase. A brief description of these Equation (1). Here, N = number of data points, yt is the actual
phases is stated here. value, and y∗t is the predicted output. Gradient descent updates
LR parameters by minimizing the cost function and reducing
1  ∗
N
MSE = (yt − yt )2 (1) MSE by evaluating the cost function’s gradient. Pseudocode
N for the proposed LR framework is stated in Algorithm 2 where
t=1
one finds how the MSE gets calculated.
• Training Phase-The training phase is the first phase of
the prediction model. In this phase, the training dataset
for an NoC is collected on running a simulator for the III. E XPERIMENTAL R ESULTS
network. The simulations evaluate multiple performance This section evaluates the performance of NoC architec-
metrics, which are fed for training then for testing too. tures by the proposed learning-based framework. A set of 2D
Algorithm 1 reveals the procedure of training dataset mesh NoCs with a size that ranges from 2 × 2 − 15 × 15

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BHOWMIK et al.: AI TECHNOLOGY FOR NoC PERFORMANCE EVALUATION 3485

Algorithm 2 Linear_Regression_Framework
1: procedure LinearRegressionFramework()
2: loadFile(dataset)
3: Partition dataset into train and test data
4: Determine Attributes and Labels
5: Training and testing
6: regressor.fit(train data)
7: regressor.predict(test data)
8: Framework Evaluation
9: calculateMSE(test data, prediction data)
10: timingComparison(simulation time, framework time)

11: end procedure

TABLE I
B OOK S IM S IMULATION C ONFIGURATION S ETUP

are put under the evaluation. First, we briefly describe the

experimental details and training dataset preparation. Then,
we deeply analyze the predicted results, followed by validat- Fig. 2. Learned and predicted values by the proposed scheme at
Traffic = Uniform, VC = 4, PIR = 0.002, and Buffer = 8.
ing the results. Next, a comparison of the time consumed
by simulation and the proposed methods for evaluating the
performance is discussed. Finally, the proposed scheme com- measured metrics for the remaining networks are used as the
pares its achievements with the existing approaches. testing dataset to validate the metrics predicted for them.

A. Experimental Setup and Dataset Preparation B. Result Analysis

A cycle-accurate NoC simulator, namely BookSim 2.0, is The effectiveness of the proposed linear regression-based
modified to generate the training dataset. The BookSim con- technique for NoC performance evaluation is established
figuration at a glance is provided in Table I. The dataset is by predicting the performance metrics over the simulation
generated on several architectural parameters like virtual chan- method. Figure 2 shows the predicted results over the simula-
nels (VC), buffer size, topology size, and packet injection rate tions for seven performance parameters-average network and
(PIR). Every time a simulation is run for an extended period of packet latency, average hop count, total area, switch, channel,
100000 cycles. The deadlock-free XY routing algorithm trans- and total power consumption in several NoCs. In Figure 2,
mits the traffic injected using the Uniform and Tornado traffic results labeled by BookSim represent simulated values for the
patterns. The traffic in terms of packets is transferred. Each topologies. The values marked by Prediction for 2 × 2 − 8 × 8
packet size is 20 flits. Entire experiments are accomplished in NoCs show the level of learning by the proposed model. The
the computer system with the configuration: Core i7, 2.6 GHz, values labeled by Prediction for the rest of the NoCs provide
8 GB RAM, and Ubuntu 18.04 LTE OS. the predicted metrics. As shown in Figure 2(a) and 2(b), the
The entire dataset is partitioned into two categories: training proposed framework predicts the average network and packet
and testing dataset. The values generated from the simulations latency as 59.62 and 60.15 cycles, respectively, for the 9 × 9
on the 2 × 2 to 8 × 8 mesh NoC are used as training data. The mesh NoC. The same parameters for the 15 × 15 mesh NoC
values generated for the rest of the network of size 9 × 9 to are about 80-82 cycles. Prediction of other metrics- average
15 × 15 are exercised as the testing data. Further, the training hop count and total area on the 9 × 9 mesh NoC are 6.93 and
or testing type dataset is generated at the packet injection rate 1.68 µm2 , respectively. These metrics are seen in Figures 2(c)
(PIR) in the range of 0.001 to 0.009, whereas the simulations and 2(d), respectively. The same prediction in Figures 2(e)
run at each PIR value measure the performance metrics. As and 2(f) shows 3.60 µW, and 35.04 µW and 52.54 µW as the
stated, the estimated metrics for the meshes up to the network switch, and channel and total power consumption in 9×9 mesh
size 8 × 8 are exploited as the training data. In contrast, the NoC. It shows that the prediction and the simulation provide

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3486 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 68, NO. 12, DECEMBER 2021

Fig. 3. Predicted results by the proposed scheme at (a-d) Traffic = Uniform, Fig. 4. Predicted performance metrics at Traffic = Uniform, VC = 5,
VC = 3, PIR = 0.0025, and Buffer = 6; (e-f) Traffic = Tornado, VC = 4, Buffer = 8 on the 11 × 11 mesh NoC.
PIR = 0.0015, and Buffer = 8.

configurations VC = 5, buffer = 8, PIR = 0.001-0.009,

nearly the same result. In other words, our model gets trained
and Traffic =Uniform. As observed, the network and packet
properly on the training dataset and mitigates the predicted
latency ranges from 64.26−101.15 cycles (Figure 4(a)) and
and simulated data gap. One can observe this mitigation on
64.45-105.92 cycles (Figure 4(b)), respectively, whereas the
analysis of the testing data with the predicted results.
range 8.26502-8.29486 (Figure 4(c)) shows the average hop
Experiments are accomplished in varying environments to
count on this network. Subsequently, amounts of power con-
explore the proposed LR-model more. For instance, the same
sumed by different NoC components are seen in Figure 4(d)
set of performance parameters are evaluated at the experi-
to 4(f) that show the average switch, channel, and total
mental configuration of VC = 4, buffer = 8, PIR = 0.002,
power consumption, respectively, evaluated using the proposed
and Traffic = Uniform. When the setup is partially modi-
LR-model.
fied, say VC = 3, buffer = 6, PIR = 0.0025, one observes
the predicted performance metrics over the simulated as
shown in Figure 3. In this case, the average network and
packet latency for varying topology sizes is about 62.52-88.34 C. Validation of Predicted Results
cycles and 63.60-89.58 cycles, respectively. Further, the aver- The effectiveness of the proposed ML-based performance
age hop count and total areas are 7-11 and 1.45-2.70 µm2 , evaluation can be further verified by analyzing the predicted
respectively. As observed, the highest and lowest mean results using the proposed framework with the simulation
square error is 0.055 and 0.96, respectively. The experiment results using the BookSim. The optimal value of weight m and
is extended and performed at another configuration where bias c are learned by training our proposed model. The results
VC = 4, buffer = 8, PIR = 0.0015, and Traffic = Tornado. are predicted using their optimal values. Predicted results are
Then average hop count and total area metrics can be then compared with BookSim simulation results using the
observed as seen in Figure 3(e) and 3(f), respectively. The error metric MSE. As seen in Figure 2 through 4, the proposed
highest and lowest mean square error are 0.96 and 0.77, framework approximates the evaluated performance metrics
respectively. about 92-94%. In other words, the prediction error by the
Figure 4 shows the prediction of different metrics on the proposed model is 6-8%. Thus, the current NoC performance
11 × 11 mesh NoC when our LR framework is applied evaluation scheme achieves an acceptable effectiveness level
on this network. Evaluations are made at the experimental for most performance metrics.

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BHOWMIK et al.: AI TECHNOLOGY FOR NoC PERFORMANCE EVALUATION 3487

TABLE II
C OMPARISON ON THE E VALUATION T IME proposed LR framework achieves comparatively high accuracy
and speed up concerning the previous works discussed above.
Further, our approach takes significantly very little time to
predict the performance metrics. Thus, one can say that our
scheme provides about 44% and 2200× more accuracy and
speedup than the previous works.

IV. C ONCLUSION AND F UTURE W ORK

A Linear Regression-based framework has been proposed to
predict quickly and accurately several performance parameters
TABLE III
C OMPARATIVE S TUDY W ITH P REVIOUS W ORKS such as latency, hop count, power consumption, and area for
many meshes NoCs. The framework is learned with the dataset
supplied by the cycle-accurate BookSim simulator at varying
simulation setups. As a result, the framework has achieved an
accuracy level of up to 94% and speedup up to 2228×. It is
more effective than a wide range of existing works. The future
work aims to investigate the model’s scalability and improve
the accuracy by analyzing other learning algorithms for eval-
uating the performance metrics and extending the scheme on
3D-NoC architectures.

D. Comparison Study R EFERENCES

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