Electronics & Communication Engineering
Electronics & Communication Engineering
Electronics & Communication Engineering
SEMESTER V
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDITS
ECT301 LINEAR INTEGRATED CIRCUITS
PCC 3 1 0 4
Preamble: This course aims to develop the skill to design circuits using operational amplifiers and
other linear ICs for various applications.
Course Outcomes: After the completion of the course the student will be able to
CO4 Explain the working and applications of timer, VCO and PLL ICs
CO5 Outline the working of Voltage regulator IC’s and Data converters
PO 1 PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PO 8 PO 9 PO PO PO
10 11 12
CO 1 3 3 1 2 1
CO 2 3 3 2 2 2 1
CO 3 3 3 2 2 2 1
CO 4 3 3 1 2 2 1
CO 5 3 3 2 2 2 1
Assessment Pattern
Mark distribution
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of
which student should answer any one. Each question can have maximum 2 sub-divisions
and carry 14 marks.
Course Outcome 2 (CO2): Design operational amplifier circuits for various applications.
1. Derive the design equations for a second order Butterworth active low pass filter.
2. Design a Notch filter to eliminate power supply hum (50 Hz).
3. Design a first order low pass filter at a cut-off frequency of 2kHz with a pass band gain of 3
Course Outcome 4 (CO4): Explain the working and applications of specialized ICs
1. With the help of internal diagram explain the monostable operation of timer IC 555.
Draw the input and different output waveforms. Derive the equation for pulse width.
2. Explain the operation of Phase Locked Loop. What is lock range and capture range?
Realize a summing amplifier to obtain a given output voltage.
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3. Design a circuit to multiply the incoming frequency by a factor of 5 using 565 PLL.
Course Outcome 5 (CO5): Outline the working of Voltage regulator IC’s and Data
converters
1. What is the principle of operation of Dual slope ADC. Deduce the relationship between
analogue input and digital output of the ADC.
2. Explain how current boosting is achieved using I.C 723
3. Explain the working of successive approximation ADC
SYLLABUS
Module 1:
Operational amplifiers(Op Amps): The 741 Op Amp, Block diagram, Ideal op-amp parameters,
typical parameter values for 741, Equivalent circuit, Open loop configurations, Voltage transfer
curve, Frequency response curve.
Module 2:
Op-amp with negative feedback: General concept of Voltage Series, Voltage Shunt, current
series and current shunt negative feedback, Op Amp circuits with voltage series and voltage shunt
feedback, Virtual ground Concept; analysis of practical inverting and non-inverting amplifiers for
closed loop gain, Input Resistance and Output Resistance.
Op-amp applications: Summer, Voltage Follower-loading effects, Differential and
Instrumentation Amplifiers, Voltage to current and Current to voltage converters, Integrator,
Differentiator, Precision rectifiers, Comparators, Schmitt Triggers, Log and antilog amplifiers.
Module 3:
Op-amp Oscillators and Multivibrators: Phase Shift and Wien-bridge Oscillators, Triangular and
Sawtooth waveform generators, Astable and monostable multivibrators.
Active filters: Comparison with passive filters, First and second order low pass, High pass, Band
pass and band reject active filters, state variable filters.
Module 4 :
Timer and VCO: Timer IC 555- Functional diagram, Astable and monostable operations;. Basic
concepts of Voltage Controlled Oscillator and application of VCO IC LM566,
Phase Locked Loop – Operation, Closed loop analysis, Lock and capture range, Basic building
blocks, PLL IC 565, Applications of PLL.
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Module 5:
Voltage Regulators: Fixed and Adjustable voltage regulators, IC 723 – Low voltage and high
voltage configurations, Current boosting, Current limiting, Short circuit and Fold-back protection.
Data Converters: Digital to Analog converters, Specifications, Weighted resistor type and R-2R
Ladder type.
Analog to Digital Converters: Specifications, Flash type and Successive approximation type.
Text Books
1. Roy D. C. and S. B. Jain, Linear Integrated Circuits, New Age International, 3/e, 2010
Reference Books
1. DFranco S., Design with Operational Amplifiers and Analog Integrated Circuits, 3/e,
Tata McGraw Hill, 2008
2. Gayakwad R. A., Op-Amps and Linear Integrated Circuits, Prentice Hall, 4/e, 2010
3. Salivahanan S. and V. S. K. Bhaaskaran, Linear Integrated Circuits, Tata McGraw
Hill, 2008.
4. Botkar K. R., Integrated Circuits, 10/e, Khanna Publishers, 2010
5. C.G. Clayton, Operational Amplifiers, Butterworth & Company Publ. Ltd. Elsevier,
1971
6. David A. Bell, Operational Amplifiers & Linear ICs, Oxford University Press,
2nd edition,2010
7. R.F. Coughlin & Fredrick Driscoll, Operational Amplifiers & Linear Integrated
Circuits,6th Edition, PHI,2001
8. Sedra A. S. and K. C. Smith, Microelectronic Circuits, 6/e, Oxford University Press,
2013.
No. of
No Topic
Lectures
1 Operational amplifiers (9)
1.1 The 741 Op Amp, Block diagram, Ideal op-amp parameters, typical 1
parameter values for 741
1.2 Equivalent circuit, Open loop configurations, Voltage transfer curve, 1
Frequency response curve.
1.3 Differential amplifier configurations using BJT, DC Analysis- transfer 2
characteristics
1.4 AC analysis- differential and common mode gains, CMRR, input and 2
output resistance, Voltage gain
1.5 Constant current bias and constant current source 1
1.6 Concept of current mirror, the two transistor current mirror Wilson and 2
Widlar current mirrors.
2.1 General concept of Voltage Series, Voltage Shunt, current series and 1
current shunt negative feedback
2.2 Op Amp circuits with voltage series and voltage shunt feedback, Virtual 1
ground Concept
2.3 Analysis of practical inverting and non-inverting amplifier 2
2.4 Summer, Voltage Follower-loading effect 1
2.5 Differential and Instrumentation Amplifiers 1
2.6 Voltage to current and Current to voltage converters 1
4.4 PLL Operation, Closed loop analysis Lock and capture range. 2
5.3 Current boosting, Current limiting, Short circuit and Fold-back protection. 2
Assignment:
Assignment may be given on related innovative topics on linear IC, like Analog multiplier- Gilbert
multiplier cell, variable trans-conductance technique, application of analog multiplier IC AD633.,
sigma delta or other types of ADC etc. At least one assignment should be simulation of opamp
circuits on any circuit simulation software. The following simulations can be done in QUCS, KiCad
or PSPICE.(The course instructor is free to add or modify the list)
1. Design and simulate a BJT differential amplifier. Observe the input and output signals. Plot
the AC frequency response
2. Design and simulate Wien bridge oscillator for a frequency of 10 kHz. Run a transient
simulation and observe the output waveform.
3. Design and implement differential amplifier and measure its CMRR. Plot its transfer
characteristics.
4. Design and simulate non-inverting amplifier for gain 5. Observe the input and output signals.
Run the ac simulation and observe the frequency response and 3− db bandwidth.
5. Design and simulate a 3 bit flash type ADC. Observe the output bit patterns and transfer
characteristics
6. Design and simulate R − 2R DAC circuit.
7. Design and implement Schmitt trigger circuit for upper triggering point of +8 V and a lower
triggering point of −4 V using op-amps.
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Model Question
PART A
PART – B
Answer one question from each module; each question carries 14 marks.
Module I
11. a) Derive CMRR, input resistance and output resistance of a dual 7 CO1 K3
input balanced output differential amplifier configuration.
11. b) What is the principle of operation of Wilson current mirror 7 CO1 K2
and its advantages? Deduce the expression for its current
gain.
OR
12.a) Draw the equivalent circuit of an operational amplifier. Explain 6 CO1 K3
voltage transfer characteristics of an operational amplifier.
12.b) Explain the following properties of a practical opamp (i) 8 CO1 K2
Bandwidth (ii) Slew rate (iii) Input offset voltage (iv) Input offset
current
Module II
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Preamble: This course aims to provide an understanding of the principles, algorithms and
applications of DSP.
Course Outcomes: After the completion of the course the student will be able to
State and prove the fundamental properties and relations relevant to DFT and
CO 1
solve basic problems involving DFT based filtering methods
CO 2 Compute DFT and IDFT using DIT and DIF radix-2 FFT algorithms
CO 3 Design linear phase FIR filters and IIR filters for a given specification
Illustrate the various FIR and IIR filter structures for the realization of the
CO 4
given system function
Explain the basic multi-rate DSP operations decimation and interpolation in
CO5
both time and frequency domains using supported mathematical equations
Explain the architecture of DSP processor (TMS320C67xx) and the finite word
CO6 length effects
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO 1 3 3 2 2 2
CO 2 3 3 3 3 2
CO 3 3 3 3 3 2
CO 4 3 3 2 3 2
CO5 2 2 2 2 2
CO6 2 2 - - 2
Assessment Pattern
Mark distribution
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
CO1: State and prove the fundamental properties and relations relevant to DFT and
solve basic problems involving DFT based filtering methods
1. Determine the N-point DFT X(k) of the N point sequences given by (i) x1(n)=sin(2πn/N) n/N)
(ii) x2(n)=cos2(2πn/N) n/N)
2. Show that if x(n) is a real valued sequence, then its DFT X(k) is also real and even
CO2: Compute DFT and IDFT using DIT and DIF radix-2 FFT algorithms
2. Find out the number of complex multiplications require to perform an 1024 point DFT
using(i)direct computation and (ii) using radix 2 FFT algorithm?
CO3: Design linear phase FIR filters and IIR filters for a given specification
1. Design a linear phase FIR filter with order M=15 and cut-off frequency πn/N) /6 .Use a
Hanning Window.
2. Design a low pass digital butter-worth filter using bilinear transformation for the given
specifications. Passband ripple ≤1dB, Passband edge:4kHz, Stopband Attenuation:≥40
dB, Stopband edge:6kHz, Sampling requency:24 kHz
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CO4: Illustrate the various FIR and IIR filter structures for the realization of the given
system function
1. Obtain the direct form II and transpose structure of the filter whose transfer function is
given below.
2
0 .44 z + 0.362 z+ 0.02
H ( z )= 3
z +.4 z 2+.18 z −0.2
CO5: Explain the basic multi-rate DSP operations decimation and interpolation in both
time and frequency domains using supported mathematical equations
1. Derive the frequency domain expression of the factor of 2 up-sampler whose input is
given by x(n) and transform by X(k)?
2. Bring out the role of an anti-imaging filter in a sampling rate converter?
CO6: Explain the architecture of DSP processor TMS320C67xx and the finite word
length effects
1. Derive the variance of quantization noise in an ADC with step size Δ, assuming
uniformly distributed quantization noise with zero mean ?
2. Bring out the architectural features of TMS320C67xx digital signal processor?
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SYLLABUS
Module 1
Basic Elements of a DSP system, Typical DSP applications, Finite-length discrete transforms,
Orthogonal transforms – The Discrete Fourier Transform: DFT as a linear transformation (Matrix
relations), Relationship of the DFT to other transforms, IDFT, Properties of DFT and examples.
Circular convolution, Linear Filtering methods based on the DFT, linear convolution using
circular convolution, Filtering of long data sequences, overlap save and overlap add methods,
Frequency Analysis of Signals using the DFT (concept only required)
Module 2
Efficient Computation of DFT: Fast Fourier Transform Algorithms-Radix-2 Decimation in Time
and Decimation in Frequency FFT Algorithms, IDFT computation using Radix-2 FFT
Algorithms, Application of FFT Algorithms, Efficient computation of DFT of Two Real
Sequences and a 2N-Point Real Sequence
Module 3
Design of FIR Filters - Symmetric and Anti-symmetric FIR Filters, Design of linear phase FIR
filters using Window methods, (rectangular, Hamming and Hanning) and frequency sampling
method, Comparison of design methods for Linear Phase FIR Filters. Design of IIRDigital
Filters from Analog Filters (Butterworth), IIR Filter Design by Impulse Invariance, and
Bilinear Transformation, Frequency Transformations in the Analog and Digital Domain.
Module 4
Structures for the realization of Discrete Time Systems - Block diagram and signal flow graph
representations of filters, FIR Filter Structures: Linear structures, Direct Form, CascadeForm,
IIR Filter Structures: Direct Form, Transposed Form, Cascade Form and Parallel Form,
Computational Complexity of Digital filter structures. Multi-rate Digital Signal Processing:
Decimation and Interpolation (Time domain and Frequency Domain Interpretation ),
Anti- aliasing and anti-imaging filter.
Module 5
Computer architecture for signal processing: Harvard Architecture, pipelining, MAC,
Introduction to TMS320C67xx digital signal processor, Functional Block Diagram.
Finite word length effects in DSP systems: Introduction (analysis not required), fixed-point
and floating-point DSP arithmetic, ADC quantization noise, Finite word length effects in
IIRdigital filters: coefficient quantization errors. Finite word length effects in FFT
algorithms: Round off errors
Text Books
1. Proakis J. G. and Manolakis D. G., Digital Signal Processing, 4/e, Pearson Education,
2007
2. Alan V Oppenheim, Ronald W. Schafer ,Discrete-Time Signal Processing, 3rd Edition ,
Pearson ,2010
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3. Mitra S. K., Digital Signal Processing: A Computer Based Approach, 4/e McGraw Hill
(India) 2014
Reference Books
4. Ifeachor E.C. and Jervis B. W., Digital Signal Processing: A Practical Approach, 2/e
Pearson Education, 2009.
5. Lyons, Richard G., Understanding Digital Signal Processing, 3/e. Pearson Education
India, 2004.
6. Salivahanan S, Digital Signal Processing,4e, Mc Graw –Hill Education New Delhi, 2019
7. Chassaing, Rulph., DSP applications using C and the TMS320C6x DSK. Vol. 13. John
Wiley & Sons, 2003.
8. Vinay.K.Ingle, John.G.Proakis, Digital Signal Processing: Bookware Companion
Series,Thomson,2004
9. Chen, C.T., “Digital Signal Processing: Spectral Computation & Filter Design”, Oxford
Univ. Press, 2001.
10. Monson H Hayes, “Schaums outline: Digital Signal Processing”, McGraw HillProfessional,
1999
1. Compute the DTFT of the given sequence and plot its magnitude and phase
2. Compute the 4 point DFT of the above signal and plot its magnitude and phase
2. Zero pad the sequence x(n) by 4 and compute the 8 point DFT and find the
corresponding magnitude and phase plots. Compare the spectra with that in (b) and
comment on it.
3. The first five values of the 8 point DFT of a real valued sequence x(n) are given by
{0.25, 0.125-j0.3, 0, 0.125-j0.06, 0.5}. Determine the DFT of each of the following
sequences using properties. Hint :IDFT may not be computed.
1. x1(n)=x((2-n))8
2. x3(n)=x2(n)
3. x4(n)=x(n)ejπn/N) in/4
4. a) Develop a function to implement the over-lap add method using circular
convolution operation. The format should be function [y]=overlappadd(x,h,N), where
y is the output sequence, x is the input sequence and N is the block -
length>=2*Length(h)-1.
1. Choose T=1 s for impulse invariance and determine the system function H(z) in
parallel form.Plot the log-magnitude response in dB and impulse response h(n)
2. Choose T=1/8000 s and repeat the same procedure. Compare this design with that in
(a) and comment on the effect of T on the impulse invariant design?
6. A filter is described by the following difference equation:
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16y(n)+12y(n-1)+2y(n-2)-4y(n-3)-y(n-4)=x(n)-3x(n-1)+11x(n-2)-27x(n-3)+18x(n-4)
2. Using the Direct form structure, obtain the cascade form filter structure
7. Consider a signal given by x(n)=(0.5)nu(n). Decimate the signal by a factor 4 and plot
the output in time domain and frequency domain?
1. Interpolate the signal by a factor of 4 and plot the output in time domain and
frequency domain?
7.Obtain the cascade form realization of the third order IIR filter transfer function given by
0 .44 z 2+ 0.362 z +0.02
H ( z ) =
( z 2+ 0 .8 z ❑+.0 .5 ) ( z − 0.4 ) (3) K3
11. a) How will you perform linear convolution using circular convolution? Find the linear
convolution of the given sequences x(n) = {2, 9,7, 4} and h(n) = {1, 3, 1, 2} using
circular convolution? (8) K3
13.a) Compute the 8 point DFT of x(n) = {2,1,-1,3,5,2,4,1} using radix-2 decimation in time
FFT algorithm. (9) K3
b)Bring out how a 2N point DFT of a 2N point sequence can be found using the
computation of a single N point DFT. (5) K3
OR
14 a.) Find the 8 point DFT of a real sequence x(n)={1,2,2,2,1,0,0,0,0} using radix-2
decimation in frequency algorithm (9)K3
b) Bring out how N-point DFT of two real valued sequences can be found by computing
a single N-point DFT. (5) K3
15.a. Design a linear phase FIR low pass filter having length M = 15 and cut-off frequency ωc
= πn/N) /6. Use Hamming window. (10) K3
b.Prove that if z1 is a zero of an FIR filter, then 1/z1 is also a zero? (4) K2
OR
16. a. Design a digital Butterworth low pass filter with ω p = πn/N) /6, ωs = πn/N) /4, minimum pass band
gain = -2 dB and minimum stop band attenuation = 8 dB. Use bilinear transformation.(Take T
= 1s) (10) K3
b. What is warping effect in bilinear transformation and how it can be eliminated? (4) K2
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17.a) Derive and draw the direct form-I, direct form-II and cascade form realization of the
given filter, whose difference equation is given as
y ( n )=0.1 y ( n −1 ) +0.2 y ( n− 2 ) +3 x ( n ) +3.6 x ( n− 1 ) +0.6 x ( n − 2 ) (9) K3
b) Draw the transposed direct form II Structure of the system given by the difference
equation y(n)=05.y(n-1)-0.25y(n-2)+x(n)+x(n-1) . (5)K2
19.a.With the help of a functional block diagram, explain the architecture of TMS320C67xx
DSP processor? (10) K2
b.What are the prominent features of TMS320C67xx compared to its predecessors ?
(4) K2
OR
20.a)Explain how to minimize the effect of finite word length in IIR digital filters? (7) K2
b)Explain the roundoff error models used in FFT algorithms? (7) K2
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble: This course aims to develop analog and digital communication systems.
Prerequisite: ECT 204 Signals and Systems, MAT 204 Probability, Random Process and
Numerical Methods
Course Outcomes: After the completion of the course the student will be able to
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember 10 10 20
Understand 30 30 60
Apply 10 10 20
Analyse
Evaluate
Create
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Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain 10
questions with 2 questions from each module, having 3 marks for each question. Students should
answer all questions. Part B contains 2 questions from each module of which student should answer
any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
SYLLABUS
transmitter and receiver. Base band QPSK system and Signal constellations. Plots of BER Vs SNR
with analysis. QPSK transmitter and receiver. Quadrature amplitude modulation and signal
constellation.
Text Books
References
1. “Principles of Digital Communication,” R. Gallager, Oxford University Press
2. “Digital Communication”, John G Proakis, Wiley.
No Topic No. of
Lectures
1 Analog Communication
1.1 Block diagram of communication system, analog and digital systems , need 2
for modulation
4.2 ISI, Nyquist criterion, RS and SRC, PR signalling and duobinary coding 3
PART A
Answer All Questions
5 Compute the step size for a delta modulator without slope over- (3)K3
load if the input is Acos 2π120t
6 State source coding theorems I and II (3)K1
10 Draw the signal constellation of a QPSK system with and with- (3)K3
out AWGN.
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PART B
Answer one question from each module. Each question carries 14 mark.
Module I
11(A) Give the model of AM signal and plot its spectrum (10)K2
11(B) If a sinusoidal is amplitude modulated by the carrier (4)K3
5 cos2π300t to a depth of 30 %, compute the power in the
resultant AM signal.
OR
Module III
15(B) Give the conditions for stationarity in the strict sense. (4)K2
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OR
16(A) Find an orthonormal basis set fot the set of signals (7)K3
16(B) Plot the above signal constellation and draw the decision (7)K3
region on it. Compute the probability of error.
Module IV
17(A) Compute the probability of error for maximum likely hood (8)K3
detection of binary transmission.
17(B) Explain the term matched filter. Plot the BER-SNR curve for (6)K2
a matched filter receiver
OR
18(A) Design a zero forcing equalizer for the channel that is characterized (8)K3
by the filter taps {1,0.7,0.3}
18(B) Explain partial rsponse signaling (6)K2
Module V
OR
20(A) Derive the probability of error for a QPSK system with Gray (10)K3
coding.
• Apply A-Law companding on this vector get another vector. Plot it against
the first vector for different A values and appreciate the transfer
characteristics.
• Repeat the above steps for µ-law as well.
• Test it with random numbers and speech signals. Observe the 15 levels of
quantization.
• Test it with random numbers and speech signals. Observe the 15 levels of
quantization.
• Create a BPSK mapper that maps bit 0 to zero phase and bit 1 to π
phase.
• Plot the real part of the mapped signal against the imaginary part to
observe the signal constellation
• Add AWGN of difference variances to the base band BPSK signal and
observe the changes in constellation.
• Realize the BPSK transmitter and receiver in Fig. 6.4 in pager 352 in
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• Add AWGN of different variances and compute the bit error rate (BER)
for different SNR values.
• Plot the BER Vs. SNR.
• Plot the theoretical BER-SNR curve, using Eq. 6.19 in pager 351 in
Communication Systems by Simon Haykin .
• Create a QPSK mapper that maps bit patterns 00, 10, 11 and 01 to
suitable phase values that are odd multiples of π .4
• Plot the real part of the mapped signal against the imaginary part to
observe the signal constellation
• Add AWGN of difference variances to the base band QPSK signal and
observe the changes in constellation.
• Realize the QPSK transmitter and receiver in Fig. 6.8 in page 359 in
Communication Systems by Simon Haykin .
• Add AWGN of different variances and compute the bit error rate (BER)
for different SNR values.
• Plot the BER Vs. SNR.
• Plot the theoretical BER-SNR curve, using Eq. 6.33 in page 358 in
Communication Systems by Simon Haykin .
The task is to develop a matched filter receiver, with zero ISI, as shown in
the figure below.
• For zero ISI, the impulse reponse of the transmitter and receiver filters
are the RRC pulse with α = 0.2.
4α cos(1 + α) πt
T
T
+ 4αt sin(1 − α) πt
T
p(t) = g(t) = ( √ )[ ] (1)
π T 1 − ( 4αt
T
) 2
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w[n]
Random y[n]
binary 4 p[n] +
stream
Sample @ g[n]
Received
Decision symbol ratee
stream
CATEGORY L T P CREDIT
ECT307 CONTROL SYSTEMS
PCC 3 1 0 4
Preamble: This course aims to develop the skills for mathematical modelling of various
control systems and stability analysis using time domain and frequency domain approaches.
Course Outcomes: After the completion of the course the student will be able to
Assessment Pattern
Mark distribution
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
2. Using block diagram reduction techniques find the transfer function of the given
system.
3. Find the overall gain for the given signal flow graph using Mason’s gain equation.
Course Outcome 2 (CO2): Determine Transient and Steady State behaviour of systems
using standard test signals
1. Derive an expression for time response of a given first/ second order system to step/
ramp input.
2. Determine step, ramp and parabolic error constants for the given unity feedback
control system.
3. Obtain the steady state error of a given system when subjected to an input.
Course Outcome 3 (CO3): Determine absolute stability and relative stability of a system
1. Using Ruth Hurwitz criterion, for the given control system determine the location of
roots on S- plane and comment on the stability of the system.
2. Sketch the Root Locus for the given control system.
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2. Draw the Nyquist plot for the given control system and determine the range of K for
which the system is stable.
3. Plot the bode plot for the given transfer function and find the gain margin and phase
margin.
4. Describe the design procedure of a lag/ lead compensator.
Course Outcome 5 (CO5): Analyse system Controllability and Observability using state
space representation
1. Obtain the state space representation of the given electrical/ mechanical system.
2. For the given control system, obtain the state equations and output equations:-
3. Plot the bode plot for the given transfer function and find the gain margin and phase
margin.
4. Determine the controllability and observability of the given system.
SYLLABUS
Module 1:
Introduction: Basic Components of a Control System, Open-Loop Control Systems and
Closed-Loop Control Systems, Examples of control system
Feedback and its effects: Types of Feedback Control Systems, Linear versus Nonlinear
Control Systems, Time-Invariant versus Time-Varying Systems.
Transfer Function from Block Diagrams and Signal Flow Graphs: impulse response and
its relation with transfer function of linear systems. Block diagram representation and
reduction methods, Signal flow graph and Mason’s gain formula.
Module 2:
Time Domain Analysis of Control Systems: Introduction- Standard Test signals, Time
response specifications.
Time response of first and second order systems to unit step input and ramp inputs, time
domain specifications.
Frequency domain analysis: Frequency domain specifications, correlation between time and
frequency responses.
Module 3:
Stability of linear control systems: Concept of BIBO stability, absolute stability, Routh
Hurwitz Criterion, Effect of P, PI & PID controllers.
Root Locus Techniques: Introduction, properties and its construction, Application to system
stability studies. Illustration of the effect of addition of a zero and a pole.
Module 4:
Nyquist stability criterion: Fundamentals and analysis
Relative stability: gain margin and phase margin. Stability analysis with Bode plot.
Design of Compensators: Need of compensators, design of lag and lead compensators using
Bode plots.
Module 5:
State Variable Analysis of Linear Dynamic Systems: State variables, state equations, state
variable representation of electrical and mechanical systems, dynamic equations, merits for
higher order differential equations and solution.
Transfer function from State Variable Representation, Solutions of the state equations, state
transition matrix
Concept of controllability and observability and techniques to test them - Kalman’s Test.
Text Books
1. Farid Golnaraghi, Benjamin C. Kuo, Automatic Control Systems, 9/e, Wiley India.
2. I.J. Nagarath, M.Gopal: Control Systems Engineering (5th-Edition) ––New Age
International Pub. Co., 2007.
3. Ogata K., Discrete-time Control Systems, 2/e, Pearson Education.
Reference Books
1. I.J. Nagarath, M.Gopal: Scilab Text Companion for Control Systems Engineering
(3rd-Edition) ––New Age International Pub. Co., 2007.
2. Norman S. Nise, Control System Engineering, 5/e, Wiley India.
3. M. Gopal, Digital Control and State Variable Method, 4/e, McGraw Hill Education
India, 2012.
4. Ogata K., Modern Control Engineering, Prentice Hall of India, 4/e, Pearson
Education,2002.
ELECTRONICS & COMMUNICATION ENGINEERING
5. Richard C Dorf and Robert H. Bishop, Modern Control Systems, 9/e, Pearson
Education,2001.
Simulation Assignments
1. Plot the pole-zero configuration in s-plane for the given transfer function.
2. Determine the transfer function for given closed loop system in block diagram
representation.
3. Plot unit step response of given transfer function and find delay time, rise time, peak
time and peak overshoot.
4. Determine the time response of the given system subjected to any arbitrary input.
5. Plot root locus of given transfer function, locate closed loop poles for different values
of k.
6. Plot bode plot of given transfer function and determine the relative stability by
measuring gain and phase margins.
8. Plot Nyquist plot for given transfer function and determine the relative stability.
10. Determine the state space representation of the given transfer function.
ELECTRONICS & COMMUNICATION ENGINEERING
1 Draw the signal flow graph for the following set of algebraic equations: K2
x1=ax0+bx1+cx2, x2=dx1+ex3
2 Using block diagram reduction techniques find C(s) / R(s) for the given system: K2
4 Determine the parabolic error constant for the unity feedback control system G(s) K3
= 10 (S+2)/ (s+1) s2
5 Using Routh Hurvitz criterion, determine the number of roots in the right half of S- K3
plane for the system S4+2S3+10S2+20S+5=0.
6 Compare PI, PD and PID controllers. K1
PART – B
Answer one question from each module; each question carries 14 marks.
Module - I
11a. Find the overall gain C(s)/ R(s) for the signal flow graph shown using Mason’s 7
gain equation
CO1
K3
11b.
Determine the transfer function X1(s)/ F(s) for the system shown below: 7
CO1
K3
OR
12a. Find the transfer function X2(s)/ F(s). Also draw the force voltage analogy of the 8
given system: CO1
K3
12b.
ELECTRONICS & COMMUNICATION ENGINEERING
Determine the overall transfer function of the block diagram shown in below 6
figure: CO1
K3
Module - II
13a. The open loop transfer function of a servo system with unity feedback is G(s) = 7
10/s(0.1s+1). Evaluate the static error constants of the system. Obtain the steady CO2
state error of the system when subjected to an input given by r(t)= a0+a1t+a2t2/2 K2
13b. A unity feedback control system is characterized by an open loop transfer function 7
G(s) = K/ s(s+10). Determine the gain K so that the system will have a damping CO2
ratio of 0.5 for this value of K. Determine the settling time, peak overshoot, rise K2
time and peak time for a unit step input.
OR
14a. Find kp, kv, ka and steady state error for a system with open loop transfer function 7
G(s)H(s) = 15 (s+4) (s+9)/ s(s+3) (s+6) (s+8) CO2
14b. K2
Derive the expression for time response of a second order under damped system to 7
step input. CO2
K2
Module - III
15b. 7
CO3
The characteristic equation of a system is s7+9s6+24s5+24s4+24s3+24s2+23s+15. K3
Determine the location of roots on S- plane and hence comment on the stability of
the system using Ruth Hurwitz criterion.
OR
ELECTRONICS & COMMUNICATION ENGINEERING
16a. Prove that the breakaway points of the root locus are the solutions of dK/ds = 0. 7
where K is the open loop gain of the system whose open loop transfer function is CO3
16b. G(s). K2
OR
Draw the Nyquist plot for the system whose open loop transfer function is 6
18b. G(s)H(s) = K/ S(S+2) (S+10). Determine the range of K for which the closed loop CO4
system is stable. K3
Module - V
19a. Obtain the state model for the given transfer function Y(s)/ U(s) = 1/ (S2+S+1).
7
CO5
K3
19b. What is transfer matrix of a control system? Derive the equation for transfer 7
matrix. CO5
K2
OR
20a. A system is described by the transfer function Y(s)/ U(s) = 10 (s+4)/ s (s+2) (s+3). 7
Find state and output equations of the system. CO5
K3
Preamble: This course aims to (i) familiarize students with the Analog Integrated Circuits and
Design and implementation of application circuits using basic Analog Integrated Circuits (ii)
familiarize students with simulation of basic Analog Integrated Circuits.
Course Outcomes: After the completion of the course the student will be able to
CO 1 Use data sheets of basic Analog Integrated Circuits and design and implement
application circuits using Analog ICs.
CO 2 Design and simulate the application circuits with Analog Integrated Circuits using
simulation tools.
CO 3 Function effectively as an individual and in a team to accomplish the given task.
Assessment
Mark distribution
End Semester Examination Pattern: The following guidelines should be followed regarding
award of marks
(a) Preliminary work : 15 Marks
(b) Implementing the work/Conducting the experiment : 10 Marks
(c) Performance, result and inference (usage of equipments and trouble shooting): 25 Marks
(d) Viva voce : 20 marks
(e) Record : 5 Marks
Course Outcome 1 (CO1): Use data sheets of basic Analog Integrated Circuits and design and
implement application circuits using Analog ICs.
1. Measure important opamp parameters of µA 741 and compare them with the data provided
in the data sheet
2. Design and implement a variable timer circuit using opamp
3. Design and implement a filter circuit to eliminate 50 Hz power line noise.
Course Outcome 2 and 3 (CO2 and CO3): Design and simulate the application circuits with
Analog Integrated Circuits using simulation tools.
1. Design a precission rectifier circuit using opamps and simulste it using SPICE
2. Design and simulate a counter ramp ADC
List of Experiments
II. Application circuits of 555 Timer/565 PLL/ Regulator(IC 723) ICs [ Minimum three
experiments are to be done]
1. Astable and Monostable multivibrator using Timer IC NE555
2. DC power supply using IC 723: Low voltage and high voltage configurations,
Short circuit and Fold-back protection.
3. A/D converters- counter ramp and flash type.
4. D/A Converters - R-2R ladder circuit
5. Study of PLL IC: free running frequency lock range capture range
Textbooks
1. D. Roy Choudhary, Shail B Jain, “Linear Integrated Circuits,”
2. M. H. Rashid, “Introduction to Pspice Using Orcad for Circuits and Electronics”, Prentice Hall
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble:
The following experiments are designed to make the student do real time DSP
• computing.
Prerequisites:
• ECT 303 Digital Signal Processing
Assessment Pattern
Mark Distribution:
Attribute Mark
Attendance 15
Continuous assessment 30
Internal Test (Immediately before 30
the second series test)
Attribute Mark
Preliminary work 15
Implementing the work/ 10
Conducting the experiment
Performance, result and inference 25
(usage of equipments and trouble
shooting)
Viva voce 20
Record 5
CO1-Simulation of Signals
2. Write a C function to connect the analog input port to the output port and test with
a microphone.
1. Write a function to compute the linear convolution and download to the hardware
target and test with some signals.
CO5-FFT Computation
1. Write and download a function to compute N point FFT to the DSP hardware
target and test it on real time signal.
2. Write a C function to compute IFFT with FFT function and test in on DSP
hardware.
1. Design and implement an FIR low pass filter for a cut off frequency of 0.1π and
test it with an AF signal generator.
List of Experiments
(All experiments are mandatory.)
1. Write a function that returns the N point DFT matrix VN for a given
N.
2. Plot its real and imaginary parts of VN as images using matshow or
imshow commands (in Python) for N = 16, N = 64 and N = 1024
3. Compute the DFTs of 16 point, 64 point and 1024 point random
sequences using the above matrices.
4. Observe the time of computations for N = 2γ for 2 γ 18≤(You
≤ may use
the time module in Python).
5. Use some iterations to plot the times of computation against γ. Plot
and understand this curve. Plot the times of computation for the fft
function over this curve and appreciate the computational saving
with FFT.
• Circular Convolution.
1. Write a python function circcon.py that returns the circular con-
voluton of an N1 point sequence and an N2 point sequence given at
the input. The easiest way is to convert a linear convolution into
circular convolution with N = max(N1, N2).
• Parseval’s Theorem
For the complex random sequences x1[n] and x2[n],
N −1 N −1
X 1 X
x1 [n]x∗2 [n] = X1 [k]X2∗ [k]
n=0
N k=0
ELECTRONICS & COMMUNICATION ENGINEERING
1. Familiarization of the code composer studio (in the case of TI hard- ware)
or Visual DSP (in the case of Analog Devices hardware) or any equivalent
cross compiler for DSP programming.
2. Familiarization of the analog and digital input and output ports of the DSP
board.
3. Generation and cross compilation and execution of the C code to con- nect
the input digital switches to the output LEDs.
4. Generation and cross compilation and execution of the C code to con- nect
the input analog port to the output. Connect a microphone, speak into it
and observe the output electrical signal on a DSO and store it.
5. Document the work.
2. The arrays may be kept in different files and downloaded to the DSP
hardware.
3. Store the result as a file and observe the output.
3. Apply the FFT on the input signal with appropriate window size and
observe the result.
4. Connect microphone to the analog port and read in real time speech.
1. Use the FFT function in the previous experiment to compute the IFFT of
the input signal.
2. Apply IFFT on the stored FFT values from the previous experiments and
observe the reconstruction.
3. Document the work.
5. Download the filter on to the DSP target board and test with 1 mV
sinusoid from a signal generator connected to the analog port.
2. Realize the system shown below for the input speech signal x[n].
3. Segment the signal values into blocks of length N = 2000. Pad the last
ELECTRONICS & COMMUNICATION ENGINEERING
2. Realize the system shown in the previous experiment for the input speech
signal x[n].
3. Segment the signal values into blocks of length N = 2000. Pad the last
block with zeros, if necessary.
Textbooks
SEMESTER V
MINOR
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDI T
ECT381 EMBEDDED SYSTEM DESIGN
PCC 3 1 0 4
Preamble: This course aims to design an embedded electronic circuit and implement the same.
Course Outcomes: After the completion of the course the student will be able to
CO 1 Understand and gain the basic idea about the embedded system.
K2
CO 2 Able to gain architectural level knowledge about the system and hence to program
K3 an embedded system.
CO 3 Apply the knowledge for solving the real life problems with the help of an
K3 embedded system.
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember K1 10 10 10
Understand K2 20 20 20
Apply K3 20 20 70
Analyse
Evaluate
Create
ELECTRONICS & COMMUNICATION ENGINEERING
Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain
10 questions with 2 questions from each module, having 3 marks for each question. Students
should answer all questions. Part B contains 2 questions from each module of which student
should answer any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Course Outcome 1 (CO1) : Understand the embedded system fundamentals and system
design (K1).
Course Outcome 2 (CO2): Understand the peripheral devices and their interfacing with the
processor. (K2)
Course Outcome 3 (CO3): To write programs using high level languages for embedded
systems. (K3)
1. Write an embedded C program for sorting 64 numbers stored in memory locations and
find the smallest and largest number.
2. How the functions are called by using pointers in embedded ‘C’ ? Discuss with the help
of examples.
3. Give the features of Object Oriented Programming.
ELECTRONICS & COMMUNICATION ENGINEERING
Course Outcome 4 (CO4): To understand the ARM processor architecture and pipeline
processor organization. (K2)
1. Give the architecture of the ARM processor and explain the registres.
2. Explain the pipelined architecture of ARM processor.
3. Write an ARM assembly language program to print the sum of two numbers.
Course Outcome 5 (CO5): To write programs in assembly and high level languages for
ARM processor. (K3)
SYLLABUS
4.1 ARM Processor architecture:-The Acorn RISC Machine- Architectural inheritance, The
ARM programmer's model, ARM development tools.
4.2 ARM Assembly Language Programming:-Data processing instructions, Data transfer
instructions, Control flow instructions, writing simple assembly language programs.
4.3 ARM Organization and Implementation:-3 stage pipeline ARM organization, 5-stage
pipeline ARM organization, ARM instruction execution, ARM implementation, The ARM
coprocessor interface
5.1 Architectural Support for High Level Languages :-Abstraction in software design, Data
types, Floating-point data types, The ARM floating-point architecture, Expressions, Conditional
statements, Loops, Functions and procedures, Use of memory, Run-time environment.
5.2 The Thumb Instruction Set :-The Thumb bit in the CPSR, The Thumb programmer's
model, Thumb branch instructions, Thumb software interrupt instruction, Thumb data processing
instructions, Thumb single register data transfer instructions, Thumb multiple register data
transfer instructions, Thumb breakpoint instruction, Thumb implementation, Thumb
applications.
5.3 Architectural Support for System Development:- The ARM memory interface, The
Advanced Microcontroller Bus Architecture (AMBA).
Text Books
1. Raj kamal, Embedded Systems Architecture, Programming and Design, TMH, 2003
2. K.V. Shibu, Introduction to Embedded Systems, 2e, McGraw Hill Education India, 2016.
Reference Books
1. David E. Simon, An Embedded Software Primer, Pearson Education Asia, First Indian
Reprint 2000.
2. Steve Heath, Embedded Systems Design, Newnes – Elsevier 2ed, 2002
3. Andrew N. Sloss, Dominic Symes, Chris Wright, ARM System Developer’s Guide De-
signing and Optimizing System Software, Morgan Kaufmann Publishers 2004
4. Frank Vahid and Tony Givargis, Embedded Systems Design – A Unified Hardware /
Software Introduction, John Wiley, 2002.
5. Tammy Noergaard, Embedded Systems Architecture, A Comprehensive Guide for
Engineers and Programmers, Newnes – Elsevier 2ed, 2012
6. Iyer - Embedded Real time Systems, 1e, McGraw Hill Education New Delhi, 2003
7. Lyla B. Das, Embedded Systems: An Integrated Approach, 1/e , Lyla B. Das, Embedded
Systems, 2012
Simulation Assignments:
PART – B
(Answer one question from each module; each question carries 14 Marks)
Module – I
11. a). What are the characteristics of an embedded system? Explain. [07 Marks]
b). Explain the different phases of EDLC. [07 Marks]
OR
(a) Write different steps involved in the embedded system design process. [07 Marks]
(b) Explain the structural description of embedded system design. [07 Marks]
Module – II
12. (a) What is serial and parallel port communication? Explain with the help of necessary
diagrams. [07 Marks]
(b) What is interrupt? How interrupts are handled in a processor? Explain ISR.[07 Marks]
OR
13. (a) With the help of a diagram show how ROM and RAM are interfaced to a processor.
Explain the read/write processes. [07 Marks]
(b) Explain how a memory management unit is used in a processor. What are its uses?
What is DMA ? [07 Marks]
Module – III
14. (a) What are the advantages and disadvantage of object oriented programming like C++
and Java. [07 Marks]
(b) Write an embedded C program for adding 64 numbers stored in memory locations and
find the average of the same. [07 Marks]
OR
Module – IV
16. (a) Write a note on ARM processor architecture and its registers. [07 Marks]
(b) Write a note on data processing and data transfer instructions with the help of
examples. [07 Marks]
OR
17. (a) What is pipelined architecture? Explain how an ARM instruction is executed in a five
stage pipeline processor with the help of an example. [08 Marks]
(b) Write an ARM assembly language program to print text string “Hello World”
.[06Marks]
Module – V
18. (a) Explain ARM floating point architecture and discuss how floating point numbers are
handled. [07 Marks]
(b) Write a note on Thumb single register and multiple register data transfer instructions
with the help of examples. [07 Marks]
OR
19. (a) What is Thumb instruction set? Why it is used? Explain Thumb programmers model.
[07 Marks]
(b) Draw the block diagram of AMBA architecture. What are the different types of buses
used in this architecture? [07 Marks]
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble: The objective of this course to get awareness about various communication systems
using in practice.
Prerequisite: NIL
Course Outcomes: After the completion of the course the student will be able to
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1 3 3
CO2 3 3
CO3 3 3
CO4 3 3
CO5 3 3
CO6 3 3
Assessment Pattern
1 2
Remember, K1 10 10 10
Understand, K2 20 20 40
Apply, K3 20 20 50
Analyze
Evaluate
Create
Mark Distribution
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain
10 questions with 2 questions from each module, having 3 marks for each question. Students
should answer all questions. Part B contains 2 questions from each module of which student
should answer any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Course Outcome 1 (CO1): Explain the components required for an Optical Communication
Systems
1. Explain the block diagram for Optical Communication Systems
2. Distinguish between step index and graded index fiber
3. Explain various attenuations occurring in optical fiber
Course Outcome 2 (CO2): Discuss the principle involved in RADAR and Navigation
1. Explain Radar range equation and how the range of a radar system is increased?
2. Explain the block diagram for pulsed radar system
3. Explain Instrument landing system
Course Outcome 3 (CO3): Explain the concept and subsystems for Cellular Communication
networks
1. What is frequency reuse?
2. Explain the principle of multicarrier communication
3. Explain GSM architecture
Course Outcome 4 (CO4): Outline the requirement for Satellite communication systems
1. Explain the block diagram for satellite uplink
2. What are geostationary satellites?
3. Explain various satellite orbits
Course Outcome 5 (CO5): Discuss the issues, challenges and architecture for various wireless
ad hoc networks
1. Explain the issues and challenges of Wireless Ad Hoc Networks
2. What is 6LoWPAN?
3. Explain the function of each layer of TCP/IP protocol stack
ELECTRONICS & COMMUNICATION ENGINEERING
Syllabus
Module 1 (Optical Communication)
Basic Radar System– Applications – Radar Range Equation (Qualitative Treatment Only) –
Factors Influencing Maximum Range – Basic Pulsed Radar System – Block Diagram – Display
Methods- A - Scope, PPI Display - Instrument Landing System – Ground Controlled Approach
System.
Study of OSI and TCP/IP protocol suit: The Model, Functions of each layer, TCP/IP Protocol
Suites. Wireless Ad Hoc Networks: Issues and Challenges, Wireless Sensor Networks:
Architecture, Data dissemination, Data gathering, MAC Protocols, Location discovery, Quality
of a sensor network 6LoWPAN
Textbooks
References
Preamble: This course aims to develop the skills for methods of various transformation and
analysis of image enhancement, image reconstruction, image compression, image segmentation
and image representation.
Course Outcomes: After the completion of the course the student will be able to
CO 1 Analyze the various concepts and restoration techniques for image processing
CO 2 Differentiate and interpret the various image enhancement techniques
CO 3 Illustrate image segmentation algorithm
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO 1 3 3 2 1 2
CO 2 3 3 2 1 2
CO 3 3 3 3 1 2
CO 4 3 3 3 1 2
Assessment Pattern
Mark distribution
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain 10
questions with 2 questions from each module, having 3 marks for each question. Students should
answer all questions. Part B contains 2 questions from each module of which student should answer
any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Course Outcome 1 (CO1): Analyze the various concepts and restoration techniques for image
processing
1. For the given image check whether pixel P and Q have 8 connectivity .
Course Outcome 2 (CO2): Differentiate and interpret the various image enhancement techniques
1. Classify different image enhancement process. Differentiate between spatial domain and
frequency domain techniques of image enhancement.
2. What is histogram equalisation? Briefly discuss the underlying logic behind histogram
equalisation.
1. Name two basic approaches of image segmentation and mention their differences.
2. How can you decide optimal thresholds when the image contains a background and several
foreground objects? Write down a corresponding algorithm.
3. Write down the region growing algorithm. What are its advantages and disadvantages.
1. What do you mean by compression ratio? Do you consider that lower compression ratio
ensures better images upon reproduction?
2. How can achievable compression ratio to be determined from image histogram?
3. Mention the steps of lossy and lossless JPEG compression
SYLLABUS& COMMUNICATION ENGINEERING
ELECTRONICS
Module 1
Digital Image Fundamentals-Elements of visual perception, image sensing and acquisition, image
sampling and quantization, basic relationships between pixels – neighborhood, adjacency,
connectivity, distance measures.
Brightness, contrast, hue, saturation, mach band effect, Colour image fundamentals-RGB, CMY,
HIS models, 2D sampling, quantization.
Module 2
Image Enhancement: Spatial domain methods: point processing-intensity transformations,
histogram processing, image subtraction, image averaging, geometric transformation
Sharpening filters – first and second derivative, two-dimensional DFT and its inverse, frequency
domain filters – low-pass and high-pass.
Module 3
Image restoration: Restoration Models, Linear Filtering Techniques: Inverse and Wiener, Non
linear filtering: Mean, Median, Max and Min filters
Noise Models: Gaussian, Uniform, Additive, Impulse
Image restoration applications
Module 5
Text Books
1. Farid Gonzalez Rafel C, Digital Image Processing, Pearson Education, 2009
2. S Jayaraman, S Esakkirajan, T Veerakumar, Digital image processing ,Tata Mc Graw Hill,
2015
Reference Books
4 Image Restoration:
4.1 Restoration Models -Noise Models : Gaussian , 2
Uniform, Additive, Impulse and Erlang
• Plot the histogram of the transformed image over the previous histgram
and appreciate the changes.
• transform the gray scale image to a b inary image by setting all values
ab ove 127 to 255 and those below to O and observe the b inary image.
• Read in a color image and separate the RGB channels and observe
them in color separately.
• Read in a gray scale and read the pixel values (I) into an array.
• Apply singular value decomposition of this array as
where r denotes the reference image and t denotes the test image.
• Plot these values against different noise variances for mean and median
filters and appreciate.
1 4 7 4 1
4 16 26 16 4
h= _l_ 7 26 41 26 7
273 4 16 26 16 4
1 4 7 4 1
The parameters µx and µy are the means and CT; and CT; are the vari
ances of x and y respectively. O";Y is the covariance between x and y.
C1 and C2 are non-zero constants included to avoid unstable results
when CT;+ CT; orµ;+µ; is very close to zero.
• One may take x as the input image and y as the filtered image and
appreciate the performance of the filter.
5 ELECTRONICS & COMMUNICATION ENGINEERING
Edge Detection Filters
where the reference image is the output of filter without noise and the
test image is the one with noise.
• Compute K, for different noise variances and compare the plots with
those of Laplacian and understand the noise invulnerability of LoG
filter.
• Make DCT coefficients that are less than 20% of the maximum equal
to zero.
• Take inverse DCT and observe the image. Compute the compression
ratio.
• Repeat for 30%, 40% and 50% values and observe the compressed image
and the compression ratios.
ELECTRONICS & COMMUNICATION ENGINEERING
SEMESTER V
HONOURS
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT393 FPGA BASED SYSTEM DESIGN VAC 3 1 0 4
Preamble: This course aims to develop the skill of FPGA based system design.
Course Outcomes: After the completion of the course the student will be able to
PO 1 PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PO 8 PO 9 PO PO PO
10 11 12
CO 1 3 3 2 2
CO 2 3 3 2 2
CO 3 3 3 2 2
CO 4 3 3 2 2
Assessment Pattern
Mark distribution
Attendance : 10marks
Continuous Assessment Test(2numbers) : 25marks
Assignment/Quiz/Course project : 15marks
ELECTRONICS & COMMUNICATION ENGINEERING
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of
which student should answer any one. Each question can have maximum 2 sub-divisions and
carry 14 marks.
Course Outcome 1 (CO1): Design simple digital systems with programmable logic devices.
Course Outcome 4 (CO4): Design simple combinational and sequential circuits using FPGA.
2. Explain how sequential circuit can be mapped into Xilinx Virtex LUT.
ELECTRONICS & COMMUNICATION ENGINEERING
SYLLABUS
Module 1:
Introduction: Digital system design options and tradeoffs, Design methodology and technology
overview, High Level System Architecture and Specification: Behavioral modelling and
simulation, Hardware description languages (emphasis on Verilog), combinational and sequential
design, state machine design, synthesis issues, test benches.
Module 2:
Programmable logic Devices: ROM, PLA, PAL, CPLD, FPGA Features, Limitations,
Architectures and Programming. Implementation of MSI circuits using Programmable logic
Devices.
Module 3:
FPGA architecture: FPGA Architectural options, granularity of function and wiring resources,
coarse V/s fine grained, vendor specific issues (emphasis on Xilinx and Altera), Logic block
architecture: FPGA logic cells, timing models, power dissipation I/O block architecture: Input and
Output cell characteristics, clock input, Timing, Power dissipation.
Module 4:
Placement and Routing: Programmable interconnect - Partitioning and Placement, Routing
resources, delays; Applications -Embedded system design using FPGAs, DSP using FPGAs.
Module 5:
Commercial FPGAs: Xilinx, Altera, Actel (Different series description only), Case study Xilinx
Virtex: implementation of simple combinational and sequential circuits.
Text Books
1. FPGA-Based System Design Wayne Wolf, Verlag: Prentice Hall
2. Modern VLSI Design: System-on-Chip Design (3rd Edition) Wayne Wolf, Verlag
Reference Books
1. Field Programmable Gate Array Technology - S. Trimberger, Edr, 1994, Kluwer Academic
2. Digital Design Using Field Programmable Gate Array, P.K. Chan & S. Mourad, 1994,
Prentice Hall
3. Field programmable gate array, S. Brown, R.J. Francis, J. Rose, Z.G. Vranesic, 2007, BS
ELECTRONICS & COMMUNICATION ENGINEERING
No Topic No. of
Lectures
1 Introduction
1.1 Digital system design options and tradeoffs 1
1.2 Design methodology and technology overview 2
1.3 High Level System Architecture and Specification: Behavioral 2
modelling and simulation
1.4 Hardware description languages, combinational and sequential design 2
1.5 State machine design, synthesis issues, test benches. 2
3 FPGA architecture
3.1 FPGA Architectural options 1
3.2 Granularity of function and wiring resources, coarse V/s fine grained, 3
vendor specific issues (emphasis on Xilinx and Altera)
3.3 Logic block architecture: FPGA logic cells, timing models, power 3
dissipation
3.4 I/O block architecture: Input and Output cell characteristics, clock 3
input, Timing, Power dissipation.
PART – B
Answer one question from each module; each question carries 14 marks.
Module – I
Module – II
Module – III
Module – IV
Module – V
19 a) With neat diagram explain the architecture of Xilinx Virtex IOB. 7 CO3 K2
19 b) Design a four bit up counter with parallel load feature using Xilinx 7 CO3 K3
Virtex.
OR
20 a) Explain the mapping of combinational and sequential circuits using 5 CO3 K3
LUTs.
20 b) Explain the architecture of Xilinx Virtex CLB 9 CO3 K2
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble: This course aims to impart the fundamentals of detection and estimation theory in
engineering applications
Course Outcomes: After the completion of the course the student will be able to
CO1 K2 Understand the fundamentals of statistical detection and estimation principles used
in various engineering problems.
CO2 K3 Apply various types of statistical decision rules in engineering applications.
CO3 K3 Apply different types of estimation algorithms in engineering applications.
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember
Understand K2 30 30 60
Apply K3 20 20 40
Analyse
Evaluate
Create
Mark distribution
Total CIE ESE ESE Duration
Marks
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
2. Differentiate classical approach and bayesian approch in detection theory (or estimation).
3. Enumerate different applications which are using estimation and detection techniques.
1. Derive/Obtain the Minimum variance unbiased estimator (or best linear unbiased
estimator) for any simple examples (eg. DC Signal in white Gaussian noise)
2. Derive/Obtain the Maximum likelihood estimator (or least squares estimator or minimum
mean square error estimator) for any simple examples (eg. DC Signal in white Gaussian
noise)
3. Using Bayesian approach, obtain an estimator for any simple examples.
SYLLABUS
Text Books
1. S.M. Kay, “Fundamentals of Statistical Signal Processing” Vol I: Estimation Theory,
Pearson, 3/e, 2010.
2. S.M. Kay, “Fundamentals of Statistical Signal Processing” Vol II: Detection Theory,
Pearson, 3/e, 2010.
Reference Books
1. H. L. Van Trees, “Detection, Estimation, and Modulation Theory”, Vol. I, John Wiley &
Sons, 1968
2. Monson H. Hayes ,“Statistical Digital Signal Processing and Modelling" by, John Wiley &
Sons, 2002.
ELECTRONICS & COMMUNICATION ENGINEERING
No Topic No. of
Lectures
1 Introduction to Detection and Estimation Theory
1.1 Fundamentals of detection theory, review of probability and random 2
variable
1.2 The mathematical detection problem 2
1.3 Fundamentals of estimation theory 1
1.4 The mathematical estimation problem 2
1.5 Review of Gaussian distribution. Application examples. 2
PART A
(Answer all questions. Each question carries 3 marks
each).
1. Enumerate different applications which are using estimation and detection techniques. (3)
PART B
(Answer any one question from each module. Each question carries 14 marks
each.)
Note:
(1) Notation x ∼ N (µ, σ2) denotes x is normally distributed with mean µ and variance σ2.
(2)Also, bold small letters indicate vectors and bold capital letters indicate matrices.
11. Obtain the mathematical formulation of estimation method with an example. (14)
OR
12 Using radar system as an example, differentiate estimation and detection techniques. (14)
.
ELECTRONICS & COMMUNICATION ENGINEERING
13 Design Neyman-Pearson detector for the unknown level A in White Gaussian Noise with (14)
. variance σ2.
OR
OR
16 Describe estimator-correlator in the detection of random signals. (14)
.
18 Derive the Best Linear Unbiased Estimator for the multiple observations (14)
.
x[n] = A + w[n]; n = 0, 1, . . . , N − 1
where A is an unknown level to be estimated and w[n] is White Noise with unspecified PDF
and variance σ2.
19 Derive the Maximum Likelihood Estimator for the multiple observations (14)
.
x[n] = A + w[n]; n = 0, 1, . . . , N − 1
where A is an unknown level to be estimated and w[n] is White Gaussian Noise with known
variance σ2.
OR
20.Prove that the optimal estimator which minimizes the Bayesian Mean Square Error is the mean of
the posterior PDF.
(14)
ELECTRONICS & COMMUNICATION ENGINEERING
COMPUTATIONAL TOOLS FOR CATEGORY L T P CREDIT
ECT397
SIGNAL PROCESSING VAC 3 1 0 4
Preamble: This course aims to use the computational tools in signal processing to solve industry
problems.
Prerequisite: ECL201 Scientific Computing Lab, ECT204 Signals and Systems, ECT303 Digital
Signal Processing
Course Outcomes: After the completion of the course the student will be able to
CO 1 Compute posterior probability using pymc3 for practical applications
CO 2 Compute linear and logistic regression with pymc3
CO 3 Perform Bayesian analysis for practical applications.
CO 4 Implement Kalman filters
CO 5 Implement partcle fillters for practical applications
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember 10 10 20
Understand 30 30 60
Apply 10 10 20
Analyse
Evaluate
Create
Mark distribution
Total CIE ESE ESE Duration
Marks
150 50 100 3 hours
Course Outcome 2 (CO2): Compute linear and logistic regression with pymc3
1. Write a python code to design a regression model by coding setosa =0, versicolor =1, and
virginica = 2 in IRIS data set.?
2. Write a python code usig pymc3 to estimate regression parameters using a simple linear model
y~ax+b, where y is Normally distributed with mean ax+b and variance σ2
SYLLABUS
No Topic No. of
Lectures
1 Probabilistic Programming
1.1 Statistical Modelling using pymc3, Probability concepts 2
1.2 Bayes theorem, Bayesian Statistics and modelling 2
1.3 Modelling Coin flipping as Bayesian, Choosing the likelihood and 2
prior, Posterior computation,
1.4 Posterior predictive analysis, Posterior plots. Likelihood theory and 3
Estimation
2 Modelling Linear and Logistic Regression
2.1 Modelling Linear Regression 2
2.2 Polynomial Regression, Multiple Linear Regression 2
2.3 Logistic Regression, Poisson Regression using pymc3 4
ELECTRONICS & COMMUNICATION ENGINEERING
3 Bayesian Modelling
3.1 Bayesian analysis using pymc3, Posterior predictive checks, Model 3
specifications using pymc3,Examples of Bayesian Analytics.
3.1 Bayes factor, Sequential Monte carlo to compute Bayes factors, 3
Recursive state estimation, Modeling functions using pymc3,
Covariance functions and kernels.
3.3 Bayesian Regression Models. 2
4 GH and Kalman Filter
4.1 GH filter, Choosing G and H factors, Simple simulation models using 2
GH filters.
4.2 Discrete Bayes Filter for predicting the random movement, Recursive 2
estimation and prediction, Effect of noisy environment.
4.3 Kalman filter- updation using measurements and observations, Kalman 4
Gain calculation and Prediction, Process noise and Measurement noise.
Kalman Filter Equations implementation in python.
5 Particle Filter
5.1 Multivariate Kalman Filter - Modelling and Designing 2
5.2 Effect of Nonlinearity, Nonlinear Filters, Smoothing, Adaptive 2
Filtering.
5.3 Markov concepts, Monte carlo integration, Basics of Markov chain 2
Monte Carlo
5.4 Implementation using filterpy module. Particle Filter algorithm and 4
Implementation.
ELECTRONICS & COMMUNICATION ENGINEERING
Simulation Assignments
1. Create a noisy measurement system. Design a g-h filter to filter out the noise and plot it.
Write a code to filter 100 data points that starts at 5, has a derivative of 2, a noise
scaling factor of 10, and uses g=0.2 and h=0.02. Set your initial guess for x to be 100.
2. Design a filter to track the position of a train. Its position is expressed as its position on
the track in relation to some fixed point which we say is 0 km. I.e., a position of 1 means
that the train is 1 km away from the fixed point. Velocity is expressed as meters per
second. Measurement of position is doeonce per second, and the error is ± 500 meters.The
train is currently at 23 kilometer, moving at 15 m/s,accelerating at 0.2 m/secˆ2. Plot the
results.
3. Using Discrete Bayes Filter, predict the movemet of a dog. The current position of the
dog is 17 m. The epoch is 2 seconds long, and the dog is traveling at 15 m/s. Where will
the dog be in two seconds?
5. Design a Kalman filter to track the movement of a dog(parameters same as previous one)
in a Noisy environment
6. Prove that the binomial and beta distributions are conjugate pairs with respect to the mean
value.
7. Show that the conjugate prior of the multivariate Gaussian with respect to the precision
matrix, Q, is a Wishart distribution.
9. Suppose that n balls are thrown independently and uniformly at random into n bins.
(a) Find the conditional probability that bin 1 has one ball given that exactly one ball
fell into the irst three bins.
(b) Find the conditional expectation of the number of balls in bin 1 under the condition
that bin 2 received no balls.
(c) Write an expression for the probability that bin 1 receives more balls than bin 2.
ELECTRONICS & COMMUNICATION ENGINEERING
PART A
Answer All Questions
1 State Bayes theorem and explain the significance of the terms (3) K2
logistic regression?
Bayesian analysis
9 Write a python code to compute relative error in the true value (3) K3
of π
PART B
Answer one question from each module. Each question carries 14 mark.
Module I
ELECTRONICS & COMMUNICATION ENGINEERING
11(A) Assume that you have a dataset with 100 data points of (8) K3
Gaussian distribution with a mean of 13 and standard deviation
of 1.5. Using PyMC3, write Python code to compute:
• The posterior distribution
OR
OR
14(A) Write a python code to generate random dataset using a noisy (8) K3
linear process with intercept1 , slope 2 and noise variance of
0.5. Simulate 100 data points and write a code to fit a linear
regression to the data
14(B) Write the steps involved in multiple linear regression technique (6) K2
ELECTRONICS & COMMUNICATION ENGINEERING
Module III
15(A) Write a python code to estimate the mean and standard (8) K3
deviation of a randomly generated gaussian data using SMC
method in pymc3
15(B) Explain how posterior predictive checks are used in (6) K2
validating a model using pymc3
OR
Module IV
OR
Module V
19(A) Describe the essential steps in the derivation of the Particle (8) K2
filter.
19(B) Explain Sequntial Importance sampling algorithm? (6) K2
OR
SEMESTER VI
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT302 ELECTROMAGNETICS
PCC 3 1 0 4
Preamble: This course aims to impart knowledge on the basic concepts of electric and
magnetic fields and its applications.
Course Outcomes:After the completion of the course the student will be able to
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO1 3 3 1 1 2
CO2 3 3 1 1 2
CO3 3 3 1 1 2
CO4 3 3 1 1 2
CO5 3 3 1 1 2
Assessment Pattern
Mark distribution
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
3. Show that curl grad F and div curl F are identically zero.
1 Q
4.Show that V 4 r where r ( x y z ) satisfies Laplace’s equation.
2 2 2 1/ 2
Course Outcome 2 (CO2): Analyse Maxwell’s equation in different forms and apply
them to diverse engineering problems. (K3)
1. State and explain Maxwell’s equations in the integral and differential forms.
1. Derive an expression for reflection coefficient of a plane wave under oblique incidence
with parallel polarization at a dielectric interface.
ELECTRONICS & COMMUNICATION ENGINEERING
3. Derive the expression for Brewster angle for parallel polarised wave.
Course Outcome 4 (CO4): To analyse the characteristics of transmission lines and solve
the transmission line problems using Smith chart. (K3)
1.A transmission line of length 0.2 λ and characteristic impedance 100Ω is terminated with a
load impedance of 50+200j . Find input impedance, reflection coefficient at load end,
reflection coefficient at the input end and VSWR.
2. A lossless transmission line has a characteristic impedance of 50Ω and phase constant of 3
Rad/ m at 100 MHz . Find Inductance per meter and Capacitance per meter of the
transmission line .
3. A 50 + j200 Ω load is connected to a 100Ω lossless transmission line . Using Smith chart ,
find i. Reflection coefficient at load ii. VSWR
1.For TE10 mode of propagation in a rectangular wave guide, with length 8cm and
v. Phase velocity
2.A rectangular wave guide has a dimension of 3cm x 5cm , and is operating at a frequency
of 10 GHz . Calculate the cutoff wavelength, cutoff frequency , guide wavelength , phase
velocity and group velocity . and the wave impedance for TE10 mode.
3.Derive the expression for Electric and magnetic field intensities for TM mode of
propagation of rectangular waveguide.
ELECTRONICS & COMMUNICATION ENGINEERING
SYLLABUS
MODULE 1 :
Introduction to Electromagnetic Theory. Review of vector calculus- curl, divergence
gradient. Rectangular, cylindrical and spherical coordinate systems. Expression of curl
divergence and Laplacian in cartesian, cylindrical and spherical coordinate system. Electric
field and magnetic field, Review of Coulomb’s law, Gauss law and Amperes current law.
Poisson and Laplace equations, Determination of E and V using Laplace equation.
MODULE 2 :
Derivation of capacitance and inductance of two wire transmission line and coaxial cable.
Energy stored in Electric and Magnetic field. Displacement current density, continuity
equation. Magnetic vector potential. Relation between scalar potential and vector potential.
Maxwell’s equation from fundamental laws. Boundary condition of electric field and
magnetic field from Maxwells equations.Solution of wave equation.
MODULE 3 :
Propagation of plane EM wave in perfect dielectric, lossy medium, good conductor, media-
attenuation, phase velocity, group velocity, skin depth. Reflection and refraction of plane
electromagnetic waves at boundaries for normal & oblique incidence (parallel and
perpendicular polarization), Snell’s law of refraction, Brewster angle.
MODULE 4 :
Power density of EM wave, Poynting vector theorem. Polarization of electromagnetic wave-
linear, circular and elliptical polarisation.
Uniform lossless transmission line - line parameters.Transmission line equations, Voltage and
Current distribution of a line terminated with load .Reflection coefficient and VSWR.
Derivation of input impedance of transmission line.
MODULE 5 :
Transmission line as circuit elements (L and C). Development of Smith chart - calculation of
line impedance and VSWR using smith chart.
The hollow rectangular wave guide –modes of propagation of wave-dominant mode, group
velocity and phase velocity -derivation and simple problems only
Text Books
Reference Books
Assignments:
4 A Parallel plate capacitor with plate area of 5cm2 and a plate separation of 3mm K3
has a voltage 50sin103t Volt applied to its plates. Calculate the displacement
9 State the relation between standing wave ratio and reflection coefficient. K1
10 How a quarter wave dissipationless line can be used for impedance matching?. K2
PART – B
Answer one question from each module; each question carries 14 marks.
Module - I
11 7
a. Derive the equation for curl of a vector field in Cartesian co-ordinate system.
CO1
K2
OR
b. Apply Ampere’s circuital law to the case of an infinitely long coaxial cable 7
carrying a uniformly distributed total current I. Compute the magnetic field CO1
intensity existing in different parts of the cable. K3
Module - II
1 n CO2
WE Q iV i where Vi is the potential of the point charge Qi.
2 i 1 K3
OR
14a Define vector magnetic potential and show that B A , where B is the 7
magnetic flux density and A is the vector magnetic potential at any point.
CO2
K2
7
b State and prove boundary conditions for E and H in accordance with Maxwell’s
CO2
equations.
K2
Module - III
i. Direction of propagation
v. Skin depth
OR
7
16 a Derive continuity equation from fundamental laws.
CO3
K2
b Find the skin depth, δ at a frequency of 1.6 MHz in aluminium, where
σ=38.2MS/m and µr= 1. Also find the propagation constant, γ and the wave
ELECTRONICS & COMMUNICATION ENGINEERING
7
velocity v . CO3
K3
Module - IV
7
b Derive an expression for net outward power flow associated with an
CO4
electromagnetic wave, from a surface.
K2
OR
Module - V
TE10 mode.
b. At a frequency of 80 MHz, a lossless transmission line has a characteristic 7
impedance of 300Ω and a wavelength of 2.5m. Find:
CO5
i) L ii) C iii) If the line is terminated with a parallel combination of 200Ω
and 5pF, determine the reflection co-efficient and the standing wave ratio. K3
OR
CO5
i. Reflection coefficient at load ii. VSWR iii. Load admittance
K3
b Derive the expression for Electric and magnetic field intensities for TM mode of 7
K2
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT304 VLSI CIRCUIT DESIGN
PCC 3 1 0 4
Preamble: This course aims to impart the knowledge of VLSI design methodologies and Digital
VLSI circuit design.
Prerequisite:
1. ECT201 Solid State Devices
2. ECT202 Analog Circuits
3. ECT 203 Logic Circuit Design.
COURSE OUTCOMES.
After the completion of the course the student will be able to:
CO1 Explain the various methodologies in ASIC and FPGA design.
CO2 Design VLSI Logic circuits with various MOSFET logic families.
CO3 Compare different types of memory elements.
CO4 Design and analyse data path elements such as Adders and multipliers.
CO5 Explain MOSFET fabrication techniques and layout design rules.
Assessment Pattern:
End Semester
Continuous Assessment Tests
Bloom’s Category Examination
1 2
Remember
10 10 20
Understand
20 20 40
Apply
20 20 40
Analyze
Evaluate
Create
ELECTRONICS & COMMUNICATION ENGINEERING
Mark distribution:
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignments : 15 marks.
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain
10 questions with 2 questions from each module, having 3 marks for each question. Students
should answer all questions. Part B contains 2 questions from each module of which student
should answer any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Mark patterns are as per the syllabus with 75% for theory and 25% for logical/numerical
problems.
CO1:
1. Differentiate between full custom and semi-custom ASIC.
2. With a neat flow chart, explain ASIC design flow.
3. Describe Gate array based ASIC with neat diagram.
4. What are the processes involved in Soc design.
CO2:
1. With a neat diagram explain static and transient analysis of CMOS inverter
2. Realize the given logic function using static CMOS logic and transmission gate logic.
3. Compare the advantages and disadvantages of static and dynamic circuits.
CO3:
1. Compare different ROM structures.
2. Compare static and dynamic RAM structures.
3.Compare the advantages of three transistor and one transistor DRAM cell.
CO4:
1. Design a full adder with static CMOS logic
2. Compare the delay of Carry-Bypass adder, Linear Carry- Select adder, Square- root carry-
select adder.
ELECTRONICS & COMMUNICATION ENGINEERING
CO5:
1. Explain how electronic grade silicon (EGS) is developed .
2. Explain the necessity of single crystalline silicon in VLSI fabrication and how single crystal
silicon is made.
3. Explain diffusion and ion implantation techniques.
4. Explain the advantages of SiO2 and the oxidation techniques.
Syllabus
Text Books:
1. Sung –Mo Kang & Yusuf Leblebici, CMOS Digital Integrated Circuits- Analysis & Design,
McGraw-Hill, Third Ed., 2003
2. S.M. SZE, VLSI Technology, 2/e, Indian Edition, McGraw-Hill,2003
3. Wayne Wolf ,Modern VLSI design, Third Edition, Pearson Education,2002.
References:
1. Michael John Sebastian Smith, Application Specific Integrated Circuits, Pearson
Education,2001.
2. Neil H.E. Weste, Kamran Eshraghian, Principles of CMOS VLSI Design- A Systems
Perspective, Second Edition. Pearson Publication, 2005.
3. Jan M. Rabaey, Digital Integrated Circuits- A Design Perspective, Prentice Hall, Second
Edition, 2005.
4. Razavi - Design of Analog CMOS Integrated Circuits,1e, McGraw Hill Education India
Education, New Delhi, 2003.
5.
Course Contents and Lecture Schedule.
No. of.
No Topic
Lectures
Module 1: VLSI Design Methodologies. (11 Hrs)
PART B
(Answer one question from each module. Each question carries 14 mark.)
11(A) What is FPGA? What are its applications? With block diagram explain its (6)
internal architecture?
11(B) Explain ASIC design flow. (8)
OR
12(A) Compare different ASIC design methodologies. (8)
12(A) List the advantages of SOC (6)
13(A) Derive expression for the switching threshold of a CMOS inverter. (7)
13(B) What is meant by pass transistor logic? What are the differences in (7)
transmission characteristics of N MOS and P MOS transistors?
OR
14(A) What are the different types of power dissipation in a CMOS inverter? (8)
Derive expression for the total power dissipation.
14(B) Why PMOS transistor can pass only strong ones and NMOS can pass (6)
strong zeros.
ELECTRONICS & COMMUNICATION ENGINEERING
15(A) Draw the circuit diagram and explain the principle of operation of a (7)
CMOS based static RAM cell. Explain the read and write operations.
What are the constraints on the sizes of transistors?
15(B) Draw the circuit diagram and explain the principle of operation of a one (7)
transistor dynamic RAM cell. Explain the read, write and refresh
operations
OR
16(A) Explain the read and write operation of a three-transistor DRAM cell (7)
16(B) Explain the read and write operation of a six transistor CMOS SRAM cell. (7)
OR
17(A) With diagram illustrate the principle of operation of an array multiplier. (8)
Show the critical path. Estimate the delay of the multiplier.
17(B) With block diagram illustrate the principle of operation of a square root (6)
carry select adder. Estimate the delay of an n bit adder
OR
18(A) Draw circuit diagram of a full adder with not more than 28 transistors in (8)
standard CMOS logic
18(B) Explain the working a 16-bit carry-by pass adder and write down the (6)
expression for worst-case delay.
19(A) Illustrate with diagram the principle of crystal growth by Czochralzki (7)
method.
19(B) What is photolithography? With diagram illustrate the steps involved in (7)
photolithography process.
OR
20(A) Explain the principle of molecular beam epitaxy, with schematic diagram (8)
of an MBE system. What are its advantages and disadvantages?
20(B) With schematic diagram and chemical reactions involved, illustrate wet (6)
and dry oxidation processes
ELECTRONICS & COMMUNICATION ENGINEERING
Module 1
1. How to choose between FPGA and ASIC ?
2. Describe ASIC in terms of Size, power and performance, IP protection and competitive
Edge
3. Compare Gate-array design and Full-custom design?
4. What are the differences between CPLDs and CLBs
5 List some of the commonly used FPGA development board ?
6. Discuss the architecture of any one of the leading FPGA in industry ?
Module 2
1. Power and interconnect delay analysis of CMOS inverter?
2. Implement XOR function using pass transistor logic?
3. Derive V IL, V IH,V OH , and V OL of depletion load inverter?
4. Design 8:1 MUX using transmission gate logic?
5. What are the advantages of NMOS over CMOS ?
Module 3
1. Explain the working of sense amplifiers in memory structures?
2. Design a voltage comparator in precharge-evaluate logic .
3. Discuss the cascading problem of P-E logic
4. Discuss the architecture of FLASH EPROM
5. Explain the working of FGMOS
Module 4
1. With diagram illustrate the principle of operation of an array multiplier. Show the critical
path. Estimate the delay of the multiplier
2. Implement a 3x3 array multiplier?
Module 5
1. What is photolithography? With diagram illustrate the steps involved in photolithography
process?
2. What is Deal Grove model of oxidation? What are linear and parabolic rate coefficients
with reference to oxidation process?
3. Illustrate with diagram the principle of crystal growth by Czochralzki method
4. Explain DEAL-GROVE model of oxidation?
5. What are the requirements of a "clean-room" in VLSI fabrication
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble: This course aims to lay down the foundation of information theory introducing both
source coding and channel coding. It also aims to expose students to algebraic and probabilistic
error-control codes that are used for reliable transmission.
Prerequisite: MAT 201 Linear Algebra and Calculus, MAT 204 Probability, Random Process and
Numerical Methods, ECT 204 Signals and Systems.
Course Outcomes: After the completion of the course the student will be able to
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember 10 10 20
Understand 30 30 60
Apply 10 10 20
Analyse
Evaluate
Create
Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours
ELECTRONICS & COMMUNICATION ENGINEERING
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain 10
questions with 2 questions from each module, having 3 marks for each question. Students should
answer all questions. Part B contains 2 questions from each module of which student should answer
any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
]
P= 1 1 0
[ 0 1 1
1 1 1
1 0 1
3. Explain standard array decoding of linear block codes.
SYLLABUS
Discrete memoryless sources, Source code, Average length of source code, Bounds on average
length, Uniquely decodable and prefix-free source codes. Kraft Inequality (with proof), Huffman
code. Shannon’s source coding theorem (both achievability and converse) and operational meaning
of entropy.
Modeling of Additive White Gaussian channels. Continuous-input channels with average power
constraint. Differential entropy. Differential Entropy of Gaussian random variable. Relation
between differential entropy and entropy. Shannon-Hartley theorem (with proof – mathematical
subtlities regarding power constraint may be overlooked).
Inferences from Shannon Hartley theorem – spectral efficiency versus SNR per bit, power-limited
and bandwidth-limited regions, Shannon limit, Ultimate Shannon limit.
Block codes and parameters. Error detecting and correcting capability. Linear block codes. Two
simple examples -- Repetition code and single parity-check code. Generator and parity-check
matrix. Systematic form.
Maximum likelihood decoding of linear block codes. Bounded distance decoding. Syndrome.
Standard array decoding.
ELECTRONICS & COMMUNICATION ENGINEERING
(Only description, no decoding algorithms) Hamming Codes, BCH codes, Reed-Solomon Codes.
Low-density parity check (LDPC) codes. Tanner graph representation. Message-passing decoding
for transmission over binary erasure channel.
No Topic No. of
Lectures
1 Entropy, Sources and Source Coding
1.1 Entropy, Properties of Entropy, Joint and Conditional Entropy 2
1.2 Mutual Information, Properties of Mutual Information 2
1.3 Discrete memoryless sources, Source code, Average length of source 2
code, Bounds on average length
1.4 Uniquely decodable and prefix-free source codes. Kraft Inequality 2
(with proof)
1.5 Huffman code. Shannon’s source coding theorem and operational 2
meaning of entropy
1. Create a 2 x 2 matrix, P(Y/X) for binary symmetric channel with channel transition
probability, p < 0.5.
1. Realize the encoder circuit for (7, 4) cyclic code in Fig. 4.2 in page 96 in Error
Control Coding: Fundamentals and Applications by Shu Lin & Daniel J. Costello. Jr.
ELECTRONICS & COMMUNICATION ENGINEERING
2. Create a random binary vector of length 4 as input message vector and generate the
codeword.
3. Create binary vector of length 7 with Hamming weight 1 as error vector and add it to
the encoder output to generate the receiver output.
4. Realize the decoder circuit for (7, 4) cyclic code in Fig. 4.9 in page 107 in Error
Control Coding: Fundamentals and Applications by Shu Lin & Daniel J. Costello. Jr.
5. Observe the encoder and decoder outputs for different message vectors and error
vectors and find the error correcting capability of the code.
6. Convolutional Code
1. Implement (2,1,3) convolutional encoder in Fig. 10.1 in page 288 in Error Control
Coding: Fundamentals and Applications by Shu Lin & Daniel J. Costello. Jr.
PART A
3. State Shannon’s channel coding theorem. What is its significance in digital communication
system?
4. An analog signal band limited to ‘B’ Hz is sampled at Nyquist rate. The samples are
quantized into 4 levels. The quantization levels are assumed to be independent and occur
with probabilities: p1= p4 = 1/8, p2 = p3 = 3/8. Find the information rate of the source
assuming B = 100Hz.
5. List the properties of group. Give an example.
6. Show that C = {0000, 1100, 0011, 1111} is a linear code. What is its minimum distance?
7. Explain generation of systematic cyclic code using polynomial description.
8. List the features of Reed Solomon code.
9. Draw a (3,2,1) convolutional encoder with generator sequences,
g(11 )=( 11 ) , g(12 )=( 01 ) , g (13 )=( 11 ) and g(21 )=( 01 ) , g (22 )=( 10 ) , g2(3)= (10 ).
10. Draw the tanner graph of rate 1/3 LDPC code for the given parity check matrix.
1 1 1 0 0 0
H=
[
1 0 0 1 1 0
0 1 0 1 0 1
0 0 1 0 1 1
]
PART B
Answer any one question from each module. Each question carries 14
marks.
ELECTRONICS & COMMUNICATION ENGINEERING
MODULE I
11 (a) The joint probability of a pair of random variables is given below. Determine H(X,
Y), H(X/Y), H(Y/X) and I(X,Y). Verify the relationship between joint, conditional and
marginal entropies.
1/3 1/ 3
P(X, Y) = [ 0 1/ 3 ]
(10 marks)
11 (b) Explain uniquely decodable and prefix-free property of source code. (4 marks)
12 (a) Find the binary Huffman code for the source with probabilities {1/3, 1/5, 1/5,
2/15, 2/15}. Also find the efficiency of the code. (9 marks)
12 (b) Prove that H(Y) ≥ H(Y/X). (5 marks)
MODULE II
13 (a) A voice grade channel of the telephone network has a bandwidth of 3.4 KHz.
Calculate channel capacity of the telephone channel for signal to noise ratio of 30 dB. Also
determine the minimum SNR required to support information transmission through the
telephone channel at the rate of 4800 bits/sec.
(7 marks)
13 (b) Derive the expression for channel capacity for binary erasure channel. (7 marks)
14 (b) State Shannon Hartley theorem and explain the significance of Shannon limit. (6 marks)
MODULE III
15 (a) The parity check matrix of (7,4) linear block code is given as
1 00 1 01 1
[
H = 0 10 1 11 0 .
0 01 0 11 1 ]
Compute the minimum distance of the code and find its error detection and correcting capability.
Suppose that the received codeword, r = (1001111). Determine whether the received codeword is in
error? If so, form the decoding table and obtain the correct codeword. (9 marks)
16 (b) List the properties of vector space. Define subspace. (5 marks)
17 (a)The parity bits of a (8, 4) linear systematic block code are generated by
ELECTRONICS & COMMUNICATION ENGINEERING
c5 = d1+d2+d4
c6 = d1+d2+d3
c7 = d1+d3+d4
c8 = d2+d3+d4
(+ sign denotes modulo-2 addition)
where d1, d2, d3 and d4 are message bits and c5, c6, c7 and c8 are parity bits. Find
generator matrix G and parity check matrix H for this code. Draw the encoder circuit (7 marks)
17 (b) Explain the construction of finite field from polynomial ring with the help of an ex-ample.
(7 marks)
MODULE IV
18 (a) Consider a (7, 4) cyclic code with generator polynomial, g(x) = 1 + x + x3. Express the
generator matrix and parity-check matrix in systematic and non-systematic form
(8 Marks)
18 (b) Find the generator polynomial for single, double and triple error correcting BCH code of block
length, n = 15. (6 marks)
19 (a) Draw syndrome circuit for a (7,4) cyclic code generated by g(x)=1+x+x3. If the re-ceived
vector r is [0010110] what is the syndrome of r? Explain the circuit with a table showing the
contents of the syndrome register. (8 Marks)
19 (b) What are the features of Hamming code? Find the parity check matrix for (15, 11) Hamming
code. (6 marks)
MODULE V
20 (a) Draw the state diagram of a convolution encoder with rate 1/3 and constraint length
3 for generator sequences g(1) = (1 0 0), g(2) = (1 0 1), g(3) = (1 1 1). (7 marks)
20 (b) Explain message passing decoding algorithm for LDPC codes with the help of an
example.
(7 marks)
21 For a (2,1,2) convolutional encoder with generator sequences g(1) = (1 1 1) and g(2)
= (1 0 1). Draw Trellis and perform Viterbi decoding on this trellis for the received
sequence {01, 10, 10, 11, 01, 01, 11} and obtain the estimate of the transmitted se-
quence. (14 marks)
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble: The objective of this Course work is to ensure the comprehensive knowledge
of each student in the most fundamental Program core courses in the
curriculum. Five core courses credited from Semesters 3, 4 and 5 are chosen
for the detailed study in this course work. This course has an End Semester
Objective Test conducted by the University for 50 marks. One hour is
assigned per week for this course for conducting mock tests of objective
nature in all the listed five courses.
Course Outcomes: After the completion of the course the student will be able to
Apply the knowledge of circuit theorems and solid state physics to solve the
CO 1
problems in electronic Circuits
CO 2 Design a logic circuit for a specific application
CO 3 Design linear IC circuits for linear and non-linear circuit applications.
CO 4 Explain basic signal processing operations and Filter designs
CO 5 Explain existent analog and digital communication systems
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO 1 3 3 1 2
CO 2 3 3 1 2
CO 3 3 3 1 2
CO 4 3 2 2
CO 5 3 2 1 2
ELECTRONICS & COMMUNICATION ENGINEERING
Assessment Pattern
Bloom’s Category End Semester
Examination
Remember 10
Understand 20
Apply 20
Analyse
Evaluate
Create
Mark distribution
Total Marks CIE ESE ESE Duration
50 0 50 1 hour
End Semester Examination Pattern: Objective Questions with multiple choice (Four).
Question paper include Fifty Questions of One mark each covering the five identified
courses.
Syllabus
Full Syllabus of all five selected courses
.
Course Contents and Lecture Schedule
No Topic No. of Lectures
1 Analog Circuits
1.1 Mock Test on Module 1 and Module 2 1
1.2 Mock Test on Module 3, Module 4 and Module 5 1
1.3 Feedback and Remedial 1
2 Logic Circuit design
2.1 Mock Test on Module 1, Module 2 and Module 3 1
2.2 Mock Test on Module 4 and Module 5 1
2.3 Feedback and Remedial 1
3 Linear IC
3.1 Mock Test on Module 1 and Module 2 1
3.2 Mock Test on Module 3, Module 4 and Module 5 1
3.3 Feedback and Remedial 1
4 Digital Signal Processing
4.1 Mock Test on Module 1, Module 2 and Module 3 1
4.2 Mock Test on Module 4 and Module 5 1
4.3 Mock Test on Module 1, Module 2 and Module 3 1
5 Analog and Digital Communication
5.1 Mock Test on Module 1, Module 2 and Module 3 1
5.2 Mock Test on Module 4 and Module 5 1
5.3 Feedback and Remedial 1
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECL332 COMMUNICATION LAB
PCC 0 0 3 2
Preamble:
• The experiments are categorized into three parts Part A, Part B and Part C.
• The experiments in Part B are software simulations and can be done using
GNU Octave or Python. Other softwares such as MATLAB/ SCILAB/
LabVIEW can also be used.
Prerequisites:
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1 3 3 3 2 3 0 0 0 3 2 0 1
CO2 3 3 3 2 3 0 0 0 0 0 0 1
CO3 3 3 3 3 3 0 0 0 3 2 0 3
ELECTRONICS & COMMUNICATION ENGINEERING
Distribution;
Attribute Mark
Attendance 15
Continuous assessment 30
Internal Test (Immediately before 30
the second series test)
Attribute Mark
Preliminary work 15
Implementing the work/Conducting the experiment 10
Performance, result and inference (usage of equipments 25
and trouble shooting)
Viva voce 20
Record 5
Experiments
Part A
Any two experiments are mandatory. The students shall design and setup simple
prototype circuits with the help of available ICs. They can observe Waveforms
produced by these circuits for standard ideal inputs.
Part B
All experiments are mandatory. The students shall write scripts to simulate
components of communication systems. They shall plot various graphs that help
to appreciate and compare performance.
2. Sample and quantize the signal using an uniform quantizer with number of
representation levels L. Vary L. Represent each value using decimal to
binary encoder.
4. Plot the SNR versus number of bits per symbol. Observe that the SNR
increases linearly.
3. Eye Diagram
3. Use various roll off factors and plot the eye diagram in each case for the
received signal. Make a comparison study among them.
ELECTRONICS & COMMUNICATION ENGINEERING
Part C
Any two experiments are mandatory. The students shall emulate communication
systems with the help of software-defined-radio hardware and necessary control
software. Use available blocks in GNU Radio to implement all the signal
processing. These experiments will help students to appreciate better how
theoretical concepts are translated into practice.
3. Familiarize with GNU Radio (or similar software’s like Simulink/ Lab-
View) that can be used to process the signals received through the SDR
hardware.
2. FM Reception
1. Receive digitized FM signal (for the clearest channel in the lab) using the
SDR board.
3. FM Transmission
1. Use a wave file source.
CATEGORY L T P CREDIT
ECD334 MINIPROJECT
PWS 0 0 3 2
Course Plan
The review committee may be constituted by the Head of the Department. A project
report is required at the end of the semester. The product has to be demonstrated for
its full design specifications. Innovative design concepts, reliability considerations,
aesthetics/ergonomic aspects taken care of in the project shall be given due weight.
Course Outcomes
Be able to practice acquired knowledge within the selected area of
CO1 technology for project development.
Identify, discuss and justify the technical aspects and design aspects
CO2 of the project with a systematic approach.
Reproduce, improve and refine technical aspects for engineering
CO3 projects.
Evaluation
The internal evaluation will be made based on the product, the report and a viva- voce
examination, conducted by a 3-member committee appointed by Head of the
Department comprising HoD or a senior faculty member, Academic coordinator for
that program, project guide/coordinator.
Mark distribution
Split-up of CIE
Component Marks
Attendance 10
Project Report 10
Evaluation by Committee 40
Split-up of ESE
Component Marks
Level of completion 10
Demonstration of 25
functionality
Project Report 10
Viva-voce 20
Presentation 10
ELECTRONICS & COMMUNICATION ENGINEERING
SEMESTER VI
PROGRAM ELECTIVE I
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT312 DIGITAL SYSTEM DESIGN
PEC 2 1 0 3
Preamble: This course aims to design hazard free synchronous and asynchronous sequential
circuits and implement the same in the appropriate hardware device
Course Outcomes: After the completion of the course the student will be able to
CO 1
Analyze clocked synchronous sequential circuits
K4
CO 2
Analyze asynchronous sequential circuits
K4
CO 3
Design hazard free circuits
K3
CO 4
Diagnose faults in digital circuits
K3
CO 5
Summarize the architecture of FPGA and CPLDs
K2
CO2 3 3 2 2 2 3
CO3 3 3 3 3 2 2 3
CO4 3 2 1 2 2 3
CO5 2 2 2 3
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember K1 10 10 15
Understand K2 10 20 30
Apply K3 20 20 35
Analyse K4 10 20
Evaluate
Create
ELECTRONICS & COMMUNICATION ENGINEERING
Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
2. Obtain a minimal state table for a clocked synchronous sequential network having a single
input line ‘x’ in which the symbols 0 and 1 are applied and a single output line ‘z’. An
outputof 1 is to be produced if and only if the 3 input symbols following two consecutive
input 0’s consist of at least one 1. An example of input/output sequences that satisfy the
conditions of the network specifications is:
x=0100010010010010000000011
z=0000001000000100000000001
3. Analyse the following clocked synchronous sequential network. Derive the next state and
output equations. Obtain the excitation table, transition table, state table and state
diagram.
ELECTRONICS & COMMUNICATION ENGINEERING
Course Outcome 2 (CO2): Analyze asynchronous sequential circuits (K4)
1. A reduced flow table for a fundamental-mode asynchronous sequential network is given
below. Using the universal multiple-row state assignment, construct the corresponding
expanded flow table and transition table. Assign outputs where necessary such that there is at
most a single output change during the time the network is unstable. Assume that the inputs x1
and x2 never change simultaneously.
00 01 10 11 00 01 10 11
A A B A D 1 - 0 -
B D B B C - 0 1 -
C A C C C - 1 1 0
D D C A D 0 - - 1
2. Analyze the asynchronous sequential network by forming the excitation/transition table, state
table, flow table and flow diagram. The network operates in the fundamental mode with the
restriction that only one input variable can change at a time.
given by . Show how the hazard can be detected and eliminated in each circuit.
ELECTRONICS & COMMUNICATION ENGINEERING
3. Investigate the problem of clock skew in practical sequential circuits and suggest solutions
with justification to minimize or eliminate it.
Course Outcome 5 (CO5): Summarize the architecture of FPGA and CPLDs (K2)
1. Draw and explain the architecture of Xilinx XC4000 configurable logic block.
2. Draw and explain the architecture of Xilinx 9500 CPLD family.
3. Explain the internal structure of XC4000 input/output block.
SYLLABUS
Module 3: Hazards
Hazards – static and dynamic hazards – essential, Design of Hazard free circuits – Data
synchronizers, Mixed operating mode asynchronous circuits, Practical issues- clock skew and
jitter, Synchronous and asynchronous inputs – switch bouncing
Module 4: Faults
Fault table method – path sensitization method – Boolean difference method, Kohavi
algorithm, Automatic test pattern generation – Built in Self Test (BIST)
Reference Books
1. Miron Abramovici, Melvin A. Breuer and Arthur D. Friedman, Digital Systems Testing
and Testable Design, John Wiley & Sons Inc.
2. Morris Mano, M.D.Ciletti, Digital Design, 5th Edition, PHI.
3. N. N. Biswas, Logic Design Theory, PHI
4. Richard E. Haskell, Darrin M. Hanna , Introduction to Digital Design Using Digilent
FPGA Boards, LBE Books- LLC
5. Samuel C. Lee, Digital Circuits and Logic Design, PHI
6. Z. Kohavi, Switching and Finite Automata Theory, 2nd ed., 2001, TMH
PART A
PART – B
Answer one question from each module; each question carries 14 marks.
Module - I
11 a Analyze the following sequential network. Derive the next state and output
equations. Obtain its transition table and state table.
8
CO1
K4
ELECTRONICS & COMMUNICATION ENGINEERING
b. Construct an ASM chart for the following state diagram shown. Determine the
model of CSSN that this system conforms to with proper justification. 6
CO1
K3
OR
12 For the clocked synchronous sequential network, construct the excitation table, 8
transition table, state table and state diagram. CO1
K4
b. Obtain a minimal state table for a clocked synchronous sequential network having a
single input line ‘x’ in which the symbols 0 and 1 are applied and a single output
line ‘z’. An output of 1 is to be produced if and only if the 3 input symbols
following two consecutive input 0’s consist of at least one 1. An example of
6
input/output sequences that satisfy the conditions of the network specifications is:
x= 0100010010010010000000011
z= 0000001000000100000000001
CO1
K3
ELECTRONICS & COMMUNICATION ENGINEERING
Module - II
OR
00 01 10 11 00 01 10 11
A A B A D 1 - 0 -
B D B B C - 0 1 -
C A C C C - 1 1 0
D D C A D 0 - - 1
ELECTRONICS & COMMUNICATION ENGINEERING
Module - III
15a. Examine the possibility of hazard in the OR-AND logic circuit whose Boolean 8
function is given by . Show how the hazard can be detected and
eliminated. CO3
b. Explain essential hazards in asynchronous sequential networks. What are the K3
constraints to be satisfied to avoid essential hazards? 6
OR
CO3
K3
16a Draw the logic diagram of the POS expression Y= (x1+x2’) (x2+x3). Show that
there is a static-0 hazard when x1 and x3 are equal to 0 and x2 goes from 0 to 1. 9
Find a way to remove the hazard by adding one or more gates. CO3
K3
5
b Discuss the concept of switch bouncing and suggest a suitable solution.
K3
Module - IV
17a Illustrate the fault table method used for effective test set generation for the circuit 8
b How can the timing problems in asynchronous sequential circuits be solved using 6
mixed operating mode circuits?
K3
OR
18 Find the test vectors of all SA0 and SA1 faults of the circuit whose Boolean 8
a.
function is by the Kohavi algorithm. CO4
K3
b.
Identify different test pattern generation for BIST 6
CO4
K3
Module - V
19 Explain the architecture of XC 4000 FPGA family. 14
CO5
K2
OR
20 Draw and explain the architecture of Xilinx 9500 CPLD family. Also explain the 14
function block architecture. CO5
K2
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT322 POWER ELECTRONICS
PEC 2 1 0 3
Preamble: This course aims to develop the skill of the design of various power electronic circuits.
CO 1
Understand the characteristics of important power semiconductor switches
K2
CO 2 Apply the principle of drive circuits and snubber circuits for power semiconductor
K3 switches
CO 3
Build diode bridge rectifiers and Controlled rectifiers
K3
CO 4
Develop DC – DC Switch-Mode Converter
K3
CO 5
Illustrate the principle of DC – AC Switch-Mode Inverter
K2
CO 6
Apply the principle of power electronics for various applications
K3
PO PO PO PO PO PO PO PO PO PO 10 PO 11 PO
1 2 3 4 5 6 7 8 9 12
CO 1 2 2
CO 2 3 2
CO 3 3 2
CO 4 3 2
CO 5 2 2
CO 6 3 2
Assessment Pattern
Mark distribution
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain
10 questions with 2 questions from each module, having 3 marks for each question. Students
should answer all questions. Part B contains 2 questions from each module of which student
should answer any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
1. Illustrate the static and dynamic characteristics, Power BJT, Power MOSFET and IGBT.
Course Outcome 2 (CO2): Apply the principle of drive circuits and snubber circuits for
power semiconductor switches.
Course Outcome 3 (CO3): Build diode bridge rectifiers and Controlled Rectifiers.
1. Explain the operation of three phase diode rectifier and the effect of various loads on the
rectifier function
2. Explain the operation of controlled rectifiers and the effect of various loads on the rectifier
function
3. Model and simulate diode rectifiers and controlled rectifiers for various loads
ELECTRONICS & COMMUNICATION ENGINEERING
Course Outcome 6 (CO6): Apply the principle of power electronics for various applications.
3. Give at least two applications of power electronic circuits for residential applications.
4. Explain at least two applications of power electronic circuits for industrial applications
SYLLABUS
Module 5 : Applications
DC Motor Drives, Induction Motor Drives, Residential and Industrial applications.
Text Books
Reference Books
No Topic No. of
Lectures
1 Power Semiconductor Switches
1.1 Power diodes and Bipolar power transistors – structure, static and
2
dynamic characteristics
1.2 Power MOSFET and IGBT – structure, static and dynamic
3
characteristics
1.3 SCR and GTO – construction and characteristics 2
2 Protection circuits and Rectifiers
2.1 BJT and MOSFET driver circuits (at least two circuits each) 2
2.2 Snubber circuits – ON and OFF snubbers 1
2.3 Three phase diode bridge rectifiers – basic principles only 1
2.4 Single phase and three phase Controlled rectifiers (with R, RL & RLE
3
loads) – basic principles only
3 DC – DC Switch Mode Converters
3.1 Buck, Boost and Buck-Boost DC-DC converters 2
3.2 Waveforms and expression of DC-DC converters for output voltage,
voltage and current ripple under continuous conduction mode 3
(No derivation required)
3.3 Isolated converters: Flyback, Forward, Push Pull, Half bridge and Full
bridge converters – Waveforms and governing equations 3
(No derivation required)
4 DC-AC Switch Mode Inverters
4.1 Inverter topologies 2
4.2 Driven Inverters: Push-Pull, Half bridge and Full bridge 2
ELECTRONICS & COMMUNICATION ENGINEERING
configurations
4.3 Three phase inverter 1
4.4 Sinusoidal and Space vector modulation PWM in three phase 2
inverters
5 Applications
5.1 DC Motor Drives – Adjustable-speed DC drive 2
5.2 Induction Motor Drives – Variable frequency PWM-VSI drives 2
5.3 Residential and Industrial applications 2
Assignment:
At least one assignment should be simulation of power electronic circuits using any circuit
simulation software.
12. Model and simulate Forward converter circuit Fig. 5.72of Umanand L., Power Electronics
Essentials and Applications, Wiley India, 2015, page no.280.
13. Model and simulate Flyback converter circuit Fig. 5.73of Umanand L., Power Electronics
Essentials and Applications, Wiley India, 2015, page no.281.
14. Model and simulate Driven Inverters
15. Model and simulate Pulse Width Modulator
PART A
PART – B
Answer one question from each module; each question carries 14 marks.
ELECTRONICS & COMMUNICATION ENGINEERING
Module – I
Compare and contrast power BJT, MOSFET and IGBT for switching CO
11(a) applications 7 1 K2
OR
CO
12(b) Illustrate the dynamic characteristics of GTO 7 1 K2
Module – II
CO
13(a) Illustrate the base current requirement of power BJT 7 2 K2
CO
13(b) Explain the operation of any one type of the power BJT base drive circuit 7 2 K2
OR
CO
14(b) Deduce the expression for average load voltage in the circuit. 4 3 K2
Module – III
OR
ELECTRONICS & COMMUNICATION ENGINEERING
CO
16(b) How is the flux walking problem solved in full-bridge converter ? 6 4 K2
Module – IV
CO
17(a) Explain the operation of push-pull inverter 8 5 K2
CO
17(b) Illustrate the PWM switching scheme for sine wave output of the inverter 6 5 K2
OR
CO
18(a) Enumerate the principle of operation of three phase inverters 8 5 K2
CO
18(b) What is Space vector modulation in three phase inverters 6 5 K2
Module – V
OR
CO
20(b) Explain dissipative braking scheme in Induction Motor drive. 5 6 K2
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT332 DATA ANALYSIS
PEC 2 1 0 3
Preamble: This course aims to set the foundation for students to develop new-age skills pertaining
to analysis of large-scale data using modern tools.
Prerequisite: None
Course Outcomes: After the completion of the course the student will be able to
CO 1 3 3 3 2
CO 2 3 3 2 3 3
CO 3 3 3 2 3 3 2 2
CO 4 3 3 2 3 3 2 2
CO 5 3 3 2 3 3 2 2
CO 6 3 3 2 3 3 2 2
Assessment Pattern
Continuous Assessment
End Semester Examination
Bloom’s Category Tests
1 2
Remember 10 10 20
Understand 30 30 60
Apply 10 10 20
Analyse
Evaluate
Create
Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours
ELECTRONICS & COMMUNICATION ENGINEERING
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain 10
questions with 2 questions from each module, having 3 marks for each question. Students should
answer all questions. Part B contains 2 questions from each module of which student should answer
any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
SYLLABUS
No Topic No. of
Lectures
1 Overview of Data Analysis and Python
1.1 Numpy and Scipy Python modules for data analysis. 2
1.2 Reading and processing spreadsheets and csv files with Python using 2
xlrd, xlwt and openpyxl.
1.3 Data visualization with Matplotlib. Two dimensional charts and plots. 2
Scatter plots with matplotlib. Three dimensional visualization using
Mayavi module.
1.4 Reading data from sql and mongodb databases with Python 2
2 Big Data Arrays with Pandas
2.1 Intro. To Python pandas 1
2.2 Reading and writing of data as pandas dataframes. Separating header, 3
columns row etc and other manipulations
2.3 Reading data from different kind of files, Merging, concatenating and 3
grouping of data frames. Use of pivot tables. Pickilng
3 PCA and Cluster Analysis
3.1 Singular value decomposition of a matrix/array. Eigen values and eigen 1
vectors.
3.2 PCA,Scree plot. Dimensioanality reduction with PCA. Loadings for 3
principal components. Case study with Python. Cluster analysis.
3.3 Cluster analysis, dendrograms 2
4 Statistical Data Analysis
4.1 Hypothesis testing. Bayesian analysis. Meaning of prior, posterior and 3
likelyhood functions. Use of pymc3 module to compute the posterior
probability.
4.2 MAP Estimation. Credible interval, conjugate 3
distributions .Contingency table and chi square test. Kernel density
estimation.
4.3 Contingency table and chi square test. Kernel density estimation. 3
5 Machine Learning
5.1 Supervised and unsupervised learning. Use of scikit-learn. Regression 2
using scikit-learn.
5.2 Deep learning with convolutional newural networks. Structure of CNN. 2
5.3 Use of Keras and Tensorflow. Machine learning with pytorch. Case 3
study of character recognition with MNIST dataset.
5.4 High performance computing for machine learning. Use of numba, jit 2
and numexpr for faster Python code. Use of Ipython-parallel.
ELECTRONICS & COMMUNICATION ENGINEERING
Simulation Assignments
1. Download the iris data set and read into a pandas data frame. Extract the heaser and replace
with a new header. Extract colums and rows. Extract pivot tables. Filter the data based on
the labels. Store a pivot table as a pickle and retrieve it.
2. For the same data sert, perform principal component analysis. Observe the scree plot.
Identify the principal components. Obtain a low dimensional data, with only the principal
components and compute the mean square error between the original data and the
approximated one. Compute the loadings for the principal components.
3. For the same data, perform hierarchical and K-means clustering with Python codes. Obtain
dendrograms in each case and appreciate the clusters.
4. Download the MNIST letter data set. Construct a CNN network with appropriate layers
using Keras and Tensorflow. Train the CNN with the MNIST data set. Appreciate the
selection and use of training, test and cross-validation data sets. Save the model and weights
and use the model to identify letter images. You may use openCV for reading images.
5. Write a Python script to generate alphanumeric images (26 upper case, 26 lowercase and 10
numbers each 12 point in size) of say 16X16 dimension out of windows .ttf files. Create 62
folders each containg a data set of every alphanumeric character. Create a new CNN with
Keras and Tensorflow. Create a cross validation data set by taking 10 images out of every 62
folder. Use 80% of the total data for training and 20% for testing the CNN. Use an HPCC
like system to train the model and save the model and weight. Test this model to recognize
letter images. You may use openCV for reading images.
6. Repeat assignment 4 using pytorch instead of Keras
7. Repeat assignment 5 using pytorch instead of Keras
ELECTRONICS & COMMUNICATION ENGINEERING
PART A
Answer All Questions
1 Create a two dimensional array of real numbers using numpy. (3) K3
Write Python code to pickle this data.
2 Write Python code to import mayavi module and perform 3-D (3) K3
2 2 2
visualization of x + y + z = 1
3 Write Python code to generate a 5 × 5 pandas data frame of random (3) K3
numbers. Add a header to this dataframe.
4 Write Python code to concatenate two dataframes of same num- ber (3) K3
of columns.
5 Write the expression for the singular value decomposition of a (3) K3
matrix A
6 Explain how principal components are isolated using scree plot. (3) K1
7 State Bayes theorem and explain the significance of the terms prior, (3) K1
likelyhood and posterior.
8 Write Python code with pymc3 to realize a Bernoulli trial with (3) K3
p(head) = 0.2
9 Give the structure a convolutional neural network (3) K1
10 Compare supervised and unsupervised learning (3) K1
PART B
Answer one question from each module. Each question carries 14 mark.
Module I
11(A) Write Python code to read a spreadsheet in .xls format a text (8) K3
file in .csv format and put these data into numpy arrays. in
both cases, plot the second column against the first column
using matplotlib
11(B) Write Python code to read tables from sql and mongodb (6) K3
databases.
OR
Module II
13(A) Write Python code to import a table in .xls format into a (6) K3
data frame. Remove all NaN values.
13(B) Write Python code to generate 10 data frames of size 5 × 5 (8) K3
of random numbers and use a for loop to concatenate them.
Pickle the concatenated dataframe and store it. Write another
code to retrieve the dataframe from the pickle.
OR
14(A) Write Python code to read in a table from a pdf file into (8) K3
a pandas dataframe. Write code to remove the first two
columns and write the rest of the dataframe as a json file.
14(B) Explain the term pivot table. Create a pivot table from the (6) K3
above dataframe
Module III
OR
Module IV
17(A) Assume that you have a dataset with 57 data points of Gaus- (8) K3
sian distribution with a mean of 4 and standard deviation of
0.5. Using PyMC3, write Python code to compute:
• The posterior distribution
.
17(B) Write a python code to find the Bayesian credible interval (6) K3
in the above question. How is it different from confidence
interval.
OR
19(A) Explain the use of numba and numexpr in fatser Python execution with
examples (8) K3
19(B) Explain the use of Keras as a frontend for Tensorflow with (6) K3
Python codes
OR
CATEGORY L T P CREDIT
ECT342 EMBEDDED SYSTEMS
PEC 2 1 0 3
Preamble: This course aims to design an embedded electronic circuit and implement the same.
Prerequisite: ECT 203 Logic Circuit Design, ECT 202 Analog Circuits ,ECT 206 Computer
Architecture and Microcontrollers
Course Outcomes: After the completion of the course the student will be able to
CO 1 Understand and gain the basic idea about the embedded system.
K2
CO 2 Able to gain architectural level knowledge about the system and hence to program an
K3 embedded system.
CO 3 Apply the knowledge for solving the real life problems with the help of an embedded
K3 system.
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO 3 3 2 1 2 2
1
CO 3 3 3 3 2 2
2
CO 3 3 3 3 2 3 2
3
Assessment Pattern
Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain
10 questions with 2 questions from each module, having 3 marks for each question. Students
should answer all questions. Part B contains 2 questions from each module of which student
should answer any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Course Outcome 1 (CO1) : Understand the embedded system fundamentals and system
design (K1).
Course Outcome 2 (CO2): Understand the peripheral devices and their interfacing with the
processor. (K2)
Course Outcome 3 (CO3): To understand the ARM processor architecture and pipeline
processor organization. (K3)
1. Give the architecture of the ARM processor and explain the registers.
2. Explain the pipelined architecture of ARM processor.
3. Write an ARM assembly language program to print the sum of two numbers.
ELECTRONICS & COMMUNICATION ENGINEERING
Course Outcome 4 (CO4): To write programs in assembly and high level languages for
ARM processor. (K3)
Course Outcome 5 (CO5): To understand the basics of real time operating systems and
their use in embedded systems. (K2)
SYLLABUS
Text Books
1. 1. Raj kamal, Embedded Systems Architecture, Programming and Design, TMH, 2003
2. K.V. Shibu, Introduction to Embedded Systems, 2e, McGraw Hill Education India, 2016.
3. Wayne Wolf, Computers as Components: Principles of Embedded Computing System
Design, Morgan Kaufman Publishers - Elsevier 3ed, 2008
4. Steve Furber, ARM system-on-chip architecture, Addison Wesley, Second Edition, 2000
Reference Books
4 ARM Programming
4.1 Architectural Support for High-Level Languages 2
4.2 The Thumb Instruction Set 3
4.3 Architectural Support for System Development 2
4.4 Programming 3
(a) Elevator controller design (b) Chocolate vending machine design (c) Industrial controller
using sensors (d) IOT applications using sensors, communication devices and actuators
ELECTRONICS & COMMUNICATION ENGINEERING
PART A
(Answer ALL Questions. Each Question Carries 3 Marks.)
PART – B
(Answer one question from each module; each question carries 14 marks)
Module – I
11. (a) What are the characteristics of an embedded system? Explain. [07 Marks]
(b) Explain the different phases of EDLC. [07 Marks]
OR
12. (a) Write different steps involved in the embedded system design process. [07 Marks]
(b) Explain the structural description of embedded system design. [07 Marks]
Module – II
13. (a) What is serial and parallel port communication? Explain with the help of necessary
diagrams. [07 Marks]
ELECTRONICS & COMMUNICATION ENGINEERING
(b) What is interrupt? How interrupts are handled in a processor? Explain ISR.[07 Marks]
OR
14. (a) With the help of a diagram show how ROM and RAM are interfaced to a
processor. Explain the read/write processes. [07 Marks]
(b) Explain how a memory management unit is used in a processor. What are its uses?
What is DMA ? [07 Marks]
Module – III
15. (a) Write a note on ARM processor architecture and its registers. [07 Marks]
(b) Write a note on data processing and data transfer instructions with the help of
examples [07 Marks]
OR
16. (a) What is pipeline architecture? Explain how an ARM instruction is executed in a 5
stage pipeline processor with the help of an example. [08 Marks]
(b) Write an ARM assembly language program to print text string “Hello World”.
[06 Marks]
Module – IV
17. (a) Explain ARM floating point architecture and discuss how floating point numbers are
handled [07 Marks]
(b) Write a note on Thumb single register and multiple register data transfer instructions
with the help of examples. [07 Marks]
OR
18. (a) What is Thumb instruction set? Why it is used? Explain Thumb progrmmers model.
[07 Marks]
(b) Draw the block diagram of AMBA architecture. What are the different types of buses
used in the architecture? [07 Marks]
Module V
19. (a) What are the different services of Kernel? Explain different types of Kernels.
[07Marks]
ELECTRONICS & COMMUNICATION ENGINEERING
(b) Explain pre-emptive and non-pre-emptive scheduling algorithms with the help of an
example. [07 Marks]
OR
20. (a) What are the basic functions of real time Kernel? Explain. [07 Marks]
(b) Write a note on the following (a) shared memory (b) message passing (c) deadlock
[07 Marks]
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT352 DIGITAL IMAGE PROCESSING
PEC 2 1 0 3
Preamble: This course aims to develop the skills for methods of various transformation and
analysis of image enhancement, image reconstruction, image compression, image segmentation
and image representation.
Course Outcomes: After the completion of the course the student will be able to
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO 1 3 3 2 1 2
CO 2 3 3 2 1 2
CO 3 3 3 3 1 2
CO 4 3 3 3 1 2
Assessment Pattern
Continuous Assessment
Bloom’s Category Tests End Semester Examination
1 2
Remember K1 10 10 10
Understand K2 20 20 20
Apply K3 20 20 70
Analyse K4
Evaluate
Create
Mark distribution
Total ESE
CIE ESE
Marks Duration
150 50 100 3 hours
ELECTRONICS & COMMUNICATION ENGINEERING
Continuous Internal Evaluation Pattern:
Attendance: 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain 10
questions with 2 questions from each module, having 3 marks for each question. Students should
answer all questions. Part B contains 2 questions from each module of which student should answer
any one. Each question can have maximum 2 sub-divisions and carry 14 marks. The questions must
have 50% representation from theory, and 50% representation from logical/numerical/derivation/
proof.
Course Outcome 1 (CO1): Analyze the various concepts and restoration techniques for image
processing
1. For the given image check whether pixel P and Q have 8 connectivity.
2. Find filtered image using median filter.
3. Explain Weiner filtering.
Course Outcome 2 (CO2): Differentiate and interpret the various image enhancement techniques
1. Classify different image enhancement process. Differentiate between spatial domain and
frequency domain techniques of image enhancement.
2. What is histogram equalisation? Briefly discuss the underlying logic behind histogram
equalisation.
Module 1
Digital Image Fundamentals: Image representation, basic relationship between pixels, elements of
DIP system, elements of visual perception-simple image formation model. Vidicon and Digital
Camera working principles Brightness, contrast, hue, saturation, mach band effect
Colour image fundamentals-RGB, CMY, HIS models, 2D sampling, quantization.
Module 2
Review of matrix theory: row and column ordering- Toeplitz, Circulant and block matrix
2D Image transforms: DFT, its properties, Walsh transform, Hadamard transform, Haar transform,
DCT, KL transform and Singular Value Decomposition.
Image Compression: Need for compression, Basics of lossless compression – bit plane coding, run
length encoding and predictive coding, Basics of lossy compression – uniform and non-uniform
quantization techniques used in image compression, Concept of transform coding, JPEG Image
compression standard.
Module 3
Image Enhancement: Spatial domain methods: point processing- intensity transformations,
histogram processing, image subtraction, image averaging. Spatial filtering- smoothing filters,
sharpening filters.
Frequency domain methods: low pass filtering, high pass filtering, homomorphic filter
Module 4
Image Restoration: Degradation model, Unconstraint restoration- Lagrange multiplier and constraint
restoration
Inverse filtering- removal of blur caused by uniform linear motion, Weiner filtering,
Geometric transformations-spatial transformations
Module 5
Image segmentation: Classification of Image segmentation techniques, region approach, clustering
techniques. Segmentation based on thresholding, edge based segmentation. Classification of edges,
edge detection, Hough transform, active contour.
Text Books
1. Gonzalez Rafel C, Digital Image Processing, Pearson Education, 2009
2. S Jayaraman, S Esakkirajan, T Veerakumar, Digital image processing, Tata Mc Graw Hill, 2015
Reference Books
6. Create degraded images affected by motion blur and noise by simulating the models for both.
Apply inverse filtering and Weiner filtering methods to the simulated images and compare
their performance.
7. Detect an object against the background using various edge detection algorithms and compare
their performance.
1. Give mathematical representation of digital images? Write down the names of different
formats used. K2
2. Explain mach band effect. K2
3. What is SVD? Explain its applications in digital image processing. K3
4. Write the similarity and difference between Hadamard and Walsh transforms K3
5. What are the advantages and disadvantages of block processing K2
6. Name the role of point operators in image enhancement K2
7. What is median filter? Explain the operation in 2D noise image with salt and pepper noise K3
8. Distinguish between linear and nonlinear image restoration. K3
9. Mention the use of derivative operation in edge detection. K4
10. The Pewitt edge operator is much better than Robert operator. Why? Give the matrix. K3
PART B
Module 1
1. a) State and explain the 2D sampling theorem. Explain how aliasing errors can be eliminated? (7
marks)
b) Define the terms brightness, contrast, hue and saturation with respect to a digital image. Explain
the terms False contouring and Machband effect. (K1 – CO1) (7 marks)
OR
2. a) Explain elements of visual perception simple image formation model in detail (K1 – CO1) (8
marks)
b) Explain various color image models and its transformations (K1 - CO1) (6 marks)
Module 2
3. a) Explain the difference between DST and DCT. (K2 - CO1) (4 marks)
b) Compute the 2D DFT of the 4x4 gray scale image given below. (K3-CO1) (10 marks)
ELECTRONICS & COMMUNICATION ENGINEERING
OR
b) Compute the 8-point DCT for following date X={2,4,6,8,10,6,4,2}. (10 marks)
Module 3
5. a) List histogram image enhancement techniques? Explain each one in detail. (10 marks)
K2-CO2
OR
6. a) Describe the following in detail (i) Histogram equalization (ii) LPF and HPF in image
enhancement (iii) high boost filters (10 marks)
Module 4
7. a) Assume 4x4 image and filter the image using median filter of 3x3 neighbourhood.
Use replicate padding. (K3—CO1) (8 marks)
OR
Module 5
9. a) Explain the active contour algorithm for image segmentation any four geometric
transformations on an image. (K2-CO3) (7 marks)
c) Assume 4x4 image and filter the image using median filter of 3x3 neighbourhoods. Use
replicate padding (K3—CO1) (7 marks)
OR
10. a) Explain global, adaptive and histogram based thresholding in detail. (7 marks)
c) Explain Hough transform in detail (7 marks)
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble: This course introduces students to the rapidly emerging, multi-disciplinary, and
exciting field of Micro Electro Mechanical Systems.
Course Outcomes
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1 3 3
CO2 3 3
CO3 3 3
CO4 3 3 2
CO5 3 3
CO6 3 3
Assessment Pattern
Bloom’s Continuous Assessment Tests End Semester
Category 1 2 Examination
Remember 10 10 20
Understand 30 30 60
Apply 10 10 20
Analyse
Evaluate
Create
Mark distribution
Total Marks CIE ESE ESE Duration
150 50 100 3 hours
ELECTRONICS & COMMUNICATION ENGINEERING
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
Course Outcome 3(CO3): Explain the application of scaling laws in the design of micro
systems
1. Explain force scaling vector, what information does it provide to a MEMS designer?
2. Derive equations for acceleration a, time t and power density P/V based on the
Trimmer Force Scaling Vector?
3. Explain why electrostatic actuation is preferred over electromagnetic actuation at the
micro-scale.
Course Outcome 4 (CO4): Identify the typical materials used for fabrication of micro
systems
1. State the relevant properties of Silicon Carbide and Silicon Nitride for use in
Microsystems.
2. Explain why Silicon evolved as the ideal substrate material for MEMS fabrication.
3. Explain with examples the advantages of use of polymers in micro systems
fabrication?
ELECTRONICS & COMMUNICATION ENGINEERING
1. Explain the steps involved in photolithography. State the chemicals used in each
of the stages along with the operating conditions.
2. Explain the criteria for choice of surface or bulk micromachining techniques in the
design of micro systems.
3. Explain with block diagram the steps in LIGA process. State two advantages of LIGA
process over other micro machining techniques.
Course Outcome 6 (CO6): Describe the challenges in the design, fabrication and
packaging of Micro systems
SYLLABUS
MODULE I
Actuation and Sensing techniques: Thermal sensors and actuators, Electrostatic sensors and
actuators, Piezoelectric sensors and actuators, magnetic actuators
MODULE II
Review of Mechanical concepts: Stress, Strain, Modulus of Elasticity, yield strength, ultimate
strength – General stress strain relations – compliance matrix. Overview of commonly used
mechanical structures in MEMS - Beams, Cantilevers, Plates, Diaphragms – Typical
applications
Flexural beams: Types of Beams, longitudinal strain under pure bending – Deflection of
beams – Spring constant of cantilever – Intrinsic stresses
MODULE III
Materials for MEMS – Silicon – Silicon compounds – Silicon Nitride, Silicon Dioxide,
Silicon carbide, Poly Silicon, GaAs , Silicon Piezo resistors. Polymers in MEMS – SU-8,
PMMA, PDMS, Langmuir – Blodgett Films.
ELECTRONICS & COMMUNICATION ENGINEERING
MODULE IV
MODULE V
Text Books:
2. Tai-Ran Hsu, MEMS and Microsystems Design and Manufacture, TMH, 2002
Reference Books:
1. Chang C Y and Sze S. M., VLSI Technology, McGraw-Hill, New York, 2000
2. Julian W Gardner, Microsensors: Principles and Applications, John Wiley & Sons, 1994
3. Mark Madou, Fundamentals of Micro fabrication, CRC Press, New York, 1997
No Topic No. of
Lectures
1.1 Introduction to MEMS and Microsystems 1
1.2 Applications – multidisciplinary nature of MEMS – principles and 1
examples of Micro sensors and micro actuators – micro
accelerometer, comb drives -
1.3 Micro grippers – micro motors, 1
1.4 micro valves, micro pumps, Shape Memory Alloys. 1
1.5 Actuation and Sensing techniques : Thermal sensors and actuators, 1
1.6 Electrostatic sensors and actuators 1
1.7 Piezoelectric sensors and actuators, 1
1.8 magnetic actuators 1
ELECTRONICS & COMMUNICATION ENGINEERING
PART A
Answer All Questions
PART B
Answer one question from each module. Each question carries 14 marks.
Module I
Module V
19(A) Explain the following bonding techniques with figures a) Silicon-on-
Insulator b) Wire bonding
19(B) Explain the challenges involved in BioMEMS. List three 8
applications of BioMEMS.
OR
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT372 QUANTUM COMPUTING
PEC 2 1 0 3
Preamble: Quantum computers are not yet built. If such machines become a reality, they will
fundamentally change how we perform calculations, and the implications on many
applications (including communications and computer security) will be tremendous. This
course aims to provide a first introduction to quantum computing with a general
understanding of how quantum mechanics can be applied to computational problems. It
highlights the paradigm change between conventional computing and quantum computing,
and introduce several basic quantum algorithms.
Course Outcomes: After the completion of the course the student will be able to
CO 1 Explain the basic constructs in linear algebra needed to build the concepts of quantum
K2 computing
CO 2 Relate the postulates of quantum mechanics for computation and illustrate/
K2 demonstrate quantum measurement
CO 3 Identify quantum gates and build quantum circuit model in which most of the
K3 quantum algorithms are designed.
CO 4 Analyse and design quantum algorithms and grasp the advantage they offer over
K4 classical counterparts.
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO1 3 3 2
CO2 3 3 2
CO3 3 3 3 2
CO4 3 3 3 2 2
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember K1 10 10 10
Understand K2 20 20 20
Apply K3 20 10 50
Analyse K4 10 20
Evaluate
Create
ELECTRONICS & COMMUNICATION ENGINEERING
Mark distribution
Total Marks CIE ESE ESE Duration
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
Course Outcome 1 (CO1): Explain the basic constructs in linear algebra needed to build
the concepts of quantum computing (K2)
1. Summarise the basic operators and matrices required for understanding the quantum
computing concepts.
2. Find the Eigen values and Eigen vectors of Pauli matrices.
3. Explain spectral decomposition and Spectral theorem. State the spectral theorem for
Hermitian operator.
4. Show the matrix representation of the tensor products of the Pauli operators
Course Outcome 2 (CO2): Relate the postulates of quantum mechanics for computation
and illustrate/ demonstrate quantum measurement (K2)
Course Outcome 3 (CO3): Identify quantum gates and build quantum circuit model in
which most of the quantum algorithms are designed (K3)
Course Outcome 4 (CO4): Analyse and design quantum algorithms and grasp the
advantage they offer over classical counterparts (K4)
1. Design a circuit that implements Quantum Fourier Transform(QFT) for an n-bit input.
2. Construct the phase estimation algorithm from basic principles and design the circuit for
phase estimation using QFT.
3. Interpret phase estimation algorithm for the implementation of order finding and
factorisation algorithms.
SYLLABUS
Module 5: Algorithms
Quantum Fourier Transform (QFT) – Quantum circuit for QFT, Quantum phase estimation,
Modular exponentiation, Order finding and factorisation – Deutsch’s algorithm.
Text Books
1. M. A. Nielsen and I. L. Chuang, Quantum Computation and Quantum Information,
Cambridge, UK, Cambridge University Press, 2010.
2. J. Gruska, Quantum Computing, McGraw Hill, 1999.
3. G. Strang, Linear algebra and its applications (4th Edition), Thomson, 2006.
ELECTRONICS & COMMUNICATION ENGINEERING
Reference Books
No Topic No. of
Lectures
1 Basics of Linear Algebra
1.1 History and Overview of Quantum Computation and Quantum Information 1
1.2 Linear Algebra Basics 1
1.3 Linear Operators and matrices 1
1.4 Pauli matrices 1
1.5 Inner Products, Eigen values and Eigen vectors 1
1.6 Hermitian operators and Adjoints, Spectral theorem 2
1.7 Tensor Products 2
4 Quantum Measurement
4.1 Basic principle of quantum measurement - Principle of deferred 1
measurement, Principle of implicit measurement
4.2 Gates with projective measurements 2
4.3 Universal quantum gates 1
ELECTRONICS & COMMUNICATION ENGINEERING
5 Algorithms
5.1 Quantum Fourier Transform (QFT) 1
5.2 Quantum circuit for QFT Quantum phase estimation 2
5.3 Modular exponentiation 1
5.4 Order finding and factorisation – Deutsch’s algorithm 2
Model Question paper ELECTRONICS & COMMUNICATION ENGINEERING
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
SIXTH SEMESTER B.TECH DEGREE EXAMINATION, (Model Question Paper)
Course Code: ECT372
Course Name: QUANTUM COMPUTING
Max. Marks: 100 Duration: 3 Hours
PART A
1 Consider the operator from ₵2 → ₵2 given by T(x,y) = (ix, iy), where ℤ2 = -1. Find K2
the matrix representation of the Transformation.
2 2 1 K1
Write the Eigen values and Eigen vectors of the matrix . Is this operator
1 2
Hermitian?
3 1 j K1
Write down the Bloch sphere representation of the Quantum bit 0 1 .
2 2
4 Suppose the first bit of a two bit Quantum System whose state given by K3
00 01 10 11 is measured
a. What is the probability that the first bit is observed to be 0?
b. Suppose that the first bit is observed to be 0, then what is the resultant state
of the system?
5. Compute the resultant state of the given circuit for input state 00 . K3
H
CNOT
6 What is the 4×4 unitary matrix
H
for the circuit given below K2
. H
x2
x1
7 State the two basic principles of quantum measurement and explain it’s uses. K1
8 For the given circuit, 0 was observed by measuring the second bit. What is the K3
resultant Quantum State of the first bit?
9 Give a decomposition of the controlled-Rk gate into single qubit and CNOT gates. K2
10 Draw the 3 input Quantum Fourier Transform (QFT) circuit. K2
PART – B
ELECTRONICS & COMMUNICATION ENGINEERING
Answer one question from each module; each question carries 14 marks.
Module - I
11 a. Find the eigenvectors and eigenvalues of the following four matrices: 7
1 0 0 1 0 i 1 0 CO1
0 1 2 3
0 1 1 0 i 0 0 1
K2
b. Give the eigenvalues and eigenvectors of this matrix 7
1 0 0 0
0 0 1 0
0 1 0 0 CO1
0 0 0 1
K3
OR
12 a. A matrix M is Hermitian if M† = M. Let M be Hermitian. 7
i. Prove that all of its eigenvalues are real. CO1
ii. Prove that v†Mv is real, for all vectors v. When v†Mv > 0, we say that M > 0. K3
b. Let M be Hermitian, and define 7
iM (iM ) k
U e
k k!
CO1
Prove that U U = I, where I is the identity matrix. For matrix M, let M = (M ) , K3
† † T *
Module - II
13 a. What is a Quantum State. Explain with examples 2
CO2
K2
b. Consider the following two-qubit quantum state, ׀φ›. 12
2 1 2i 2 5i
00 01 10 11
3 3 6 3 3 3 6
i. What are the probabilities of outcomes 0 and 1 if the first qubit of ׀φ› is mea- CO2
sured?
ii. What are the probabilities of outcomes 0 and 1 if the second qubit of ׀φ› is K3
measured?
iii. What is the state of the system after the first qubit of ׀φ› is measured to be a
0?
iv. What is the state of the system if the second qubit of ׀φ› is measured to be a
1?
v. What are the probabilities of outcomes 0 and 1 if the second qubit of the sys-
tem is measured, after the first qubit of ׀φ› has been measured to be 0?
vi. What are the probabilities of outcomes 0 and 1 if the first qubit of the system
is measured, after the second qubit of ׀φ› has been measured to be 1?
OR
ELECTRONICS & COMMUNICATION ENGINEERING
14 a. State and explain the four postulates of Quantum Mechanics applied to computing. 8
CO2
K2
b. Which quantum state do we get if we apply (H ⊗ I) CNOT to I) CNOT to 6
1 2
00 11 CO2
3 3
Here I is the 1-qubit identity operation, H is the 1-qubit Hadamard, and CNOT is K3
the 2-qubit controlled-not operation with the first (=leftmost) qubit being the con-
trol.
What is the probability of seeing 11 if we measure the resulting state in the com-
putational basis?
Module - III
15 a. Show that XYX = −Y and use this to prove that X Ry (θ) X = R) X = Ry (−θ) X = R). 7
CO3
K3
b. An arbitrary single qubit unitary operator can be written in the form 7
U exp(i ) Rnˆ ( ) . for some real numbers α and θ) X = R, and a real three-dimensional CO3
unit vector n̂ . K3
i. HXH = Z CO3
ii. HY H = −Y K3
iii. HZH = X
b. Show that 7
= Z CO3
K3
Z
ELECTRONICS & COMMUNICATION ENGINEERING
Module - IV
17 Suppose we have a single qubit operator U with eigenvalues ±1, so that U is both 14
Hermitian and unitary. Suppose we wish to measure the observable U. How can this CO3
be implemented by a quantum circuit? Show that the following circuit implements a K3
measurement of U.
0
H H
in
U out
OR
18 a. Derive the circuit implementing the controlled-U operation for an arbitrary single 7
qubit U, using only single qubit operations and the CNOT gate. CO3
K4
b. Using just CNOTs and Toffoli gates, construct a quantum circuit to perform the 7
transformation given below.
CO3
1 0 0 0 0 0 0 0 K4
0 0 0 0 0 0 0 1
0 1 0 0 0 0 0 0
0 0 1 0 0 0 0 0
0 0 0 1 0 0 0 0
0 0 0 0 1 0 0 0
0 0 0 0 0 1 0 0
0 0 0 0 0 0 1 0
Module - V
19 a. Derive the circuitry for computing a 4-input Quantum Fourier Transform (QFT). 7
CO4
K3
b. The two qubit Quantum Fourier Transform is given by the following matrix. 7
1 1 1 1 CO4
i
1 1 i 1
F2
2 1 1 1 1 K3
1 i 1 i
Sketch a circuit for implementing the operator F2 using any combination of 1-qubit
Hadamard gates; 1-qubit Pauli gates; 2-qubit CNOT gates and controlled phase
shifts. Briefly explain your circuit.
ELECTRONICS & COMMUNICATION ENGINEERING
OR
20 a. Explain the phase estimation algorithm using Quantum Fourier Transform (QFT). 8
Derive the circuitry for the Quantum Phase estimation. CO4
K3
b. Apply Quantum phase estimation to estimate the phase of a T-Gate. 6
CO4
K4
ELECTRONICS & COMMUNICATION ENGINEERING
SEMESTER VI
MINOR
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT382 VLSI CIRCUITS
VAC 3 1 0 4
Preamble: This course aims to impart the knowledge about the fundamentals of Digital Systems,
MOSFETs, basic VLSI circuits and Application Specific Integrated Circuits.
Course Outcomes: After the completion of the course the student will be able to:
Explain the working of various functional building blocks used in digital system
CO1
design
Explain Structure and working of MOSFETS and basic VLSI circuits using
CO2
MOSFET
CO3 Explain the circuit technique used to implement dynamic logic and storage cells
Explain the application specific integrated circuit design flow and design
CO4
approached
Explain the programmable logic cells, programming technologies, different type of
CO5
i/o cells and different timing constraints in ASIC design
CO1 3 2 3 2 3
CO2 3 2 2 1 3
CO3 3 2 2 1 3
CO4 3 3 3 3 3 3
CO5 3 3 3 3 3 3
Assessment Pattern:
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember K1 15 15 30
Understand K2 25 25 50
Apply K3 10 10 20
Analyse
Evaluate
Create
ELECTRONICS & COMMUNICATION ENGINEERING
Mark distribution:
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain
10 questions with 2 questions from each module, having 3 marks for each question. Students
should answer all questions. Part B contains 2 questions from each module of which student
should answer any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Mark patterns are as per the syllabus with 75% for theory and 25% for logical/numerical
problems.
Syllabus
Timing constraints in ASIC design: setup time, hold time, propagation delay, clock to output
delay, critical path (concept only)
Text Books:
References:
1. Thomas Floys, Digital Fundamentals, 11th edition, Pearson Publication, 2015
2. Neil H.E. Weste, Kamran Eshraghian, Principles of CMOS VLSI Design- A Systems
Perspective, Second Edition. Pearson Publication, 2005.
3. Jan M. Rabaey, Digital Integrated Circuits- A Design Perspective, Prentice Hall, Second
Edition, 2005.
Course Contents and Lecture Schedule
4.4 Logical and Physical design. Speed power and area considerations in VLSI design 2
Module 5: FPGA Architecture (9 hours)
Programmable logic cells: multiplexer based logic cells(ACT1), lookup table
5.1 based logic implementation(XC3000 CLB), programmable array based logic 3
implementation (Altera MAX).
5.2 ASIC programming technologies: antifuse, SRAM, EPROM, EEPROM 2
5.3 Different types of I/O cells used in programmable ASICs 2
Timing constraints in ASIC design: setup time, hold time, propagation delay,
5.4 2
clock to output delay, critical path
ELECTRONICS & COMMUNICATION ENGINEERING
Model Question Paper
PART A
(Answer All Questions)
1 Which are the universal gates and why are they called as universal gates? (3)
2 Draw the circuit diagram to realize a modulo 15 down counter (3)
3 Draw VI characteristics of n- channel MOSFET and clearly mark different (3)
regions
4 Define lambda rules and micron rules. (3)
5 List out the merits and drawbacks of np domino over domino logic (3)
6 Explain the working of one transistor Dynamic Memory Cell. (3)
7 Explain Moore slaw in VLSI design (3)
8 Differentiate between full custom and semicustom design methods in (3)
ASIC design.
9 List different types of I/O cells used in programmable ASICs. (3)
10 What is mean by critical path in an ASIC? (3)
PART B
(Answer one question from each module. Each question carries 14
mark.)
11 (a) With circuit and truth table, explain the working of a full adder. Also draw (8)
the schematic of 4 bit binary adder using full adder blocks
(b) Construct a circuit to convert four bit serial data to parallel data and (6)
explain its working.
OR
12 (a) Realize a 16:1 multiplexer using four bit multiplexers and basic gates. (8)
Also explain it using its switching expression
(b) Explain the working of JK flip flop with its circuit and truth table (6)
(b) Draw the circuit diagram of a two input CMOS NAND gate (6)
OR
15 (a) Explain the Pre charge- Evaluate phase in the dynamic logic. (6)
(b) Draw a 4x4 MOS ROM Cell Array and explain its working (8)
OR
16 (a) With neat schematic diagram, explain the working of NP domino logic. (8)
What is its advantage over domino logic?
(b) Explain the working of a three transistor DRAM cell (6)
17 (a) What is FPGA? What are its applications? With block diagram explain its (7)
internal architecture?
(b) Explain ASIC design flow. (7)
OR
18 (a) Explain the Top-Down and Bottom-Up design approaches in FPGA based (8)
system designs
(b) List the advantages of SOC (6)
19 (a) Explain the gate array based ASICs with neat diagram (7)
20 (a) Discuss the different types of I/O cells that are used in programmable (6)
ASICS and their functions
(b) Define setup time, hold time, propagation delay and clock to output delay (8)
ELECTRONICS & COMMUNICATION ENGINEERING
CATEGORY L T P CREDIT
ECT384 DATA NETWORKS
VAC 3 1 0 4
Preamble: This course aims to provide an insight into the concepts of data communication
and networking.
Prerequisite: Nil
Course Outcomes: After the completion of the course the student will be able to
CO1 Explain the concepts of data communication, structure of networks and compare OSI
K2 and TCP/IP networking models
CO2 Explain the responsibilities of the data link layer including framing, addressing, flow
K2 control, error control and media access control
CO3 Illustrate the functions and protocols of network layer, transport layer and
K2 application layer in inter-networking
CO4 Discuss congestion control techniques and Quality of Service requirements for a
K2 network
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO 1 3 3 2
CO 2 3 3 2 2
CO 3 3 3 2 2
CO 4 3 3 2
CO 5 3 3 2
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember K1 20 15 20
Understand K2 30 35 80
Apply
Analyse
Evaluate
Create
Mark distribution
Total Marks CIE ESE ESE Duration
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
Course Outcome 2 (CO2): Explain the responsibilities of the data link layer including
framing, addressing, flow control, error control and media access control (K2)
Course Outcome 3 (CO3): Illustrate the functions and protocols of network layer,
transport layer and application layer in inter-networking (K2)
1. Describe how logical addresses are mapped to physical address using RARP
2. Explain the application layer protocols
3. Explain the distance vector routing protocol
Course Outcome 4 (CO4): Discuss congestion control techniques and Quality of Service
requirements for a network(K2)
SYLLABUS
Text Book
Behrouz A Forouzan, Data Communication and Networking, 4/e, Tata McGraw Hill
Reference Books
1. Andrew S. Tanenbaum, Computer Networks, 4/e, PHI (Prentice Hall India).
2. William Stallings, Computer Networking with Internet Protocols, Prentice-Hall, 2004
3. Fred Halsall, Computer Networking and the Internet, 5/e, Pearson Education
4. Larry L Peterson and Bruce S Dave, Computer Networks – A Systems Approach, 5/e,
Morgan Kaufmann
ELECTRONICS & COMMUNICATION ENGINEERING
PART – B
Answer one question from each module; each question carries 14 marks.
Module - I
11 Explain the responsibilities of the layers of OSI model. CO1, K2
OR
12 (a) Illustrate the functioning of circuit switched networks and datagram CO2, K2
networks
Module - II
13. Explain how bandwidth spreading is achieved using FSSS and DSSS. CO2, K2
OR
14 Illustrate the Stop and Wait Protocol. CO3, K2
ELECTRONICS & COMMUNICATION ENGINEERING
Module - III
15 Explain the channelization protocols. CO2, K2
OR
(b) Discuss the Hidden station problem and the exposed station problem in
IEEE802.11 (7 marks) CO2, K2
Module - IV
17 Describe mapping of logical addresses to physical addresses using ARP Protocol CO3, K2
OR
18 Describe the routing of packets using the distance vector routing protocol (10 CO3, K2
marks)
(b) Illustrate the functionality of the network layer at the source (4 marks) CO3, K2
Module - V
19 Describe the ports, user datagram, checksum and operation of UDP protocol CO4, K2
OR
CO4, K2
20 (a) Explain the different techniques to improve the Quality of Service (10
marks) CO3, K2
(b) Describe the services of user agent in electronic mail systems (4 marks)
ELECTRONICS & COMMUNICATION ENGINEERING
TOPICS IN COMPUTER CATEGORY L T P CREDIT
ECT386
VISION VAC 3 1 0 4
Preamble: This course aims to develop the knowledge of various methods, algorithms and
applications of computer vision
Prerequisite: Nil
Course Outcomes: After the completion of the course the student will be able to
Apply edge, corner detection methods and optical flow algorithms to locate
CO 4 objects in an image/video.
PO PO PO PO PO PO PO PO PO PO 10 PO PO
1 2 3 4 5 6 7 8 9 11 12
CO 1 3 3 2 2 2 2 3
CO 2 3 3 2 2 2 2 3
CO 3 3 3 3 2 2 2 3
CO 4 3 3 3 2 2 2 3
CO 5 3 3 3 2 2 2 3
Assessment Pattern
Mark distribution
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
Course Outcome 1 (CO1): Apply basic point operators and 2D transforms for digital
filtering operations
1. Why histogram transformations are applied in a grey scale image and what output is
observed in that case.
2. Find filtered image using LP/HP/Smoothing/Median filter.
3. Describe the working principle of Homomorphic filter.
Course Outcome 2 (CO2): Apply various algorithms for morphological operations and
binary shape analysis
1. List different morphological operators and describe about each one in detail.
2. To describe connected component labelling and to apply it in a given image pixel set.
3. Find 8-point connectivity and Chain code of a given image pixel diagram.
Course Outcome 4 (CO4): Apply edge, corner detection methods and optical flow
algorithms to locate objects in an image/video.
1. What is the role of edge detection and corner detection in Computer Vision
applications?
2. Describe Canny’s edge detection algorithm.
3. Mention the steps in Harris corner detection algorithm and explain how it is employed
to detect corners in an image.
4. State with necessary mathematical steps, how Hough transform is employed for
detecting lines and curves in detecting an image.
ELECTRONICS & COMMUNICATION ENGINEERING
Course Outcome 5 (CO5): Analyse 3D images and motion of objects in a given scene using
appropriate computer vision algorithms for real time practical applications.
1. Find Eigen values and Eigen Vectors of the following matrix
[ ]
8 −8 − 2
A= 4 −3 − 2
3 −4 1
SYLLABUS
Module 1
Review of image processing techniques: Filtering, Point operators-Histogram Based
operators, neighbourhood operators, Thresholding - linear filtering – development of filtering
masks - 2D Fourier transforms – filtering in frequency domain, Homomorphic filtering
Module 2
Mathematical Operators: Binary shape analysis: Basics of Morphological operations,
structuring element, Erosion, Dilation, Opening and Closing, Hit-or-Miss Transform,
Connectedness, object labelling and counting , Boundary descriptors – Chain codes.
Module 3
Camera models: Monocular and binocular imaging system, Orthographic and Perspective
Projection, Image formation, geometric transformations, Camera Models (Basic idea only),
3D-Imaging system-Stereo Vision.
Module 4
Feature Detection: Edge detection – edges, lines, active contours, Split and merge, Mean
shift and mode finding, Normalized cuts, Graph cuts, energy-based and Canny’s methods.
Corner detection, Harris corner detection algorithm, Line and curve detection, Hough
transform
SIFT operators, Shape from X, Shape Matching, Structure from motion.
Module 5
Motion Analysis- Regularization theory, Optical Flow: brightness constancy equation,
aperture problem, Horn-Shunck method, Lucas-Kanade method. (Analysis not required)
Object Detection and Object classification: SVM, Linear discriminant analysis, Bayes rule,
ELECTRONICS & COMMUNICATION ENGINEERING
ML.
Face detection, Face Recognition, Eigen faces, 3D face models
Applications of Computer Vision: Context and scene understanding, Real Time applications:
Locating road way and road marking, locating road signs and pedestrians.
Text Books
1. E. R .Davies, Computer and Machine Vision -Theory Algorithm and Practicalities,
Academic Press, 2012
2. Richard Szeliski, Computer Vision: Algorithms and Applications, ISBN 978-1-
84882-935-0, Springer 2011.
3. David Forsyth and Jean Ponce, Computer Vision: A Modern Approach, Pearson India,
2002.
Reference Books
1. Goodfellow, Bengio, and Courville, Deep Learning, MIT Press, 2006.
2. Daniel Lelis Baggio, Khvedchenia Ievgen, Shervin Emam, David Millan Escriva,
Naureen Mahmoo, Jason Saragi, Roy Shilkrot, Mastering Open CV with Practical
Computer Vision Projects, Packt Publishing Limited, 2012
3. Simon J D Prince, Computer Vision: Models, Learning, and Inference, Cambridge
University Press, 2012.
4. R. J. Schalkoff, Digital Image Processing and Computer Vision, John Wiley, 2004.
2 An image is convolved with the matrix given below. Express analytically the K2
relation between original and modified image.
3 List any three computer vision applications of object labeling and counting. K2
PART – B
Answer one question from each module; each question carries 14 marks.
Module - I
CO1
K1
11 b. Apply 2D-DFT on the given image pixel values (8)
ELECTRONICS & COMMUNICATION ENGINEERING
CO1
K3
OR
12 a (8)
Describe how histogram transformations are applied on a grey scale image and CO1
explain what output is observed in each case. K3
Module - II
13a An image A, and a structuring element B are given. Apply B on A, to find (8)
resultant images after the dilation and erosion process. Origin is given as ‘O’; and
note that it is not part of the structuring element.
CO2
K3
1 1 1
1 1
A=
1 1 1
1 1
1 O 1
B =
13 b. Using Hoshen–Kopelman algorithm, assign connected component labelling for the (6)
given image in the diagram below.
CO2
K3
ELECTRONICS
OR & COMMUNICATION ENGINEERING
14a Apply Hit-or-Miss transform on the given binary image to detect right angle (8)
convex corners from left-top to right-bottom.
CO2
K3
14b. (6)
x x x CO2
x x K3
x x
x x
x x
For the given image grid, find out the 8-chain Freeman Code. Also write down the
chain number of the code.
CO3
K2
OR
17 b Unveil different steps involved in Harris corner detection algorithm and explain (8)
how it is employed to detect corners in an image
CO4
OR
K3
18 a. Apply Sobel and Prewitt masks on the given image grids and compute Gx and Gy (6)
gradients of the images. CO4
K3
Module - V
CO5
K3
19 b Describe with algorithmic steps, the Horn-Shunk method used for the estimation (8)
of optical flow. CO5
K3
K3
20b. With the help of a flow chart, illustrate an in-vehicle vision system, for locating (7)
roadways and pedestrians, as a practical application of computer vision. CO5
K3
ELECTRONICS & COMMUNICATION ENGINEERING
SEMESTER VI
HONOURS
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble: The course aims to introduce principles behind advanced methods in automation
of electronic design.
Prerequisites: Nil
Course Outcomes: After the completion of the course the student will be able to
CO 1 Apply Search Algorithms and Shortest Path Algorithms to find various graph
solutions.
CO 2 Outline VLSI Design Flow and Design Styles and apply partitioning algorithms on
graphs representing netlist.
CO 3 Illustrate Design Layout Rules and apply different algorithms for layout
compaction.
CO 4 Make use of various algorithms to solve placement and floorplan problems.
CO 5 Utilise different algorithms to solve routing problems.
Assessment Pattern
Mark distribution
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14marks.
CO Assessment Questions
CO1: Apply Search Algorithms and Shortest Path Algorithms to find various graph
solutions
CO2: Outline VLSI Design Flow and Design Styles and apply partitioning algorithms
on graphs representing netlist.
1.Perform KL partitioning on the above graph.You may assume any initial partition of
your choice.
2. Draw the flowchart of VLSI Design Flow and explain the different stages
CO3: Illustrate Design Layout Rules and apply different algorithms for layout
compaction.
ELECTRONICS & COMMUNICATION ENGINEERING
1. For the following graph, find the longest path to all other vertices from vertex v0,
using Bellman-Ford Algorithm.
2. Use the Longest Path Algorithm to find the longest path from vertex A, in the
following graph
CO4: Make use of various algorithms to solve placement and floorplan problems.
Draw the floorplan slicing tree and the polar graphs of the above floorplan.
O O O O
O S
2. Draw Horizontal and Vertical Constraint Graph for the following Channel
Routing
ELECTRONICS & COMMUNICATION ENGINEERING
3.
PART A
Answer All Questions
3. Write short note on (a) Full Custom Design (b) Standard Cell Design (3) (K1)
4. Explain any three parameters based on which Partitioning is performed. (3) (K1)
5. What are the minimum distance rules in Design Rules for layout? (3) (K1)
6. Write inequality expressions for minimum distance and maximum distance
constraints between two rectangular edges. (3) (K1)
7. For the following placement, calculate the wirelength by (a) Half Perimeter Method
(b) Maximum Rectilinear Tree Method (3) (K3)
ELECTRONICS & COMMUNICATION ENGINEERING
8. Represent the following floorplan using Sequence Pair approach. (3) (K3)
PART B
Answer one question from each module. Each question carries 14 marks.
11. (A) List a DFS ordering of vertices for the graph shown in question 2. (7) (K3)
Starting node is H.
(B) Perform topological sort on the graph and order the vertices. (7) (K3)
Starting node is H.
OR
12. (A) List a BFS ordering of vertices for the graph shown in question 2. (10)(K3)
Starting node is H.
(B) Give an application related to VLSI of BFS. (4) (K2)
13. Draw the flowchart of VLSI Design Flow and explain the different stages. (14) (K1)
OR
14. Perform KL partitioning on the following graph.You may assume any initial (14)(K3)
partition of your choice.
15. (A) For the following graph, find the longest path to all other vertices from (10) (K3)
vertex v0, using Bellman-Ford Algorithm.
(B) What is the time complexity of Liao-Wong and Bellman-Ford Algorithms?(4) (K2)
OR
ELECTRONICS & COMMUNICATION ENGINEERING
16. (A) Use the Longest Path Algorithm to find the longest path from vertex A, (8) (K3)
in the following graph.
(A) Draw the floorplan slicing tree of the above floorplan. (6) (K3)
(B) Draw the polar graphs of above floorplan. (8) (K3)
OR
18. Given: Placement P with two fixed points p1 (100,175) and p2 (200,225), (14) (K3)
three free blocks a-c and four nets N1-N4. N1 (P1,a) N2 (a,b) N3 (b,c) N4 (c,P2). Find
the coordinates of blocks (xa, ya), (xb, yb) and (xc, yc).
19. Perform LEE’s Algorithm to find shortest path from S to T. Cells marked (14) (K3)
O indicate obstructions.
T
O O O O
O
O S
ELECTRONICS & COMMUNICATION ENGINEERING
OR
20. Draw Horizontal and Vertical Constraint Graph for the following Channel (14) (K3)
Routing.
Simulation Assignments
1. Develop C code for all algorithms in Module 1, 2 and 3.
2. A digital circuit can be taken through all steps od VLSI Design Flow (ie. From HDL
to Layout) using any standard tool set from Cadence, Synopsis or Mentor Graphics or
similar tools
Syllabus
Module 1: Graph Terminology, Search Algorithms and Shortest Path Algorithms:
Graph Terminology: Basic graph theory terminology, Data structures for representation of
Graphs Search Algorithms: Breadth First Search, Depth First Search, Topological Sort
Shortest Path Algorithms: Dijkstra’s Shortest-Path Algorithm for single pair shortest path,
Floyd Warshall Algorithm for all pair shortest path
Text Books
1. Jin Hu, Jens Lienig, Igor L. Markov, Andrew B. Kahng, VLSI Physical Design: From
Graph Partitioning to Timing Closure, Springer, 2011th edition.
2. Gerez,Sabih H., “Algorithms for VLSI Design Automation”, John Wiley & Sons,
2006.
3. Sherwani, Naveed A., “Algorithms for VLSI Physical Design Automation”, Kluwer
Academic Publishers, 1999.
Reference Books
1. Sadiq M. Sait and H. Youssef, “VLSI Physical Design Automation: Theory and
Practice”, World Scientific, 1999.
2. Cormen, Thomas H., Charles E. Leiserson, and Ronald L. Rivest. "Introduction to
Algorithms." The MIT Press, 3rd edition, 2009.
3 Layout Compaction:
ELECTRONICS & COMMUNICATION ENGINEERING
Preamble: MIMO systems are rising attention of the academic community and industry because of
their potential to increase to capacity and diversity gain proportionally with the number of antennas.
OFDM is a promising solution to mitigate the effect of inter symbol interference (ISI) and multipath
fading. MIMO OFDM is an attractive air interface solution for multiuser communication and
effectively deployed in wireless local area networks, fifth Generation (5G) wireless cellular
standards.
Prerequisite: MAT 204 Probability and Random Process, ECT 305 Analog and Digital
Communication.
Course Outcomes: At the end of the course, the students will be able to
CO 1 Describe digital communication over multipath channels
CO 2 Analyse the performance of multiuser communication techniques over generalized
fading channel.
CO 3 Describe the concept of MIMO systems and determine the capacity of MIMO
channel
CO 4 Introduce OFDM and associated timing and frequency synchronization in MIMO
receiver
CO 5 To explain the theory of MIMO multiuser communication systems.
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember
Understand K2 30 30 60
Apply K3 20 20 40
Analyse
Evaluate
Create
ELECTRONICS & COMMUNICATION ENGINEERING
Mark distribution
Total CIE ESE ESE Duration
Marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain 10
questions with 2 questions from each module, having 3 marks for each question. Students should
answer all questions. Part B contains 2 questions from each module of which student should answer
any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
PARTA
PARTB
Answer anyone question from each module. Each question carries 14marks.
MODULE I
11. (a) Draw and explain the Tapped delay line channel model used in frequency selective slowly
fading channel . (10 marks)
(b) Distinguish between fast and slow fading. (4 marks)
12. A multipath fading channel has a multipath spread of 1s and a Doppler spread of 0.01 Hz.
The total channel bandwidth at band pass available for signal transmission is 10 Hz. To
mitigate the effect of ISI select the pulse duration 10s.
(a) Calculate the coherence bandwidth and coherence time. (5 marks)
(b) Is the channel is frequency selective or not? Justify your answer. (5 marks)
(c) Is the channel fading slowly or rapidly? Justify your answer. (4 marks)
MODULE II
MODULE II
15. (a) Determine the channel capacity of MIMO system when CSI is known to the transmitter
side and when CSI is not available at transmitter side. (10 marks)
(b) Distinguish between outage probability and outage capacity. (4 marks)
16. (a) State the significance of Ergodic capacity. (5 marks)
(b) Determine the capacity of deterministic MIMO channel assuming AWGN capacity.
(9 marks)
MODULE IV
MODULE V
19. (a) Consider a transmitter sends digital information by use of 𝑀signal waveforms
{𝑠 (𝑡), 𝑚 = 1,2,...., 𝑀} over an AWGN channel. The channel is assumed to be corrupt the
signal by the addition of white Gaussian noise. Write down the expression for received signal
in the interval 0 ≤ 𝑡 ≤ 𝑇and draw the model for received signal passed through the channel.
(4 marks)
(b) Describe the FFT based implementation of OFDM system. (10 marks)
20. (a) State and prove Nyquist condition for zero ISI. (4 marks)
(b) Describe the synchronization technique using cyclic prefix in OFDM systems.
(10 marks)
SYLLABUS
Module 5 – OFDM
Review of AWGN channel and band limited ISI channel, Introduction to multicarrier systems, FFT
based multicarrier system, Mitigation of subcarrier fading, SISO-OFDM, MIMO-OFDM, Coarse
time synchronization, Fine time synchronization, Coarse frequency synchronization, OFDMA,
Wireless standards (WiMAX, and 3GPP LTE)
Note: Mathematical model and analysis to be covered for the entire topic.
Text Books
Reference Books
5. “Space Time Block Coding for Wireless Communications”, Erik G Larsson, Cambrdige
University Press, 2003.
No Topic No. of
Lectures
1 Digital Communication over Fading Multipath Channels
1.1 Multipath fading, Coherence time, Coherence bandwidth, Doppler 1
spread
1.2 Characterization of fading multipath channels, Statistical model for 4
fading channels (Rayleigh and Rice distribution), Relation between
channel correlation and Power spectral density
1.3 Signal characteristics on the choice of channel model (frequency 3
selective and frequency nonselective fading), Frequency nonselective
slowly fading channel, Frequency selective slowly fading channel
1.4 Fast fading, Rake receiver 2
2 Multiuser Communications
2.1 Types of multiple access techniques (FDMA,TDMA and CDMA), 2
Capacity of multiple access methods (without proof, Inference only).
2.2 Single user detection, Multiuser detection 1
2.3 CDMA signal and channel model, CDMA optimum receiver 2
(Synchronous transmission, Asynchronous transmission),
2.4 Suboptimum detectors (Single user detector and Decorrelation 1
receiver).
2.5 Practical applications of multiple access techniques. 1
3 MIMO System
3.1 Signal and channel model for SISO, SIMO, MISO and MIMO 2
3.2 Capacity of frequency flat deterministic MIMO channel (both channel 4
unknown and known to the transmitter),
SIMO channel capacity, MISO channel capacity
3.3 Capacity of random MIMO channels 1
3.4 Ergodic capacity, Outage capacity, Capacity of frequency selective 2
MIMO channels (both channel unknown and known to the transmitter)
SIMULATION ASSIGNMENTS
The following simulation assignments can be done with Python/ MATLAB/ SCILAB
/LabVIEW
1 Frequency Non-selective Slowly Fading Channel
Generate binary PSK and binary FSK signals for transmission over a frequency
non-selective slowly fading channel.
Obtain the received equivalent lowpass signal of the transmitted signal using
equation 13.3-1. Also plot the BER-SNR curve for coherent binary PSK and FSK
detector using equations 13.3-2 and 13.3-3 respectively in page 846 in Digital
Communications by John G Proakis, 4/e, for fixed attenuation value, α fixed and
follows Rayleigh distribution case.
Plot the BER-SNR curve for coherent binary PSK and FSK detector using
equations 13.3-13 in page 848 in Digital Communications by John G Proakis, 4/e
for α followingRayleigh distribution.
Compare the BER-SNR curve for AWGN and Rayleigh fading channel.
Create 2 random binary sequence of 100 bit each as data blocks of 2 users.
Generate the composite transmitted signal, s(t) for 3 users using equations 16.3-7 in
page 1037 in Digital Communications by John G Proakis, 4/e.
Add AWGN of different variances to generate the received signal, r(t).
Realize the optimum multiuser receiver for synchronous transmission shown in Fig.
16.3-1 in page 1040 in Digital Communications by John G Proakis, 4/e
Observe the decoded bits for AWGN of different variances.
Compute the capacity of SISO, SIMO, MISO and MIMO channels for different
values of SNR using equations in page 138 in Introduction to Space Time Wireless
Communications by A Paulraj, Nabar and D Gore.
ELECTRONICS & COMMUNICATION ENGINEERING
Realize the signal model for SISO frequency selective fading channel given in
equation 7.5 in page 138 in Introduction to Space Time Wireless Communications by
A Paulraj, Nabar and D Gore.
Realize the block diagram of OFDM communication system shown in Fig 11.2-4
in page 750 in Digital Communications by John G Proakis, 4/e.
Create a random bit vector of arbitrary length. Realize the OFDM transmitter by
mapping the message bits into a sequence of QAM symbols and convert it into N
parallel streams.
Add cyclic prefix, realize parallel to serial converter and DAC to generate the
transmitted signal.
Realize OFDM receiver by first removing cyclic prefix followed by serial to parallel
conversion, FFT computation, signal detection and parallel to serial conversion.
Preamble: This course aims to impart the fundamentals of detection and estimation theory in
engineering applications
Course Outcomes: After the completion of the course the student will be able to
CO1 K2 Understand the fundamentals of statistical detection and estimation principles used
in various engineering problems.
CO2 K3 Apply various types of statistical decision rules in engineering applications.
CO3 K3 Apply different types of estimation algorithms in engineering applications.
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination
Tests
1 2
Remember
Understand K2 30 30 60
Apply K3 20 20 40
Analyse
Evaluate
Create
Mark distribution
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
Course Level Assessment Questions
SYLLABUS
Text Books
1. S.M. Kay, “Fundamentals of Statistical Signal Processing” Vol I: Estimation Theory,
Pearson, 3/e, 2010.
2. S.M. Kay, “Fundamentals of Statistical Signal Processing” Vol II: Detection Theory,
Pearson, 3/e, 2010.
Reference Books
1. H. L. Van Trees, “Detection, Estimation, and Modulation Theory”, Vol. I, John Wiley &
Sons, 1968
2. Monson H. Hayes ,“Statistical Digital Signal Processing and Modelling" by, John Wiley &
Sons, 2002.
ELECTRONICS & COMMUNICATION ENGINEERING
No Topic No. of
Lectures
1 Introduction to Detection and Estimation Theory
1.1 Fundamentals of detection theory, review of probability and random variable 2
1.2 The mathematical detection problem 2
1.3 Fundamentals of estimation theory 1
1.4 The mathematical estimation problem 2
1.5 Review of Gaussian distribution. Application examples. 2
Max. Marks: 100 ECT 398- Detection and Estimation Theory Duration: 3 hrs
PART A
(Answer all questions. Each question carries 3 marks each).
1. Enumerate different applications which are using estimation and detection techniques. (3)
PART B
(Answer any one question from each module. Each question carries 14 marks each.)
Note:
(1) Notation x ∼ N (µ, σ 2 ) denotes x is normally distributed with mean µ and variance σ 2 .
(2)Also, bold small letters indicate vectors and bold capital letters indicate matrices.
11. Obtain the mathematical formulation of estimation method with an example. (14)
OR
12. Using radar system as an example, differentiate estimation and detection techniques. (14)
13. Design Neyman-Pearson detector for the unknown level A in White Gaussian Noise with (14)
variance σ 2 .
OR
15. Obtain Matched Filter detector for N -sample deterministic signal in noise, w[n] ∼ N (0, σn2 ) (14)
where w[n]’s are uncorrelated.
OR
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ELECTRONICS & COMMUNICATION ENGINEERING
x[n] = A + w[n]; n = 0, 1, . . . , N − 1
OR
18. Derive the Best Linear Unbiased Estimator for the multiple observations (14)
x[n] = A + w[n]; n = 0, 1, . . . , N − 1
where A is an unknown level to be estimated and w[n] is White Noise with unspecified PDF
and variance σ 2 .
19. Derive the Maximum Likelihood Estimator for the multiple observations (14)
x[n] = A + w[n]; n = 0, 1, . . . , N − 1
where A is an unknown level to be estimated and w[n] is White Gaussian Noise with known
variance σ 2 .
OR
20. Prove that the optimal estimator which minimizes the Bayesian Mean Square Error is the (14)
mean of the posterior PDF.
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