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Harolds Discrete Math Flip Flops Cheat Sheet 2020

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Harold’s Flip-Flops

Cheat Sheet
13 June 2020

S-R Flip-Flop (Edge-Triggered)


Style NAND-NAND AND-NOR

Circuit

Symbol

S R Qnext Action
0 0 Q No change, Hold
Truth Table 0 1 0 Reset (Q → 0)
1 0 1 Set (Q → 1)
1 1 X Invalid, Not allowed

Boolean
𝑄𝑛𝑒𝑥𝑡 = 𝑅̅ 𝑄𝑝𝑟𝑒𝑣 + 𝑅̅ 𝑆 = 𝑅̅ (𝑄𝑝𝑟𝑒𝑣 + 𝑆)
Equation
Name Origin SR for Set-Reset
A Flip-Flop is a Latch with 2 AND/NAND gates added for clock input to
Observations
trigger data flow from left to right
Applications • Storing a single bit of data, 1 or 0
TTL Chips 74x71, 74Lx74

Copyright © 2020 by Harold Toomey, WyzAnt Tutor 1


D Flip-Flop (Edge-Triggered)
Style NAND-NAND AND-NOR

Circuit

Symbol

Inputs Outputs
Action
D CLK Qnext Q’next
Truth Table
0 ↑ 0 1 Reset (Q → 0)
1 ↑ 1 0 Set (Q → 1)

Boolean
𝑄𝑛𝑒𝑥𝑡 = 𝐷
Equation
Name Origin D for Delays, since it delays the signal until the next active clock transition
• Made with S-R flip-flop with input S inverted for input R
Observations
• Stores a single bit after the edge-triggered clock pulse
• Storing Bits (memory) in a pipeline
Applications
• Event Detection
TTL Chips 74x74, 74x79, 74x171, 74x173

Copyright © 2020 by Harold Toomey, WyzAnt Tutor 2


J-K Flip-Flop (Edge-Triggered)
Style NAND-NAND AND-NOR

Circuit

Symbol

Inputs Outputs
J K CLK Qnext Q’next Action
0 0 ↓ Q Q’ Hold, No change
Truth Table
0 1 ↓ 0 1 Reset (Q → 0)
1 0 ↓ 1 0 Set (Q → 1)
1 1 ↓ Q’ Q Toggle, Change (1 → 0)

Boolean
𝑄𝑛𝑒𝑥𝑡 = 𝐽𝑄̅ 𝑝𝑟𝑒𝑣 + 𝐾
̅ 𝑄𝑝𝑟𝑒𝑣
Equation
Name Origin None, other than J and K are adjacent letters in the alphabet
• Same as S-R flip-flop except 2 feedback lines added
Observations
• Fixes the invalid 1-1 state
𝑓
• Frequency Division: If J = K = HIGH, then clock frequency divider ( ⁄2)
Applications • Counting: If cascaded with QA wired to JKB CLK, then QA = LSB and QB=MSB
• Sequence Detection: If cascaded with QA→JB and Q’A→KB, then tap Q/Q’s
for 1/0 pattern, then AND for output
TTL Chips 74x68, 74x69, 74x70, 74x73, 74x76, 74x101, 74x102, 74X103, 74x107
Copyright © 2020 by Harold Toomey, WyzAnt Tutor 3
T Flip-Flop (Edge-Triggered)
Style NAND-NAND AND-NOR

Circuit

Symbol

Inputs Outputs
Action
T CLK Qnext Q’next
Truth Table
0 ↑ Q Q’ No change, Hold
1 ↑ Q’ Q Change, Toggle

Boolean
𝑄𝑛𝑒𝑥𝑡 = 𝑄̅𝑝𝑟𝑒𝑣
Equation
Name Origin T for Toggle, since it changes state on the triggering edge of the clock pulse
• Made with J-K flip-flop with input T connected to both J and K
Observations
• Implements the two middle rows of the J-K flip-flop truth table
Applications 𝑓
• Frequency Division: If J = K = HIGH, then clock frequency divider ( ⁄2)
TTL Chips 74x374 or use J-K flip-flop chips

Copyright © 2020 by Harold Toomey, WyzAnt Tutor 4


J-K Flip-Flop Applications
Frequency Division 𝑓
If J = K = HIGH, then clock frequency divider ( ⁄2)

Counting If cascaded with QA wired to JKB CLK, then QA = LSB and QB=MSB

Copyright © 2020 by Harold Toomey, WyzAnt Tutor 5


If cascaded with QA→JB and Q’A→KB, then tap Q/Q’s for 1/0 pattern,
Sequence Detection
then AND for output

Credit: Diagrams taken from “ECPI University EET 230 – Digital Systems II”, Wikipedia, and Google
images.

Copyright © 2020 by Harold Toomey, WyzAnt Tutor 6

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