Swastik Gupta - 23.
Swastik Gupta - 23.
Swastik Gupta - 23.
Date
Page: 4
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A -out
1
B- Check
Reset
Virtuial Labs viabsitp.acimyviabs-devyabsy dig
N o t Secure 1 Vlabs.intb.ac.an/vlabs-dev/kabs/dIgital electronics/expefimernts/verihcation- and interpretation-truthtabie gates il/round-letmplate/experime|
INSTRUCTIONS
Resistar 3
Switch2
Resster
Connected!!
p i irantar Q Kesister 4
Switch 3
Virtuial Labs Ca vlabs.itb.ac.in/vlabs-dev/tabs/dig x
1 A -out
1
B Check
Cotec
Reset
Virtuial Labs vlabs.itb.acin/viab5 -dev/iabs/diy x X
INSTRUCTIONS
Switch I
Diode 1
Kesbter
Swirch2
Connected!!
vlabsitb.ac.in/viabs -dev/labsydig X F
Vwtal Labs
A Not secure | vlabs.itb.acin/vlabs-dev/labs/digital-electrornics/experiments/verification and interpretation-truth table gates it/round-template/experime
A out ChaCkK
TRUTH TABLE t
Correct
Reset
Virtal Labs viabs itb.acin/viabs- dev/labs/die X
INSTRUCTIONS
Resbtur Bathery
Switch
Resistor
Connected!!
pa transbtor
Virtual Labs iabsitb.ac.inviabs-dev/labs/dig X
A N o t secure | vlabs.intb.acin/viabs dev/tabs/digital -electronics/experments/verification-and-interpretation- truth-table-gates lir/round-termplate/experime.
1
AT
-out
B Check
Resel
viabsitbacin/viabs-dev/labs/dig XX
Virtual Latbs
L A Not secure vlabs.itb.ac.in/vlabs-dev/tatbs/digrtal electronics/experiments/verificatbion- and-interpretation-truth- table gates-ilz/round- template/experime..I
INSTRUCTIONS
Resstnr
Switch 2
Resbtar
Du onnected!!
p tasntar 9
Smitch 3
Resistor 2
mpa transhdar
viabsitb.acin/vlabs- dev/labs/dig X
Vitual Labs
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1 A
1
B -Q Gneck
Corect
0 0 Correct
Lorrect
Cofrect
Reset
irtual Lat Mlabs.itb.acinvlabs dev/Aabs/dig X +
A Not secure| vlabs.itb.acin/vlabsdev/labs/digital electronics/experiments/verification and-interpretation truth table gates it/round template/experime...|
INSTRUCTIONS
Resistor 3
Smitch
Kettor
Mt Balb Connected!!
pa traster
Switch 3
p n transalor
Virtual Labs viabsitD.acinyviabs-dev/labsydigX abs.intb.acinviabs-devlatrogia
L A Not secure vlabs.iitb.ac.invlabs-dev/tabs/digtal electronics/experiments/verificatior-and-interpretation-truth-table gatesitr/round-tefmplate/experime
A out
B Check
Corect
Reset
viabsitbacin/viabs-dev/labs/dig XX
Virtual Labs
Not secure vlabs.intb.ac.in/vlatbs-dev/tabs/digital -electronics/experiments/verificatior-and-interpretation-truth-table gates-itr/round-letmplate/experime.
Power
XNOR gate using Resistor-
Transistor Logio (RTL)
Keshtor Resstor 5
Resistor 1
5V =
or Q3
Resintor
Reshar Resistor 1
p aasstor Q
5V
Switch 2
Bulb
npn tramsistor Q2
pa trsair
pa ta
Resintor
R1,2,5,6,7,8,11,12- 10 kilo-oln
Kesntor 1
t3,4,9,10,13 -
5
kilo -obm
Virtual Labs viabsitbacin/viabs-dev/labs/dig X X
A Not secure Viabs.ntb.ac.an/vilabs-dev/latDS/dHgrlal electronics/experimens/verilicaton- and "inter pretation-truth tabe gates 1/found"tlemplate/experime.
INSTRUCTIONS
A -out
1
B
TRUTH TABLE PTInt
comecr
Reset
Virtuial Labs viab.tt.ac.inyviatn- devlabsy digital viabs.itb.acinyviabs-dev/iabsydr X
INSTRUCTIONS
Fower
Resistor 3 xOR gate
Reshtor 11 using Resistor
Transistor Logic (R
Reststor 2 p a tranitor Q
Switch 1
a o r Q2
Resator7
5 V
wansster Q
Restor
Swich2
5V Reskstor4
Resistor 9 a
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pa traasstor Q4
R1,2,4,5,7,8 - 10 kilo-om
R 3 , 6 , 9 - 5 kilo-obm