MCP1824
MCP1824
MCP1824
Features Description
• 300 mA Output Current Capability The MCP1824/MCP1824S is a 300 mA Low Dropout
• Input Operating Voltage Range: 2.1V to 6.0V (LDO) linear regulator that provides high current and
• Adjustable Output Voltage Range: 0.8V to 5.0V low output voltages. The MCP1824 comes in a fixed or
(MCP1824 only) adjustable output voltage version, with an output
voltage range of 0.8V to 5.0V. The 300 mA output
• Standard Fixed Output Voltages:
current capability, combined with the low output voltage
- 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V capability, make the MCP1824 a good choice for new
• Other Fixed Output Voltage Options Available sub-1.8V output voltage LDO applications that have
Upon Request high current demands. The MCP1824S is a 3-pin fixed
• Low Dropout Voltage: 200 mV Typical at 300 mA voltage version.
• Typical Output Voltage Tolerance: 0.4% The MCP1824/MCP1824S is stable using ceramic
• Stable with 1.0 µF Ceramic Output Capacitor output capacitors that inherently provide lower output
• Fast Response to Load Transients noise and reduce the size and cost of the entire
regulator solution. Only 1 µF of output capacitance is
• Low Supply Current: 120 µA (typical)
needed to stabilize the LDO.
• Low Shutdown Supply Current: 0.1 µA (typical)
(MCP1824 only) Using CMOS construction, the quiescent current
consumed by the MCP1824/MCP1824S is typically
• Fixed Delay on Power Good Output
less than 120 µA over the entire input voltage range,
(MCP1824 only)
making it attractive for portable computing applications
• Short Circuit Current Limiting and that demand high output current. The MCP1824
Overtemperature Protection versions have a Shutdown (SHDN) pin. When shut
• 5-Lead Plastic SOT-223, SOT-23 Package down, the quiescent current is reduced to less than
Options (MCP1824) 0.1 µA.
• 3-Lead Plastic SOT-223 Package Option On the MCP1824 fixed output versions, the scaled-
(MCP1824S) down output voltage is internally monitored and a
power good (PWRGD) output is provided when the
Applications output is within 92% of regulation (typical). The
PWRGD delay is internally fixed at 110 µs (typical).
• High-Speed Driver Chipset Power
• Networking Backplane Cards The overtemperature and short circuit current-limiting
provide additional protection for the LDO during system
• Notebook Computers
fault conditions.
• Network Interface Cards
• Palmtop Computers
• 2.5V to 1.XV Regulators
MCP1824 MCP1824S
Fixed/Adjustable
1 2 3
1 2 3 4 5 1 2 3
PWRGD
R1
On 100 kΩ
Off SHDN
1 VOUT = 1.8V @ 300 mA
VIN = 2.3V to 2.8V VIN VOUT
GND
C1
C2
4.7 µF 1 µF
VADJ
R2
R1 20 kΩ
On 40 kΩ
Off SHDN
1 VOUT = 1.2V @ 300 mA
VIN = 2.1V to 2.8V VIN VOUT
C1
C2
4.7 µF 1 µF
GND
PMOS
VIN VOUT
Undervoltage
Lock Out
(UVLO)
ISNS Cf Rf
SHDN ADJ/SENSE
+
Driver w/limit
and SHDN EA
Overtemperature
Sensing –
SHDN
VREF
V IN
SHDN Reference
Soft-Start
Comp TDELAY
GND
92% of VREF
PMOS
VIN VOUT
Undervoltage Sense
Lock Out
(UVLO)
ISNS Cf Rf
SHDN
+
Driver w/limit
and SHDN EA
Overtemperature
Sensing –
SHDN
VREF
V IN
SHDN Reference
Soft-Start
Comp TDELAY
GND
92% of VREF
PMOS
VIN VOUT
Undervoltage Sense
Lock Out
(UVLO)
ISNS Cf Rf
SHDN
+
Driver w/limit
and SHDN EA
Overtemperature
Sensing –
SHDN
VREF
V IN
SHDN Reference
Soft-Start
PWRGD
Comp TDELAY
GND
92% of VREF
AC/DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, VIN = VOUT(MAX) + VDROPOUT(MAX), Note 1, VR = 1.8V for Adjustable Output,
IOUT = 1 mA, CIN = COUT = 4.7 µF (X7R Ceramic), TA = +25°C.
Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C
AC Performance
Output Delay From SHDN TOR — 100 — µs SHDN = GND to VIN,
VOUT = GND to 95% VR
Output Noise eN — 2.0 — µV/√Hz IOUT = 200 mA, f = 1 kHz,
COUT = 10 µF (X7R Ceramic),
VOUT = 2.5V
Power Supply Ripple Rejection PSRR — 55 — dB f = 100 Hz,
Ratio IOUT = 10 mA,
VINAC = 200 mV pk-pk,
CIN = 0 µF
Thermal Shutdown Temperature TSD — 150 — °C IOUT = 100 µA, VOUT = 1.8V,
VIN = 2.8V
Thermal Shutdown Hysteresis ΔTSD — 10 — °C IOUT = 100 µA, VOUT = 1.8V,
VIN = 2.8V
Note 1: The minimum VIN must meet two conditions: VIN ≥ 2.1V and VIN ≥ VOUT(MAX) + VDROPOUT(MAX).
2: VR is the nominal regulator output voltage for the fixed cases. VR = 1.2V, 1.8V, etc. VR is the desired set point output
voltage for the adjustable cases. VR = VADJ * ((R1/R2)+1). Figure 4-1.
3: TCVOUT = (VOUT-HIGH – VOUT-LOW) *106 / (VR * ΔTemperature). VOUT-HIGH is the highest voltage measured over the
temperature range. VOUT-LOW is the lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is
tested over a load range from 1 mA to the maximum specified output current.
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its
nominal value that was measured with an input voltage of VIN = VOUT(MAX) + VDROPOUT(MAX).
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained
junction temperatures above 150°C can impact device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the
ambient temperature is not significant.
140 0.10
VOUT = 1.2V Adj IOUT = 1 mA VOUT = 1.2V adj
0.08
Quiescent Current ( A)
FIGURE 2-1: Quiescent Current vs. Input FIGURE 2-4: Line Regulation vs.
Voltage (Adjustable Version). Temperature (Adjustable Version).
180 0.10
VOUT = 1.2V Adj VOUT = 3.3V IOUT = 1.0 mA to 300 mA
170
0.05
Ground Current ( A)
VOUT = 0.8V
μ 160
VIN=5.0V
0.00
150
VIN=3.3V VOUT = 1.8V
140 -0.05
130
-0.10
120 VOUT = 5.0V
-0.15
110 VIN=2.5V
100 -0.20
0 50 100 150 200 250 300 -45 -20 5 30 55 80 105 130
Load Current (mA) Temperature (°C)
FIGURE 2-2: Ground Current vs. Load FIGURE 2-5: Load Regulation vs.
Current (Adjustable Version). Temperature (Adjustable Version).
170 0.413
VOUT = 0.8V Adj VOUT = 1.2V
Quiescent Current ( A)
160 IOUT = 0 mA
Adjust Pin Voltage (V)
FIGURE 2-3: Quiescent Current vs. FIGURE 2-6: Adjust Pin Voltage vs.
Junction Temperature (Adjustable Version). Temperature (Adjustable Version).
0.30 160
VOUT = 0.8V
Quiescent Current ( A)
0.25 150 IOUT = 0 mA
μ
Dropout Voltage (V)
140
0.20 VOUT = 5.0V Adj +130°C
130 +90°C
0.15
+25°C
120
0.10 0°C
VOUT = 2.5V Adj 110
-45°C
0.05 100
0.00 90
0 50 100 150 200 250 300 2 3 4 5 6
Load Current (mA) Input Voltage (V)
FIGURE 2-7: Dropout Voltage vs. Load FIGURE 2-10: Quiescent Current vs. Input
Current (Adjustable Version). Voltage.
0.24 150
IOUT = 300 mA VOUT = 2.5V
0.23
Quiescent Current ( A)
IOUT = 0 mA
μ 140
Dropout Voltage (V)
0.22
0.21 VOUT = 5.0V Adj
130 +130°C
0.20
+90°C
0.19 120
0.18 VOUT = 3.3V Adj
+25°C
0.17 110 +0°C
VOUT = 2.5V Adj
0.16 -45°C
100
0.15
0.14 90
-45 -20 5 30 55 80 105 130 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Temperature (°C) Input Voltage (V)
FIGURE 2-8: Dropout Voltage vs. FIGURE 2-11: Quiescent Current vs. Input
Temperature (Adjustable Version). Voltage.
110 250
Power Good Time Delay (µS)
200
VIN = 5.0V μ
90
150 VOUT=3.0V
80
100 VOUT=0.8V
70 VIN = 2.1V VIN = 3.3V
60 50
50 0
-45 -20 5 30 55 80 105 130 0 50 100 150 200 250 300
Temperature (°C) Load Current (mA)
FIGURE 2-9: Power Good (PWRGD) FIGURE 2-12: Ground Current vs. Load
Time Delay vs. Temperature. Current.
130 0.042
IOUT = 0 mA VR = 2.5V
125 0.038
Quiescent Current ( A)
FIGURE 2-13: Quiescent Current vs. FIGURE 2-16: Line Regulation vs.
Temperature. Temperature.
0.20
0.20
0.18 VR = 0.8V VOUT = 0.8V
0.15
0.16 IOUT = 1 mA to 300 mA
0.05
μ 0.12
0.10 0.00 VIN = 2.1V
VIN = 2.3V
VIN = 6.0V -0.05
0.08 VIN = 3.3V
0.06 -0.10 VIN = 5.0V
VIN = 6.0V
0.04 -0.15
0.02 -0.20
0.00 -0.25
-45 -20 5 30 55 80 105 130 -45 -20 5 30 55 80 105 130
Temperature (°C) Temperature (°C)
FIGURE 2-14: ISHDN vs. Temperature. FIGURE 2-17: Load Regulation vs.
Temperature.
0.10 0.10
0.09 VOUT = 0.8V IOUT = 1 mA to 300 mA
0.05 VOUT = 0.8V
Line Regulation (%/V)
0.00
0.07 IOUT = 50 mA
0.06 -0.05 VOUT = 2.5V
IOUT = 100 mA
0.05 -0.10
0.04 -0.15
0.03 IOUT = 200 mA VOUT = 5.0V
-0.20
0.02
IOUT = 300 mA
0.01 -0.25
0.00 -0.30
-45 -20 5 30 55 80 105 130 -45 -20 5 30 55 80 105 130
Temperature (°C) Temperature (°C)
FIGURE 2-15: Line Regulation vs. FIGURE 2-18: Load Regulation vs.
Temperature. Temperature.
0.20
10.000
0.18 VR=3.0V, VIN=3.8V COUT=10 μF cer
CIN=4.7 μF cer
Dropout Voltage (V)
0.16
Noise (mV/√Hz)
0.14
VOUT = 5.0V 1.000
0.12 IOUT=200 mA
VOUT = 2.5V
0.10 VR=0.8V, VIN=2.1V
0.08
0.06 0.100
0.04
0.02
0.00 0.010
0 50 100 150 200 250 300 0.01 0.1 1 10 100 1000
Load Current (mA) Frequency (kHz)
FIGURE 2-19: Dropout Voltage vs. Load FIGURE 2-22: Output Noise Voltage
Current. Density vs. Frequency.
0.24 0.0
IOUT = 300 mA
0.22 -10.0
Dropout Voltage (V)
-20.0
0.20 VOUT = 5.0V PSRR (dB)
-30.0
0.18
-40.0 VR=1.2V Adj
0.16 -50.0 VIN=2.5V
VINAC = 200 mV p-p
VOUT = 2.5V -60.0 CIN=0 μF
0.14
IOUT=10 mA
-70.0
0.12
-80.0
-45 -20 5 30 55 80 105 130
0.01 0.1 1 10 100 1000
Temperature (°C) Frequency (kHz)
FIGURE 2-20: Dropout Voltage vs. FIGURE 2-23: Power Supply Ripple
Temperature. Rejection (PSRR) vs. Frequency (Adj.).
0.0
600.00
Short Circuit Current (mA)
400.00
-40.0
300.00 VR=3.0V (Fixed)
-50.0
VIN=3.5V
200.00 -60.0 VINAC=200 mV p-p
-70.0 CIN=0 μF
100.00
IOUT=10 mA
-80.0
0.00 -90.0
0 1 2 3 4 5 6 0.01 0.1 1 10 100 1000
Input Voltage (V) Frequency (kHz)
FIGURE 2-21: Short Circuit Current vs. FIGURE 2-24: Power Supply Ripple
Input Voltage. Rejection (PSRR) vs. Frequency.
FIGURE 2-25: Startup from VIN FIGURE 2-28: Power Good (PWRGD)
(Adjustable Version). Timing.
FIGURE 2-26: Startup from Shutdown FIGURE 2-29: Dynamic Line Response.
(Adjustable Version).
FIGURE 2-27: Power Good (PWRGD) FIGURE 2-30: Dynamic Line Response.
Timing.
900
800
FIGURE 2-31: Dynamic Load Response. FIGURE 2-33: Power Good Pulldown
Voltage Vs Load.
3.1 Shutdown Control Input (SHDN) 3.4 Regulated Output Voltage (VOUT)
The SHDN input is used to turn the LDO output voltage The VOUT pin is the regulated output voltage of the
on and off. When the SHDN input is at a logic-high LDO. A minimum output capacitance of 1.0 µF is
level, the LDO output voltage is enabled. When the required for LDO stability. The MCP1824/MCP1824S is
SHDN input is pulled to a logic-low level, the LDO stable with ceramic, tantalum, and aluminum-
output voltage is disabled. When the SHDN input is electrolytic capacitors. See Section 4.3 “Output
pulled low, the PWRGD output also goes low and the Capacitor” for output capacitor selection guidance.
LDO enters a low quiescent current shutdown state
where the typical quiescent current is 0.1 µA. 3.5 Power Good Output (PWRGD)
3.2 Input Voltage Supply (VIN) For fixed applications, the PWRGD output is an open-
drain output used to indicate when the LDO output
Connect the unregulated or regulated input voltage voltage is within 92% (typically) of its nominal
source to VIN. If the input voltage source is located regulation value. The PWRGD threshold has a typical
several inches away from the LDO, or the input source hysteresis value of 2%. The PWRGD output is delayed
is a battery, it is recommended that an input capacitor by 110 µs (typical) from the time the LDO output is
be used. A typical input capacitance value of 1 µF to within 92% + 3% (maximum hysteresis) of the
10 µF should be sufficient for most applications. The regulated output value on power-up. This delay time is
type of capacitor used can be ceramic, tantalum, or internally fixed.
aluminum electrolytic. The low ESR characteristics of
the ceramic capacitor will yield better noise and PSRR 3.6 Output Voltage Adjust Input (ADJ)
performance at high frequency.
For adjustable applications, the output voltage is
3.3 Ground (GND) connected to the ADJ input through a resistor divider
that sets the output voltage regulation value. This
For the optimal Noise and Power Supply Rejection provides the users the capability to set the output
Ratio (PSRR) performance, the GND pin of the LDO voltage to any value they desire within the 0.8V to 5.0V
should be tied to an electrically quiet circuit ground. range of the device.
This will help the LDO power supply rejection ratio and
noise performance. The ground pin of the LDO only 3.7 Exposed Pad (EP)
conducts the ground current of the LDO, so a heavy
The SOT-223 package has an exposed metal pad on
trace is not required. For applications that have
the bottom of the package. The exposed metal pad
switching or noisy inputs, tie the GND pin to the return
gives the device better thermal characteristics by
of the output capacitor. Ground planes help lower
providing a good thermal path to either the PCB or
inductance and voltage spikes caused by fast transient
heatsink to remove heat from the device. The exposed
load currents and are recommended for applications
pad of the package is at ground potential.
that are subjected to fast load transients.
MCP1824-ADJ
VOUT
On R1
Off 1 2 3 4 5 C2
SHDN ADJ 1 µF
VIN
C1 R2
4.7 µF GND
TJ = TJRISE + TA(MAX)
TJ = 19.1°C + 60.0°C
TJ = 79.1°C
Marking
Part Number
Code
XXXXXXX MCP1824ST-0802E/DB 1824S08 1824S08
XXXYYWW MCP1824ST-1202E/DB 1824S12 EDB0710
NNN MCP1824ST-1802E/DB 1824S18 256
MCP1824ST-2502E/DB 1824S25
MCP1824ST-3002E/DB 1824S30
MCP1824ST-3302E/DB 1824S33
MCP1824ST-5002E/DB 1824S50
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Marking
Part Number
Code
XXXXXXX MCP1824T-0802E/DC 1824082 1824082
XXXYYWW MCP1824T-1202E/DC 1824122 EDC0710
NNN MCP1824T-1802E/DC 1824182 256
MCP1824T-2502E/DC 1824252
MCP1824T-3002E/DC 1824302
MCP1824T-3302E/DC 1824332
MCP1824T-5002E/DC 1824502
MCP1824T-ADJE/DC 1824ADJ
Marking
Part Number
Code
MCP1824T-0802E/OT ULNN
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• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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10/05/07
Authorized Distributor
Microchip:
MCP1824ST-0802E/DB MCP1824ST-1802E/DB MCP1824ST-5002E/DB MCP1824ST-1202E/DB MCP1824ST-
3002E/DB MCP1824ST-3302E/DB MCP1824ST-ADJE/DB MCP1824ST-2502E/DB MCP1824T-0802E/DC
MCP1824T-0802E/OT MCP1824T-1202E/DC MCP1824T-1202E/OT MCP1824T-1802E/DC MCP1824T-1802E/OT
MCP1824T-2502E/DC MCP1824T-2502E/OT MCP1824T-3002E/DC MCP1824T-3002E/OT MCP1824T-3302E/DC
MCP1824T-3302E/OT MCP1824T-5002E/DC MCP1824T-5002E/OT MCP1824T-ADJE/DC MCP1824T-ADJE/OT