BRKSPG 2280

Cisco 8000 Series and
Silicon One ASIC Architecture

Cisco’s newest high-performance ASICs and
routers
Lane Wigley, Technical Marketing Engineer
w/ LJ Wobker, Principal Technical Marketing Engineer
BRKSPG-2280
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BRKSPG-2280 © 2020 Cisco and/or its affiliates. All rights reserved. Cisco Public 3
Agenda
• Introducing the Cisco 8000 Series

• Cisco Silicon One
• Technical Challenges and 8000 Series Solutions
• Moving Forward
Speaker Intros
• Lane & LJ
• 25th and 22nd year at Cisco (yikes!)
• Started as interns in the RTP TAC organization

• TAC, Critical Accounts, and Technical Marketing
• Presenting architecture sessions since Networkers
• Live in Raleigh, North Carolina USA (RTP)
• Passionate about chips and systems
Agenda
• Introducing the Cisco 8000 Series

• Cisco Silicon One
• Technical Challenges and 8000 Series Solutions
• Moving Forward
Why do we need new a ASIC architecture?
• Requirements change
• Increased focus on bandwidth and power
• Hyperscale Cloud
• Underlying component technologies change

• SerDes, SRAMs, DRAMs, Silicon processes, Optics
• ASIC architectures usually last around 10-15 years

• Focused deployment
• Feature parity – broader deployment
• Iterative evolution
• Maturity and investment protection
• End of Sale/Maintenance/Life
• Adoption curve for chips and systems
Project History
• 2020 plan started six years ago

• Analysis – reaching limits in 2019
• Hardware development started in 2014
• ASIC startup acquisition in 2016
• Initiated QSFP-DD MSA for 400 GbE modules in 2016
• Lots of hard work ...
• First Customer Ship in Sept 2019
• Launched in Dec 2019
Introducing the
Cisco 8000 Series
Target 8000 Series Roles
• Bandwidth requirements – 5-200+ Tbps

• Initially provider core and aggregation
• Select web-scale data center roles
• 100-400 Gigabit Ethernet
• IOS XR
Cisco 8200 and 8800 Routers
8201
8202 8808 8812 8818

One ASIC – Two Router Architectures
Fabric
Cisco
CPU Silicon
RPs
One
CPU
CPU
Optics
CPU
CPU
CPU PPPPP
CPU PPP P
CPU
CPU PPP
PPP
CPU
CPU P
PPPPP
PP
Optics
Optics
Optics
Optics
Optics
Optics
Optics
Optics
Line Cards
8200 Series 8800 Series
First clean-sheet design in 16 years
Entire platform, not just a new chip
1993 AGS+ 7000 7500 x y z

VIPs
1998 GSR 1 2 3 4 5 6
2003 CRS -3 -X
NPU
5500 2015
NCS 6K 2T BRCM DNX NPU & Fabric
FAB
BRCM DNX
FAB 5000 2016

2008 Nexus 7000
9000 TY TH LS BRCM XGS
NPU
Customized EZChip
8201 and 8202
100 GbE and 400 GbE Fixed Systems
8800 (Front)
36-port 400 GbE, 48-port 100 GbE w/ MACsec
8800 Series (Rear)
• 4 fans
• 8 fabric cards
• Power connections
8800 Chassis and Line Card Layouts
Cisco Silicon One
Cisco Silicon One
• Blends routing and switching capabilities

• Clean sheet design
• Extensive optimizations for bandwidth and performance
• First device is the 10.8 Tbps Q100
• Single chip for multiple roles
• Router on Chip
• Line card NPU
• Switch fabric
Routing vs. Switching ASICs
Service
Provider
Switching SoC
Cisco Silicon One Q100
Service
Provider
Switching SoC
Silicon Innovation
• The industry’s best silicon teams
• Routing capabilities at (better than) switching power and performance

• Eliminates off-chip memories
• On-chip High Bandwidth Memory for FIB and deep buffers
• Flexible run to completion engines supporting over 6 billion pps
• Advanced data structures and lookup algorithms
• Scalable, flexible multi-slice architecture
Router on Chip in 8200 Series
• All slices in network mode

• 8201 typical power under 4 Watts per 100 G (w/o optics)
Router on Chip Slices (8200 Series)
slice 0 slice 3
Network RX Network RX
Network TX Network TX
slice 1 slice 4
Network RX Network RX
Network TX SMS Network TX
slice 2 slice 5
Network RX Shared Memory Network RX

Switch
Network TX (Traffic Manager) Network TX
8800 Series LC and Fabric Slices (8800 Series)
Linecard Mode Linecard Mode
Network RX SMS Fabric RX

Fabric Mode Fabric RX
SMS Network RX
Network TX Fabric TX
Fabric TX Network TX
Fabric RX Fabric RX
Fabric TX Fabric TX
Network RX Fabric RX Fabric RX Network RX

Fabric RX Fabric RX
S
Network TX Fabric TX Fabric TX Fabric TX
M Fabric TX Network TX
S
Fabric RX Fabric RX
Fabric TX Fabric TX
Shared Shared
Network RX Memory Fabric RX Fabric RX Memory Network RX
Switch Switch
Network TX (TM) Fabric TX Fabric TX (TM) Network TX
High-bandwith ASIC Architectures
• Rigid Pipeline
• SP-class Pipeline
• Network-optimized Run to Completion
Rigid Pipeline SoC Architectures
• Standalone operation
• Tightly coupled stages
FIB // Buffer // ACL // Counters
• Duplicated resources per pair of

cores
• Highest network bandwidth
• Small on-chip FIB & TCAM
• Extremely small buffers
Pipelined SP Forwarding Architectures
VoQ-based
• Fabric or standalone operation

• Pipeline w/ tightly coupled stages
• Two cores sharing resources
• Higher bandwidth than legacy SP
Fabric
• Lower bandwidth than SoC
• Medium on-chip FIB & TCAM
• Optional external TCAM
TCAM Buffers
• Deep off-chip buffers
Cisco Silicon One Architecture
• Run to completion stages

• Simpler programmability
Resources
• Higher performance
• Lower power for simple features
• Multiple slices with common

resources
• Relatively large on-chip resources
• Single shared buffer pool
Rx Tx
Technical Challenges and
8000 Series Solutions
Network Hardware Challenges
• Most router components don’t follow Moore’s Law

• Attempting a 4x system bandwidth leap from 2016 to 2019
• Broad set of platform challenges – not just a new ASIC
• Memory
• Internal bandwidth
• Power delivery
• Thermal management
• High density optics
Memory Characteristics
• Physical size
• Capacity
Die
D
• Operations per second
R SRAM
Bandwidth TCAM
• A
• Connection to ASIC logic M HBM
• Access method (TCAM vs. RAM)
Package / Chip
• Commodity vs. custom
• Try to get rid of as many as you can TCAM
SerDes and Signal Integrity
• SI is the quality of electrical paths

• Currently using the 56G generation
• SerDes move signals within the system
• Optics to ASIC
• MACsec, gearboxes, retimers
• ASIC to ASIC (switch fabric)
8200 Series Power
First true routers with power under 4W / 100G
• Single ASIC
• Single CPU
• 8201 – 415W Typical (less than a coffee maker!)
• 8202 – 750W Typical
8800 Series Power Design
Power Trays
• High max capacity for investment protection
• High-power, high efficiency PSUs RP
RP
Vertical Busbar
• Busbars
Line Card Fabric Fan
Horizontal Busbar
• Feed redundancy model Tray
Line Card Fabric
• Point of Load (POL) innovation Line Card Fabric Fan
• Rear power cabling Fabric Tray

Line Card Fabric Tray
Line Card Fabric Tray
Key Thermal Concepts
• ASICs, memories, and optics

• Gradients, hotspots, and Tj
• Must design to TDP
• Variation components
• Heat sinks, vapor chambers, liquid
• Large vs. small system challenges
(not yet)
8800 Thermals
20 CPUs
• ASIC power increased from 70W (100G 3rd gen) to 300+ Watts
• QSFP power increasing from 4 to 20 Watts
576 GB
• 4 fan trays Memory
• 1.24 RU pitch
• QSFP-DD optics
640 GB DRAM
Over 5000 lasers
Optics
• QSFP-DD for 400 GbE

• 3-4x 100G power
• Converged SDN Transport
© 2020 Cisco and/or its affiliates. All rights reserved. Cisco Public
Moving Forward
New chips
New routers
Terabit ports
Optics w/ Luxtera and Acacia
Co-packaged optics
Questions &
Discussion
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Cisco 8000 Series and

Silicon One ASIC Architecture

• Introducing the Cisco 8000 Series

• Started as interns in the RTP TAC organization

• Introducing the Cisco 8000 Series

• Underlying component technologies change

• ASIC architectures usually last around 10-15 years

• Adoption curve for chips and systems

• 2020 plan started six years ago

• Bandwidth requirements – 5-200+ Tbps

8202 8808 8812 8818

1993 AGS+ 7000 7500 x y z

FAB 5000 2016

• Blends routing and switching capabilities

• The industry’s best silicon teams

• Routing capabilities at (better than) switching power and performance

• All slices in network mode

Network TX SMS Network TX

Network RX Shared Memory Network RX

Linecard Mode Linecard Mode

Network RX SMS Fabric RX

Network RX Fabric RX Fabric RX Network RX

• Duplicated resources per pair of

• Fabric or standalone operation

• Run to completion stages

• Multiple slices with common

• Most router components don’t follow Moore’s Law

• SI is the quality of electrical paths

Line Card Fabric Fan

• ASICs, memories, and optics

Over 5000 lasers

• QSFP-DD for 400 GbE

Cisco Live sessions will be available for viewing on

Meet the Engineer

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