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Nyserda Final Report On Effective Grounding

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Effective Grounding for Inverter-Connected DER

Final Report
3002020130
Effective Grounding for Inverter-Connected DER
Final Report
3002020130
Technical Update, February 2021

EPRI Project Manager


T. Key
DISCLAIMER OF WARRANTIES AND LIMITATION OF LIABILITIES
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THE ELECTRIC POWER RESEARCH INSTITUTE (EPRI) PREPARED THIS REPORT.

This is an EPRI Technical Update report. A Technical Update report is intended as an informal report of
continuing research, a meeting, or a topical study. It is not a final EPRI technical report.

NOTE
For further information about EPRI, call the EPRI Customer Assistance Center at 800.313.3774 or
e-mail askepri@epri.com.
Electric Power Research Institute, EPRI, and TOGETHER…SHAPING THE FUTURE OF ELECTRICITY
are registered service marks of the Electric Power Research Institute, Inc.
Copyright © 2021 Electric Power Research Institute, Inc. All rights reserved.
ACKNOWLEDGMENTS
The Electric Power Research Institute (EPRI) prepared this report.
Principal Investigators
X. Shi
T. Key
D. Van Zandt
W. Wang
This report describes research sponsored by the New York State Energy Research and
Development Authority (NYSERDA), under Grant #137945.
EPRI would like to acknowledge the contributions of the following organizations and
consultants:
• New York State Energy Research and Development Authority (NYSERDA)
• Phil Barker of Nova Energy Specialists, LLC
• Reigh Walling of Walling Energy Systems Consulting, LLC
• Joint Utilities of New York State
• New York Department of Public Service

This publication is a corporate document that should be cited in the literature in the following
manner:
Effective Grounding for Inverter-Connected DER: Final Report. EPRI, Palo Alto, CA: 2021.
3002020130.
iii
ABSTRACT
Effective grounding is a characteristic of electric power systems for limiting ground fault
overvoltage and considered in coordination of fault current protective devices. Adding
distributed energy resources (DER) can affect power system grounding and is normally
evaluated in the interconnection review process. The research reported here focused on effective
grounding during island conditions and aimed to clarify grounding requirements with inverter-
based DER. The research is motivated by the need to true up long-standing grounding practices
for machine DER with evolving practices for today’s more common inverter-based DER. It also
provided DER plant ground source screening guidelines for a more transparent and consistent
review process.
This report starts with the fundamentals. It explores the meaning of effective grounding, basic
principles, ground sources, and the role of DER transformer connections, load types and tripping
response of inverters. It also addresses the application and sizing of grounding transformers,
impedance selection, protection coordination considerations and related side effects. DER
capabilities such as negative sequence current compensation are discussed. An inverter
grounding design tool (ISGT) is introduced.
Key takeaways for the work are:
• Effective grounding is a “power system” characteristic, affected by DER.
• Inverters’ need for supplemental grounding and their responses to ground fault and grid
disconnection are significantly different than synchronous machines.
• Many classical power system grounding practices are not ideal for inverter-based DER
plants.
• Supplemental grounding can have undesirable side-effects and optimum design is less
well-defined for inverters.
• Load is becoming a key factor to consider with increasing inverter penetration.

Keywords
Distributed energy resources
Inverter-based DER
Effective grounding
Supplemental grounding
Ground source
Inverter negative sequence impedance
Ground fault overvoltage

v
EXECUTIVE SUMMARY

Deliverable Number: 3002020130


Product Type: Technical Update
Product Title: Effective Grounding for Inverter-Connected DER: Final Report

PRIMARY AUDIENCE: Utility technical staff, planners and research community involved with distributed
energy resources (DER) interconnection criteria, technical reviews or protection requirements. Results are
particularly applicable in areas with expected high-penetration of inverter-based DER systems (PV or energy
storage batteries) on distribution circuits.
SECONDARY AUDIENCE: Stakeholders responsible for distributed energy resources (DER), planning
activities, project design, interconnection reviews, and system impact studies. This included consultants and
plant developers, inverter manufacturers and other stakeholders in the business of DER.

KEY RESEARCH QUESTION


The key questions to answer are:
1. What is different about inverter-based generation in comparison to rotating machines?
2. Is an assumption that inverters are current sources always accurate and when do the start to look like
voltage sources? Can this complex transition be modeled?
3. Are there any negative impacts of supplemental grounding – such as protection de-sensitization, arc
flash?
4. What is important to consider from a modeling perspective? What are limitations of models?
5. When is supplemental grounding needed and why?
6. Which type of supplemental grounds could provide the optimal solution and how to size it? Why should
grounding impedance be matched to the load?

RESEARCH OVERVIEW
This project aims to true up long-standing grounding practices with evolving practices for inverter-based DER
with capabilities such as negative sequence current compensation. Specific objectives are to improve the
technical review process and to make grounding requirements more transparent and consistent. The project
explores the meaning of effective grounding, basic principles, and important role of DER transformer
connections, load types and fast tripping capability of DER. It also will address application and sizing of
grounding transformers, grounding impedance selection, potential interference with protection coordination
and related side effects.

KEY FINDINGS
• Effective grounding is a “power system” characteristic, affected by DER.
• Inverters’ need for supplemental grounding and their responses to ground fault and grid disconnection
are significantly different than synchronous machines.
Together...Shaping the Future of Electricity®

Electric Power Research Institute


3420 Hillview Avenue, Palo Alto, California 94304-1338 • PO Box 10412, Palo Alto, California 94303-0813 USA
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© 2020 Electric Power Research Institute (EPRI), Inc. All rights reserved. Electric Power Research Institute, EPRI, and
TOGETHER...SHAPING THE FUTURE OF ELECTRICITY are registered service marks of the Electric Power Research Institute, Inc.
• Many classical power system grounding practices are not ideal for inverter-based DER plants.
• Supplemental grounding can have undesirable side-effects and optimum design is less well-defined for
inverters.
• Load is becoming a key factor to consider with increasing inverter penetration.

WHY THIS MATTERS

This research work is expected to provide a better understanding of grounding and other related issues for
inverter-based DER making interconnections more cost-effective. For example, mitigation of ground fault
overvoltage from inverter’s dynamic response as opposed to relying on external supplemental grounding
transformers or time coordinated direct transfer trips. This can translate into a lower installation and
maintenance costs, and potential efficiency improvements for both PV and battery storage systems. Power
quality may also be improved. Results will inform utilities and support inverter manufacturers to better optimize
designs and to make future inverter-based DER more capable of ground fault overvoltage (GFOV) and load
rejection overvoltage (LRO) mitigation.

Moreover, this work may help to avoid unnecessary costs of grounding transformer or a time coordinated
DTT, which could bring additional expense ranging from 5% to 10% of PV system cost depending on the
system size and location. Associated energy loss and maintenance needs will be avoided as well. In addition,
avoiding unneeded devices and systems should in theory improve system reliability and resiliency.

HOW TO APPLY RESULTS


Results suggest that for utilities contemplating grounding requirements for high DER penetration applications,
use this material as a reference and to guide questions about effective grounding of inverter-based DER.
Confirm that supplemental grounding is really needed and well designed for specific systems. Share lessons-
learned regarding grounding issues as well as the mitigation and protection such as submittal requirements,
screening review, protection studies and commissioning practices. Moreover, DER manufacturers need to
consider the “masking” effect that could be brought by interconnection transformers with zero sequence
discontinuity, and to ensure the effectiveness of transient overvoltage limit for MV side ground faults. With
expected higher penetration levels, the risk of ground fault overvoltage and load rejection overvoltage and
their mitigations should be reviewed as early as possible in the inverter design stages.

LEARNING AND ENGAGEMENT OPPORTUNITIES


• This ongoing project promotes industry collaboration including workshops with participants, sharing of
DER interconnection practices and recommendations on DER interconnection transformer
configuration selection and/or measures to provide supplemental grounding.
• The results are of wide interest not only for any utility handling inverter-based DER interconnections
to their distribution system (penetration level may be high or low), but also other stakeholders in grid
connected. EPRI research programs directly involved in this work are Integration of Distributed
Generation (P174) and Distribution Protection (P200C).

EPRI CONTACTS: Tom Key, Senior Technical Executive, tkey@epri.com; Devin Van Zandt, Senior Technical
Executive, DVanZandt@epri.com; Xiaojie (Jane) Shi, Engineer Scientist, xshi@epri.com.

PROGRAM: Integration of Distributed Energy Resources (P174)

7
CONTENTS
ABSTRACT ............................................................................................................................... V
EXECUTIVE SUMMARY ......................................................................................................... VII
1 INTRODUCTION................................................................................................................1-1
Overvoltage Concerns with DER In Distribution .................................................................1-1
Effective Grounding of Power Systems ..............................................................................1-2
Coefficient of Grounding ...............................................................................................1-2
Transformer Generation Combinations .........................................................................1-4
Motivation for this Report....................................................................................................1-5
Topics Covered in this Report ............................................................................................1-6
2 DIFFERENT FAULT RESPONSES OF INVERTER- AND MACHINE-BASED DER..........2-1
Symmetrical Component Analysis ......................................................................................2-1
Transformer Inverter Combinations ....................................................................................2-8
Fault Response Summary ..................................................................................................2-9
3 UTILITY GROUNDING PRACTICES SURVEY..................................................................3-1
2019 Survey Results ..........................................................................................................3-1
Ongoing Grounding Practices Discussion ..........................................................................3-2
Applying Research Results to Grounding Decisions ...........................................................3-4
Utility Practices Summary...................................................................................................3-7
4 TRANSIENT ANALYSIS AND LAB TEST RESULTS .......................................................4-1
Electromagnetic Transient Program (EMTP) Simulations ...................................................4-1
Overvoltage Sensitivity to Generation/Load Ratios .......................................................4-4
Transformers and Loads as Ground Sources ...............................................................4-7
Different Interconnection Transformer Configurations...................................................4-9
Commercial Inverter Lab Tests.........................................................................................4-17
Constant Positive Sequence Voltage and Varying Negative Sequence Voltage .........4-18
Constant Negative Sequence Voltage and Varying Positive Sequence Voltage .........4-21
Varying Positive Sequence and Negative Sequence Voltage .....................................4-22
Varying Phase Angle of Negative Sequence Voltage .................................................4-23
EMTP Simulation and Lab Test Findings..........................................................................4-25
5 EQUIPMENT SUSCEPTIBILITY TO TOV ..........................................................................5-1
End-User Equipment ..........................................................................................................5-1
Medium Voltage Surge Arresters........................................................................................5-6
Susceptibility Summary ....................................................................................................5-12
6 SYSTEM GROUNDING GUIDELINES WITH INVERTER-BASED DER ............................6-1
Interconnection Transformer Selection ...............................................................................6-1
Updated Grounding Considerations for Inverter DER .........................................................6-4
Evolution of Overvoltage Screening Criteria .................................................................6-4

ix
Choosing Mitigation or Prevention Options ...................................................................6-6
Application of Supplemental Grounding ........................................................................6-9
Side Effects of Supplemental Grounding ....................................................................6-13
Inverter-based Supplemental Grounding Tool (ISGT).......................................................6-18
Guidelines Summary ........................................................................................................6-22
7 CONCLUSIONS AND FUTURE WORK.............................................................................7-1
Conclusions .......................................................................................................................7-1
Key takeaways from this report:....................................................................................7-1
Overall recommendations: ............................................................................................7-1
Future Work .......................................................................................................................7-2
A VOLTAGE SETPOINTS IN LAB TEST ....................................................................... A-1

x
LIST OF FIGURES
Figure 1-1 Overvoltage caused by neutral shift during a ground fault on phase C ....................1-1
Figure 1-2 Overvoltage with ungrounded neutral during a ground fault on phase C .................1-1
Figure 1-3 Example island with ground fault overvoltage risk ...................................................1-2
Figure 1-4 Overvoltage level for varying R0/X1 and X0/X1 (X1/R1 = 2 ) .......................................1-3
Figure 1-5 Combinations of synchronous generator and transformer .......................................1-5
Figure 2-1 Sequence network for fault analysis of a synchronous generator dominated
system................................................................................................................................2-1
Figure 2-2 Older style 3-phase PV inverter with isolation transformer ......................................2-4
Figure 2-3 Prevalent transformer-less three-phase PV inverter ................................................2-4
Figure 2-4 Sequence network for fault analysis of a inverter-based DER dominated
system................................................................................................................................2-6
Figure 2-5 Load rejection overvoltage ......................................................................................2-7
Figure 2-6 GFOV and LROV ....................................................................................................2-7
Figure 2-7 Overvoltage with light and heavy loads ...................................................................2-8
Figure 2-8 Combination of interconnection transformer and inverter-based DER .....................2-8
Figure 3-1 Issues and concerns for specification of DER interconnection transformers............3-2
Figure 3-2 Utility preferences for DER interconnection transformers .......................................3-3
Figure 3-3 Responsibility for customer-owned DER transformer connections ..........................3-3
Figure 3-4 What technical review procedures are relied on for DER protection issues .............3-5
Figure 3-5 Identify practices to prevent GFOV with increasing penetrations of DER >
1MW ..................................................................................................................................3-5
Figure 3-6 Will you consider using 33% L-N load as sufficient criteria with regard to OV
concerns? ..........................................................................................................................3-6
Figure 3-7 Min load to gen (1 MW plants) ratios for OV concerns ............................................3-6
Figure 3-8 If adding supplemental grounding, have you seen a need to re-coordinate
protection? .........................................................................................................................3-7
Figure 4-1 Test circuit in simulation study ................................................................................4-1
Figure 4-2 IV characteristic of emulated arrester (note voltage is kVpeak) ...............................4-2
Figure 4-3 Negative sequence impedance of inverter model used in simulation.......................4-3
Figure 4-4 MV and LV side peak voltage as gen/load ratio varies, without (left) and with
(right) TOVP, and no SLG fault ..........................................................................................4-5
Figure 4-5 Trip time (left) and arrester energy (right) as gen/load ratio varies, and no
SLG fault ............................................................................................................................4-5
Figure 4-6 MV and LV side peak voltage as gen/load ratio varies, without (left) and with
(right) TOVP, when SLG fault presents ..............................................................................4-6
Figure 4-7 Trip time (left) and arrester energy (right) as gen/load ratio varies, when SLG
fault presents......................................................................................................................4-6
Figure 4-8 Impact of self-overvoltage protection.......................................................................4-7
Figure 4-9 MV and LV side peak voltage as percent of grounded load varies, without
(left) and with (right) TOVP, when SLG fault presents and gen/load = 1 .............................4-7
Figure 4-10 Trip time (left) and arrester energy (right) as percent of grounded load
varies, when SLG fault presents and gen/load = 1 .............................................................4-8
Figure 4-11 LV (left) and MV (right) side peak voltage as gen/load, and/or grounding
means (through grounded load or grounding transformer (GT)) vary, when SLG fault
presents .............................................................................................................................4-8
Figure 4-12 Trip time (left) and arrester energy (right) as gen/load, and/or grounding
means (through grounded load or grounding transformer (GT)) vary, when SLG fault
presents .............................................................................................................................4-9

xi
Figure 4-13 Simulated phase-to-ground and line-to-line voltage with persistent SLG fault
and Yg/Yg interconnection transformer ............................................................................4-10
Figure 4-14 Simulated phase-to-ground and line-to-line voltage with persistent SLG fault
and ∆/Yg interconnection transformer ..............................................................................4-10
Figure 4-15 Average Peak MV side, Y and Δ connected load, various transformer
connections and no TOVP................................................................................................4-11
Figure 4-16 Average Peak LV side, Y and Δ connected load, various transformer
connections and no TOVP................................................................................................4-12
Figure 4-17 Trip times, Y and Δ connected load with various transformer connections
and no TOVP ...................................................................................................................4-12
Figure 4-18 Arrester energy, Y and Δ connected load with various transformer
connections and no TOVP................................................................................................4-13
Figure 4-19 Average Peak MV side, with and without TOVP with various transformer
connections ......................................................................................................................4-13
Figure 4-20 Average Peak LV side, with and without TOVP with various transformer
connections ......................................................................................................................4-13
Figure 4-21 Trip times, with various transformer winding connections, with and without
TOVP ...............................................................................................................................4-14
Figure 4-22 Arrester energy, with various transformer winding connections with and
without TOVP ...................................................................................................................4-14
Figure 4-23 MV side average peak voltage with LV (left) or MV (right) side activated
TOVP ...............................................................................................................................4-15
Figure 4-24 LV side average peak voltage with LV (left) or MV (right) side activated
TOVP ...............................................................................................................................4-15
Figure 4-25 Trip time with LV (left) or MV (right) side TOVP...................................................4-16
Figure 4-26 Arrester energy with LV (left) or MV (right) side TOVP ........................................4-16
Figure 4-27 Ground fault overvoltage and transformer connection summary..........................4-17
Figure 4-28 Test setup for inverter negative sequence impedance evaluation .......................4-18
Figure 4-29 Volt-var settings used in lab test .........................................................................4-18
Figure 4-30 Negative sequence behavior of inverter A, with varying Vneg and constant
Vpos, no volt-var ................................................................................................................4-19
Figure 4-31 Negative sequence behavior of inverter A, with varying Vneg and constant
Vpos, VV activated .............................................................................................................4-19
Figure 4-32 Negative sequence impedance of inverter A, with varying Vneg and constant
Vpos ...................................................................................................................................4-20
Figure 4-33 Negative sequence impedance of inverter B, with varying Vneg and constant
Vpos ...................................................................................................................................4-20
Figure 4-34 Negative sequence impedance of inverter C, with varying Vneg and constant
Vpos ...................................................................................................................................4-20
Figure 4-35 Negative sequence impedance of inverter B, with varying Vpos and constant
Vneg...................................................................................................................................4-21
Figure 4-36 Negative sequence impedance of inverter C, with varying Vpos and constant
Vneg...................................................................................................................................4-22
Figure 4-37 Negative sequence impedance of inverter A, with varying Vpos and Vneg..............4-22
Figure 4-38 Negative sequence impedance of inverter B, with varying Vpos and Vneg..............4-23
Figure 4-39 Negative sequence impedance of inverter A, with varying phase angle of
Vneg...................................................................................................................................4-23
Figure 4-40 Negative sequence impedance of inverter B, with varying phase angle of
Vneg...................................................................................................................................4-24
Figure 4-41 Negative sequence impedance of inverter C, with varying phase angle of
Vneg and P = 1 pu ..............................................................................................................4-24

xii
Figure 5-1 ITIC Voltage Tolerance Envelope...........................................................................5-2
Figure 5-2 Hawaii Electric published limit for DER ...................................................................5-3
Figure 5-3 Summary of equipment under test and overvoltage levels ......................................5-3
Figure 5-4 Summary of overvoltage test results – from EPRI TPQ Techwatch, Oct. 2014........5-4
Figure 5-5 Results of EPRI testing compared to ITIC ...............................................................5-5
Figure 5-6 Concepts applied to achieve electromagnetic compatibility .....................................5-6
Figure 5-7 Hypothetical Overvoltage Failure Probability of Loads ............................................5-6
Figure 5-8 Metal Oxide Arrester structure ................................................................................5-7
Figure 5-9 Example arrester voltage-current curve ..................................................................5-8
Figure 5-10 Example arrester current waveform ......................................................................5-9
Figure 5-11 Arrester temporary overvoltage capability ...........................................................5-10
Figure 5-12 Average of duty ratios (left) and expected sharing relative to the standard
deviation in arrester characteristics (right) ........................................................................5-11
Figure 5-13 Energy capability multiplier for power frequency TOVs at 1.7-1.8 per unit ...........5-11
Figure 6-1 Typical grounding configuration screens use peak load a proxy for minimum
load (similar to requirements in CA Rule 21 and many other jurisdictions screening
criteria) ...............................................................................................................................6-1
Figure 6-2 Zero sequence path for various interconnection transformers .................................6-3
Figure 6-3 Initial screening for four-wire multi-grounded neutral distribution systems with
DER ...................................................................................................................................6-6
Figure 6-4 Ground fault overvoltage and LRO solution screening ............................................6-7
Figure 6-5 Time coordinated DTT ............................................................................................6-8
Figure 6-6 Supplemental grounding transformer (ground source) locations ...........................6-11
Figure 6-7 Flowchart for supplemental grounding transformer design ....................................6-12
Figure 6-8 Typical Supplemental grounding for synchronous machine and inverter-based
DER .................................................................................................................................6-13
Figure 6-9 Ground fault current from grounding transformer ..................................................6-14
Figure 6-10 Ground fault current division effect ......................................................................6-15
Figure 6-11 Case study for ground fault relaying desensitization ...........................................6-15
Figure 6-12 Grounding impedance to prevent ground fault relaying desensitization ...............6-16
Figure 6-13 Zero sequence circulating current due to normal imbalance................................6-16
Figure 6-14 Power back-feed during single phasing ...............................................................6-17
Figure 6-15 Ground potential rise ...........................................................................................6-17
Figure 6-16 Impact of GPR at substation fence ......................................................................6-18
Figure 6-17 How do you expect to use the EPRI grounding effectiveness calculation
tool? .................................................................................................................................6-19
Figure 6-18 Analysis for overvoltage with delta load and no supplemental grounding,
using EPRI ISGT ..............................................................................................................6-20
Figure 6-19 Comparison between simulation and analysis results for cases with delta
load and no supplemental grounding (note mismatch around 1pu is on no practical
significance) .....................................................................................................................6-20
Figure 6-20 Analysis for overvoltage with Yg load and no supplemental grounding, using
EPRI ISGT .......................................................................................................................6-21
Figure 6-21 Comparison between simulation and analysis results for cases with Yg load
and no supplemental grounding .......................................................................................6-21
Figure 6-22 Analysis for overvoltage with Yg load and supplemental grounding, using
EPRI ISGT .......................................................................................................................6-22
Figure 6-23 Comparison between simulation and analysis results for cases with Yg load
and supplemental grounding ............................................................................................6-22
Figure 7-1 Do you see future need for a standard on inverter negative-sequence
behavior? ...........................................................................................................................7-3

xiii
xiv
LIST OF TABLES
Table 1-1 Overvoltage level on faulted phase for various CoG.................................................1-3
Table 2-1 Comparison between different types of DER ............................................................2-5
Table 4-1 IEEE 1547-2018 Category II extended trip settings ..................................................4-3
Table 5-1 Common surge energy ratings .................................................................................5-8
Table 6-1 Evolution of Screening Criteria Addressing DER Overvoltage Concerns ..................6-5
Table 6-2 Evolution from overvoltage mitigation to overvoltage prevention for inverter-
based DER.........................................................................................................................6-9
Table 6-3 Comparison of Supplemental Ground Sources Evolving from Machine to
Inverter DERs...................................................................................................................6-10
Tables A-1 to A-5 are in Appendix A

xv
1
INTRODUCTION
Overvoltage Concerns with DER In Distribution
When islanded from the primary system ground, DERs can contribute to a ground fault
overvoltage (GFOV) on the unfaulted phases in a 4-wire system. As illustrated in Figure 1-1, for
machine based DER, a fault on one phase causes a neutral shift toward the faulted phase. This
elevates phase to neutral voltage on the unfaulted phases shown as a swell. At the same time
there is a dip in the faulted phase voltage (see vector diagrams) until the fault is removed.

Figure 1-1
Overvoltage caused by neutral shift during a ground fault on phase C

The greater the neutral shift, the higher the overvoltage will be on the unfaulted phases. The
worst case occurs with ungrounded neutral with infinite impedance for neutral and earth return
path. In this case the neutral voltage shifted to the pre-fault Vcn (faulted phase), leading to Van and
Vbn with line-to-line magnitudes (173%), as shown in Figure 1-2. Voltage line to neutral on the
faulted phase C is therefore zero.

Van Van
Generation
Neutral island fault on
one phase Neutral Shifts

Vcn Vbn Vcn Vbn

Figure 1-2
Overvoltage with ungrounded neutral during a ground fault on phase C

Figure 1-3 illustrates example GFOV potentials in medium voltage (MV) and sub-transmission.
The feeder has a primary ground source provided by the Δ-Yg transformer at the distribution
substation. A ground fault on the distribution feeder causes the substation breaker to open and
removes the primary system ground source. With all ungrounded sources within the island
system (orange area), equipment such as arresters may be exposed to a sustained power

1-1
frequency overvoltage if DER continues operating. A similar scenario can be seen at sub-
transmission in the yellow area. Aggregate DER in both sub-transmission and distribution
systems can cause GFOV on unfaulted phases after loss of the bulk system ground source.
Subtransmission source transformer acts as grounded source
Utility System suppressing ground fault overvoltage on subtransmission until
Bulk Source subtransmission breaker opens.

Substation transformer acts as grounded source with respect to 12.47


feeder suppressing ground fault overvoltage on distribution until feeder
breaker opens. But it acts as an ungrounded source when feeding
backwards into subtransmission!

Subtransmission Feeder
Breaker
Breaker
Subtransmission 12.47 kV Line
(46kV)
Ground
Ground Distribution Fault
Fault Substation
Transformer Acts as
Distribution Transformer acts as
DG ungrounded source
Substation (not effectively
ungrounded source or acts as
high Z grounded source (if
grounded)
generator neutral is not
grounded or high z grounded)
DG Site 1 DG Site 2

Load
Load Load Load Neutral is Ungrounded
Distribution or High Z Grounded
DG Substation

Need enough load on this island with respect aggregate DG


Load at distribution level to suppress overvoltage – otherwise
effective grounding or other solutions are needed!

Need enough load on this island with respect aggregate


DG at all connected distribution substations to suppress
overvoltage – otherwise special solutions are needed!

Figure 1-3
Example island with ground fault overvoltage risk

For both distribution and transmission, the GFOV can stress line-to-ground connected devices
including MV surge arresters, power and measurement transformers, and end-use customer
equipment. 1

Effective Grounding of Power Systems

Coefficient of Grounding
As defined in IEEE C62.92.1, if a system or isolated subsystem has a coefficient of grounding
(CoG) less than 80%, it is “effectively grounded”. CoG is the ratio of the greatest unfaulted
phase-to-ground voltage during a ground fault divided by the line-to-line voltage without the
fault, i.e., VL-G(fault)/VL-L (no fault). Therefore, COG ≤ 0.8 p.u. limits GFOV to 0.8 × Vl-l or 0.8 x
√𝟑𝟑 ~ 𝟏𝟏𝟏𝟏𝟏𝟏% of VL-G (no fault). Note that a high unfaulted phase voltage at high gen/load ratios
could still be effective grounding (i.e., VL-G(GFO+LRO)/VL-L (LRO) ≤ 0.8 p.u.). Effective grounding is
not a characteristic of the generation source exclusively but a characteristic of the whole system.

1
Protection from Unintended Islanding and Substation Primary GFO caused by DER Infeed. EPRI, Palo Alto, CA:
2018. 3002011008.

1-2
IEEE C62.92.1 states that effective grounding “is obtained approximately when, for all system
conditions, the ratio of the zero-sequence reactance to the positive-sequence reactance, (X0/X1) is
positive and ≤ 3, and the ratio of zero-sequence resistance to positive-sequence reactance, (R0/X1)
is positive and < 1”, as illustrated in orange area in Figure 1-4. To a reasonable degree of
accuracy, this impedance ratio approach does identify effective grounding conditions for
classical electric power systems where synchronous generators are involved. However, on 4-wire
multi-grounded neutral power distribution systems, good design practice per IEEE C62.92.4
implies that COG should be about 72% or less where possible (roughly R0/X1 ≤ 0.7 and X0/X1 ≤
2), as shown by the dashed red lines. Table 1-1 summarizes the overvoltage level on faulted
phase for various CoG.
Note that in IEEE C62.92.1, CoG calculation was simplified assuming the same positive- and
negative- sequence impedances (Z1 = Z2). This assumption is generally true for rotating
machines, lines, cables and transformers, but it does not hold for current-regulated inverters that
effectively have extremely high Z1 and where Z1 ≠ Z2. Therefore, these impedance ratios
generally cannot provide a good approximation when inverters are the dominant sources.
Graph Adapted from C62.92.1-2000

This graph shows Coefficient of


Grounding for the case where
the Source X1/R1 ratio is 2. See
IEEE C62.92.1 for a complete
family of graphs for various X/R
ratios ranging from infinity to
0.5.

Figure 1-4
Overvoltage level for varying R0/X1 and X0/X1 (X1/R1 = 2 )

Table 1-1
Overvoltage level on faulted phase for various CoG
Type of Neutral Grounding COG Line to Ground Overvoltage Level
Overvoltage Level (including ANSI 5%
regulation factor)
Ungrounded 100% 1.73 1.82
Barely Effectively Grounded 80% 1.38 1.46
(barely meets the definition)
Effectively Grounded with good 4-Wire <72% <1.25 <1.31
Practice Per IEEE
Ideally Grounded <58% <1.0 <1.05

1-3
Transformer Generation Combinations
In the traditional distribution feeder with synchronous generator based DER, effective grounding
can be preserved by DER interconnections themselves, when it is disconnected from the
substation. This can be achieved by:
• Interconnection or generator step-up transformer winding configurations providing a
small zero-sequence shunt impedance (e.g., grounded wye on the utility primary feeder
side and delta on the DER side). For synchronous generators, the zero-sequence shunt
impedance should be specified to meet the constraints of 0 < X0/X1 ≤ 3, and 0 < R0/X1 ≤
1, if looking into the sequence impedances of the DER source at the utility primary
feeder side.
• Separate grounding transformer connected to the utility primary feeder side of the
interconnection transformer, or on the DER side if the interconnection transformer is
connected grounded-wye/grounded-wye (Yg/Yg). The separate grounding transformer
can be connected in the zig-zag configuration, or it can be grounded-wye/delta (Yg/∆)
configuration.
• Synchronous or induction generator with a grounded-wye winding (Yg) configuration
and interconnected to the utility primary via a grounded-wye/grounded-wye (Yg/Yg)
transformer.
Different combinations of generator and transformer are illustrated in Figure 1-5. The first two
cases, i.e., Yg/Yg transformer with grounded generator and Yg/∆ transformer (regardless of
generator grounding), act as grounded source feeding out to the system. Other combinations, in
contrast, cannot provide an effective grounding, and thus an extra grounding transformer may be
needed for GFOV mitigation. Note that when interconnection transformer has delta or
ungrounded Y connections at either primary (utility) or secondary (DER) side, the generator
neutral grounding will not affect the primary side grounding conditions.

1-4
Figure 1-5
Combinations of synchronous generator and transformer

Motivation for this Report


Apparent incompatibilities between distribution system grounding and DER neutral grounding
often challenge the technical review process and lead to additional grid interconnection
requirements. Evolution from rotating machines to inverters, and differences in medium-voltage
grounding philosophies have led to a wide-range of utility practices. In addition to differences in
distribution system design, there are fundamental differences between inverters and traditional
rotating machine generation. Developers point out that they are uncertain what requirements
must be met from one jurisdiction to another.
Utility feeders vary in characteristics and grounding requirements. The variety of three-phase
transformer connection options adds to seeming inconsistencies. Both the connection type and
grounding method affect DER performance and grid interactions when the power system is
abnormal, such as during a ground fault. Among several protection and power quality concerns,
ground-fault overvoltage (GFOV) during DER islands is related to the system grounding
effectiveness. Compared to balanced unintended island conditions, limited by standards to 2
seconds, an unbalanced GFOV condition is mitigated immediately by effective grounding.
Achieving GFOV mitigation during islands often leads to higher DER installation cost and
longer times for technical review. Supplemental grounding transformers, fault-clearing and relay
protection equipment may be required. Many current practices have evolved for synchronous
generators and are difficult to apply to inverter-connected DER. PV plant developers point out a
wide range of, and apparently inconsistent, requirements and practices among utilities.
Typical 3-phase inverters do not have grounded neutrals beyond a sensing circuit. Depending on
local distribution grounding practices this can lead to uncertainties, delays, and special

1-5
interconnection studies. The concern is GFOV during an island. Overvoltage, even short
duration, can stress line to neutral connected equipment such as lightning arresters. DER
grounding method is an important factor in this risk.
IEEE/ANSI C62.92, Guide for the Application of Neutral Grounding in Electrical Utility
Systems, addresses grounding considerations for various parts of the grid. Grounding for feeders
and services from the medium voltage grid are the subject of C62.92.4. The IEEE Surge
Protective Device committee recently added a new guide to the series, C62.92.6, for current-
regulated generation (inverters). It addresses some of the fundamental differences with inverters
compared to rotating machine connections. This report is aimed to complement the guide with
methods and recommended practices for evaluation of inverter interconnection cases.

Topics Covered in this Report


Aiming to provide solutions, this project worked through the theory, examined the specific
feeder circumstances and mechanisms, modeled typical scenarios, and provided
recommendations on practices that are expected to simplify interconnection decisions and reduce
uncertainties around this issue. Clarifications are also provided regarding when supplemental
grounding is needed and recommendations for economic alternatives. Sizing criterion are also
developed in this project to achieve optimal performance.
The topics covered in this report include:
Chap 2. Difference between synchronous-based and inverter-based generation
Chap 3. Utility practices on effective grounding
Chap 4. Sequence network analysis of inverter-based generation for fault analysis and sampled
inverter behaviors. Impact of grounded load and supplemental grounding on ground
fault overvoltage.
Chap 5. What is expected overvoltage tolerance of end user loads and of medium voltage
connected equipment.
Chap 6. Negative impacts, side effects, of supplemental grounding. When is supplemental
grounding needed and how to size it? Recommendation for updates to standard
interconnection requirements (preliminary and supplemental screening, technical review
and studies) related to effective grounding.
Chap 7. Conclusions and next steps.
This project trued up long-standing grounding practices with evolving practices for inverter-
based DER with capabilities such as current unbalance compensation. Specific objectives are to
improve the technical review process and to make grounding requirements more transparent and
consistent. The project explored the meaning of effective grounding, basic principles, and
important role of DER transformer connections. It also addressed application and sizing of
grounding transformers, impedance grounding, interference with protection coordination, arc
flash considerations, and related side effects.

1-6
2
DIFFERENT FAULT RESPONSES OF INVERTER- AND
MACHINE-BASED DER
Symmetrical Component Analysis
A synchronous generator can be characterized as a voltage source that is series connected with a
relatively low impedance. Symmetrical component analysis is used to evaluate different circuit
fault conditions. An example sequence network for a synchronous generator dominated system
during a SLG fault is provided in Figure 2-1. In symmetrical fault analysis, the source impedance
(Z1, negative sequence impedance Z2, zero s sequence impedance Z0 and Zn) and other series
impedances contributed by lines (Z1line, Z2line, and Z0line) and transformers (Z1trans, Z2trans, and
Z0trans) dominate the power system sequence impedances at any point. Here the subscripts 1,
means positive sequence, 2, means negative sequence and 0, means zero sequence.

𝑍1 𝑍1𝑡𝑟𝑎𝑛𝑠 𝑍1𝑙𝑖𝑛𝑒
𝐸𝐸
𝑍𝑙𝑜𝑎𝑑

𝑍2 𝑍2𝑡𝑟𝑎𝑛𝑠 𝑍2𝑙𝑖𝑛𝑒
3𝑍𝑓
𝑍𝑙𝑜𝑎𝑑

𝑍0 𝑍0𝑡𝑟𝑎𝑛𝑠 𝑍0𝑙𝑖𝑛𝑒

3𝑍𝑛 𝑍𝑙𝑜𝑎𝑑

Figure 2-1
Sequence network for fault analysis of a synchronous generator dominated system

For synchronous generators Z1 ≈ Z2, and for lines, cables, and transformers Z1 = Z2. Load
impedances (Zload) that connect in parallel are normally much larger and thus usually are ignored.
Therefore, the term “effectively grounded source” is frequently used in the utility industry when
a strong source has an X0/X1≤ 3 and R0/X1 < 1. These criteria tend to be met elsewhere in any
power system where strong source is dominant. An exception is zero-sequence (ground current)
blocking by a transformer winding configuration such as delta or ungrounded-wye. In addition,
rotating generators can easily withstand large over-currents (e.g., 4 – 6 times rated) for many
cycles.
Inverter based-DER, on the other hand, have distinct behaviors, and cannot be represented as a
voltage source. A PV inverter, for example, regulates its dc voltage to achieve the maximum
power at the specific irradiance level. Through power and current control loops, the inverter
regulates its output current (mainly positive sequence) automatically attempting to maintain its
power generation when the terminal voltage varies, thus operating as a voltage controlled current

2-1
source. The power electronic devices used in inverters, unlike synchronous machines, are highly
sensitive to overcurrent and may fail due to even a sub-cycle exposure to large current (e.g.,
several times rated). To protect the electronics, these grid-following inverters use high-speed
regulation of current that effectively limits maximum 60 Hz current from the inverter to slightly
above the rated value. Because modern inverters switch at kHz speeds, the response time of the
current controls are typically on the order of a fraction of a 60 Hz cycle.
During fault conditions, the reduced positive-sequence voltage will cause the power regulator in
the inverter controls to increase the current regulator reference, or target value, to the maximum
allowed value to maintain constant power. Under this circumstance, inverter will act as a
constant current source instead.
In both cases, there will be a large impedance connected in parallel following the Norton
equivalent circuit. In very rare conditions, the inverter controller gets deeply saturated due to the
large control error and cannot regulate its current generation in a timely matter (i.e., duty cycle of
1). The voltage output is then directly determined by its dc voltage and the inverter acts as a
voltage source. This situation could occur when there is a serious load rejection overvoltage, but
it generally lasts for a very short duration because of overvoltage protections.
Inverter negative sequence impedance is closely related to its control algorithms. The inverter
may eliminate the negative sequence current and result in an infinite negative sequence
impedance. Or it may mitigate the 2nd order power ripple by injecting more negative sequence
current, thus inducing a relatively low negative sequence impedance. For inverters that do not
have specific negative sequence current regulation, the negative sequence current superimposes
120 Hz variations on the constant positive sequence current in d-q coordinates, due to the
rotating reference frame. Practically the positive sequence current regulator has a bandwidth
around hundreds of Hz, and it therefore responds to the 120 Hz variations and partially mitigate
the negative sequence current. This typically results in an effective negative sequence impedance
around 1 p.u. on the inverter’s rating base. At the opposite extreme, inverters that have an
unusually slow positive sequence current regulator (with bandwidth < 120 Hz) would not
respond to the current imbalance. In this case, their negative-sequence impedance will be defined
by their physical output inductors and can be on the order of 0.1 p.u.
Negative-sequence impedance characteristics are not typically provided by inverter
manufacturers. GFOV analysis, therefore, may need to consider this parameter as an unknown
and sweep across the possible range of values. Recently, German grid code VDE-AR-N 4110
and IEEE P2800 require DER to provide certain negative sequence current during abnormal

2-2
conditions, which hopefully will standardize the negative sequence impedance of inverter-based
DER and facilitate more accurate fault analysis.2,3
Zero sequence impedance of DER are determined by the configuration of power inverters.
Diagram for both older style and more recent three-phase PV inverters are provided in Figure 2-2
and Figure 2-3, respectively. For older style PV inverters, the neutral grounding connection
usually comes from the factory as essentially an open or high impedance grounded unit. It is not
intended for serving zero-sequence load current and thus the inverter acts as an ungrounded-
neutral source. The neutral is used for voltage sensing to measure L-N voltage. Some
manufacturers can change the grounding if requested. Unit shown here has an isolation
transformer, but this style is obsolete and most today do not.
The recent PV inverters, as shown in Figure 2-3, are typically three-phase three-leg and have no
zero-sequence current generation capability. In this arrangement, the neutral connection is
brought to the inverter but is used only as a voltage sensing reference for control purposes. It is
also not intended to serve as a zero-sequence power carrying connection. Internally it is
connected to the control circuitry via high impedance and will appear to be a very high
impedance or open connection. Therefore, for DER with three-phase three-leg inverters, which
dominate the market, the zero-sequence impedance is expected to be ideally infinite.
There are also inverters that are primarily designed for off-grid applications. Their power
electronic devices are configured to allow zero-sequence neutral current in certain situations such
as while disconnected from the grid. However, their operating mode while grid-connected is
critical because if they are controlled to be a positive-sequence current source, they may still

2
VDE-AR-N 4110, 4120 and 4130 (German Grid Code), Technical Connection Rules: 10.2.3.3 Dynamic Network
Stability for Type 2 power generating plants
• Additional reactive current ΔiB2 is proportional to
the change of negative sequence voltage ΔuB2. The
required settling time is 60ms.
• The specification of reactive current implies a 90
degree phase shift w.r.t voltage
• The amplification factor k shall be adjustable, in
steps of 0.5 between 2 and 6
• Any limitation of reactive current is preferably
achieved through a uniform reduction of the
positive sequence and negative sequence currents
3
IEEE P2800, Draft Standard for IBR with Transmission Systems. Clause 7.2.2.3.4 Current injection during ride-
through mode:
• For unbalanced faults, in addition to increased positive sequence reactive current, IBR unit shall inject
negative sequence current. Dependent on IBR unit terminal (PoC) negative sequence voltage
• Leads the IBR unit terminal (PoC) negative sequence voltage by 90-100 degrees, for full converter based
IBR units, with settling time of 4 cycles (65ms)
• If total current limit is reached, any or both of positive and negative sequence current may be reduced
with a preference in equal reduction in both currents. Positive sequence current shall not be reduced
below negative sequence current.
• The standard intentionally does not specify magnitude of incremental positive and negative sequence
reactive current injection.

2-3
present a very high zero-sequence impedance. Unlike synchronous generators, physical
connectivity only partially determines the zero-sequence behavior of inverters, and controls can
play a significant role and even completely counteract the grounding that might otherwise be
provided by the configuration.
Three Phase Inverter with Internal Isolation Transformer Inside an Enclosure

C
Wye
Isolation
Transformer
Delta
A Voltage sensing
connections for
control purposes

Inverter
B Control
Neutral Terminal

Wye connection has high resistance neutral Enclosure


grounding or is essentially ungrounded bond to safety
ground

12,470V Utility A
Distribution
A
Transformer
(step-up) 480V
Neutral B B

277V
Neutral N
Safety Ground
C
C

Figure 2-2
Older style 3-phase PV inverter with isolation transformer

Three Phase Switching Bridge


3 Phase AC Output
+ Acts as Essentially Delta
Connected since Neutral is Note: this drawing
High Z Connection only for
Voltage sensing shows only one
A inverter for clarity,
DC Input
from PV or
B but many inverters
other C may be present
source
Filter
Voltage sensing
connections for and tied into the
control purposes
Inverter N collection grid.
Control Neutral
Terminal
-
Enclosure
bond to
safety ground A
Utility
Distribution A
Transformer
12,470V (step-up) 480V 480V
Neutral B B

277V
Neutral

C Safety
Ground C

Figure 2-3
Prevalent transformer-less three-phase PV inverter

2-4
In some cases, three-phase inverters are composed of three separately controlled single-phase
inverters in one box. These will inherently inject current at a defined phase angle relative to their
individual terminal phase voltages and thus the 120° phase relationship is not maintained during
unbalanced faults. Three-phase aggregations of single-phase inverters (e.g., residential rooftop
PV distributed amongst the phases) will perform similarly. Symmetrical components are not a
useful means to study such situations.
Table 2-1 summarizes the differences between power distribution system fed by utility supplied
substation source, synchronous machine-based or the vast majority of three-phase inverter-based
DER. Different from the other two types, the inverter-based DER operates as a current source
and has distinct sequence impedances. Therefore, the existing knowledge on GFOV and DER
grounding may not be applicable and should be revisited.
Table 2-1
Comparison between different types of DER

Type of Source Characteristics During Short Time Transient Events Such as Faults
Power Distribution • Power system acts as a voltage source
System Fed by Utility • Positive and negative sequence impedance are essentially equal or similar
Supplied Substation • 4-wire systems have zero sequence impedance to positive sequence impedance
Source ratios that meet classical effective grounding criteria
• System impedances are considered constant during fault conditions
• System frequency is considered constant for purposes of analysis
Typical DER • Machine acts as a voltage source.
Synchronous Rotating • Positive and negative sequence impedance are slightly different but still roughly
Machine similar
• Can be configured for effectively grounded zero sequence impedance
• The impedance changes over time (subtransient and transient reactance)
• The impedance is mostly reactance (high X/R ratio)
• Exciter control may significantly adjust excitation after many cycles (easily
modeled if settings and type known)
• Effects of prime mover governor, inertia and speed compound the dynamics
(easily modeled if data is available)
• The dynamics of the machine early in the event are very much dictated by well-
established machine physics
Typical DER Inverter • Operates as a current controlled source
(different than a classical • Has high positive sequence impedance (effectively infinite)
rotating machine) • Negative sequence impedance may be high, controller may not allow
unbalanced current output
• Has infinite or very high zero sequence impedance
• Dynamics of the inverter response at the mercy of the control software
programming

With the above analysis, the sequence network for DER inverters with a Yg/∆ interconnection
transformer during a single line to ground (SLG) fault is given in Figure 2-4. DER is represented
as a voltage controlled or constant current source for the positive sequence. The positive
sequence impedance (Z1current) is connected in parallel and ideally infinite. To emulate the
inverter control saturation, an additional non-linear element like MOV surge arrester or
extremely non-linear resistor is also connected in parallel. It has extremely high impedance at
nominal voltage but goes through a knee point at some voltage such as1.5-2.0 per unit to
represent inverter saturation during overvoltage condition.

2-5
The open circuit for negative sequence in Figure 2-4 is to illustrate the effect of a very high
negative sequence impedance (Z2current). Z2current may change depending on the inverter control
design. With a very large Z2current and no load, a severe unfaulted phase voltage could be created,
despite the low impedance zero sequence path created by the Yg/∆ transformer. Inverter zero-
sequence impedance Z0current does not affect the zero-sequence path in this case and is assumed to
be infinite. Note the zero-sequence path is subject to change with different transformer
interconnection windings.

Z1Trans Z1Line
Ideally Non-linear
element to Positive
Current Infinite at
Z1Current

normal represent Positive Va1 Sequence


Source nominal inverter Sequence Load
voltage saturation.
RFault
Z2Trans Z2Line
Negative
Z2Current Sequence
Negative Va2
Note: not all inverter types
Sequence Load
have high negative

Ifault = Ia
sequence impedance

Z0Trans Z0Line
Zero
Z0Current Zero Va0 Sequence
Sequence Load

Figure 2-4
Sequence network for fault analysis of a inverter-based DER dominated system

Connected load must be considered to analyze neutral shift and resulting GFOV and any load
rejection overvoltage (LROV) that may occur. LROV is another component of overvoltage
caused by the DER response to sudden loss of load. For inverter islands, if real power generation
to load ratio is < 1, voltage falls and if > 1, voltage rises. 4 There is a brief generation to load
mismatch as power controls adjust to the change. Worst case overvoltage occurs when there is
very light or total loss of load with full DER power generation in the island.
LROV is a balanced overvoltage (positive sequence) that is independent of neutral grounding
situation, as illustrated in Figure 2-5. In contrast, GFOV is an unbalanced overvoltage that is
greatly related to the system grounding and neutral point shifts from the center position during a
fault. Effective grounding only helps with GFOV mitigation and does not affect LROV. These
two types of overvoltage may occur separately or in combination depending on the specific
circumstances.

4
Do Grid Support Functions have Negative Impacts on Smart Inverter’s On-board Islanding Detection? EPRI, Palo
Alto, CA: 2020. 3002019665.

2-6
Van
Voltage on All
Van Phases increases
Generation Symmetrically
Neutral island suddenly Neutral

is unloaded
Vcn Vbn
Vcn Vbn

Figure 2-5
Load rejection overvoltage

Figure 2-6 defines the GFOV and LROV. In practice, GFOV and LROV only occur during
islanded operation. GFOV is overvoltage caused by a persistent SLG fault, when load matches
DER generation (gen/load =1) and the islanded system is not effectively grounded. LROV, as
discussed, is overvoltage purely induced by gen/load > 1, when no fault exists. With SLG fault
and gen/load > 1, both GFOV and LROV could occur, which may impose high voltage stress on
equipment connected to the circuit.

Start

Grid-connected
Islanded No
operation
LRO + GFO operation? - No LRO or GFO

Yes 3
Not affected by supplemental
No grounding or load connection

Yes ≥33% load is No Yes


LRO SLG fault? Pload ≤ Pgen LRO3
grounded?

Yes No
No

No Overloaded
Pload > Pgen Pload = Pgen
island – Voltage
reduces
Yes Yes

Overvoltage by GFO,
but undervoltage by ≥33% load is Yes No GFO
overloading grounded? concern

No

GFO2

2
Can be mitigated by supplemental
grounding when proportion of grounded
load is too small or cannot be determined

Figure 2-6
GFOV and LROV

Heavy loads (gen/load < 1), on the other hand, tend to reduce islanded voltage and compensate
GFOV. As shown in Figure 2-7, with heavy loads, voltage does not rise much on Vag and Vbg
since the overall size of the triangle has been reduced (phase to phase voltage has dropped) due

2-7
to the excessive loading on the generator. This conclusion holds for islands with either machine-
(voltage source) or inverter- (current source) based DER, where voltage drop is caused by line
impedance or current limiting of inverters.
Before the Fault Vag
Inverter DER
Current Source
Machine DER
Inverter
Neutral Source, its
transformer and its
X

R
connecting leads
i Limit =1.1
OR per unit
Vcg Vbg

12.47 kV Feeder
During Ground Fault During Ground Fault
(light load) (heavy load) Ground Fault
Vag Open (Phase C)
Utility Load
Vag Breaker
Source

Voltage • Voltage source: load is large enough to drop voltage via


Increases impedance drop
on Vag, Vbg • Current source: load is large enough to significantly
Neutral Neutral Vbg exceed current source limit, causing voltage collapse
Vcg=0
Vcg=0 Vbg

Figure 2-7
Overvoltage with light and heavy loads

Transformer Inverter Combinations


The combination of interconnection transformer and DER inverter is shown in Figure 2-8. With
open or high Z2 and Z0 of inverters, the Yg/∆ transformer or Yg/Yg transformer and grounded
DER will no longer enable an effective grounding as it does for the synchronous generators, and
a separate grounding transformer may be needed for this purpose.

Figure 2-8
Combination of interconnection transformer and inverter-based DER

2-8
Fault Response Summary
Behavior of inverter-based DERs during faults is fundamentally different than synchronous
generators. The typical model of an inverter positive sequence a voltage-controlled current
source or a pure constant current source with a magnitude equal to the maximum inverter current
(typically on the order of 1.1 times rated current).
Inverter negative-sequence impedance is largely an unknown value. It can be between 0.1p.u.
and infinity with any impedance angle, depending on the inverter control algorithms. Inverters
designed to German VDE standards will have inductive negative-sequence characteristics
settable from 0.17 to 0.5 p.u. The zero sequence is an open circuit, except in very unusual
inverter designs.
Most DER interconnection and related system grounding practices have evolved from experience
with, and characteristics of, synchronous generators. Applying these practices to inverter
connected DER may result in specifying a nonoptimized supplemental ground source with
protection coordination side effects. Fundamental differences with inverter-based DER response
to power system faults requires new approaches. Currently there is uncertainty related to inverter
control design and response. This can be overcome, and system grounding can be optimized, by
standards requiring clarity in inverter fault characteristics.

2-9
3
UTILITY GROUNDING PRACTICES SURVEY
2019 Survey Results
In 2019, EPRI conducted guided interviews with 20 utilities to determine their current practices
and plans regarding DER supplemental grounding requirements. 5 Interview discussion points
included:
• What MV transformer connections are specified for 3-phase DER customers?
• Do you require, define type, and specify parameters of supplemental grounding?
• Are load types and short circuit impedances considered in grounding calculations?
• Do you have the analytical tools needed to evaluate inverter-based DER protection
requirements?
• What is your experience with MV arrester failures? Were events associated with DER
GFOV?
• Are you familiar with the new IEEE Std C62.92.6 addressing effective system grounding
with inverters?
The interviewed utilities were composed of 6 utilities from New York and 14 from other areas of
the United States and Canada. Although DER-related supplemental grounding objectives and
concerns were found to be very similar, individual utility practices varied. Practices reflected
differences in system protection philosophies, feeder characteristics, and consideration for
characteristics of inverter-based DER. Experience in connecting large inverter-based plants
ranged from significant to very limited. Utility practices related to inverter-based DER generally
fell into 4 categories:
1. Require Supplemental Grounding – 13 of 20 utilities required at least some DER
installations to provide a ground source. The threshold of their requirement was typically
around 500 kVA and ranged from 250 to 1000 kVA.
2. Require and Actively Re-evaluating – 4 of the 13 utilities requiring grounding indicated
they were considering relaxing this requirement for inverters-based resources based on
IEEE Std C62.92.6 and EPRI research findings.
3. Don’t Require – 7 of 20 utilities did not require supplemental grounding for inverter-
based DER.
4. Don’t Require and Don’t Allow – 2 of the 7 utilities that do not require supplement
grounding prohibit inverter-based DER from adding a supplemental ground source.
With increasing numbers of DER interconnections, there was also motivation for new practices.
Other technical points related to the implementation and specification of supplemental ground
sources for inverter-based DERs are summarized below.

5
Utility Grounding Practices for Distributed Inverter-Based Resources. EPRI, Palo Alto, CA: 2020. 3002018653.

3-1
• Most utilities requiring supplemental grounding were flexible in interconnection
transformer configurations. These included (medium voltage (MV):low voltage (LV)):
o Yg:Yg grounding transformer connected to LV side
o ∆:Yg with a grounding transformer on MV side
o Yg:∆ usually with a neutral reactor to limit I0 or reduced size if used for supplement
grounding
o Zig-Zag configuration specifically for supplement grounding
• Utilities usually require supplemental grounding based on DER size and specify its zero-
sequence impedance (Z0) and X/R to achieve effective grounding.
o Using IEEE Std C62.92.1-2000 (for synchronous machines), effective grounding was
defined as: Ratio of X0/X1 is positive and ≤ 3 and R0/X1 is positive and <1.
o There was uncertainty and lack of agreement on impedance values to use for
inverters.
o Several utilities surveyed used sequence component ratios more appropriate for
synchronous machines, for example X0 = 0.6 p.u. and X0/R0>4.
o IEEE Std C62.92.6-2017 addresses grounding for inverter-based DER and four
utilities were considering updating their practices to follow the calculation guidelines
(symmetrical component) in the standard.
o Since commercial tools are not available for the symmetrical component analysis,
spreadsheet analysis was being used.

Ongoing Grounding Practices Discussion


As DER grounding research continued in 2020, several additional utility polling sessions were
conducted by EPRI to further inform system grounding discussions. The results indicate several
areas where research has influenced utility thinking on the specification of DER interconnection
transformers and ground sources. Electromagnetic transient (EMT) modeling of DER
overvoltage scenarios also has provided insight into inverter behaviors, the importance of load,
and the role of the interconnection transformer connections.
Figure 3-1 identifies the primary issues that were identified during a July 2020 EPRI webinar by
roughly 50 utilities for selecting one transformer topology over another. Results show that, along
with open phase detection, the main concern was GFOV. These concerns are expected to be the
main drivers of DER interconnection mitigation requirements and costs.

Others 18%
Detection of MV feeder open phase conditions 57%
Ferroresonance 35%
Open phase overvoltage 45%
Ground fault overvoltage 65%
0% 10% 20% 30% 40% 50% 60% 70%

Figure 3-1
Issues and concerns for specification of DER interconnection transformers

3-2
Most utility distribution feeders in North America comprise a 4-wire, multi-grounded
configuration. As indicated in the transformer selection poll result shown in Figure 3-2, the
Yg:Yg configuration is the most common DER transformer interconnection. Other
configurations are also used depending on MV configuration, concern for effective grounding,
and the other issue described above. The key takeaway is that there is not a single best option for
connecting DERs.
DER grounding configuration is also an important factor in the selection of the interconnection
transformer. For example, the popular Yg:Yg connection passes through the zero sequence but
does not act as a MV ground source. Nearly all 3-phase inverters deployed today have no neutral
connection and are not grounded. One-fifth of polled utilities indicated that they require the Yg:Δ
configuration for many DER applications. Where Yg:Δ is used, utilities indicated that a neutral-
to-ground impedance is required or specified. Both the Yg:Δ and addition of a supplemental
grounding transformer can provide a ground source from the grid side, as discussed in Chapter 2.

60%

50%
49%
40%

30%

20%
20%
10% 17%
6% 8%
0%
Yg/Yg Yg/Delta Yg/Y Delta/Yg Others

Figure 3-2
Utility preferences for DER interconnection transformers

Figure 3-3 shows another DER interconnection transformer preference on specification of MV


compared to LV side. Responses indicated that there may be less interest in the LV winding
configuration, which is sometimes the developer’s choice. This approach is not recommended
because both windings need to be considered to define DER response for open phase and fault
responses.

Don't know 11%

Others 20%

No, we only specify the MV-side… 20%

No, but we specify the detailed… 37%


Yes (no cost to DER owner) 3%

Yes (DER owner pays) 9%

0% 5% 10% 15% 20% 25% 30% 35% 40%

Figure 3-3
Responsibility for customer-owned DER transformer connections

3-3
It is important for utilities to specify both the MV and LV winding configuration that is
consistent with the utility protection philosophy. Moreover, given the preponderance of non-
utility owned DER installations, it is again recommended that utilities specify the transformer
winding configuration.
Feedback was also obtained on the state of analytical tools available to support utilities in
reviewing DER interconnections. There is widespread agreement that better tools are needed.
Relevant polling comments include:
 Short-circuit analysis tools (e.g., Aspen, Cape) are effective for evaluating scenarios
when DER is connected to the grid. Islanded, not grid, behavior is what drives grounding
requirements.
 Utilities aiming to apply IEEE Std C62.92.6 in calculations for inverters are having to
using ad hoc tools (e.g., spreadsheets, hand calculations). There is not a good way to
address cases where aggregations of single-phase DERs may pose grounding concerns.
 GFOV scenarios and sequence behavior of inverters needs to be defined and further
characterized.
 Analytical methods are needed to support application and sizing of grounding
transformers for inverter-based DERs, including how to consider load contribution to
system effective grounding.
 Any new practices and procedures need to be vetted with utility protection engineers.

Applying Research Results to Grounding Decisions


To improve understanding of industry DER ground sourcing practices, EPRI held a series of
utility virtual workshops in the fall of 2020.6 During these workshops messaging of the issues
was refined based on available knowledge. As most DER interconnections today are inverter-
based the industry approach has been to go with a best estimate of behavior and identify areas
where future research is needed.
During the workshops, there was a lot of agreement that analytics and tools for evaluating
islanded inverter-based DER grounding issues are not well developed. Given the fundamental
differences between inverter-based and synchronous machine DERs, analytical methods are still
evolving. A key detail relative to analytical methods is to address behavior after the main grid
connection is lost, as this result is completely different from typical utility system dynamics.
Specific issues considered in the workshops included determination of inverter and response to
grid faults, island overvoltage, and the role of other system components, such as surge arresters.
Meanwhile identified objectives of related research were to predict transient over-voltage (TOV),
including the combination of GFOV plus inverter characteristic load-rejection overvoltage
(LRO). Figure 3-4 and Figure 3-5 present utility workshop responses and accompanying comments
to questions about DER review procedures and approaches for mitigating GFOV risk.
Workshop Comments (w.r.t. DER Review Procedures)
 We use Excel tools that consider assumptions of the DER impedances to predict
contribution.

6
EPRI convened three 2-hour DER grounding workshops on Sept 2-11, 2020, with approximately 50 utilities.

3-4
 Typically, we apply ground referencing for DER ~100kW, but we are looking to modify
criteria for customer sited DER, and to consider load with some margin in load/gen ratio.
Workshop Comments (w.r.t. GFOV Risk Mitigation)
 We run the calculation in C62.92 to see if the system is effectively grounded, if not a
grounding transformer would be required.
 Each DER provides their fair share of ground referencing. As you progress to high DER
integration levels, we expect the needed ground referencing will be in place.

60%
50%
50% 43%
40%
29%
30%

20%

10% 7%

0%
screening/ratios studies other analytical all of these
tools

Figure 3-4
What technical review procedures are relied on for DER protection issues

other 14%

consider L-N loads for inverter DER (C62,92,6) 29%

fast DTT (prior to island) 21%

typical DTT 14%

added grounding (COG <.8) 43%

load to gen ratio 57%

0% 10% 20% 30% 40% 50% 60%

Figure 3-5
Identify practices to prevent GFOV with increasing penetrations of DER > 1MW

These results indicate that research is beginning to pay off in providing more options and
expanding understanding. The growing usage of C62.92.6, shown as being selected by 29% of
respondents in Figure 3-5, is a good indicator. EPRI study indicates 33% and above L-N loads can
sufficiently mitigate GFOV, and the poll result in Figure 3-6 shows a good acceptance of it
already (38%). Also, recognition of effective grounding as a systems issues and consideration of

3-5
aggregated load to generation are practices borne out from ongoing research. Although, the ratios
used continue to be more conservative than studies indicate are necessary, as shown in Figure 3-7.
For example, from 1 to 3 times more load than generation required to alleviate overvoltage
concerns.

50% 46%
45%
38%
40%
35%
30%
25%
20% 15%
15%
10%
5%
0%
yes no not sure

Figure 3-6
Will you consider using 33% L-N load as sufficient criteria with regard to OV concerns?

45% 42%
40%
35%
30%
25%
25%
20% 17%
15%
10% 8% 8%

5%
0%
0%
3/1 2/1 1/1 it varies don’t know other

Figure 3-7
Min load to gen (1 MW plants) ratios for OV concerns

Another area that utilities shared their experiences was related to the side effects of adding
ground sources. During the workshops, considerations related to over grounding were identified
and discussed. As indicated in Figure 3-8, the need to re-coordinate protection was a significant
consideration.

3-6
60%

50%
57%
40%

29%
30%

20%

10% 7% 7%

0%
don’t add grounding yes no don’t know

Figure 3-8
If adding supplemental grounding, have you seen a need to re-coordinate protection?

Utility Practices Summary


Grounding practices and requirements for DER connection are evolving because of inverter
technologies. As a result, inverter-based DERs are currently being treated inconsistently among
utilities and jurisdictions. The fundamental differences between inverter-based and synchronous
machine generation is being recognized by utilities. The impact on traditional system grounding
practices and guidelines is also gradually evolving. Research on inverter behavior and its
aggregate influence on temporary overvoltage during ground faults can provide better
understanding of the key issues and is leading to more consistent utility practices

3-7
4
TRANSIENT ANALYSIS AND LAB TEST RESULTS
Electromagnetic Transient Program (EMTP) Simulations
To estimate inverter based DER overvoltage, simulations were performed under a full range of
operating conditions. The combined ground fault overvoltage (GFOV) and load rejection
overvoltage (LROV) were investigated. Variables included gen/load ratio, with and without
supplemental grounding and changing the inverter trip parameters from IEEE Std 1547-2003
compared to 1547-2018.
It is worth mentioning that these simulation results are specific to the inverter, load, and feeder
models used, as well as the system configurations and operating conditions assumed. They will
likely change when any of the system and/or inverter parameters vary. Additionally, for all
simulated cases, the overvoltage analysis and protection mechanisms were based on the phase-
to-neutral voltage.
The circuit used in simulation is shown in Figure 4-1, where the transmission system was
represented as a stiff bus with an equivalent impedance. A generic inverter model with 1 MW
power generation and unity power factor is simulated. It is connected to the 4-wire grid via a
Yg/Yg interconnection transformer, if not specified otherwise. In some cases, a supplemental
grounding transformer adjacent to the DER is included in the model (not shown in the figure and
described in more detail later in this section).
For simplicity, the simulated load is resistive and balanced. Load is connected in both delta and
Y configurations to show differences in simulation results, with and without ground faults. Note
a load step-down transformer is not simulated, load is treated as if directly connected to MV.
Line to neutral connected load acts as a system ground source, with 1 p.u. impedance. Delta-
connected loads do not act as a ground source. More complicated, unbalanced, as well as non-
unity power factor loads such as motors, are material for a future study.

breaker
FS 1 FS 2 FS 3

Substation DER transformer Solid SLG


Transmission Transformer fault
arrester 12.47kV/385V
Equivalent 120kV/12.47kV 1MVA Load
47MVA

1MW PV plant

Figure 4-1
Test circuit in simulation study

Directly connecting the load removes the additional complexity to model load transformers with
different winding configurations. The simulations do cover various and commonly used DER
interconnection transformer configurations. Note, three phase line to neutral connected loads,
although balance in these simulations, could be connected as many single-phase service

4-1
transformers with load at different locations on the feeder, such as in residential neighborhoods
and in rural areas. Other, less common, service connections are not considered here and could
result in different levels of load participation as a ground source.
A single 7.7 kV heavy duty arrester (MCOV of 8.4 kV and joules per kV is 2.2) was placed at
the point of common coupling (PCC), with an IV characteristic shown in Figure 4-2. In most
practical situations, a substantial number of surge arresters will be connected to the phases and
will, to some degree, share energy duty. Location of the arresters along the distribution feeder on
the open phases has little impact due to the low-frequency characteristic of arrester discharge
current during TOV. For this reason, there is sharing of energy during the overvoltage. However,
due to the extreme non-linearity of the metal oxide arresters and the inherent variability of
arrester voltage-current characteristics, sharing is not balanced.

Figure 4-2
IV characteristic of emulated arrester (note voltage is kVpeak)

Nevertheless, the energy duty imposed on the most-affected arrester is likely to be less than that
to which the single arrester, modeled in the simulations, is subjected. Since sharing among
multiple arresters was not directly addressed in the simulation, an arrester energy higher than the
single published limit (17 kJ) does not necessarily mean arrester failures in practice. Arrester
sharing of power frequency overvoltages is an important consideration, as discussed in chapter 5
of this report, addressing equipment susceptibility to OV.
It is important to note, the published arrester energy capabilities pertain to a higher-current,
shorter duration switching surge test waveform and this energy capability does not necessarily
apply accurately to TOV duty.
The grounding transformer (GT) used in several scenarios had X0 = 0.6 p.u. and X/R = 4. These
parameters were commonly used by utilities but are shown to be not optimal for inverter-based
DER.
In the inverter model, no negative sequence control was implemented and the inverter negative
sequence impedance (Z2-inv) was induced by its “natural response”. This is illustrated in Figure
4-3, where the Z2-inv is around 0.26 p.u. and mainly resistive. Here current following out from the
inverter was defined as positive following generator convention. To model inverter negative
sequence as an impedance, load convention needs to be used and therefore the phase angle here
should be reversed (e.g., 173° instead of -173°).

4-2
1

0.8 X

Y
12.19

0.7617
Base voltage: 480/277 V
Base power: 1 MW
0.8

0.6

0.6 Base impedance: 0.2304


X 50
0.4
Sequence voltage (pu)

Zneg (pu)
Y 0.2999
X 40
0.4 X 20 X 30.01 X 39.96
Y 0.1999
X 30 Y 0.2597 Y 0.2615 Y 0.2676
0.2
X 20.02
Y 0.09995
Y 0.04999 0.2 X 50

Y 0.2754
0

1.2 Y 1.089 50

1
X 40 0

Y 0.747
0.8

-50

0.6
X 30
Sequence current (pu)

Angle-Zneg (degree)
Y 0.3821
-100
0.4 X 20.04

Y 0.1924
X 19.94 X 40.03 X 50
0.2
-150 Y -172.4 Y -171.7
Y -173.2

0
X 29.85
-200

10 15 20 25 30 35 40 45 50 10 15 20 25 30 35 40 45 50

t/s t/s

Figure 4-3
Negative sequence impedance of inverter model used in simulation

To extend the inverter trip time and better investigate the inverter response to GFOV and LROV,
IEEE 1547-2018 Category II extended trip settings, as shown in Table 4-1, were used.
Additionally, the inverter was assumed to have internal self-protection for overvoltage (SPOV)
that protects the power switches against damaging transients.
Table 4-1
IEEE 1547-2018 Category II extended trip settings

Element Default Pickup Value Pickup Value Used Default Time Delay Time Delay Used
Undervoltage 0.45 pu 0.45 pu 0.16 sec 1 sec
Undervoltage 0.7 pu 0.7 pu 10 sec 10 sec
Overvoltage 1.1 pu 1.1 pu 2 sec 2 sec
Overvoltage 1.2 pu 1.2 pu 0.16 sec 0.16 sec
Underfrequency 56.5 Hz 56.5 Hz 0.16 sec 0.16 sec
Underfrequency 58.5 Hz 58.5 Hz 300 sec 300 sec
Over frequency 61.2 Hz 61.2 Hz 300 sec 300 sec
Over frequency 62 Hz 62.5 Hz 0.16s 0.16 sec

Inverters self-protection (SPOV) behaviors vary between manufacturers and are difficult to
confirm. For purposes of this study a pick-up level of 2 p.u. and a time delay of .0016 seconds
were used. From experience these are believed to be conservatively robust and appropriate for
the simulation to predict the higher end self-protection levels. Inverter on-board islanding
detection function was disabled, and no other feeder level protection was considered. These
settings were intentionally chosen to analyze the worst-case scenario.

4-3
Inverters that meet temporary overvoltage limits, as newly defined in standard IEEE 1547-2018 7,
were simulated to determine how the limit may affect GFOV and LROV. The effectiveness to
limit overvoltage magnitude and duration is examined in different simulation scenarios.
Simulation results are provided in the following sections. They focus on the impact of gen/load
ratios, supplemental grounding, load connection configuration, interconnection transformer
windings and with/without the new IEEE 1547 TOVP requirements.

Overvoltage Sensitivity to Generation/Load Ratios


Load Rejection Overvoltage (no ground fault)
In this simulation there was no ground fault emulated and the overvoltage was exclusively
caused by power generation exceeding load after grid disconnection (island formation). Peak
overvoltage, trip time and arrester energy, without and with transient overvoltage limit/protection
(TOVP) are provided in Figure 4-4 and Figure 4-5.
As the generation to load ratio grew, the peak overvoltage increased until the arrester starts to
conduct (at a ratio of around 2.5, as indicated the reduction in rate of voltage rise). When load
exceeded generation, the voltage fell below 1 p.u., and continued dropping as load increased.
The high-side voltage was slightly lower than the LV side due to the voltage drop from the
transformer impedance.
Peak voltage typically occurred during the first several cycles, and thus the fast TOVP trip did
not have significant impact on the peak voltage. As shown in Figure 4-5 higher voltage
contributed to much shorter trip times at high gen/load levels (green curve). Otherwise DER trip
time was at least 160 ms (blue curve) with the trip settings in Table 4-1. Note that the DER was
tripped by over-frequency protection when gen/load ≤ 1.1. In this case reactive power mismatch
within the islanded area was induced by line impedance. Arresters started to operate when
gen/load ≥ 4, and due to the relatively low peak overvoltage, the arrester energy stayed below 0.2
kJ for all cases.

7
IEEE 1547-2018, “Standard for Interconnection and Interoperability of Distributed Energy Resources with
Associated Electric Power Systems Interfaces”. Clause 7.4.2 - Limitation of cumulative instantaneous overvoltage
“The DER shall not cause the instantaneous voltage on any portion of the Area EPS to exceed the magnitudes and
cumulative durations shown in Figure 13. The cumulative duration shall only include the sum of durations for
which the instantaneous voltage exceeds the respective threshold over a one-minute time window.”

Figure 13 An example of the cumulative duration

4-4
No TOVP With TOVP
1.7 1.7
1.60 1.59
1.6 1.55 1.6 1.56
1.50
1.57 1.58
1.5 1.53 1.5 1.43
1.55
1.38
1.4 1.46 1.4 1.43
Peak voltage (pu)

Peak voltage (pu)


1.31
1.38
1.3 1.3
1.18 1.30
1.2 1.2 1.14
Load ≥ 1.1 1.17
1.1
1.02 1.14
generation 1.01

0.93
1 Load ≥ 1
1.01 0.93
generation 1.00
0.86 0.9 0.87
0.83 0.83 0.9
0.89 LV 0.90 LV MV
0.84 0.8 MV 0.84 0.8
0.80 0.80
0.7 0.7
0.1 1 10 0.1 1 10
Gen/Load ratio Gen/Load ratio

Figure 4-4
MV and LV side peak voltage as gen/load ratio varies, without (left) and with (right) TOVP, and no
SLG fault

Trip time (ms) Arrester energy (kJ)


350 0.18
Frequency Trip
287.5 0.16
300
279.2
266.5
285.5 0.14
250 268.0
Voltage Trip 0.12
Arrester energy (kJ)
Trip time (ms)

200 174.5 0.1


167.6 166.1 165.5
176.5 0.08
150

0.06
100 TOVP
0.04
No TOVP 50 No TOVP
59.8 0.02
With TOVP With TOVP
27.1 23.7
0 0
0.1 1 10 0.1 1 10
Gen/Load ratio Gen/Load ratio

Figure 4-5
Trip time (left) and arrester energy (right) as gen/load ratio varies, and no SLG fault

Combined LRO and GFO (with ground fault)


When a SLG fault remains or occurs during islanding, the peak voltage was created by both
neutral shift and load rejection, i.e. GFO + LRO, and was much higher than that with only LRO,
as shown in Figure 4-6. Note that 100% of the load in this case was ungrounded (delta
connected) and therefore provides no supplemental grounding effect. This represents the worst
case, rarely encountered on four-wire feeders. The peak voltage dropped as load increased and
stayed below 1.38 p.u.8 When gen/load ≤ 0.67, even without supplemental grounding or

8
In a situation where the phase-to-phase voltage remains constant during a fault, a voltage magnitude of <1.38
p.u. on the unfaulted phase implies effective grounding. However, with inverter sources, the phase-to-phase
voltage once islanded is a function of the gen/load ratio and thus there is a combination of LROV and GFOV.
Therefore, a voltage magnitude greater than 1.38 p.u. cannot be the basis for determining if effective grounding is
present. Because insulation systems and surge protection on a four-wire multi-grounded wye feeder are designed

4-5
grounded load. TOVP still did not help much on the peak overvoltage mitigation, but it enabled
much shorter trip time and thus lower arrester energy when gen/load ≥ 1 (Figure 4-7).
When TOVP was absent, the highest arrester energy occurred at gen/load = 2.5 without TOVP,
because of the coincidence of high voltage and long trip time. SOVP served in a similar way as
TOVP at high gen/load ratios and enabled short trip times. Lower trip threshold of SOVP could
ensure faster DER trip during overvoltage conditions, as illustrated in Figure 4-8, but has higher
risk of nuisance tripping.
No TOVP With TOVP
2.1 2.1

1.9 1.85 1.85 1.9 1.85 1.85


1.81 1.81
1.75
1.71 1.71 1.73
1.66 1.66
1.7 1.7
Load ≥ 1.72 1.74 1.75 Load ≥ 1.72 1.74 1.74

Peak voltage (pu)


Peak voltage (pu)

1.69
1.66 1.66 1.68
generation 1.63 generation 1.63
1.5 1.5
1.33 1.33
1.3 1.3
1.16 1.29 1.16 1.29
1.08 1.08
1.1 1.1
1.11 1.11
1.03 LV 1.03 LV
0.9 0.9
MV MV
0.7 0.7
0.1 1 10 0.1 1 10
Gen/Load ratio Gen/Load ratio

Figure 4-6
MV and LV side peak voltage as gen/load ratio varies, without (left) and with (right) TOVP, when
SLG fault presents

Trip time (ms) Arrester energy (kJ)


300 45
Frequency 277.4
39.0
Trip 277.5 40
250
35

200 30
Arrester energy (kJ)

178.7 169.5
Voltage
Trip time (ms)

164.8 24.3
25
150
169.7 169.2
Trip
18.9
20

100 15 13.3 13.2


SOVP
55.2
10
50 TOVP 33.2
4.4
No TOVP 27.6 No TOVP 3.3 3.7
5 2.7 2.6
1.5
With TOVP 29.2 26.2 With TOVP 0.0 0.0 0.0 0.5
0 16.1 11.4 10.7 0
0.1 1 10 0.1 1 10
Gen/Load ratio Gen/Load ratio

Figure 4-7
Trip time (left) and arrester energy (right) as gen/load ratio varies, when SLG fault presents

on the basis of effective grounding with a voltage source (the substation), a 1.38 p.u. unfaulted-phase overvoltage
criterion is a useful threshold for evaluation of results.

4-6
SOVP Trip threshold of 2 pu SOVP Trip threshold of 1.5 pu

Tripped
169.4 ms by SOVP
Tripped by 17.9 ms
overvoltage protection,
not SOVP

Figure 4-8
Impact of self-overvoltage protection

Transformers and Loads as Ground Sources


In Figure 4-9 and Figure 4-10, a SLG fault persisted while the load/gen ratio remained at 1, i.e.,
only GFO and no LRO involved 9. The load was partially grounded and percent of grounded load
(Yg load) varied from 0% to 100%. In general, grounded load contributed to lower GFO. TOVP
reduced inverter trip time and arrester energy when most of loads were delta connected, while
such contribution was not clear when majority of loads were grounded due to the less severe
overvoltage.
1.7 1.66
1.63

1.6 1.63
1.59 1.52

1.5
Peak voltage (pu)

1.50 1.42

1.4
1.40 1.33
1.30
1.29
1.3 1.27
1.31 1.25
1.27 1.21 1.27
LV 1.18 1.25
1.2 1.23
1.20
MV 1.17
1.1
0% 20% 40% 60% 80% 100%
Percent of Yg load (%)

No TOVP With TOVP


Figure 4-9
MV and LV side peak voltage as percent of grounded load varies, without (left) and with (right)
TOVP, when SLG fault presents and gen/load = 1

9
Because the inverter seeks to inject a constant balanced 3-phase power, however on the faulted phase with
depressed voltage power is reduced cannot be transmitted on the faulted phase, the inverter controls tend to
increase the current on the unfaulted phases to compensate. The current is only increased to the inverter’s current
limit, however, and thus the LRO effect at load/gen = 1 is limited.

4-7
Trip time (ms) Arrester energy (kJ)
300 5

4.5
250
4
Frequency
Voltage Trip Limit Trip Limit 3.5
200

Arrester Engery (kJ)


3
Trip time (ms)

150 2.5

2
100 No TOVP
1.5 With TOVP
TOVP
No TOVP 1
50
With TOVP
0.5

0 0
0% 20% 40% 60% 80% 100% 0% 20% 40% 60% 80% 100%
Percent of Yg load (%) Percent of Yg load (%)

Figure 4-10
Trip time (left) and arrester energy (right) as percent of grounded load varies, when SLG fault
presents and gen/load = 1

Figure 4-11 and Figure 4-12 give the impact of supplemental grounding (through a grounding
transformer, GT) and grounded load, when both GFO and LRO were involved. In this study,
load was either 100% delta connected or 100% grounded (Yg), and TOVP was activated. Similar
as the previous case, both GT and grounded load reduced the peak voltage, and grounded load
(green curve) showed relatively higher effectiveness than GT (blue curve) on overvoltage
reduction when gen/load ≤ 3. Therefore, the benefits provided by supplemental grounding may
not be worth the adverse system protection impacts and cost when sufficient grounded load
exists.
The lower voltage enabled by GT and/or Yg load, on the other hand, extended the trip time. The
arrester energy, as the time integral of arrester voltage (MV side), reduced with the ground
source provided by GT or Yg load. TOVP prevented long-lasting overvoltage for most of
simulation cases, and the arrester energy stayed below 4 kJ.
1.9 1.85 1.85 1.9
1.83
1.81
1.8 1.76 1.8
1.73 1.73 1.74 1.74
1.71 1.72 1.72
1.69 1.68 1.69
1.7 1.66 1.74 1.7 1.64
1.66 1.67
1.63
1.66
Peak voltage (pu)

Peak voltage (pu)

1.6 1.63 1.6


1.57
1.5 1.5
1.47
1.4 S2A - No GT, delta load 1.4 S2A - No GT, delta load
1.41
S2B - No GT, Yg load S2B - No GT, Yg load
1.3 1.34 S2C - With GT, delta load 1.3 S2C - With GT, delta load
S2D - With GT, Yg load 1.29
S2D - With GT, Yg load
1.2 1.2
1.22
GT: X0 = 0.6 p.u. and X/R = 4 1.17 GT: X0 = 0.6 p.u. and X/R = 4
1.1 1.1
1 10 1 10
Gen/Load ratio Gen/Load ratio

Figure 4-11
LV (left) and MV (right) side peak voltage as gen/load, and/or grounding means (through grounded
load or grounding transformer (GT)) vary, when SLG fault presents

4-8
Trip time (ms) Arrester energy (Kj)
300 Frequency Trip 4 3.7
S2A - No GT, delta load GT: X0 = 0.6 p.u. and X/R = 4 3.3
3.5
250 S2B - No GT, Yg load 3.0
3 2.8
S2C - With GT, delta load 2.7 2.6
S2D - With GT, Yg load
200 2.5

Arrester energy (kJ)


2.1
Trip time (ms)

Voltage Trip
2
150 1.5
TOVP 1.5
0.9
100 1
0.5
S2A - No GT, delta load
0.5
50 S2B - No GT, Yg load
0 S2C - With GT, delta load
29.228.3 27.6 26.9 26.2 1
25.3 S2D - With GT, Yg load 10
0 16.1 11.9 11.4 10.7 -0.5
1 Gen/Load ratio 10 Gen/Load ratio

Figure 4-12
Trip time (left) and arrester energy (right) as gen/load, and/or grounding means (through grounded
load or grounding transformer (GT)) vary, when SLG fault presents

To sum up, transient overvoltage can be induced by SLG fault or load rejection, and the worst
case occurs when the islanded system is not effectively grounded and has no load. The transient
overvoltage protection (TOVP) implied by IEEE 1547-2018 can significantly reduce the trip
time and arrester energy at high overvoltage conditions. TOVP does not help much on peak
overvoltage reduction. The grounding transformer and grounded load both help to mitigate
GFOV and thus relieve arrester stress. For cases with low gen/load ratio (high loading
conditions), grounded load is more effective than the grounding transformer on overvoltage
mitigation.

Different Interconnection Transformer Configurations


Example Waveforms (With Yg/Yg or ∆/Yg Transformer)
The interconnection transformer effects the voltage the LV side (inverter terminals) compared to
the MV side. This affects the inverters GFOV response as well as trip times once an overvoltage
is detected. Figure 4-13 and Figure 4-14 compare the MV and LV side voltage waveforms when
Yg/Yg or ∆/Yg transformer were used. For both cases, there was no load in the islanded area,
SLG fault occurred at 5.4 s, and breaker opened (island formed) at 5.5 s (after 6 cycles of the
fault occurrence). In this section and hereafter, transformer configurations are defined as the
grid-side medium voltage listed first and followed by DER-side, as MV/LV. Other conventions
may list the generator side of a step-up transformer first, but not here.

4-9
Island forms Inverter trips Island forms Inverter trips
LV phase voltage (pu) MV phase voltage (pu)

1.853 pu 1.766 pu

MV line voltage (pu) RMS MV phase


voltage (pu)

SLG fault occurs at 5.4s, island forms at 5.5s


9.5 ms by TOVP

Figure 4-13
Simulated phase-to-ground and line-to-line voltage with persistent SLG fault and Yg/Yg
interconnection transformer

1.753 pu
1.861 pu

LV phase voltage (pu) MV phase voltage (pu)

RMS MV phase
voltage (pu)

MV line voltage (pu)

60.5 ms
Island forms Inverter trips by TOVP

Figure 4-14
Simulated phase-to-ground and line-to-line voltage with persistent SLG fault and ∆/Yg
interconnection transformer

After the island formation, the SLG fault caused unbalanced phase-to-ground voltages (Vph) at
both LV and MV side for the case with a Yg/Yg transformer. In response to the high
overvoltage, inverter was tripped after 9.7 ms by TOVP. The delta connection of ∆/Yg
transformer, on the other hand, blocked the zero-sequence path, and “masked” the faulted phase
voltage at the LV side, making the GFOV less severe to the inverter. 10,11 The distortions around
peak voltage were caused by the arrester operation, leading to a voltage spike with peak of 1.861
pu. The inverter tripped after 60.5 ms also by TOVP. The nearly balanced phase voltage at LV

10
Impact of Interconnection Transformer Configuration on DER Operation. EPRI, Palo Alto, CA: 2020. 3002019423.
11
If the Reference Point of Applicability (RPA), as defined in IEEE 1547-2018, is on the MV side, then the DER
owner is responsible for meeting the TOV limits even if the inverters cannot sense the overvoltage. Other
measures to achieve this performance will be necessary, such as providing MV-side potential transformer outputs
to inverters.

4-10
side and shifted neutral at MV side led to quite balanced MV line-to-line voltage (Vll) but
elevated MV phase voltage (Vph) on the unfaulted phases.
Results without Fast Trip (TOVP) Activated
To identify the overvoltage risk for existing/installed DER, the TOVP implied by IEEE 1547-
2018 was deactivated for these simulations. Figure 4-15 shows the impact of transformer
winding and load connection on the MV side phase-to-ground voltage. Among the studied
transformer configurations, Yg/∆ (Yg/d) without a neutral impedance has the lowest voltage
regardless of the load connection and gen/load ratio, due to the high degree of grounding it
provided.12 The other three transformer configurations introduced very similar MV side voltages.
Grounded load reduced MV side overvoltage but its effect dropped as gen/load ratio increased
(less load).
Delta connected load Yg connected load
1.8 1.70 1.71 1.72 1.73 1.8 1.70 1.72
1.66 1.67 1.69 1.64
1.601.63
1.58
1.6 1.6 1.49

Average Peak Vph-MV (pu)


Average Peak Vph-MV (pu)

1.4 1.4
1.17
1.2 1.2
0.98
1 1.14 1 1.12
1.07 1.04
1.02
0.96
0.8 0.89 0.8 0.90
0.79 0.83 0.78
0.720.75
0.6 0.69 0.6 0.70
0.64
0.4 0.4
1 Gen/Load ratio (log scale) 10 1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-15
Average Peak MV side, Y and Δ connected load, various transformer connections and no TOVP

The LV side phase-to-ground voltage is given in Figure 4-16. The average peak overvoltage, i.e.,
the peak voltage averaged over the run-on-time (ROT, time between island forms and DER
inverter ceases to energize or trips) is provided to include both information. With Yg/Y and ∆/Yg
(d/Yg in the figures below) transformers, the MV side overvoltage was “masked” and became
less severe on the LV side. Same as at the MV side, the overvoltage was highest with Yg/Yg
transformer and lowest with Yg/∆ (Yg/d). Additionally, grounded load reduced LV side
overvoltage at low gen/load levels (more load).
Since an inverter makes trip decisions based on its terminal voltage (unless auxiliary inputs such
as MV-side potential transformer inputs are provided) 13, the trip time was affected by the

12
Yg/delta transformers, without a neutral impedance, are problematic to apply, and rarely allowed, on
distribution feeders because of the excessive grounding they provide. These transformers are prone to overloading
due to ordinary feeder voltage imbalance, are subjected to frequent severe current duty as a result of feeder
ground faults, and can greatly diminish the sensitivity of feeder ground fault protection. For these reasons, when
these transformers are used, they typically have a neutral-to-ground impedance added to limit the grounding
provided.
13
Such inputs are not commonly provided on inverters, but may become necessary to achieve IEEE 1547-2018
compliance for inverters installed using ∆/yg transformers (or other transformers blocking zero sequence
continuity) if the transformer is not utility owned but rather provided by the DER owner.

4-11
transformer configuration and load connection, as shown in Figure 4-17. Due to the high LV side
voltage, a Yg/Yg transformer enabled the fastest inverter tripping by overvoltage protection. For
other transformer types, the inverter trip time was similar, except at very high gen/load ratios. In
addition, the frequency trip was triggered at most conditions, because of the reactive power
mismatch and low overvoltage at the LV side. Grounded load reduced the LV side overvoltage
and tended to increase the inverter trip time.
Delta connected load Yg connected load
2 2
1.77 1.78 1.80 1.81 1.76 1.80
1.8 1.69 1.70 1.73 1.8
1.631.67
1.61
1.67
1.56
Average Peak Vph-LV (pu)

Average Peak Vph-LV (pu)


1.6 1.6 1.49 1.51
1.43
1.34 1.37
1.4 1.27 1.4
1.21 1.40 1.21 1.20
1.2 1.061.11 1.16 1.2 1.35
1.02 1.24 1.29 1.03
0.97 1.21 0.99 1.20 1.24
1 1.10 1.14 1.16 1.12 1 1.11
0.991.031.07 1.04 0.83 1.01 1.01
0.8 0.97
0.89 0.8 0.70
0.80 0.81 0.84
0.6 0.75 0.73
0.640.670.690.71 0.6 0.70
0.65
0.4 0.59
0.4
1 Gen/Load ratio (log scale) 10 1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-16
Average Peak LV side, Y and Δ connected load, various transformer connections and no TOVP
Delta connected load Yg connected load Frequency trip
300 Frequency trip 300

250 250

200 200
Trip time (ms)

Trip time (ms)

Voltage
150 Voltage trip 150
trip
100 Self-overvoltage 100
SOVP
protection (SOVP)
50 50

0 0
1 Gen/Load ratio (log scale) 10 1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-17
Trip times, Y and Δ connected load with various transformer connections and no TOVP

Figure 4-18 presents the corresponding arrester energy. The highest arrester energy occurred
with Yg/Y and ∆/Yg (d/Yg) transformers, because of the coincidence of high voltage and long
trip time. The Yg/Yg transformer, on the other hand, induced the highest overvoltage but shortest
trip time, thus lower arrester energy. In contrast, the LV side voltage was too low with Yg/∆
(Yg/d) transformers and arrester did not operate (i.e., zero arrester energy). Grounded load
helped reduce the arrester energy, except at very high gen/load ratios, where the arrester energy
increased due to the prolonged inverter trip time.

4-12
Delta connected load Yg connected load
100 92.9 100 91.0
90 90
76.9
80 71.6 80
67.0
Arrester Energy (kJ)

Arrester Energy (kJ)


70 62.9 70
60 51.6 60
50 40.9 50
40 30.6 40
30 21.9 39.0 30 22.5 34.9
20 14.6 31.3 29.2 20
7.5 24.3
10 18.6 18.9 10 0.0 0.8 0.2 15.6
13.3 13.2 13.2
0 8.8 0
4.4
1 Gen/Load ratio (log scale) 10 0.0
1 0.0 0.1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-18
Arrester energy, Y and Δ connected load with various transformer connections and no TOVP

Results with Fast Trip LV Sensing (Inverter side)


As expected, activating TOVP was found to have very limited impact on the peak MV and LV
side overvoltage, regardless of the transformer configuration. This is shown in Figure 4-19 and
Figure 4-20. The transformer connection type and generation to load ratios were the primary
determining factors of the average peak voltage.
No TOVP With TOVP
1.71 1.72 1.73
1.8 1.66 1.67 1.69 1.70 1.8 1.67 1.69 1.71 1.73 1.74 1.73
1.601.63
1.58 1.621.641.66
1.59
1.6 1.6
Average Peak Vph-MV (pu)

Average Peak Vph-MV (pu)

1.4 1.4

1.2 1.2

1 1.14 1 1.12
1.02 1.07 1.07
0.96 1.02
0.8 0.96
0.89 0.8 0.89
0.79 0.83 0.79 0.83
0.720.75
0.6 0.69 0.720.75
0.6 0.69

0.4 0.4
1 Gen/Load ratio (log scale) 10 1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-19
Average Peak MV side, with and without TOVP with various transformer connections

2 No TOVP With TOVP


2 1.85
1.78 1.80 1.81 1.83 1.85
1.77 1.78
1.8 1.691.70 1.73 1.8 1.69 1.71 1.72
1.631.67
1.61 1.631.65
1.56 1.59 1.55
Average Peak Vph-LV (pu)

Average Peak Vph-LV (pu)

1.6 1.6
1.43 1.43
1.4 1.34 1.34
1.27 1.4 1.27
1.21 1.40 1.22 1.40
1.16 1.17
1.2 1.11 1.29 1.2 1.12 1.29
0.971.021.06 1.21 1.24 1.02
1.07
1.21 1.24
1.14 1.16 0.98 1.14 1.17
1 1.10 1.12 1 1.11 1.10
0.991.031.07 1.04
0.991.031.07 1.04
0.97 0.97
0.8 0.89 0.8 0.89
0.80 0.80
0.6 0.670.690.710.75 0.6 0.71 0.75
0.64 0.630.650.68
0.4 0.4
1 Gen/Load ratio (log scale) 10 1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-20
Average Peak LV side, with and without TOVP with various transformer connections

4-13
On the other hand, Figure 4-21 and Figure 4-22 show that activating TOVP significantly reduced
the inverter trip time and the arrester energy when Yg/Yg transformer was used. This was not the
case for Yg/Y and ∆/Yg transformers, where high side overvoltage was “masked” at the inverter
terminals and implementing TOVP on the LV side did little to reduce the inverter trip time or
arrester energy, since it took actions based on inverter terminal voltages. Meantime, the Yg/∆
transformer enabled the lowest overvoltage and least arrester energy.
No TOVP With TOVP
300 300 Frequency Trip
Frequency trip
250 250

200 200
Trip time (ms)

Trip time (ms)


Voltage Trip
150 150
Voltage trip
TOVP
100 100
SOVP
50 50

0 0
1 Gen/Load ratio (log scale) 10 1 10
Gen/Load ratio (log scale)
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-21
Trip times, with various transformer winding connections, with and without TOVP

100 No TOVP 92.9 100


With TOVP 92.9
90 90
76.9 76.9
80 71.6 80 71.6
Arrester Energy (kJ)
Arrester Energy (kJ)

70 62.9 70 62.9
60 51.6 60 51.6
50 40.9 50 40.9
40 30.6 40 30.6
30 21.9 39.0 30 21.9
31.3 29.2 20 14.6
20 14.6
7.5 24.3 7.5
10 18.6 18.9 10 0.50.9 1.5 2.1 2.7 3.0 2.6 2.8 3.3 3.7
13.3 13.2
0 4.48.8 0
1 10 1 10
Gen/Load ratio (log scale) Gen/Load ratio (log scale)
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-22
Arrester energy, with various transformer winding connections with and without TOVP

Results with Fast Trip MV Sensing (feeder side)


IEEE 1547-2018 specifies a reference point of applicability (RPA) for requirements such as the
TOVP fast tripping. For example, in case of zero-sequence discontinuity between the DER units
(i.e., inverters) and the PCC, the RPA is at the PCC. This is to overcome masking of MV level at
the DER terminals. Therefore, for Yg/Y, ∆/Yg and Yg/∆ connected transformers, the RPA would
be at PCC. Applicability is on the MV side of the transformer (assuming the transformer is
owned by the DER owner and not the utility) and TOVP response is consequently based on MV
levels.
While this is the correct interpretation of IEEE 1547-2018, there has been little indication that
inverter OEMs have given consideration of this requirement, and capabilities for meeting this
requirement (e.g., remote potential transformer inputs to inverters) have not appeared on
currently-available inverters. This is a gap that will need to be filled in the near future, and

4-14
utilities need to be diligent in ensuring that the IEEE 1547-2018 requirements are met for DER
facilities with an MV-side RPA, particularly facilities with multiple inverters where it may not
be feasible to bring potential transformer secondary leads to each and every inverter. For
example, achieving MV-side TOVP (as short as 1.6 ms, 1/10 cycle at high voltage levels) via
MV relay activated circuit breaker may be difficult due to the time required for breaker
operation. Blocking the gate signals of inverter (cease to energize) could work but sending the
voltage or trip signal to each inverter may not be feasible.
In this simulation, the MV side voltage signal was sent to inverter for the TOVP implementation.
Due to the lack of field experience, we don’t know yet how this has been, or will be
implemented, in commercial inverters.
As shown in Figure 4-23 and Figure 4-24, transformer configuration presented similar impact on
MV and LV side overvoltage, regardless of TOVP location. With MV activated TOVP, the MV
side average peak voltage was only slightly reduced for all transformers. The difference being
voltage drop in the transformers.
LV side TOVP MV side TOVP
1.8 1.67 1.69 1.71 1.73 1.74 1.73 1.8 1.67
1.621.641.66
1.59 1.59
1.65
1.56
1.6 1.6 1.48
Average Peak Vph-MV (pu)

Average Peak Vph-MV (pu)


1.43
1.4 1.4

1.2 1.2

1 1.12 1
1.07 1.06
1.02 1.00
0.96 0.92
0.8 0.89 0.8
0.79 0.83 0.81
0.720.75
0.6 0.69 0.6 0.68 0.74

0.4 0.4
1 Gen/Load ratio (log scale) 10 1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-23
MV side average peak voltage with LV (left) or MV (right) side activated TOVP
LV side TOVP MV side TOVP
2 1.85 1.85 2 1.85
1.78 1.83 1.85
1.78
1.8 1.69 1.71 1.72 1.8 1.71
1.631.65
1.59
1.65
1.59
Average Peak Vph-LV (pu)

1.55
Average Peak Vph-LV (pu)

1.6 1.6
1.43 1.51
1.4 1.34 1.38
1.27 1.4 1.26 1.42
1.17 1.22 1.37
1.12 1.40
1.2 1.2 1.11
0.981.021.07 1.21 1.24 1.29 1.05 1.26
1 1.11 1.14 1.17 1.10 1 0.91
0.991.031.07 1.04 1.00
1.07 1.06
0.8 0.97 0.8 0.91 0.94
0.89
0.80 0.84
0.6 0.71 0.75 0.6 0.74
0.630.650.68 0.62 0.67
0.4 0.4
1 Gen/Load ratio (log scale) 10 1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-24
LV side average peak voltage with LV (left) or MV (right) side activated TOVP

The MV side activated TOVP significantly reduced inverter trip time for ∆/Yg and Yg/Y
transformers, as shown in Figure 4-25. In this case high MV side overvoltage was directly

4-15
utilized to assist inverter fast tripping, no longer “masked” by the transformer connection. The
fast inverter trip greatly reduced the arrester energy as in Figure 4-26.
LV side TOVP MV side TOVP
300 Frequency Trip 300 Frequency Trip
250 250

200 200
Voltage Trip

Trip time (ms)


Trip time (ms)

MV TOVP
150 LV TOVP 150

100 100

50 50

0 0
1 10 1 10
Gen/Load ratio (log scale) Gen/Load ratio (log scale)
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-25
Trip time with LV (left) or MV (right) side TOVP

100
LV side TOVP 92.9 7
MV side TOVP
6.2 6.2
90 5.7
76.9 6
80 71.6
70 62.9 5
Arrester Energy (kJ)

Arrester Energy (kJ)

60 51.6 4
50 40.9
3 2.8 3.7
40 3.3
30.6
30 21.9 2 2.7 2.6
1.3
20 14.6
7.5 1 1.5
10 3.3 3.7
0.50.9 1.5 2.1 2.7 3.0 2.6 2.8 0.1
0 0 0.5
1 Gen/Load ratio (log scale) 10 1 Gen/Load ratio (log scale) 10
Yg/Yg Yg/d d/Yg YgY Yg/Yg Yg/d d/Yg YgY

Figure 4-26
Arrester energy with LV (left) or MV (right) side TOVP

At high gen/load levels, the Yg/Yg transformer enabled higher overvoltage but shorter trip time,
and the arrester energy was lower compared to cases with ∆/Yg and Yg/Y transformers. In this
case, the TOVP didn’t make any difference with a Yg/∆ transformer because the inverter tripped
by over-frequency protection for all studied cases.
To sum up, as illustrated in Figure 4-27, the following conclusions can be reached:
• Yg/Yg transformer “passes” the information of MV ground fault (zero-sequence) to the
LV side, and creates high overvoltage at both MV and LV sides. This facilitates fast
inverter tripping and results in low arrester energy.
• Yg/∆ transformer without a neutral impedance, in contrast, provides very strong ground
source for MV feeder, which is far more than effective grounding, and limits overvoltage
at both MV and LV sides. Providing LV activated TOVP does not help to limit the
energy. The inverter relies on power mismatch and/or islanding detection function to trip.

4-16
• ∆/Yg and Yg/Y present similar overvoltage behaviors. The MV SLG fault is “masked”
and difficult to be detected by the inverter, and thus MV TOVP is needed. The
coincidence of relatively high MV voltage and long trip time can cause significant
arrester energy if relying on only LV side overvoltage protection.
 Provide a ground source only if the DER is
 High MV side GFO
A
Yg/Yg a

grounded
 High LV side GFO  MV side ground fault is visible to inverter
 Fast inverter tripping DER
 TOVP at either LV or MV side can
N
g g

 Low arrester energy with B b


significantly reduce inverter trip time and
TOVP, moderate without
C

arrester energy
c

A
Yg/∆ a
 Low MV side GFO
 Provide a ground source for MV feeder
 Low LV side GFO b
DER  Can mitigate MV and LV side GFO
Slow inverter tripping
N

 TOVP does not help much due to low GFO
g

 Low arrester energy B


C
c

 High MV side GFO


∆/Yg
a
 MV side SLG fault is “masked” and difficult
A

 Low LV side GFO


 Slow inverter tripping and B DER to be seen by inverter
high arrester energy if no
g
 LV side TOVP does not help due to low GFO
MV TOVP
C
c
b
on the LV side, and MV TOVP is needed

 High MV side GFO A


Yg/Y  MV side SLG fault is “masked” and difficult
a

 Low LV side GFO


to be seen by inverter
 Slow inverter tripping and DER
high arrester energy if no
g
 LV side TOVP does not help due to low GFO
B b
on the LV side, and MV TOVP is needed
MV TOVP C
c

Figure 4-27
Ground fault overvoltage and transformer connection summary

Commercial Inverter Lab Tests


Lab tests were planned to provide empirical results as support for the modeling and simulation
analysis. Aiming to identify the actual inverter responses to negative sequence voltage, three
commercial inverters were tested in the EPRI lab: 1) Inverter A – 33 kVA, 2) Inverter B – 33
kVA, 3) Inverter C – 36 kVA.
As shown in Figure 4-28, each commercial inverter was directly connected to a programmable
regenerative power supply, and the irradiance was emulated by varying the dc voltage through a
dc voltage source. Since inverters under test are three-phase three-wire, i.e., no zero-sequence
current generation capability (open circuit for I0), only positive and/or negative sequence voltage
were varied. For all tests, inverters were configured with the widest allowable trip settings to
maintain operation and to obtain a steady state negative sequence impedance (Zneg = Vneg /
Ineg) using load convention.
In each test, the inverter terminal voltage and current data were recorded at high resolution (20
kilo-samples per second), and the negative sequence voltage and current were extracted
afterwards for negative sequence impedance calculation. Impact of the volt-var function was
studied, while that for islanding detection and frequency-watt functions was not because all tests
were conducted during grid-connected operation. Standard Category II volt-var settings shown in
Figure 4-29 were implemented in all inverters under test.

4-17
Three-line diagram Lab test setup
PV inverter
480V 1 under test
L-L
Monitoring Points
Voltage
Current

Programmable
Regenerative
Power Supply

Figure 4-28
Test setup for inverter negative sequence impedance evaluation

Q
VV1
0.44 pu
1.02 1.08
pu pu
0.92 0.98 V
pu pu
-0.44 pu

Figure 4-29
Volt-var settings used in lab test

Constant Positive Sequence Voltage and Varying Negative Sequence Voltage


The first test condition was created with fixed positive sequence voltage (Vpos) and varying
negative sequence voltage (Vneg). The setpoints for programmable power supply (grid emulator)
are provided in Table A- 1, where Vpos stayed at 0.8 pu, and Vneg increased from 0.05 pu to 0.3 pu.
Here Vpos lower than 1 pu was selected to avoid inverter tripping at high Vneg conditions. The
initial angle of phase A remained 0° for both Vpos and Vneg.
Figure 4-30 provides the responses of inverter A to voltage variations, when irradiance was 500
W/m2 and volt-var function was disabled. The positive sequence current (Ipos) remained the
same, and negative sequence current (Ineg) slightly increased as Vneg grew, indicating a
decoupling between Ipos and Vneg. The negative sequence impedance (Zneg = Vneg / Ineg) was nearly
constant (~ 5.9 pu) and mainly inductive.
After the volt-var function was enabled, as shown in Figure 4-31, this inverter generated reactive
power in response to the voltage drop, and positive sequence current became higher. Negative
sequence current also increased if comparing to cases without volt-var. This caused a reduced
negative sequence impedance with varying values and more resistive characteristics. It is worth
mentioning that here the steady-state negative sequence impedance was calculated, which
allowed the volt-var function to be fully executed. In practice, however, vol-var has very limited
open loop response (e.g., minimum 1s according to IEEE 1547-2018 std.), and it likely will not
significantly affect the GFOV and/or LROV which last for very short durations. In other words,
the change in negative sequence impedance with volt-var enabled is due to the change in the
inverter’s power factor and/or output current rather than from any dynamic response of the volt-
var function.

4-18
0.8 pu 0.61 pu

5.9 pu 111° 116°

Figure 4-30
Negative sequence behavior of inverter A, with varying Vneg and constant Vpos, no volt-var
1

1
0.82 pu (vs 0.61 pu wo VV)
0.8

0.8

0.6
0.6
Sequence voltage (pu)

Sequence current (pu)

X 36.9
0.4
0.4
Y 0.2992
X 28.04

Y 0.1996
X 17.97
X 7.505 0.2
0.2
Y 0.09957
Y 0.04954

0 0

10
300

8 200
~53° (vs 111° wo VV)
4.2 pu (vs 5.9 pu wo VV)
100
6

0
Zneg (pu, Vneg/Ineg)

Phase angle of Zneg (degree)

-100

2
-200

0 -300

5 10 15 20 25 30 35 40 5 10 15 20 25 30 35 40

t/s t/s

Figure 4-31
Negative sequence behavior of inverter A, with varying Vneg and constant Vpos, VV activated

The negative sequence impedance (Zneg) of inverter A is summarized in Figure 4-32. As Vneg
grew, magnitude of Zneg increased while its phase angle tended to reduce, regardless of volt-var
function (VV). The inverter behaved nearly inductively without VV, while more resistively when
VV was enabled. Activation of VV also reduced both magnitude and phase angle of Zneg.
Inverter B and C, on the other hand, presented much lower negative sequence impedance, as
shown in Figure 4-33 and Figure 4-34. For inverter B, magnitude of Zneg was nearly constant
without VV, while it increased with Vneg when VV was enabled. Like inverter A, it also behaved
nearly inductively without VV, while more resistively with VV. Inverter C, however, had a
decreased Zneg as Vneg grew, even when VV was disabled, and distinct phase angle of Zneg was
observed.

4-19
Magnitude Angle (Ang_V – Ang_I)
12 120

11.4 109.8 108.6


11 100 105
10.9

Phase angle of Zneg (degree)


10 10.5 80
Zneg (pu)

9.0 56.9
9 60 51.2 50.0
8.3
8.0
8 40

7 20
No VV No VV
Zbase ≈ 7 ohm With W With W
6 0
0.05 0.1 0.15 0.2 0.05 0.07 0.09 0.11 0.13 0.15 0.17 0.19 0.21
Vneg (pu) Vneg (pu)

Figure 4-32
Negative sequence impedance of inverter A, with varying Vneg and constant Vpos

Magnitude Angle (Ang_V – Ang_I)


6.5 140
5.9 5.9 5.8
6 116.6
5.5 120 112.1 111.2 111.7
5.5
Phase angle of Zneg (degree)

5.5 100
5
80
Zneg (pu)

4.5
4.4
4 60
4.2
3.5 52.1 55.0 53.5
3.6 40 47.8
3
No VV 20 No VV
2.5 With W
Zbase ≈ 7 ohm With W
2 0
0.03 0.08 0.13 0.18 0.23 0.28 0.03 0.08 0.13 0.18 0.23 0.28
Vneg (pu) Vneg (pu)

Figure 4-33
Negative sequence impedance of inverter B, with varying Vneg and constant Vpos

Magnitude Angle (Ang_V – Ang_I)


6.0 170
5.54 157.9
5.45 160
5.5 153.3
150
5.0
140 136.5 134.9
Ang_neg (degree)

4.5 4.32
Zneg (pu)

4.58 4.26 130

4.0 120
3.93 117.8
110
3.5 3.73 3.70 110.7
100 104.1
101.1
3.0 P=1 pu, no VV P=1 pu, no VV
90
P=1 pu, VV Zbase ≈ 6.6 ohm
P=1 pu, VV
2.5 80
0.0 0.1 0.2 0.3 0.0 0.1 0.2 0.3
Vneg (pu) Vneg (pu)

Figure 4-34
Negative sequence impedance of inverter C, with varying Vneg and constant Vpos

4-20
For all three inverters, the volt-var function induced varying power factor and/or positive
sequence current (Ipos) and reduced both magnitude and phase angle of the steady-state Zneg. This
indicates a strong relationship between Ipos or Vpos and Ineg.

Constant Negative Sequence Voltage and Varying Positive Sequence Voltage


To investigate the impact of positive sequence voltage (Vpos), test cases with setpoints in Table
A- 2 and Table A- 3 were conducted. These setpoints formed a Vpos varying from 0.95 pu to 0.6
pu, and negative sequence voltage (Vneg) at 0.1 pu or 0.2 pu, respectively. The initial angle of
phase A remained 0° for both Vpos and Vneg.
Figure 4-35 shows the negative sequence impedance (Zneg) of inverter B, with irradiance of 500
W/m2. The change trend of Zneg as Vpos grew was found to be consistent when Vneg increased from
0.1 pu to 0.2 pu. In other words, impact of Vpos and Vneg can be treated separately for this inverter.
When volt-var (VV) was disabled, magnitude and phase angle of Zneg slightly increased as Vpos
grew. The activation of VV induced distinct characteristics of Zneg. When Vpos was above 0.8 pu,
VV reduced both magnitude and phase angle of Zneg, which did not change much with varying
Vpos. After Vpos went below 0.8 pu, however, Zneg significantly increased with VV and its phase
angle reversed (~ -110°).
Magnitude Angle (Ang_V – Ang_I)
25 150
119.4 121.4
109.1 110.3 111.7
20 18.69 100
17.93
Phase angle of Zneg (degree)

87.76
50
15 51.99 52.09
Zneg (pu)

0
10 0.6 0.7 0.8 0.9 1
7.423
-50
4.333 4.973
5 6.573 7.119
5.756
5.036 -100
4.342
-107.9 -112.4
0
0.6 0.7 0.8 0.9 1 -150
Vpos (pu)
Vpos (pu)
Vneg=0.1pu, no VV Vneg=0.1pu, W Vneg=0.2 pu, no VV Vneg=0..2pu, VV Vneg=0.1pu, no VV Vneg=0.1pu, W Vneg=0.2pu, no VV Vneg=0.2pu, VV

Figure 4-35
Negative sequence impedance of inverter B, with varying Vpos and constant Vneg

The varying Vpos, on the other hand, led to inconsistent change trend of Zneg for inverter C, when
Vneg increased from 0.1 pu to 0.2 pu. For cases without VV, Zneg remained as Vpos grew, until Vpos
went to 0.95 p.u. While the magnitude of Zneg bounced after VV was activated and no clear trend
can be observed. Note that the impedance oscillation could be caused by current distortion and
inaccurate estimation.

4-21
Magnitude Angle (Ang_V – Ang_I)
7.0 190
Vneg=0.1 pu, no VV Vneg=0.1 pu, VV
6.5 Vneg=0.2 pu, no VV Vneg=0.2 pu, VV 170
6.0
150
5.5

Ang_neg (degree)
130
Zneg (pu)

5.0

4.5 110
4.0
90
3.5
70 Vneg=0.1 pu, no VV Vneg=0.1 pu, VV
3.0
Vneg=0.2 pu, no VV Vneg=0.2 pu, VV
2.5 50
0.60 0.70 0.80 0.90 1.00 0.60 0.70 0.80 0.90 1.00
Vpos (pu) Vpos (pu)

Figure 4-36
Negative sequence impedance of inverter C, with varying Vpos and constant Vneg

Varying Positive Sequence and Negative Sequence Voltage


In real applications, the positive (Vpos) and negative (Vneg) sequence voltage may vary at the
same time (Vneg increases as Vpos reduces). Therefore, how the negative sequence impedance
would change under this circumstance was also studied. The voltage setpoints are listed in Table
A- 4, and test results for inverter A and B are provided in Figure 4-37 and Figure 4-38. Inverter
tripped in several cases where no result was available.
Magnitude Angle (Ang_V – Ang_I)
10.5 140
9.4 10.1 127
9.5 9.98 130
120
9.4 120
8.5
8.4 110
Ang_neg (degree)

7.5
100
Zneg (pu)

7.6 89
6.5 90
5.5 80 80
5 70
4.5 5.2 75.5
4.65 60 67 69
3.5
50
2.5 40
0.00 0.10 0.20 0.30 0.00 0.10 0.20 0.30
Vneg (pu) Vneg (pu)
P=1 pu, no VV P=1 pu, VV P=0.5 pu, no VV P=0.5 pu, VV P=1 pu, no VV P=1 pu, VV P=0.5 pu, no VV P=0.5 pu, VV

Figure 4-37
Negative sequence impedance of inverter A, with varying Vpos and Vneg

For inverter A, the magnitude and phase angle of Zneg were affected by both volt-var function
(VV) and power generation (P). This indicates a strong relationship between Zneg (Ineg) and Ipos
that changes with either VV or P. The increased Ipos induced higher Ineg, and thus magnitude of
Zneg reduced with VV and higher P. Power generation did not affect phase angle of Zneg and the
inverter behaved more inductively when VV was enabled. The highest phase angle occurred with
P = 0.5 pu and VV active.

Inverter B presented distinct characteristics of Zneg. As shown in Figure 4-38, Zneg were affected
more by power generation but less by volt-var. P = 1 pu induced much larger magnitude and

4-22
reversed phase angle of Zneg (capacitive instead of inductive) if compared to the case with P =
0.5 pu, which is opposite to that of inverter A. On the other hand, VV only slightly reduced Zneg
magnitude and phase angle.
Magnitude Angle (Ang_V – Ang_I)
25 150
P=1 pu, no VV 119.3 117.0
114.9 114.4
P=1 pu, VV 20.4 98
19.3 19.7
20 P=0.5 pu, no VV 100
P=0.5 pu, VV 100
18.8
17.8 50

Ang_neg (degree)
15
Zneg (pu)

0
10 8.1 0.0 0.1 0.2 0.3 0.4
7.6 8.6 6.8
5.8 5.5 -50
5 6.9 -78
5.3 P=1 pu, no VV -95 -99
5.0
-100 P=1 pu, VV -87
P=0.5 pu, no VV -97
0
0.0 0.1 0.2 0.3 0.4 P=0.5 pu, VV
-150
Vneg (pu) Vneg (pu)

Figure 4-38
Negative sequence impedance of inverter B, with varying Vpos and Vneg

Varying Phase Angle of Negative Sequence Voltage


The above test scenarios all assume 0° initial phase angle for Vneg, and in this section, its impact
on Zneg is studied. The voltage setpoints are listed in Table A- 5, where Vpos = 1pu, Vneg = 0.1pu,
while initial phase angle of phase A changed from -60° to 40°.
Inverter A showed an insignificant and symmetrical Zneg magnitude change as phase angle
varied, and the lowest magnitude appeared at around 0° phase angle. This trend held for cases
with both P = 1 pu and P = 0.5 pu. VV also did not have much effect on Zneg magnitude due to
the fixed Vpos and Vneg. Phase angle of Zneg, on the other hand, grew towards more inductive with
higher phase angle of Vneg.
Magnitude Angle (Ang_V – Ang_I)
12 80
10.7 11 74
75
72
10.7 9.9 9.9
9.7 10 9.6 9.7
10
70 68
9.8 9.7 70
9.6 9 9.5 65
Ang_neg (pu)

68
65
Zneg (pu)

62
8 60 64
60
61
7
5.9 55
6 56
5.4 5.25
5.2 5.1 5.1 53
5.6 50
5
5.1
4.9 4.8 4.8 4.9
4 45
-80 -60 -40 -20 0 20 40 60 -80 -60 -40 -20 0 20 40 60
Phase angle of Va_neg (degree) Phase angle of Va_neg (degree)
P=1 pu, no VV P=1 pu, VV P=0.5 pu, no VV P=0.5 pu, VV P=1 pu, no VV P=1 pu, VV P=0.5 pu, no VV P=0.5 pu, VV

Figure 4-39
Negative sequence impedance of inverter A, with varying phase angle of Vneg

4-23
Inverter B was more sensitive to the phase angle change and tripped at most of the test cases in
Figure 4-40. According to the available data, both magnitude and phase angle of Zneg were
slightly affected by phase angle change of Vneg (∠Va_neg). Zneg had its peak at around 0° phase
angle and changed in a symmetrical manner as ∠Va_neg varied from 0°. VV led to reduced
magnitude and phase angle of Zneg.
Inverter C was only tested with P = 1 pu, and its Zneg showed larger variations than those of
inverter A and B as phase angle of Vneg (∠Va_neg) changed. No clear trend was observed,
especially when VV was disabled. Impact of ∠Va_neg was reduced by VV, which stabilized Zneg
and mitigated the magnitude as well as phase angle variation of Zneg as ∠Va_neg changed.
Magnitude Angle (Ang_V – Ang_I)
9 130
8.0 8.2 121
7.9 7.9 116
7.7 8 115 120 115
7.3 113 113
110
7
7.2
6.9 100

Ang_neg (pu)
6
Zneg (pu)

90
5
80
71 72
3.5 3.6 4
70
69 70
3 60

2 50
-90 -40 10 60 -90 -40 10 60
Phase angle of Va_neg (degree) Phase angle of Va_neg (degree)
P=1 pu, VV P=0.5 pu, no VV P=0.5 pu, VV P=1 pu, VV P=0.5pu, no VV P=0.5 pu, VV

Figure 4-40
Negative sequence impedance of inverter B, with varying phase angle of Vneg

Magnitude Angle (Ang_V – Ang_I)


6 200
5.40
5.5 190
188
180
5
170
4.44 161
4.5 4.39
Ang_neg (degree)

157 160 154


Zneg (pu)

151
148 148
3.77 4 150 155
4.04 3.58
3.56 148
3.74 3.5 140 144
3.55 140 140
3.49
3.35 3.39 130
3
120
No VV No VV
2.5
With VV With VV 110

2 100
-80 -60 -40 -20 0 20 40 60 -80 -60 -40 -20 0 20 40 60
Phase angle of Va_neg (degree) Phase angle of Va_neg (degree)

Figure 4-41
Negative sequence impedance of inverter C, with varying phase angle of Vneg and P = 1 pu

4-24
EMTP Simulation and Lab Test Findings
EMT simulations with a detailed inverter model were conducted to evaluate the potential of
combined GFOV and LROV during unintentional islanding operation. The impacts of generation
to load ratio, load type, and the three-phase transformer winding configuration were investigated.
Simulations covered the implementation of inverter fast tripping added in IEEE 1547-2018
(TOVP), including activation from both the LV and MV side of the grid connection. Also
covered is the effect of adding supplemental grounding transformers on the GFOV.
The key takeaways from simulations with inverter-based DERs are summarized below:
1. Both GFOV and LROV can contribute to overvoltage when DER is islanded.
2. Sufficient loading can eliminate the LROV and compensate (or reduce) GFOV. According to
simulations, voltage will stay below 138% if gen/load ≤ 0.67, regardless of the load
connection type (Δ or Yg), and without supplemental grounding.
3. In case of gen/load >0.67, both grounded load and supplemental grounding can further help
to mitigate GFOV. Grounded load alone (line to neutral connected) can provide effective
system grounding for inverter connected DER. At high gen/load ratio, however, there will
still be an overvoltage (LROV) even with effective grounding. And because effective
grounding allows a limited degree of unfaulted phase voltage increase, the presence of a
ground fault with a high gen/load ratio will somewhat increase the maximum voltage
compared to the LROV without the ground fault.
4. Ungrounded load does not contribute to grounding, and thus GFOV mitigation, but it
contributes to lower LROV
5. Where a large percentage of the load is ungrounded, a grounding transformer can be utilized
to provide sufficient grounding to achieve the threshold of effective grounding and to thus
reduce GFOV.
6. Transient overvoltage protection (TOVP) as implied in IEEE 1547-2018 can significantly
reduce inverter trip time when generation is much higher than load, and this reduces arrester
energy duty, especially for overvoltage with combined LROV and GFOV.
7. When other than Yg/Yg transformer connections are employed (Yg/Y, ∆/Yg, Yg/∆, ∆/∆,
Y/∆, and Y/Yg) a MV SLG fault is not accurately detected by the LV connected inverter.
Inverter-side TOVP is therefore less effective. However, often where these transformers are
used, the Reference Point of Applicability, as defined in IEEE 1547-2018, is on the primary
(MV) side. When the RPA is on the primary side the DER owner is responsible for
implementing protections that do meet the requirements of the standard.
Lab tests were also performed to identify the negative sequence impedance of typical
commercial inverters, and the key findings include:
1. The negative sequence impedance of inverters varied a lot with different control designs.
There is currently no standard requirement effective in North America. A German standard
specifying an allowed range has been applied in Europe to better define inverter response to
faults.

4-25
2. Test results from the sample inverters supported our assumption of relatively high Zneg (> 4pu
and up to 20 pu). In simulations we assume that the inverter Zneg had negligible impact as it is
in parallel with the smaller load Zneg. It may be a factor in cases of very high gen to load. This
was not evaluated.
3. Negative sequence impedance varies with conditions and was found to depend on both active
and reactive power generation, and negative sequence voltage magnitude and phase angle.
It is worth mentioning that the inverter model used in these EMT simulation has a very high
negative sequence impedance that does not match that of the commercial inverters tested. Exact
values may vary, but the conclusions above still hold since the change trend of overvoltage, trip
time and arrester energy remain.

4-26
5
EQUIPMENT SUSCEPTIBILITY TO TOV
Temporary overvoltage (TOV) is normally referred to as a power frequency overvoltage
condition lasting anywhere from about ½ cycle and up to many seconds in duration. Transient
overvoltage, on the other hand, has historically referred to lightning or switching surges that last
a much shorter time. Surges typically have risetimes defined in microseconds and may ring for a
few cycles. Surge events and TOV conditions are significantly different environments, although
they are sometimes lumped together in time. With faults and devices switching, surges can
accompany TOV conditions, and thus the lumping.
End user and utility equipment susceptibility to TOV is discussed in this section. The equipment
surge withstand is not considered as being lumped with TOV. Here we address the longer
duration power frequency overvoltage conditions measured in per unit of nominal. As discussed
in the previous chapters, DERs may contribute load rejection overvoltage (LROV) and ground
fault overvoltage (GFOV), both are power frequency events. These can exceed 1.73 p.u. and
perhaps even 2 p.u. in certain cases. Power frequency overvoltage above these levels are not
expected. Anecdotal references to 3 p.u. usually conflate switching surges with the lower
frequency events.

End-User Equipment
TOV can have deleterious effects on some customer loads depending on the load type and the ac
power interface. Most ac appliances with power supplies can withstand TOV for a short time and
without noticeable effect. Directly affected examples are incandescent lamps that are stressed by
increased output (I2R), loosing life, or failing in a short time. Motor torque increases and there is
potential for higher winding leakage current and possible breakdown of otherwise compromised
insulation. Electronic equipment with ac transient voltage surge suppression devices connected
line to neutral may be damaged with persistent overvoltage.
Mitigating factors include safety certifications requiring relatively high voltage withstand levels
for ac connected equipment. Traditional power system design practices are expected to limit
fundamental frequency overvoltage line to ground to below 138% of nominal voltage.
Another ac compatibility criteria that relates to end-use equipment voltage tolerance is the ITIC
curve, as illustrated in Figure 5-1. This is also an IEEE recommended compatibility criteria
published in the Emerald Book.14 The original target for specifying a voltage tolerance was
computer equipment, led by the Computer Equipment Business Manufactures Association. 15 The
concept has been adopted, with variations, by several industry appliance groups including
semiconductor tools, adjustable speed drives and lighting.

14
IEEE Recommended Practice for Powering and Grounding Sensitive Electronic Equipment, IEEE Std 1100-2005
“Diagnosing Power Quality-Related Computer Problems” IEEE Transactions on Industry Applications, v. IA-15,
15

No. 4, pp. 381-393., New York, New York, August 1979.

5-1
Information Technology Industry Council
(ITIC) Voltage Tolerance Envelope
(This curve replaced the older CBEMA Curve)

120% Voltage 138% Voltage

125% Voltage

Figure 5-1
ITIC Voltage Tolerance Envelope

The key questions are what are safe limits for TOV and how can we be certain such limits are
satisfied? Aiming to provide answers, the effects of TOV on common residential electrical and
electronic devices have been investigated by EPRI. Research covers the common causes of TOV,
evaluation of equipment tolerance to TOV through destructive testing, and documentation of
failed test specimens that were destroyed during TOV testing. A summary of results is provided
in this section and more details are available in the reports. 16,17,18,19
A key takeaway is that many appliances are quite tolerant of TOV. Any breakdown or upset is
generally well above the over voltage limits for DER. The more recent IEEE 1547 limit and
previously required limits by Hawaiian Electric 20 are comparable to the original ITIC curve, as
shown in Figure 5-2. These DER limits should be well below typical appliance withstand.

16
Effects of Temporary Overvoltage on Residential Products: System Compatibility Research Project. EPRI, Palo
Alto, CA: 2005. 1008540.
17
Effects of Temporary Overvoltage on Residential Products, Part II: System Compatibility Research Project. EPRI,
Palo Alto, CA: 2005. 1010892.
18
Mitigating the Effects of Temporary Overvoltage on Electronic Devices, March 2008.
19
Embedded Solutions for Temporary Overvoltage in Residential Products, November 2008.
20

https://www.hawaiianelectric.com/documents/products_and_services/customer_renewable_programs/grid_supp
ortive_utility_inverter_certification_req_20180312.pdf

5-2
Figure 5-2
Hawaii Electric published limit for DER

Figure 5-3 summarize the results of EPRI’s testing of appliance TOV withstand. Among the
equipment under test, the majority survived 1.5 p.u. TOV for several hours. The clock radio
failed after almost 2 hrs (118 min) while audio receiver failed after 5.7 seconds. Given the
requirement that DER needs to detect an island and trip within 2 s, all devices would have
survived TOV of 1.5 pu. Another interesting point is the same type of equipment but from
different manufacturer could have distinct TOV withstand capability. It is not surprising to see
computer power supplies, designed to operate at either 120 or 240V are able to withstand TOV
of 3.0 pu, relative to 120V.

118 min.

5.7 sec.

(2hr) (2hr)

(2hr) 8.7 sec

(4hr) Within
1 min.
within
(4hr) 1 min.
Within
(4hr)
1 min.

Figure 5-3
Summary of equipment under test and overvoltage levels

Figure 5-4 gives more test results from EPRI’s power quality program. All devices under test
survived 138V (1.15 pu) for six hours and 156V (1.3 pu) for 2 seconds. Except for transient

5-3
voltage surge suppressors (SPDs), other equipment survived 180V (1.5 pu) for 4 hours. When
voltage was further elevated to 360 V (3 pu), most devices failed within 1 second.

Figure 5-4
Summary of overvoltage test results – from EPRI TPQ Techwatch, Oct. 2014

The resulting TOV characterization curves for eight categories (each had four samples) of
common household electronic equipment are provided in Figure 5-5. More than half of the
sample groups had a representative failure at each test point. In other words, for a particular
brand, all four samples failed during the tests, creating a TOV tolerance curve with a full set of
four data points. In general, all devices under test survived way beyond both ITIC and IEEE
1547-2018 TOV limits.

5-4
Clock VCRs
Radios

DVD Surge
Players Protector
Strips

Microwave Personal
Ovens Computers

60W
Incandescent
Lightbulbs

Figure 5-5
Results of EPRI testing compared to ITIC

The concept applied in IEC and IEEE electromagnetic compatibility standards is that equipment
immunity levels should be comfortable above the expected environment of disturbance levels.
As shown in Figure 5-6, a compatibility level is defined above the planning levels and below the
equipment immunity test levels. Incompatible events should be rare.

5-5
Figure 5-6
Concepts applied to achieve electromagnetic compatibility

Figure 5-7 illustrates the hypothetical probability of a customer load device upset or failure for
overvoltage magnitude at longer and shorter durations. There is no specific voltage threshold
above which loads will start malfunction or fail. Therefore, if DER can limit their overvoltage
contribution as required by IEEE 1547-2018, the common loads compliant with ITIC curve
should not be damaged.

Figure 5-7
Hypothetical Overvoltage Failure Probability of Loads

Medium Voltage Surge Arresters


Surge arresters are commonly used to limit lightning or switching overvoltages in power
systems. The most common arrester type is a metal oxide material. These conduct when exposed
to overvoltages following a nonlinear impedance characteristic. With increasing conduction as
surge voltage grows, overvoltages are limited or clamped for equipment connected in parallel,

5-6
line to ground or line to line. Standards for metal oxide surge arresters including rating and
testing are IEEE C62.11 and IEC 60099-4.
Arresters are typically made from stacked blocks of metal oxide material, as illustrated in Figure
5-8, with energy ratings in Kilojoules per kV. The higher the voltage rating of the arrester, the
larger the number of “blocks” and the greater the total joules capability.
Various Metal Oxide Blocks

48 kV Heavy Duty
Station Class
Arrester

9 kV Heavy Duty
Distribution Arrester

Low voltage MOV


Arrester Disk (such as
for 480V systems)

Very thin

Figure 5-8
Metal Oxide Arrester structure

The total energy capability of an arrester can be calculated as (1), with the commonly cited surge
energy ratings (kJ per kV of MCOV rating) listed in Table 5-1.
𝐸𝐸 = (𝑀𝑀𝑀𝑀𝑀𝑀𝑀𝑀 𝑅𝑅𝑅𝑅𝑅𝑅𝑅𝑅𝑅𝑅𝑅𝑅 𝑖𝑖𝑖𝑖 𝑘𝑘𝑘𝑘) × (𝑘𝑘𝑘𝑘 𝑝𝑝𝑝𝑝𝑝𝑝 𝑘𝑘𝑘𝑘 𝑜𝑜𝑜𝑜 𝑀𝑀𝑀𝑀𝑀𝑀𝑀𝑀) (1)
For example, a distribution class heavy duty arrester with MCOV of 8.4 kV is:
𝑘𝑘𝑘𝑘
(8.4 𝑝𝑝𝑝𝑝𝑝𝑝 𝑘𝑘𝑘𝑘 𝑜𝑜𝑜𝑜 𝑀𝑀𝑀𝑀𝑀𝑀𝑀𝑀 ) × �2.2 � = 18.48 𝑘𝑘𝑘𝑘.
𝑘𝑘𝑘𝑘

Main factors that impact the total TOV energy absorption capability of a surge arrester include:
• Diameter of the blocks and nature of block material
• Height (thickness) of the blocks and total number of blocks present
• Starting temperature of the blocks at the beginning of the surge event (prior duty or no
prior duty)
• Nature of the current waveform and magnitude (Surge arrester energy capability for
power frequency is not the same as switching or lightning surge capability)
• The magnitude of applied voltage after the TOV event

5-7
• Energy sharing between arresters which varies significantly depending on case specifics
(discussed in more detail later)
Due to the sharing effect among arresters, for example, arresters exposed to the same power
frequency overvoltage all conduct. This then limits the energy to be dissipated by any single
arrester. Also, if the TOV scenario involves de-energization of generators immediately after
the event, then removing ac voltage enables cool down. Therefore, the energy capability of
the arrester with temporary TOV may be significantly increased over the capability with
continuous voltage applied.
Table 5-1
Common surge energy ratings

Type of Surge Arrester Commonly Cited Surge Energy Ratings


(kilojoules per KV of MCOV Rating)
Normal Duty Distribution Class 1.4
Heavy Duty Distribution Class 2.2
Intermediate Class Surge Arrester 3 or 4
Station Class Anywhere from 3 to over 10 depending on block size and material

Figure 5-9 gives an example voltage/current curve for a station class arrester. The arrester
current should be negligible at nominal voltage, and gradually increases as voltage grows. Given
the DER provides arrester current during islanded operation, the expected overvoltage ranges
from 1.4 p.u. – 2 pu, according to typical DER overcurrent capabilities.
Region of Activity For Load
Per Unit of MCOV Rejection Overvoltage and
(log scale) Ground Fault Overvoltage
8

4
Less than 1 mA
2

1
1.4 per unit
1.2 per unit
0.5

0.25

0.125

0.0625

Figure 5-9
Example arrester voltage-current curve

It is worth mentioning that a wide range of arrester products are available in the market. The I-V
curves can be higher or lower than the one shown in Figure 5-9, depending on brand, class,
rating, heating conditions, etc. Users must consult specific manufacturer’s data sheets for the
exact product specified to perform a study.

5-8
Figure 5-10 shows an example arrester current during TOV operation. It is very distorted and has
a quite low RMS to peak ratio. The energy level is consequentially lower than a linear waveform,
which is true for many cases.

Figure 5-10
Example arrester current waveform

Figure 5-11 illustrates the arrester temporary overvoltage capability for a specific arrester brand
(3 models of normal duty distribution class arresters), all with no prior duty. The coefficient of
grounding (CoG) defines the upper and lower voltage limits (blue dotted horizontal lines). The
duration limits, on the other hand, defines the maximum operating time (black vertical lines).
The intersection between the arrester TOV capability curve (green, purple and red) and required
time duration determines the overvoltage level the arrester has to withstand. Specific arrester
curve data is needed to identify the overvoltage level for other applications. Prior duty would
lower the withstand to a lesser value than shown.
Note many designers apply TOV curve assuming an “infinitely strong source.” DER sources are
typically “weaker”, especially for the inverter-based ones with very limited overcurrent
capability and fixed peak dc voltage. Additionally, the surge arrester loading effect will also
suppress the TOV condition. A TOV curve, therefore, cannot accurately determine if an
overvoltage condition will damage surge arresters when dealing with weak sources (such as
inverter-based DER) due to reasons below:
 The arrester may survive much longer than indicated by the TOV curve where the
analysis assumes DER acting as an infinite source
 The arrester(s) themselves will suppress the TOV level and distort the waveform due to
their own loading effect
The more accurate and secure way is to perform an EMTP or equivalent type simulation of the
energy absorption of the surge arrester during the overvoltage operation. Then compare EMTP
results to the expected energy capability of the arrester and apply safe margins to prevent arrester
failures. However, it must be noted that the published energy capabilities of surge arresters are
specific to a switching-surge type waveform and may not accurately indicate the ability of
arresters to endure lower-level, multi-cycle events like TOV.

5-9
Per Unit of Arrester
Maximum Continuous Ground Fault Overvoltage level experienced by an 8.4kV MCOV
arrester on a 13.2 kV Feeder with DER COG=100% and
Operating Voltage Rating operating at ANSI +5% maximum voltage level

Typical Worst Duration Limit


(2 seconds) per IEEE 1547

TOV capability curves for 3


arrester types (no prior
duty)

Ground fault overvoltage level experienced by an 8.4


MCOV arrester on a 13.2 kV Feeder with DER COG=80%
and at ANSI +5% maximum voltage level

3 cycles 6 cycles Time (Seconds)

Figure 5-11
Arrester temporary overvoltage capability

Sharing among arresters could also substantially reduce the energy absorption of each arrester
from none (in the case of one arrester only) up to roughly a factor of 15 in the case of a large
population of arresters of the same type. Note that the impedance of the feeder is typically low
compared to the DER sources, which means the LRO and/or GFO exposure is over a broad area.
This helps to ensure that a large number of arresters (if present) could see the LRO and GFO
conditions.
Monte-Carlo analysis was performed on an assortment of paralleled distributed arresters with a
standard deviation in V-I characteristic of 5% and 10%.21 The ratio of the energy absorbed by
the hardest working arresters (with maximum clamping duty) divided by the total energy of all
the arresters was determined. Considering statistical scatter, the average duty ratio (max.
energy/sum of energy) are plotted along with a capability multiplier in Figure 5-12. The energy
capability multiplier is calculated by inverting duty ratios. This is the factor that can be applied
times the energy rating of one arrester to determine the approximate amount of energy that can
be absorbed by the group of arresters without failing the most vulnerable. As voltage elevates,
the average duty ratio drops and energy capability multiplier increases, indicating a better
sharing among arresters and higher overvoltage susceptibility. Larger number of arresters and
smaller mismatch between arrester characteristics also serve in a similar way.

21
Island prevention practices and IEEE 1547 ride-through. EPRI, Palo Alto, CA: 2020. 3002018950.

5-10
Figure 5-12
Average of duty ratios (left) and expected sharing relative to the standard deviation in arrester
characteristics (right)

Assuming TOVs are in the range of 1.7 – 1.8 of nominal, Figure 5-13 shows the linear
dependency of the energy capability multiplier with the number of arresters, assuming a 10%
standard deviation.14 Similar conclusion can be reached that more arresters and higher
overvoltage enhances the energy sharing and thus higher overvoltage susceptibility.

Figure 5-13
Energy capability multiplier for power frequency TOVs at 1.7-1.8 per unit

With many arresters on a typical feeder, energy absorbing capability can be estimated as a
multiple of a single arrester for current-limited events (e.g., inverter GFO and/or LRO). The
suggested multiplier accounts for expected uneven energy absorption amongst the arresters due
to differences in characteristics.
Also, this analysis shows that larger numbers of arresters tend to outweigh disparities in current
sharing. Given typical arrester characteristics, we find that the “harder the hit” (i.e., higher
applied voltage), the better the sharing will be. These characteristics support the important role of
arresters in limiting power frequency overvoltages.

5-11
Susceptibility Summary
Typical residential end-user appliances, such as TVs, DVD, microwave ovens, computers
equipment, etc., are likely able to survive TOV events. This includes DER-related GFOV and/or
LROV during islanding operation, and for durations longer than 2 seconds. As noted in chapter
4, limiting DER overvoltage contribution as required by IEEE 1547-2018 significantly shortens
the expected duration of TOV events. With the new limits, DER contribution to TOV is
compliance with the relatively conservative ITIC (or CBEMA) curve. End-user equipment upset
or damage from DER born overvoltages is therefore not expected.
Regarding utility MV equipment susceptibility to DER related TOV, there are several important
considerations and potential mitigating factors. The first is that inverters are not a stiff source.
Considering the limited overcurrent capability of inverter-based DER helps to accurately predict
TOV exposure and to specify appropriate mitigation. Surge arresters act as both a vulnerability
and a mitigation factor.

Arresters are normally applied to mitigate lightning and switching surges, based on other utility
system equipment’s surge withstand and basic insulation level (bil) ratings. Arresters may also
be active and conducting during a non-surge, TOV condition. This causes concern that the
duration of a TOV will exceed the arrester device’s energy rating. A key takeaway of this
research is that there are several mitigating factors that can relieve this concern. These factors
include the:
1. Island load plays a role in mitigating TOV in case of inverter-based DER.
2. Arrestor MCOVs and energy capacity are reasonable for the application.
3. Number of arrestors involved matters because a power frequency TOV occurs
throughout the island and there will be energy sharing, albeit uneven.
4. Inverter DER responds to the same overvoltages that would stress surge arresters and
they may quickly remove the source of OV and limit the duration.

5-12
6
SYSTEM GROUNDING GUIDELINES WITH INVERTER-
BASED DER
Interconnection Transformer Selection
As the DER interconnection transformer is an added active component in the area EPS, utilities
need to know the details and retain final say regarding selection. Configuration details of both
the high- and low-side windings, as well as any proposed supplemental grounding devices,
require utility review.
Existing published screening criteria related to DER grounding are not sufficient. The most
common indicate as illustrated in Figure 6-1 that the transformer connection needs to be
compatible with the grid. Screens in this format imply that ground fault overvoltage is always
an issue with a 3-phase, 4-wire distribution. Consequently, as indicated in the sample table “All
others Fail” when the distribution line configuration is three phase, 4-wire. The exception to
pass is limited to aggregate DER ≤ 10% of peak load.

Figure 6-1
Typical grounding configuration screens use peak load a proxy for minimum load22 (similar to
requirements in CA Rule 21 and many other jurisdictions screening criteria)

At this first level of interconnect review, specific consideration if the DER is a machine or an
inverter is not clear. Given the significant difference in effective grounding requirements for

22
From New York Department of Public Service Standard Interconnection Requirements, December 2019

6-1
machines and inverters, the next step after failing this screen has not been consistent. With
similar situations some jurisdictions require supplemental grounding for DER, and some do not.
As currently embedded in most screening procedures and experience with machine-based
generation, DER presence in an island suggests a need for a supplemental grounding. This is less
clear with inverter-based generation. 23 Due to the unique characteristics of inverter-based DER,
conventional interconnection transformer selection criteria for synchronous generator needs to be
adapted. Details of selection depend on system characteristics and protection objectives. In
addition to voltage and phase matching, there are objectives related to fault response, voltage
sensing and coordination with other system protection discussed here.
The first step in system grounding is selection of the primary interconnection transformer.
Given this, the following provides selection considerations based on interconnection transformer
objectives to decide on the best fit configuration:
 Connection to provide a zero-sequence ground source for island conditions:
The desire is for the transformer to provide zero sequence continuity path from DER side to high
side if 1) analysis shows that supplemental grounding is needed, and 2) the plan is to have that
supplemental grounding on the DER side – Select a grounded-wye to grounded-wye type
transformer Note if there is a need for the DER to detect of zero sequence, a grounding
transformer may be placed on the MV side.
The desire is for the transformer to be a ground source by itself if 1) analysis shows such a source
is needed and will work with the inverter, 2) the neutral grounding impedance on the high side
limits its influence to a suitable level, and 3) the plan is to use a separate PT bank to measure
high side voltages for protection – Select grounded-wye with neutral impedance high side to
delta DER side
The desire is to prevent a zero- sequence path or source if 1) the analysis shows that such
capability is not needed and 2) plan to use a separate PT bank to measure high side voltages for
protection or don’t need VLN measurements. – Select an ungrounded interface transformer
winding on high side such as delta winding or floating wye winding.
 Connection to enable low-side VLN measurement indicating high-side conditions:
The objective to allow a direct measurement path to the DER side accurately indicating the
primary line to neutral voltage. This is needed for inverter high speed response per IEEE 1547-
2018 Part 7.4 limiting overvoltage magnitude and duration and is needed when high side PT
bank is either not available or may be too slow to meet IEEE limits. – Select grounded-wye to
ground wye
 Connection is to avoid distributed supplemental ground source and possible interactions
with upstream existing system protection:
The objective is to avoid grid interactions related to ground fault relaying desensitization,
increasing arc flash, single phasing back-feed, I0 circulating currents, ground potential rise, stray

23
Impact of Interconnection Transformer Configuration on DER Operation, EPRI Palo, CA 3002019423, Dec 2020

6-2
voltage, etc. - Avoid grounded-wye high side to delta DER side, or if this type must be used,
then employ suitably high neutral grounding impedance and protection to reduce issues.
Figure 6-2 shows the zero-sequence path for various interconnection transformers with inverter-
based DER, where ZE is the earth grounding impedance for three wire systems or the neutral
connection impedance for four wire systems. As described in previous sections, typical DER
inverters do not have zero sequence current generation capability and thus present open circuit
for zero-sequence. The Yg/∆ transformer, with or without ZE on the Yg connection at utility side,
creates a zero-sequence path and acts as a ground source to utility side by itself. A Yg/Yg
transformer passes through the zero sequence (i.e., zero-sequence continuity), but requires a
supplemental grounding to become a ground source. Other transformer configurations block zero
sequence and do not act as ground sources relative to the utility side.

Utility Side High/Low Zero Sequence


Ground Source? Continuity
DER Utility DER
Side
Utility
Side
Side Side
Not a ground source Blocking

Utility
DER Utility DER
Side Side
Side Side Not a ground source Blocking

DER Utility DER Utility Blocks pass thru of a zero


Side Side
Side Side Yes
sequence source but by itself Acts as a
creates a new zero sequence
source ground
Blocks pass thru of a zero
DER Utility DER
3ZE Utility
sequence source but by itself source to
Side Side Side Side
Yes creates a new zero sequence
source (quantity ZE greatly effects utility side
the strength of the new source)
Utility
DER Utility DER
Side Side
Side Side Not a ground source Blocking

DER Utility DER Utility


Side Side Side Side
Not a ground source Blocking

DER Utility DER


3ZE
Utility Does not
Side Side Side Side
Not a ground source Blocking act as a
ground
DER Utility DER Utility
Not a ground source by
Side Side Side Side
itself, however it could Continuity
source,
pass thru a ground source does pass
DER Utility DER
3ZE 3ZE Utility
Not a ground source by Continuity through
Side Side Side Side
(But quantity Z E greatly
itself, however it could
pass thru a ground source
effects the strength of ground connection
source it can pass through)

Figure 6-2
Zero sequence path for various interconnection transformers

6-3
Updated Grounding Considerations for Inverter DER
In this section different rules of thumb are discussed that support screening of proposed DER
plants to determine the need for supplemental grounding. “Screening” in this context generally
refers to making decisions to allow DER interconnection without additional studies and without
addition of mitigations or power system upgrades. As will be discussed, supplemental grounding
is one of several possible preventions and mitigations for TOV during islanding.
Screening criteria are often considered as more art than science. A challenge in discrete
screening of specific technical issues is that one screen probably affects more than one technical
issue. Examples of screen considerations are relative DER size to load or a short circuit current
ratio at the PCC. This type of screen normally necessitates the use of conservative criteria
and/or ratios for most technical screens.
The expectation of screening is that using conservative criteria like load to generation ratios, will
be a sufficient deterrent to one or more issues, without mitigation. Given different screening
criterion for assessing different DER issues there is often overlap for any set of screens, e.g.
FERC SGIP or CA Rule 21, initial and supplemental screens. 24 More sophisticated screening
approaches are made less conservative by using additional feeder data, specific DER
characteristics, load data and by applying analytical tools. The screening guidance given here
aims to address the specific issues of LRO and GFO related to DER without comingling with
other integration issues.
Both conservative and more refined screening approaches are addressed. The refining of
conventional approaches considers the unique characteristics of inverter DER as well as the
combination of both LRO and GFO response. Results of this effective grounding research
project are also applied to evolve from the more to less conservative screening criteria. An
inverter supplemental grounding assessment tool (IGST) is introduced with example scenarios
and calculations.

Evolution of Overvoltage Screening Criteria


The relative size of DER generation to feeder peak load or feeder minimum load are common
screening criterion. Examples of generation to peak load screens such as 20% for machine DER,
33% or 67% for inverter DER, are given in Table 6-2. Typical use of these ratios may include
voltage regulation and island prevention concerns, in addition to TOV. They are not refined to
the nuances of TOV for different cases of DER and load characteristics and tend to be
conservative if only considering TOV.
Including a better understanding of the inverter and load characteristics supports this evolution of
screening. As shown in the table, screening criterion allowing up to 100% generation to
minimum load can be argued.

24
FERC Small Generator Interconnection Procedure, Section 2 page 6.

6-4
Table 6-1
Evolution of Screening Criteria Addressing DER Overvoltage Concerns

Limits on DER Needed to Reliably


Type of DER Device
Suppress TOV (GFO + LRO)

For Synchronous Rotating Machines Load 5:1, or 20% generation to load


(typical for DER machine and step-up transformer ratio in p.u. of DER rated power (see
impedance) note 1)
For Inverters (covers more than TOV) Load 3:1 or 1.5:1, that is 33% or
(evolving with increasing experience inverter 67% generation to load ratio in p.u.
penetration and clearly includes a safety factor) of DER rated power (see note 2)
For Inverters (refined to consider load)25 100% of minimum load if at least
(recommended based on this NYSERDA/EPRI 1/3 of the load is connected via
research including modeling characteristics of single phase or Yg/Yg and L-N (see
inverter, load for both LRO plus GFO behavior) note 3)

Note 1: This conservative ratio is common for rotating machine DER and does not consider any
other ground sources that may be present in an islanded area.
Note 2: Less conservative for inverter DER. Also benefits from some part of the load connected
L-N and providing weak ground source. Both ratios are sufficient to suppress inverter LRO,
completely mitigated by load greater than generation.
Note 3: Refined based on simulations that indicate 33% grounded load provides effective
grounding. Analysis indicates a level as low as 19% grounded load is effective for most
inverters. Uncertainty in mix and future load changes, dynamics of loading during fault events,
reality of system reconfigurations, etc. indicate a that a screen needs to be conservative.
Therefore use 33%, not 19%, or do a risk of islanding study.
As indicated, if the only objective is to limit TOV during an island ground fault, an inverter DER
may be rated 100% of the expected load if there is > 33% of the load connected L-N. In this case
we are considering the ground source contribution of the L-N load. Modeling and simulation
results show that neutral-connected loads contribute as a supplemental ground source and in case
of a typical inverter can effectively reduce GFO (see notes in the table). When the minimum
load, line to neutral or line to line connected, is at least 100% of the DER generation then the
issue of inverter LRO is also mitigated.
In other words, there will be no overvoltage concern if load/gen ratio > 1 and 33% or higher load
is grounded. When the grounded load is insufficient, or when mix of L-N and L-L load
combination is unknown, higher ratios may be considered. These ensure that overvoltages stay
within acceptable levels such as COG < 80% in case of GFO. Safety factors in screening ratios
and in technical review are appropriate. Applying, results from this research is expected to

25
IEEE ANSI C62.92.6, IEEE Guide For Application Of Neutral Grounding In Electrical Utility Systems, Part VI

6-5
inform utilities to use safety factors that are reasonable to the DER generation type, load mix and
any other OV mitigating factors.

Choosing Mitigation or Prevention Options


With all the aforementioned information, an initial TOV (considering both GFO and LFO)
screening process is developed in Figure 6-3 for four-wire, multi-grounded neutral distribution
systems. This is the most common configuration of utility distribution feeders in North America.
This flow chart approach is for the distribution primary feeder level on the sections with
potential to island. A separate screen is needed at the sub-transmission level. Aggregate DER
and load must be considered.
For example, the flowchart applies the gen/load < 67%, gen/load < 100% and available grounded
load > 33% criteria in Table 6-1. It also includes the prevention option of inverter built-in DER
overvoltage limiting. That is, the inverter meets the IEEE 1547-2018, Section 7.4, requirement
to trip for MV side overvoltages. Mitigation effects from supplemental grounding and inverter
islanding detection are also considered, and the associated risks are provided. It is worth
mentioning that supplemental grounding only suppresses GFOV, but other measures, such as
overloading or rapid tripping can reduce or eliminate both GFOV and LROV.

Figure 6-3
Initial screening for four-wire multi-grounded neutral distribution systems with DER

Another screen is developed to help identify the best solution for overvoltage mitigation. As
shown in Figure 6-4, it takes users through many approaches to see which one gives the best
solution. This screen assumes the DER has already failed the minimum load to generation
screens and then investigates four possible solutions. Solution 1 and 2 aim to provide a ground
source and thus only reduce GFOV, while the other two solutions break the island and mitigate
both GFOV and LROV. The trip time of DTT, if applicable, should be examined to ensure a
timely tripping of DER and to prevent equipment damages during the transient overvoltage.

6-6
Figure 6-4
Ground fault overvoltage and LRO solution screening

 This screening approach helps identify the best mitigation choice by linking several different choices
and criterion in the same flow chart tool.
 It assumes the DER has already failed the minimum load to generation screen (see the prior slide)
and the lead to four other possible solutions
 Some solutions as noted only solve GFO and others both GFO and LRO

DTT provides a reliable islanding prevention but using it for overvoltage mitigation may not be
effective because of communication and tripping time delays. Other drawbacks with DTT
include:
• It suffers from high cost and is useful primarily only for a single large DER site (or
perhaps a few sites per feeder) rather than cases involving many sites per feeder

6-7
• It usually can’t be used in a “time coordinated” fashion to prevent DER overvoltage due
to timing issues (unless added feeder breaker delay or inverter gate signal blocking (i.e.,
cease to energize) are used)
• It may react to, but it does not suppress the DER caused LROV and GFOV.
If DTT is the mitigation choice, maintaining reliable communication and time coordination
between DTT and other protection devices become critical. There are a couple ways to make
DTT coordinate better:
• Delay upstream feeder breaker a few extra cycles as shown in Figure 6-5 (Drawbacks:
could be problematic with protection coordination and may not be viable due to increase
of arc-flash energy),
or
• If only time-overcurrent curve is used for the feeder source, then use a faster tripping
approach for the DER (Drawbacks: could cause some nuisance DER trips where the
feeder breaker did not trip but the DER did trip or where low voltage ride through
requirements won’t be satisfied)

Figure 6-5
Time coordinated DTT

Use of the fastest possible plant recloser capable of inverter blocking is probably the only way to
ensure DER tripping prior to the feeder breaker open (that is t1 > t2).
Table 6-3 compares several classical overvoltage mitigation methods with prevention
alternatives. The mitigation methods, options 1-3, are typical approaches for synchronous

6-8
machines (classical solutions) and have been applied to larger inverter connected plants. These
mitigations can introduce negative side effects or in the case of DTT, present upkeep challenges.
The options 4-6 are overvoltage prevention methods that rely on sufficient load and/or self-
limiting at the DER. he last two preventions are proposed based on this research work, which
proves that 1) the required load/gen ratio can be further reduced, if accurate inverter models and
load presence are available, and 2) the overvoltage limit defined in IEEE 1547-2018 can
effectively mitigate the overvoltage risks, if MV side overvoltage is visible to inverter.
Table 6-2
Evolution from overvoltage mitigation to overvoltage prevention for inverter-based DER

Overvoltage
Check List of Considerations Application Comments
Mitigation Method

1. Provide a ground • May not work for certain inverters Usually requires a reactor in
source via DER Step- • Prone to side effects depending on design neutral conductor to manage
up Transformer • Does not suppress LRO side effects.

2. Add supplemental • May not work for certain inverters Needs to be right sized, with
Grounding Transformer • Prone to side effects depending on design impedance values depending
in the GFO Zone • Does not suppress LRO on system.

• Is relatively expensive
3. Install DER Time Generally applied only to
• DER to be tripped before EPS source (in many
Coordinated Direct larger DER. Solves LRO and
situations this is not possible)
Transfer Trip GFO in the feeder zone
• Does not cover all possible island situations
4. Assume the overloaded
DER lead to reduce + Higher levels of DER penetrations limit
Can work well in case of low
sequence voltage, i.e. scenarios where overload is dependable
DER penetration. Solves
conservative gen to mitigation. Uncertainty in time-varying load
LRO and can mitigate GFO
load ratios (such as 20, and generation levels is a concern.
33 or 67%)
5. Rely on at least 33% Improves with better models
• Uncertainty in time-varying load and
line-neutral connected of inverter behavior and
generation levels is a concern.
load and aggregate prediction of the load
generation not • Sharpening the load prediction reduces margin characteristics and timing.
exceeding load. for error and for future load changes. May solve LRO and GFO
6. Determine if sufficient
Solves both GFO and LRO
proportion of islanded • Only newer DER, most likely inverter only,
without relying on load or
DER meets IEEE 1547- can be expected to meet this requirement.
other mitigations. Needs
2018, 7.4.2, over- • Existing installed DER are probably not accurate sensing of island
voltage detection and certified to meet this requirement. voltage level.
fast trip

Application of Supplemental Grounding


As previously discussed, supplemental grounding refers to any distributed ground source that is
in addition to the primary grid ground source, usually at the substation. Possible ground sources
includes line to neutral connected load, the interconnection transformer windings for either load
or generation, as well as parallel-connected grounding transformers. Table 6-2 identifies typical
supplemental grounding design parameters for synchronous machine DER (Classical) and for

6-9
two different views of inverter-based DER (applying a Classical approach and adjusting for new
Reality of inverter characteristics).
The righthand column is adjusted for inverter test results and is recommended approach based on
the results of this research and our current expectation for inverter response characteristics.
Several key differences are identified in the table as we evolve from machine to inverter DER.
Supplemental grounding for synchronous machines will normally have much lower sequence
impedances than grounding for inverters. Inverter supplemental grounding is recommended to
be more resistive. Inverter ground sources can be smaller relative to the kVA rating of the
generator. Transformers used for inverter supplemental grounding will have higher impedance
than for machines. In case of a Δ secondary of the main interconnect transformer a reactor is
likely needed in the high side neutral connection. For inverters the line to neutral connected load
can be an effective ground source and should be considered.
Table 6-3
Comparison of Supplemental Ground Sources Evolving from Machine to Inverter DERs

Supplemental Machine Supplemental Recommenced Based


Parameter Grounding for Grounding Incorrectly on Reality of Inverter
Machine DER Applied to Inverter DER DER Characteristics

Target Ratios of • X0/X1 < 3 • X0/X1 < 3 • X0/R0 ratio of 0.3 to


ground source 0.01
• R0/X1 < 1 • R0/X1 < 1
impedance for • Z0/Z1load ratio of
≤ 80% COG • X0/R0 ratio > 3 • X0/R0 ratio > 3 ground source 1-2

• 10-25% Positive
• 50-100% Positive Operates as ideal current
Sequence
Typical Percent Sequence source
• 12-30% negative
Impedance of • 50-100% negative Very high negative
sequence
Generator Used in sequence sequence impedance
Calculation • 2-10% zero sequence
• Zero sequence assumed Zero sequence assumed
(if machine is solidly
very high (open) very high (open)
grounded)

Typical Rating of Examples of Optimized


the Grounding • X0= 30-60% • X0= 100-200% Grounding Solutions:
Transformer • R0= 10-20% • R0= 33-67% Z0gt = 131% + j45% 26
Applied to handle • KVA rating = 15-25% • KVA rating = 3-5% of the Z0gt = 210% + j6% 27
Zero Sequence of the Machine rating Inverter Rating KVA Rating = 3-5% of
Currents Inverter Rating

No issues – works great The method is inaccurate The effectiveness of the


Problems with the for machines and standard and may not provide method depends on the
Method power system impedance mitigation in some cases negative sequence
characteristics. because: impedance characteristic

26
Effective Grounding and Inverter-based DER: A “new” look at an “old” subject. presented at ITWG, Feb 1, 2019
27
Mitigating the Effects of Temporary Overvoltage on Electronic Devices, March 2008.

6-10
• Inverters are voltage inverters, which varies,
controlled current sources and also on the presence
• Inverter negative sequence of L-N loading in the
impedance is high and L-N island.
loads define the GFOV
system impedance.

The location of parallel connected supplemental grounding transformers (GT) varies depending
on the objectives and design factors. For example, a properly size GT at the DER facility may
solve the MV ground fault overvoltage concerns, but it will not help with GFOV mitigation at
the sub-transmission level. Location depends on the protection zone. Several different zones are
illustrated in Figure 6-6.

Figure 6-6
Supplemental grounding transformer (ground source) locations

Figure 6-7 provides a flowchart for the supplemental grounding transformer design and
application decisions. The zero-sequence impedance of the grounding transformer should satisfy
the impedance ratios in Table 6-2. Also, it is important to meet any current withstand
requirements, and to not cause any unmanageable side effects during normal and fault operating
conditions. Iterating this process may be needed to achieve the optimal parameter values.

Several tests are identified to check different fault scenarios given the addition of the grounding
transformer. When required, these tests can be specific based on utility standing practices. But
they can also draw on industry standards for specific guidance.

6-11
Figure 6-7
Flowchart for supplemental grounding transformer design

The first three tests are related to increased fault current with DER and may be addressed by
other screens and interconnection technical reviews. For example, issues such as exceed ing
protective device interrupting capabilities or mis-coordinate. FERC-SGIP and CA Rule 21, for
example, suggest a study is required if DER increases fault current by more than 10%. In case of
arc flash requirements these can vary depending on specific utility work practices. Arc flash risk
is also discussed as one of the side effects of supplemental grounding. It is also covered in a
recent IEEE standard, 28 and could very well evolve into a new DER screening criteria.
Stray voltage and ground potential rise issues are typically addressed case by case based on
complaints. Location experience, such as faming, dairy cows and lake front areas could point to
the need for a closer look. Standards applying to these include IEEE 80, IEEE 1590, IEEE 487.

Back feed that may occur during single phasing and zero sequence circulation (items 5 and 6 on
your list) has been reported with DER plants with supplemental grounding. 29 Also, several IEEE
standards support evaluation of transformer issues such as, IEEE C57.12, C57.109 and C37.91-
2000.

28
IEEE Guide for Performing Arc-Flash Hazard Calculations, IEEE Standard 1584-2018
29
Distributed Energy Resources Field Experience: Open Phase, EPRI Palo Alto, 3002015949, 2019

6-12
Side Effects of Supplemental Grounding
Supplemental grounding may not be needed in case of inverter DER and l-n connected load
acting as a ground source. A grounding transformer may be needed when 1) there is insufficient
l-n load to suppress GFOV, or 2) the inverter won’t limit overvoltage per IEEE 1547-2018,
clause 7.4 (voltage limits), or 3) limited withstand and lacking other overvoltage mitigation in
the zone (e.g., service transformer with configurations other than Yg/∆ or Yg/zig-zag). It is
important to avoid over grounding because of side effects discussed here.
Examples of case where supplemental grounding is needed are provided in Figure 6-8. Neither
the ungrounded synchronous machine with a ∆/Yg interconnection transformer, nor the DER
inverter with a Yg/Yg transformer, provide effective grounding. Noting here, transformer
configuration convention is MV/LV.
In the machine case, a grounding transformer with Yg/∆ configuration and impedance satisfying
X0/X1<3 and R0/X1<1 can be used. Note that the impedance criteria are defined by the machine
impedance characteristics. Parallel load impedances can be ignored as relatively larger. In
contrast, a resistive approach is more suitable for the inverter-based DER, and the parallel load
effect should be considered due to the high sequence impedance of inverters, as described in
Chapter 2. Designing supplemental grounding is discussed in the next section of this report.
Utility Utility
Source Source

Z1Machine, Z2Machine, Z0Machine Z1PV, Z2PV, Z0PV


Open Open
Synchronous
Rotating
Machine
Z1T, Z2T, Z0T N
Utility Utility Z1T, Z2T, Z0T
Primary Voltage Source Primary Inverter
Feeder Feeder (current Source)
Grounding Grounding
Transformer Transformer
Bank Load Bank
X0groundbank X0groundbank
R0groundbank R0groundbank
Rg
For synchronous machine For inverter-based DER
Figure 6-8
Typical Supplemental grounding for synchronous machine and inverter-based DER

With the transition to more inverter-based DER, there have been reported field experiences of
overgrounding and related side effects. When grounding transformers are oversized and
relatively low impedance, they become a strong source of ground currents (providing zero
sequence currents). This can cause side effects both during faults and as listed below.
Feeder ground faults – DER contribution to these currents must not exceed the temporary current
rating of transformers and other equipment including neutral grounding reactors.
Feeder open phase – Backfeed via grounding transformers can cause a sustained overvoltage on
the open phase requiring additional protection to disconnect for such a situation.
Feeder steady-state voltage imbalance – currents must not exceed the transformer continuous
current rating and other equipment exposed to the current, including neutral grounding reactors.

6-13
Consequently, care must be exercised when adding supplemental grounding. Management of
ground (zero-sequence) current flow should be considered in sizing and in design of any
supplemental ground source to avoid these side effects:
Desensitizing upstream protection relaying during ground faults
Nuisance tripping, or reduced selectivity for faults on an adjacent feeder
Increased fault currents and durations impacting devices, arc flash levels, etc.
Stress due to additional zero sequence currents normally and during faults.
Overvoltage on open phases from backfeed via grounding transformers
Increased ground potential rise and stray voltage near added ground sources.
Given the importance to consider side effect from ground sources, these are each discussed
below in more detail.
A. Ground fault relaying desensitization
During lateral circuit ground fault events, some of the current going to the lateral ground fault
comes from the DER “ground source” transformer, as shown in Figure 6-9. The fuse is therefore
exposed to more zero sequence current than the feeder breaker, and the feeder breaker also sees
less ground fault current than before DER. This effect can cause coordination problems between
circuit breakers, reclosers and fuses, as well as increased arc flash duration, etc.
A
SUBSTATION
B
C

feeder

main
ground Phase C 2nd ground
source Fault source
Gen.

Figure 6-9
Ground fault current from grounding transformer

The nature of the impedances of the grid compared to DER changes how fault current sequence
components divide. If the DER provides a ground source the zero-sequence current (ground
fault current) contribution of the DER can become significant. As shown in , the zero-sequence
impedance of the grid source is shown to be one half compared to DER, while grid’s positive and
negative sequence impedance 1/20th compared to DER. The zero-sequence current contribution
of the DER becomes significant and desensitization of upstream relays is possible.

6-14
Utility
V DER Source
Source

Positive R1 Rg1 Positive


Sequence Sequence
1% X1 Xg1 20%
Ifault
Negative Rg2 Negative
R2
Sequence Sequence
1% Xg2 20%
X2
CT Measuring
Ground fault
Current
R0 Rg0 Zero
Zero Sequence
Sequence Xg0 4%
2% X0

Figure 6-10
Ground fault current division effect

For better understanding, a case study is provided below in Figure 6-11. In this case a 2 MW PV
plant DER is connected to the grid through a solidly grounded 2 MVA Yg/∆ step-up transformer.
The zero-sequence impedance for line (Z0Line) and substation transformer (Z0sub) are 0.83 + j1.96
ohms and 0.07 + j1.318 ohms, respectively. Hence the total utility Z0-grid at POC = 0.90 + j3.278
ohms = 3.4 ohms. The DER step-up transformer Z0-DER = 5% × (12.472/2) = 5% × 77.75 ohms =
3.89 ohms, reducing fault current from the utility sources. This ground source is larger than
necessary and can lead to protection failures. A proper sized grounding impedance (reactor or
resistor) is shown in Figure 6-12, reducing the effect by roughly a factor of 50 while still
maintaining the target COG of 80% or less.

46 kV Source (has 2.5% Z at Substation POC)


138 kV
Substation Transformer 10 MVA 50 MVA
Z0sub= 0.07 + j1.318 ohms

LTC
12.47 kV

336 kcmil ACSR


Feeder
Mistakenly Solidly Grounded 2 MVA
1 Mile Step-Up Transformer (Z0 = 5.0%)

3.4 Ω 3.89 Ω
Inverter
DER
Point of 2 MVA
Connection Facility Loads
(POC)

Figure 6-11
Case study for ground fault relaying desensitization

6-15
DER

Neutral Grounding Impedance


is the solution to
reduce the effect

Figure 6-12
Grounding impedance to prevent ground fault relaying desensitization

B. Zero-sequence circulation in delta transformer winding


The normal imbalances of line-neutral connected load could cause background zero sequence
return current and impose a steady state zero sequence voltage (up to a few percent) on the wye
side of the transformer. This induces an additive zero sequence voltage on the delta connection
and circulating current in that loop. The circulating current can be estimated as V0/Z0 as shown in
Figure 6-13, where V0 is zero sequence voltage component and typically ranges from 1% to 3%,
Z0 is zero sequence impedance and ranges from 2% to 6% for distribution transformers. Too
much circulating current may result in the need to derate the transformer if operating near its
maximum load.
A
Grounded Wye B feeder
Substation C
Source
N
Io Circulating

Vo
Circulating Current I Circ . =
Z0

Figure 6-13
Zero sequence circulating current due to normal imbalance

C. Grounded-wye to delta transformer back-feed to utility feeder during single phasing


During a single phasing event as in Figure 6-10, if a Yg/∆ interconnection transformer is used,
the healthy (energized) phases will back feed power through the delta winding. This creates
voltage on the otherwise de-energized (opened) phases. It can happen with one or two open
phases.
Voltage on an open phase is an undesirable condition and may lead to safety issues for the power
system or power quality issues for customers connected on the affected phases. In addition, such

6-16
unbalanced and increased loading may overload the interface transformer. Therefore, local
protection is sometimes specified to detect the condition and trip the transformer before reaching
its damage curve limits.
Open Fuses
A
SUBSTATION
B feeder
C 3 MVA
Loads
N

Gen.

Figure 6-14
Power back-feed during single phasing

D. Ground Potential Rise and Stray Voltage


Ground Potential Rise (GPR) occurs during substation faults or lightning events, when a large
amount of current enters the earth. Figure 6-15 illustrates the GPR voltage during a fault event.
The GPR is relative to remote earth and can create step and touch potential hazards. The issue is
typically mitigated by increasing earth grounding near sources such as additional rebar at
substations, added copper grounding, fence grounding etc. GPR, if severe, can also cause
problems for other services such as telecommunications.
D Pole
Ground
Phase A Point of Fault Current
Injection (ground rod)
Phase B
Percent of
Phase C GPR Voltage
Relative to
Remote Earth
Grounding
Transformer
Distance
Neutral (D)

Foot to Earth
Ground Current

Ground Contact Point


Rod
• Steady State Current
• Fault Current

Earth

Figure 6-15
Ground potential rise

6-17
An example is given in Figure 6-16, where the fence step potential exposure is high due to the
improper ground grid design that does not extend beyond fence. It can be addressed by extending
the grid well outside the fence line as shown in the photo. Stray voltage is where steady state
ground current can be upsetting to some equipment, people and animals. Communication
circuits may be affected, for example telephone interference in the old analog systems. People in
swimming pools or lakes, and dairy cattle connected to milking machines are common sources of
stray voltage complaints.

Substation D
fence (top view) Substation
Percent of Fence
GPR Voltage
Relative to
Remote Earth Edge of Fence Line
Proper Substation Ground Grid Extends
beyond Fence Line as in this photo
Fence Post
Distance
(D)

Ground
Grid Foot to Earth
Contact Point

East West Axis Ground Grid


North South Axis to be Buried

Figure 6-16
Impact of GPR at substation fence

To sum up, these potential side effects should be considered with other factors related to the
DER transformer selection and design. Nearly all decisions around the transformer detailed
design are trade-offs. Utility practices have evolved from experience and in making these trade-
offs. Examples of learnings are:
• More local ground sourcing is not better. Large ground-source step-up transformers are more
likely to cause side effects and have less benefit with inverter-based DER.
• Small local grounding transformers, properly sized to mitigate GFO, are less likely to cause
coordination issues, but can aggravate open phase conditions and add to arc flash.
• Ground sources related to DER installations at certain types of customers (such as dairy
farms or swimming pools) may lead to stray voltage and current complaints.

Inverter-based Supplemental Grounding Tool (ISGT)


Support determination of the need, estimation of the overvoltage and design of supplemental
grounding, EPRI has developed an Excel-based tool. 30 The Inverter-based Supplemental
Grounding Tool (ISGT) is intended to help engineers in assessing the need for and specifying the
impedance parameters of a supplemental ground source for islanded inverter-interfaced DER.

30
Inverter-based Supplemental Grounding Tool (ISGT) v1.0 Beta, EPRI, Palo Alto, CA: 2020. 3002019326.

6-18
This tool addresses the need for supplemental grounding to manage GFOV and includes any
relevant LROV when islanded generation exceeds load.
The software tool provides distribution and protection engineers with a convenient means to
analyze supplemental grounding needs and excessive generation related overvoltages in islands
that are energized solely by inverter based DERs. Conventional short-circuit analysis software
does not have the capability to appropriately analyze these types of situations. The ISGT
includes a grid following inverter, modeled as a positive sequence current source. Inverter
parameters are based upon its commonly understood control behaviors, and ISGT calculates the
ground fault overvoltage using symmetrical component analysis.
A beta version has been provided to approximately a dozen utilities for testing purposes,
including the five NY State regulated utilities. Since the current tool user population and number
of applications are limited it is a research grade software at this stage. EPRI plans to work with
NY and other utilities and with NYSERDA to further evolve this tool and increase its
effectiveness. Meantime, Figure 6-17, generated from feedback at EPRI’s Fall 2020 modeling
workshop, indicates how utilities expect to use this tool in the future.

none of these 18%


all of these 45%
X/R ratio 0%
design of supplemental grounding 27%
screening for effective grounding 36%

0% 10% 20% 30% 40% 50%

Figure 6-17
How do you expect to use the EPRI grounding effectiveness calculation tool?

ISGT is a power system grounding tool. requires the user to enter the system and inverter
characteristics as input (shown in Figure 6-18), and gives the maximum phase-to-ground voltage
with and without ground faults. By adjusting the input parameters, the impact of loading level
and inverter behaviors on overvoltage can be identified, and the need for supplemental grounding
can be determined. This tool also supports supplemental grounding design, if needed. The users
can adjust the zero-sequence impedance and X/R ratio of the ground source to achieve desired
ground fault overvoltage.
To verify the results generated by ISGT, the overvoltage from this tool (GFO Tool_v1.0-
Optimization-betaR10) were compared with the full EMT simulation results. Since the nonlinear
effects introduced by arrester is not modeled in ISGT, it is also excluded from the simulation
model, which therefore results in higher overvoltage in comparison with results shown in
Chapter 3.
Figure 6-18 illustrates the configuration of ISGT for the case with delta connected load (0% L-N
load) and no supplemental grounding. The inverter current limit was 1.1 pu and its negative

6-19
sequence impedance was 0.26∠170° according to Figure 4-3. The load/gen ratio can be adjusted
by inputting different values for “minimum concurrent load in islanded grid”, and in this figure
load/gen = 1.

Figure 6-18
Analysis for overvoltage with delta load and no supplemental grounding, using EPRI ISGT

The comparison between simulation and analysis results are provided in Figure 6-19. The
overvoltage given by ISGT (red diamond) is closer to the average peak (red line) for the
available test points. The Inverter trips (user settable in ISGT and defaulted to 2.0 pu L-G) when
generation to load ratio (gen/load) exceeds 1.1 p.u. in this example. For the scenarios with
gen/load of less than 1.1 p.u, the results from ISGT are very similar to the EMT results. As the
gen/load ratio increases, the EMT and ISGT results begin to diverge due to nonlinearities that are
not captured in the symmetrical component analysis and assumptions about the control behavior.
2.3
5%
2.1
1.9 0%
0.4 0.6 0.8 1 1.2
Voltage (pu)

1.7
Mismatch (%)

1.5 -5%

1.3
Average peak -10%
1.1
Analysis
0.9 -15%
Peak Compared to Peak
0.7
0.5 0.7 0.9 1.1 1.3 1.5 Compared to Average Peak
-20%
Gen/Load Gen/Load

Figure 6-19
Comparison between simulation and analysis results for cases with delta load and no
supplemental grounding (note mismatch around 1pu is on no practical significance)

6-20
Figure 6-20 shows how the configuration of ISGT with 100% L-G load that might be typical of a
feeder dominated by residential load and no supplemental grounding source. Different from the
previous case, the percentage of load connected line-ground is set to 100%. Other parameters
remain. The results comparison is provided in Figure 6-21. In this case, the overvoltage analysis
from ISGT matches well with the peak voltage from the simulation, and the mismatch stays
within 5% expect when gen/load = 1 where load characteristics dominate.

Figure 6-20
Analysis for overvoltage with Yg load and no supplemental grounding, using EPRI ISGT

2.5 15%

10%
2
Voltage (pu)

5%
Mismatch (%)

1.5
0%
1 1.2 1.4 1.6 1.8 2
1 Average peak -5%
Analysis
Peak -10% Compared to Peak
0.5
Compared to Average Peak
1 1.2 1.4 1.6 1.8 2 -15%
Gen/Load Gen/Load

Figure 6-21
Comparison between simulation and analysis results for cases with Yg load and no supplemental
grounding

The last case involves both Yg load and supplemental grounding, as illustrated in Figure 6-22
and Figure 6-23. Due to the time limit, only two simulation points are available. For these two
points, the analysis results from ISGT is more accurate for the peak voltage prediction and the
mismatch stays below 5%. The mismatch from simulated average peak, on the other hand, is
quite high and more data are needed to better evaluate the analysis performance.

6-21
Figure 6-22
Analysis for overvoltage with Yg load and supplemental grounding, using EPRI ISGT

1.6 30%
Compared to Peak
1.5 25%
Compared to Average Peak
1.4 20%
Voltage (pu)

1.3
Mismatch (%)

15%
1.2
10%
1.1
5%
1 Peak
Average peak 0%
0.9
Analysis 1 1.2 1.4 1.6 1.8
-5%
0.8
0.9 1.1 1.3 1.5 1.7 1.9 -10%
Gen/Load Gen/Load

Figure 6-23
Comparison between simulation and analysis results for cases with Yg load and supplemental
grounding

Guidelines Summary
As deployment of inverter-based DER increases, conventional DER criteria for specification and
selection of interconnection transformers need to be revisited. This includes both the initial
screening for island and ground fault overvoltage, when supplemental grounding is indicated,
and the ground source design methodology. Both are covered in this chapter, which summarizes
research outcomes and provides recommendations on new criteria and screens.
Supporting the need for a more detailed look is EPRI’s (ISGT). This tool currently applies to islanded
scenarios. It was evaluated here in several different operating conditions. In general, it gives quite
reasonable overvoltage prediction when gen/load is not too high (nonlinearity from inverter controls and
transformer saturation) or too low (overvoltage is dominated by loads). Testing of this supplemental
grounding tool will continue and modifications will be made accordingly.

6-22
In the future the guideline provided in this section may be modified to also address intentional
islanding or microgrid grounding requirements. At the present time microgrid neutral grounding
requirement tend to conflict with on-grid and islanded ground source objectives.

6-23
7
CONCLUSIONS AND FUTURE WORK
Conclusions
This project aimed to true up long-standing DER grounding practices with the evolving change
over to inverter-based DER. It is appropriate because of significant differences in the fault
response seen in inverter-based compared to synchronous machine DER. Key differences include
current versus voltage source characteristics, negative sequence impedance, and the resulting
impact these have on ground fault overvoltage contribution. All these are primary determinates
in effective grounding. Specific objectives have been to improve interconnection technical
review processes and to make grounding requirements more transparent and consistent.
The project explored the meaning of effective grounding, basic principles, and important role of
DER transformer connections, load types and new requirements for faster inverter response. A
key area, previously unexplored, is the relationship and combination of GFOV and LROV during
an island. From those results the project also addressed the application and sizing of grounding
transformers, grounding impedance selection, potential interference with protection coordination
and grounding related side effects.

Key takeaways from this report:

• Effective grounding is a “power system” characteristic.


• Inverter response to ground fault and grid disconnection is significantly different than
synchronous machines.
• Many classical power system grounding practices are not appropriate for inverter plants
• Load is becoming a more critical and essential factor to consider any need for
supplemental ground sources with increasing inverter penetration.
• With relatively high system penetration of inverter-based generation, the undesirable
side-effects of adding supplemental ground sources have become more apparent.
• Design guidance and trade-offs to optimize the sizing and impedance values for
supplemental ground sources are becoming better defined for inverters and they are
different than for synchronous machines.

Overall recommendations:

1. Jurisdictions to adopt IEEE 1547-2018 where new overvoltage limits in Section 7.4 are
effective in reducing DER OV contributions:
o Meeting 1547-2018 Section 7.4 duration and voltage limits at the reference point
of applicability will solve most LRO and GFO problems without any additional
mitigation or grounding devices.
o In cases where the inverter can’t see the GFO overvoltage due to an upstream
transformer blocking the view, the standard still requires that the overvoltage
limits are not exceeded. If loads are insufficient to suppress in that zone, a

7-1
supplemental grounding transformer located in the zone may be a means for the
DER to meet the requirements of the standard.
2. Inverter manufactures to test for unbalanced output dynamics during islanded and faulted
conditions. From these test results, inverter impedance models should be provided to
facilitate improved analysis of overvoltage conditions and efficacy of supplemental
grounding solutions. Note that, short circuit tests, from which impedance models can be
deduced, are now mandated in IEEE 1547.1-2020.
3. Utilities to be proactive in the review and specification of DER interconnection and
supplemental grounding transformers. There are many tradeoffs and not one clear winner.
Some of the characteristics that make for a good transformer choice include:
o It interferes least with the utility system (both upstream and downstream) as far as
adverse ground source impacts are concerned
o It allows for direct measurement by the inverter of line to neutral voltage (which
enables higher speed IEEE 1547 Section 7.4 inverter overvoltage tripping to be
utilized more easily)
o It allows for supplemental zero sequence neutral grounding where effective
grounding is not otherwise provided (for example, if insufficient neutral-
connected load and if a GFOV risk has been identified)
o A wye-ground to wye-ground unit may be best solution in many situations, but
other types may be appropriate in certain cases.
4. With inverter DER the make-up of load for different island scenarios is a critical factor.
Some considerations to suppress GFOV are:
o A load 3 times the inverter generation on the island has been used as a rule of
thumb for nearly 20 years and is quite effective but is now outdated.
o The 3:1 ratio is now considered too conservative and a factor of 1.5:1 has been
recommended since about 2014 as sufficient to suppress essentially all possible
LROV and GFOV conditions without regard to the ratio of L-G and L-L load.
o Recent EPRI analysis indicates that an even lower loading is sufficient to limit
overvoltage where there is at least 1:1 load to generation ratio and at least 33% of
it connected in the line to neutral mode.
o If the load to generation ratio is not satisfied, or if load uncertainty increase risk
too much, then some form of mitigation such as ground source step-up
transformer, supplemental grounding, IEEE 1547-2018 Section 7.4 voltage
limiting, or time coordinated DTT may be needed. Not all solutions can work in
every case so each must be evaluated based on case specifics

Future Work
In this research, we have examined the negative sequence impedance of several commercial
inverters, but their characteristics have not been implemented in the simulation model yet. This
however may not be an issue since the negative sequence impedance changes the overvoltage
values but does not affect the conclusions from sensitivity study results.
Below gives the recommendations and comments from utilities about the recent research results
reported during EPRI’s Fall 2020 workshops and potential next steps.
 Research and conclusions look great, but there are more factors that need to be involved.
 Conduct more research to determine inverter negative sequence behavior.

7-2
 What fault current can be expected from inverter-based DER?
 When is GFOV not a concern for inverters with lower negative sequence impedance?
 Need more application guidance on required % of N-G load in cases of high (1:1)
penetration.
Workshop attendees also voiced some frustration about the undefined fault response of inverter
DER. This was apparent in response to the poll question “Is there a future need for standards that
define inverter negative sequence behavior?” (see Figure 7-1).

100% 84%
80%
60%
40%
20% 8% 8%
0%
yes no not sure

Figure 7-1
Do you see future need for a standard on inverter negative-sequence behavior?

Looking ahead, and based on input from utilities, EPRI has determined next research steps to be:
 Characterize inverter negative sequence behavior and specify the range of negative
sequence impedance.
 Continue and refine analytical methods on the application and sizing of grounding
transformers.
 Further develop criteria for load contribution to effective grounding of inverter DER.
 Vet new practices and procedures with utility protection engineers.
 Continue providing technical transfer via research updates, webcasts, and workshops.

7-3
A
VOLTAGE SETPOINTS IN LAB TEST
Table A- 1
Voltage setpoints for constant Vpos and varying Vneg

Positive sequence Negative sequence Voltage setting for grid emulator


Mag (pu) Phase angle Mag (pu) Phase angle Mag/ pu Phase angle
Setpoint 1, 10 s duration
A 0.8 0° 0.05 0° 0.85 0
B 0.8 -120° 0.05 120° 0.7762 -123.1979
C 0.8 120° 0.05 -120° 0.7762 123.1979
Setpoint 2, 10 s duration
A 0.8 0° 0.1 0° 0.9 0
B 0.8 -120° 0.1 120° 0.7550 -126.5868
C 0.8 120° 0.1 -120° 0.7550 126.5868
Setpoint 3, 10 s duration
A 0.8 0° 0.2 0° 1 0
B 0.8 -120° 0.2 120° 0.7211 -133.8979
C 0.8 120° 0.2 -120° 0.7211 133.8979
Setpoint 4, 10 s duration
A 0.8 0° 0.3 0° 1.1 0
B 0.8 -120° 0.3 120° 0.7000 -141.7868
C 0.8 120° 0.3 -120° 0.7000 141.7868

Table A- 2
Voltage setpoints for constant Vneg (0.1 pu) and varying Vpos

Positive sequence Negative sequence Voltage setting for grid emulator


Mag (pu) Phase angle Mag (pu) Phase angle Mag/ pu Phase angle
Setpoint 1, 10 s duration
A 0.95 0° 0.1 0° 1.05 0
B 0.95 -120° 0.1 120° 0.9042 234.5036
C 0.95 120° 0.1 -120° 0.9042 125.4964
Setpoint 2, 10 s duration
A 0.9 0° 0.1 0° 1 0
B 0.9 -120° 0.1 120° 0.8544 234.1825

A-1
C 0.9 120° 0.1 -120° 0.8544 125.8175
Setpoint 3, 10 s duration
A 0.8 0° 0.1 0° 0.9 0
B 0.8 -120° 0.1 120° 0.755 233.4132
C 0.8 120° 0.1 -120° 0.755 126.5868
Setpoint 4, 10 s duration
A 0.7 0° 0.1 0° 0.8 0
B 0.7 -120° 0.1 120° 0.6557 232.4109
C 0.7 120° 0.1 -120° 0.6557 127.5891
Setpoint 5, 10 s duration
A 0.6 0° 0.1 0° 0.7 0
B 0.6 -120° 0.1 120° 0.5568 231.0517
C 0.6 120° 0.1 -120° 0.5568 128.9483

Table A- 3
Voltage setpoints for constant Vneg (0.2 pu) and varying Vpos

Positive sequence Negative sequence Voltage setting for grid emulator


Mag (pu) Phase angle Mag (pu) Phase angle Mag/ pu Phase angle
Setpoint 1, 10 s duration
A 0.95 0° 0.2 0° 1.15 0
B 0.95 -120° 0.2 120° 0.8675 228.4825
C 0.95 120° 0.2 -120° 0.8675 131.5175
Setpoint 2, 10 s duration
A 0.9 0° 0.2 0° 1.1 0
B 0.9 -120° 0.2 120° 0.8185 227.7837
C 0.9 120° 0.2 -120° 0.8185 132.2163
Setpoint 3, 10 s duration
A 0.8 0° 0.2 0° 1 0
B 0.8 -120° 0.2 120° 0.7211 226.1021
C 0.8 120° 0.2 -120° 0.7211 133.8979
Setpoint 4, 10 s duration
A 0.7 0° 0.2 0° 0.9 0
B 0.7 -120° 0.2 120° 0.6245 223.8979
C 0.7 120° 0.2 -120° 0.6245 136.1021
Setpoint 5, 10 s duration
A 0.6 0° 0.2 0° 0.8 0
B 0.6 -120° 0.2 120° 0.5292 220.8934
C 0.6 120° 0.2 -120° 0.5292 139.1066

A-2
Table A- 4
Voltage setpoints for varying positive sequence and negative sequence voltage

Positive sequence Negative sequence Voltage setting for grid emulator


Mag (pu) Phase angle Mag (pu) Phase angle Mag Phase angle
Setpoint 1, 10 s duration
A 0.95 0° 0.1 0° 290.85 V 1.05 pu 0°
B 0.95 -120° 0.1 120° 250.45 V 0.9 pu -125.5°
C 0.95 120° 0.1 -120° 250.45 V 0.9 pu 125.5°
Setpoint 2, 10 s duration
A 0.9 0° 0.2 0° 304.7 V 1.1 pu 0°
B 0.9 -120° 0.2 120° 226.73 V 0.819 pu -132.22°
C 0.9 120° 0.2 -120° 226.73 V 0.819 pu 132.22°
Setpoint 3, 10 s duration
A 0.8 0° 0.3 0° 304.7 V 1.1 pu 0°
B 0.8 -120° 0.3 120° 193.9 V 0.7 pu -141.79°
C 0.8 120° 0.3 -120° 193.9 V 0.7 pu 141.79°
Setpoint 4, 10 s duration
A 0.7 0° 0.4 0° 304.7 V 1.1 pu 0°
B 0.7 -120° 0.4 120° 168.5 V 0.61 pu -154.72°
C 0.7 120° 0.4 -120° 168.5 V 0.61 pu 154.72°
Setpoint 5, 10 s duration
A 0.6 0° 0.5 0° 304.7 V 1.1 pu 0°
B 0.6 -120° 0.5 120° 154.23V 0.556pu -171.05°
C 0.6 120° 0.5 -120° 154.23V 0.556pu 171.05°

Table A- 5
Voltage setpoints for varying phase angle of negative sequence voltage

Positive sequence Negative sequence Voltage setting for grid emulator


Mag (pu) Phase angle Mag (pu) Phase angle Mag Phase angle
Setpoint 1, 10 s duration
A 1 0° 0.1 -60° 291.84 V 1.054 pu -4.72°
B 1 -120° 0.1 60° 249.3 V 0.9 pu -120.00°
C 1 120° 0.1 -180° 291.84 V 1.054 pu 124.72°
Setpoint 2, 10 s duration
A 1 0° 0.1 -40° 298.75 V 1.079 pu -3.42°
B 1 -120° 0.1 80° 251.15 V 0.907 pu -122.16°
C 1 120° 0.1 -160° 283.13 V 1.022 pu 125.53°
Setpoint 3, 10 s duration
A 1 0° 0.1 -20° 303.18 V 1.094 pu -1.79°
B 1 -120° 0.1 100° 256.40 V 0.926 pu -123.98°

A-3
C 1 120° 0.1 -140° 273.55 V 0.988 pu 125.72°
Setpoint 4, 10 s duration
A 1 0° 0.1 0° 304.7 V 1.1 pu 0°
B 1 -120° 0.1 120° 264.24 V 0.954 pu -125.21°
C 1 120° 0.1 -120° 264.24 V 0.954 pu 125.21°
Setpoint 5, 10 s duration
A 1 0° 0.1 20° 303.18 V 1.094 pu 1.79°
B 1 -120° 0.1 140° 273.55 V 0.988 pu -125.72°
C 1 120° 0.1 -100° 256.40 V 0.926 pu 123.98°
Setpoint 6, 10 s duration
A 1 0° 0.1 40° 298.75 V 1.079 pu 3.42°
B 1 -120° 0.1 160° 283.13 V 1.022 pu -125.53°
C 1 120° 0.1 -80° 251.15 V 0.907 pu 122.16°

A-4
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