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Griffo, A. orcid.org/0000-0001-5642-2921, Wang, J., Colombage, K. et al. (1 more author)
(2017) Real-time Measurement of Temperature Sensitive Electrical Parameters in SiC
Power MOSFETs. IEEE Transactions on Industrial Electronics. ISSN 0278-0046

https://doi.org/10.1109/TIE.2017.2739687

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Real-time Measurement of Temperature

Sensitive Electrical Parameters in SiC
Power MOSFETs
Antonio Griffo, Member, IEEE, Jiabin Wang, Senior Member, IEEE, Kalhana Colombage,
Tamer Kamel, Member, IEEE
1 resulting in increased thermal resistance and ultimately even
Abstract— This paper examines a number of techniques higher junction temperatures [5].
for junction temperature estimation of SiC MOSFETs The measurement or estimation of junction temperature
devices based on the measurement of Temperature during the operation of a power electronic converter is therefore
Sensitive Electrical Parameters (TSEPs) for use in online essential for its condition monitoring and prognosis of the
condition monitoring. Linearity, sensitivity to temperature
remaining useful life [6].
and circuit design for practical implementation are
discussed in detail. A demonstrator based on the
Monitoring of devices junction temperatures during real-
measurement of the quasi-threshold voltage, the turn-on time operation of a power electronics converter can be realized
transient characteristic (di/dt), the on-state voltage and the with either direct or indirect methods [7]. Direct temperature
gate current peak is designed and validated. It is shown that measurements using optical or physical contact methods have
the threshold voltage, the estimation of the gate current been proposed in literature [8]-[9]. Optical methods using
peak and the on-state voltage have potentially good optical fibers [8] and infrared thermal imaging can provide an
sensitivity to temperature variation and linearity over a wide accurate spatial temperature map of the power electronic
operating range. Very low sensitivity to temperature is module. However, these methods require the chip to be
shown for (di/dt). The proposed method can provide a
optically connected to the detection system and therefore the
valuable tool for continuous health monitoring in emerging
applications of SiC devices to high reliability applications.
protective dielectric gel has to be removed. Similarly, physical
contact methods require a direct contact with the chip with a
Index Terms—Power semiconductor devices, Condition thermo-sensitive material [9] or temperature probes requiring
monitoring, Power MOSFETs, Temperature measurements significant alterations to module packaging and dielectric gel.
Whilst potentially the most accurate ways of monitoring
temperature, the invasive nature of direct measurement
I. INTRODUCTION methods make them only suitable in laboratory testing
conditions and therefore unsuitable for general applications.
P OWER electronic systems play an increasingly significant
role in high reliability applications such as the automotive
and aerospace sectors. However, stringent safety requirements
It is well known that a number of electrical parameters in
semiconductor devices exhibit a measurable temperature
dependence. The measurement of Temperature Sensitive
and conservative design practices pose significant challenges to
Electric Parameters (TSEPs) can potentially provide a more
the adoption of novel and relatively unproven technologies such practical, albeit indirect, solution for temperature monitoring of
as the use of novel wide band-gap (WBG) devices e.g. Silicon power devices [10]-[13]. The non-invasive nature of TSEPs-
Carbide (SiC) power MOSFETs or Gallium Nitride (GaN) high
based approaches can allow temperature estimation on standard
electron mobility transistors which have the potential to
packaged modules without modification to the module itself,
significantly increase efficiency and power density. Continuous
only requiring access to terminal electrical quantities.
condition monitoring of power devices can potentially reduce A number of studies have been published on the use of
failure rates and alleviate reliability concerns by providing real- TSEPs for Silicon (Si) MOSFETs and IGBTs power devices,
time information on the state of health of the devices and
including the monitoring of dI/dt during turn-on or dV/dt during
indication on the remaining useful lifetime [1]-[2].
turn-off transients [14]-[16], Miller capacitance discharge time
Reliability of power electronic components is significantly
[17], threshold voltage [18]-[20], on-state voltage drop [21]-
affected by the device operating conditions. It is well known
[23], voltage across source/emitter parasitic inductance [24],
that two of the most significant stress factors for power internal gate resistance [25]-[26], gate drive turn-on transients
electronics modules are absolute temperature and temperature [27].
variations which result in thermo-mechanical stress due the
Despite the increased interest in the use of WBG devices,
different coefficients of thermal expansions (CTEs) of materials
only very limited literature is available in the public domain on
in the modules [3]-[4]. Repetitive thermal cycling can
the use of TSEPs for SiC MOSFETs [28]-[29]. Furthermore,
eventually cause cracks and voids in solder joints, bond-wire
most of the publications on TSEPs focus on the description of
lift-off, and delamination within module interconnection the underlying physical properties and often do not provide

1
Manuscript received March 21, 2017; revised May 17, 2017; accepted July University of Sheffield, S1 4DE, Sheffield, U.K. (e-mail:
5, 2017. This work was supported by European Commission Horizon 2020 – a.griffo@sheffield.ac.uk). Kalhana Colombage is with Malvern Instruments,
Mobility for Growth Program, under Grant 636170. A. Griffo, J. Wang and T. Ltd., Malvern WR14 1XZ, U.K.
Kamel are with the Department of Electronic and Electrical Engineering, The
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

circuit design guidelines for practical implementation of TSEPs A. On-state voltage

measurement in a real-time condition monitoring system. The on-state resistance and consequently the voltage
The paper presents an overview of the methods for junction
across the device during forward conduction have a
temperature estimation based on the measurement of TSEPs
reasonably good sensitivity to temperature as shown in the
and discusses the feasibility of online monitoring of TSEPs of
measurements in Fig. 1. However, the temperature dependence
SiC MOSFET devices. Four potential TSEPs are identified,
is potentially nonlinear and current-dependent, therefore its use
namely the quasi-threshold voltage, the turn-on transient (di/dt)
in online monitoring requires current measurement in order to
characteristic, the on-state voltage and the gate current peak,
decouple the load dependency from thermal effects. is
based on sensitivity to temperature and suitability for online
measurement under converter switching operation. also dependent on the state-of-health of device-to-packaging
Comprehensive design and experimental validation of the interconnects and indeed the collector-emitter voltage in
proposed online monitoring techniques are presented. IGBTs has also been proposed as a condition monitoring
indicator of wirebond lift-off and solder fatigue [33].
II. TEMPERATURE SENSITIVE ELECTRIC PARAMETERS IN The main challenge in the practical use of the for
SIC MOSFETS online monitoring resides on the significant voltage excursion
across drain-source terminals during converter switching,
The temperature dependence of the electrical characteristics ranging from few Volts during conduction to well over the dc-
of semiconductor devices arises as a result of the thermal link voltage during turn-off transients. These voltage
dependency of a number of parameters, the most significant excursions complicate the design of signal acquisition circuitry
being the bandgap energy the effective mobility with significant challenges in terms of high dynamic range and
and intrinsic concentration of the charge carriers. isolation between the low-voltage monitoring circuit and the
Similarly to most semiconductor materials, the bandgap energy high-voltage power stage. A number of circuits suitable for on-
decreases as temperature increases, whilst the intrinsic state voltage measurement derived from commonly used
concentration increases with temperature [30]. The mobility methods for de-saturation protection have been proposed using
in SiC devices has a more complex dependency on either passive (diode) or active solutions for disconnecting the
temperature depending on doping levels and density of traps at measurement circuitry during turn-off transients [22]. The
the gate oxide/SiC interface resulting in bulk mobility to emitter-follower circuit illustrated in Fig. 1 shows a practical
decrease but channel mobility to potentially increase with solution to the measurement of of the device under
temperature [31]-[32]. Temperature effects on these parameters test [21]. The device isolates the measuring circuitry
can be summarised by the empirical relations: connected to from the high voltage side when the drain
voltage rises above the reference during turn-off transient of
(1) M1, effectively limiting to safe voltage levels. When the
device M1 under test is switched on, is a few volts, and
exp (2) M2 is heavily saturated. Hence the measurement voltage
across is effectively equal to . When M1 is switched
off, quickly increases to the DC link voltage. As soon as
raises above 9 the gate-source voltage of M2 drops to
(3) zero effectively switching M2 off, isolating the measurement
point from the high voltage. With this circuit, the voltage
where are fitting coefficients. As a consequence, most measurement range is reduced to a few volts, and hence
terminal device characteristics are temperature dependent. accuracy and resolution can be significantly improved.
The sensitivity to temperature rise of on-state resistance,
threshold voltage , drain current commutation rate
and gate current Miller plateau are evaluated through analytical
modelling and experimental measurements on SiC MOSFETs
and compared to those of Si IGBTs in [29]. A general
conclusion is that the use of TSEPs in SiC devices is relatively
more challenging than in Si IGBT. This is due to faster
switching transients and lower sensitivity to temperature which Fig. 1. Circuit schematic for measurement
are caused by the wider band-gap requiring more thermal
energy to excite charge carriers as well as smaller chip areas
resulting in lower Miller capacitance. B. Threshold voltage
The on-state voltage , threshold voltage , the The threshold voltage is the minimum gate-source
internal gate resistance ( ) indirectly estimated by voltage required to switch on the device. Physically, is the
measuring the peak of gate current and the turn-on transient minimum gate bias starting to induce an inversion layer of free
have been selected for further analyses based on electrons underneath the gate oxide, creating a conductive
their suitability for online measurement under converter channel between drain and source in MOSFET or collector and
switching operation. emitter in IGBT. The increase of carrier concentration and the
decrease of bandgap with temperature results in a decrease of
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

with temperature, typically modelled as an approximately can be considered constant, hence can also be considered
linear dependence. Practical measurement of such as those
reported in datasheets, requires the definition of a current level
at which the gate measurement is taken. Although, current
comparison can be effectively used in static conditions,
similarly to those used in datasheet measurements, it is not
practical for online measurements during switching transients.

Fig. 3. Typical waveforms during SiC MOSFET (CCS020M12CM2) turn-

on transient: gate drive signal, gate-source voltage , voltage across
the external gate resistance (top) and the voltage across the
Fig. 2. Schematic circuit for quasi-threshold voltage measurement parasitic inductance (bottom).

The main challenge in online detection of during turn- constant. does not change significantly until is reached.
on transients lies in the sampling of the gate voltage at the is assumed to be constant at a known ambient
correct instant in time since the gate-source voltage has very temperature. It follows that becomes the dominating
fast rising times typically up to . A potentially suitable temperature dependant parameter in (4) affecting gate current
method used for the detection of a quasi-threshold voltage, during turn-on. Assuming the simplified circuit
adapted from [19],[34] where it was proposed for IGBT representation of gate charging process, the peak of the gate
applications, is illustrated in Fig. 2. A voltage across the current can be considered proportional to . A simple
parasitic inductance between the auxiliary Kelvin source (S’) peak detector circuit measuring the voltage across the external
and the source (S) is generated when the device current gate resistor ( ) whose peak is directly proportional to the
starts to rise during device turn-on. The rising edge of the gate current [25]-[27], is outlined in the schematic shown in
voltage across the parasitic inductance, which is Fig. 4.
proportional to , can be used to trigger the sample and Similarly to , the internal gate resistance as TSEP is
hold circuitry acquiring the gate-source voltage effectively potentially load independent. Heavy doping of polysilicon
capturing the start of conduction and therefore the quasi- required for low resistivity gates, typically results in low
threshold voltage. An AND gate activated by the gate drive temperature coefficient of its resistivity [35], potentially
signal, is used to avoid spurious triggering due to noise outside resulting in low sensitivity of as a TSEP.
of the switching transients. Illustrative waveforms of the gate
drive signal, gate-source voltage , voltage across the
external gate resistance and the voltage across the parasitic
inductance during a turn-on event, are shown Fig. 3.
A potentially significant benefit of use as TSEP is its
independence from load current.

C. Internal gate resistance (RG,in)

The internal gate resistance is the lumped equivalent
of the distributed resistance of the polysilicon gate and metal
contacts in the MOSFET device. From terminal point of view,
can be considered in series with the parallel of the gate-
source and gate-drain capacitances. The time constant of
the equivalent gate capacitance charging process during turn-on Fig. 4. Schematic circuit for gate current peak detection
before is reached can be expressed as:
D. Turn-on transient
(4) The rate of change of device current during a turn-on
where is the external gate resistance , and are the transient can be expressed as [28]:
gate-source and gate-drain capacitances, respectively. At turn-
on, for a fixed DC-link voltage, the drain-source voltage
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

(5)

where is the electron mobility, is the intrinsic gate oxide

capacitance, is the gate width/length ratio, is the gate
drive voltage.
The negative temperature coefficient of both threshold
voltage and mobility have contrasting influence on
. While a reduction in with temperature would Fig. 6. Schematic circuit for peak detector
favour faster turn-on, the reduction of mobility would have
opposite influence on . As a first order approximation,
the temperature dependency of could be neglected in the
initial phase of the turn-on process, resulting in the prediction
of increase of with temperature. Extensive
measurements reported in [29] shows that the temperature
variation of is device and circuit dependent. For large
devices increases with temperature, however the
variation becomes very small for low current devices. The gate
drive resistance also has a strong influence on and
its sensitivity to temperature variations becomes vanishingly
small for low values of required for switching losses
minimization. Gate drives with variable output resistances have
been proposed as a potential solution for occasional
temperature monitoring [18]. In conclusion, the practical use of Fig. 7. Current measurement using integration of
as TSEP is non-trivial not only because of the A qualitative comparison of the analysed TSEPs for SiC
extremely fast transients resulting in challenging acquisition MOSFETs is summarized in Tab. 1.
circuit design, but also due to a potentially very low temperature
sensitivity and current dependence. TABLE I
Since the voltage across the source parasitic inductance COMPARISON OF TSEPS FOR SIC MOSFETS
TSEP ADVANTAGES DISADVANTAGES
is proportional to the rate of change of , the peak value
 Good potential  Not linear in SiC
of will be used as an indirect measurement of as
sensitivity  Current dependent
illustrated in Fig. 5. The peak detector can be realised with a On-state  No modification to  Small value and less
precision half-wave rectifier, a circuit also known as active voltage module
diode, and a resettable memory capacitor as shown in Fig. 6. drop ( ) sensitive to temperature
variation in SiC
The memory capacitor hold the peak value of the voltage across
over the turn-on transient until is reset in the next switching  Non-trivial circuit isolation
cycle. The integration of can be used to estimate the output  On-line monitoring  An auxiliary Kelvin source is
current as illustrated in Fig. 7. This can provide a practical Threshold possible via an required
way of estimating device current which can be used to decouple voltage auxiliary Kelvin source  Less temperature sensitive
( ) and parasitic in SiC
load and temperature dependence of the proposed TSEPs. inductance
 Susceptible to noise

 On-line monitoring  Low temperature sensitivity

Turn-off
possible via an  High dI/dt or short duration
and Turn-
auxiliary Kelvin
on times or
source and parasitic  Complex behaviour in SiC
inductance

 No module  High resolution ADC is

modification is required
Internal
required, possible also  Susceptible to noise
Gate
on three-terminal
Resistance/
devices (without
current
auxiliary Kelvin
source)
Fig. 5. Schematic circuit for measurement of peak voltage and current
across III. TSEPS MONITORING CIRCUIT DESIGN
The methods for online TSEPs monitoring described in the
previous section have been implemented in a data acquisition
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

and control circuit board whose main functionalities are shown

in the block diagram of Fig. 8. Two high resolution (18-bit)
Analog-to-Digital Converters (ADC) are at the core of the
proposed design. The ADCs, configured with a full differential
range of ± 4.096V provide a resolution of 0.031 . The
voltages across the external gate resistance , the voltage
between the source and auxiliary source connection , the
gate-source voltage and the voltage across the drain-source
are all measured on the power SiC MOSFET. An additional
channel is dedicated to thermistor (NTC) temperature sensor for
module baseplate temperature monitoring purpose. Resettable
peak detectors and integrators are used to measure the peak of
and during turn-on and integrate , respectively, as
described in the previous sections. A supervisory CPU (ARM
Cortex M4) controls the data acquisition communicating with
the ADCs and controlling the reset signals for the integration (a)
and peak detection, generates the control signals for the gate
drives and manages the USB communication interface with a
supervisory PC for data storage and display.

(b)
Fig. 9. Top (a) and bottom (b) side of the aquisition board

IV. EXPERIMENTAL SETUP

Experimental assessment of the proposed TSEPs
monitoring has been performed using a double pulse testing
Fig. 8. Schematic diagram of the designed aquisition board for TSEPs setup whose schematic and principle of operation are illustrated
monitoring in Fig. 10. A photo of the experimental setup is shown in Fig.
11. An air-cored inductor ( ) is used as load. A
The timing of the control signals is managed by the CPU temperature controlled hot-plate is used for testing at different
depending on the specific TSEP to be measured. The data conditions. A SiC six-pack module (Cree CCS020M12CM2)
transfer from ADCs and CPU is through SPI bus and the has been used. The module is mounted on PCB providing planar
required physical isolation between the analogue side DC link connections. An off-the-shelf gate drive (Prodrive
(referenced to the power converter ground) and the digital side Technologies - PT62SCMD12) has been used. An interface
(CPU) is obtained with the use of opto-coupled digital isolator PCB is used to isolate the CPU and the computer through USB
integrated circuits. Photos of the top and bottom sides of the interface. Although the ADC PCB also contains digital isolators
manufactured board, annotated with the main features and to isolate the Kelvin source (GND) from the CPU, the digital
components, are shown in Fig. 9. The board, manufactured on interface and isolation PCB adds extra protection for the user
a four-layer PCB measures 78mm x 50 mm. and the computer. In addition, this PCB also contains a USB to
serial bridge (for SPI communication over USB) as well as
JTAG connection to the CPU (through external J-Link
emulator). The gate drive signal generated by the CPU in the
ADC PCB is also routed through this PCB.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

datasheet using offline methods. A small discrepancy might be

due to slightly different testing conditions e.g. gate drive
voltage and device variability. A good linearity with
temperature is also evident. The on-state voltage is, however,
current-dependent and therefore the use of as TSEP
requires an independent measurement of device current in order
to decouple the load from temperature effects. Device current
measurement can be obtained either through resistive shunts or
using the integration of parasitic inductance voltage as
described in the previous section. However a shunt may
compromise packaging and add extra loss to converter, both are
not desirable.
Fig. 10. Schematic circuit (left) and exemplary waveforms (right) of
a double pulse test

Fig. 12. Measured on-state voltage as function of temperature and

load current

B. Quasi-threshold voltage
The measured quasi-threshold voltage as function of
(a) temperature and load current using the method described in
section II.B is shown in Fig. 13. The expected negative
temperature coefficient of is confirmed. A relatively good
linearity is observed. Good sensitivity of ~9.3mV/°C is shown.
The invariance to load current of is also confirmed.

(b)

Fig. 11. Experimental setup (a) and view of the power module (b)

V. RESULTS AND DISCUSSION

Experimental measurements have been performed on the
SiC module up to its maximum rated current (29.5A at 25°C)
and at temperatures ranging from ambient to 130°C.
Temperature is controlled with the hotplate and monitored
through the integrated NTC in the module. If sufficient time is
allowed between the application of the double pulse transients,
device self-heating is minimized and, in steady-state conditions, Fig. 13. Measured quasi-threshold voltage vs temperature and load
current
the device temperature will be equal to the baseplate
temperature measured by the integrated NTC.
C. Internal gate resistance (RGin)
A. On-state voltage The estimated internal gate resistance as function of
The measured on-state voltage as function of temperature and load current according to the methodology of
temperature and load current with is shown in Fig. section II is shown in Fig. 14. A good load invariance and
12. A good sensitivity of at maximum current is linearity with temperature is demonstrated, although the
demonstrated, similar to the sensitivity of approximately relatively small sensitivity of C makes the method
reported in the datasheet reported in the device potentially sensitive to noise. Temperature variation in external
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

gate resistance and in the gate drive circuit will also affect the method for current effect decoupling for other current-
accuracy of estimation. Therefore, the external gate resistance dependent TSEPs such as the on-state voltage.
should be selected with very low temperature coefficient. The Based on the measurement results of the four candidate
effect of variation of gate drive characteristic with temperature TSEPs, it is evident that is not very sensitive to
may be decoupled by measurement of the gate voltage. temperature variation, and hence this parameter would not be
suitable for online junction temperature monitoring. In contrast,
both the threshold voltage and drain-source on-state voltage
exhibit good temperature dependency. However, is
shown to be independent of device (load) current, which makes
it attractive for practical implementation. While is also
highly dependent on device current, the relationship is quite
linear, and hence by employing the device current measurement
technique shown in Fig. 16, it is possible to decouple the load
effect. Thus, may also be a promising candidate TSEP
for online junction temperature. While the internal gate
resistance variation is also independent of device current, its
sensitivity is relatively low and the signal-to-noise by
employing this parameter as online junction temperature would
be poor. This may compromise the quality of online monitoring
in the electronically noisy environment.
Fig. 14. Measurement of the estimated internal gate resistance as
function of temperature and load current

D. Turn-on transient

Fig. 16. Measured integrated voltage over parasitic source

inductance as function of drain-source current for different values of
temperature

Fig. 15. Measured peak voltage over parasitic source

inductance as function of temperature and current

Fig. 15 illustrates the measured peak voltage variations

with temperature and load current across the parasitic
inductance between source and auxiliary source connection,
according to the methodology described in Section II. This
voltage is a signal proportional to A very low
sensitivity to temperature variation is evident, highlighting the
difficulty in using this signal as TSEP. Indeed, the voltage
variation due to load current is more significant, and hence
decoupling the temperature effect from the load would be more
difficult.
Fig. 17. Measured integrated voltage over parasitic source
Figs. 16-17 show the measured integrated voltage inductance as function of temperature for different values of drain-
over the parasitic source inductance as function of drain- source current
source current and temperature, respectively. Although a very
low sensitivity to temperature variation makes this signal CONCLUSION
impractical as TSEP, the very good linearity makes it a good The paper has reviewed the use of temperature sensitive
candidate for device current monitoring, providing a practical electrical parameters for online temperature estimation in SiC
power MOSFETs. Four TSEP candidates have been identified
as most promising when taking into account criteria of
sensitivity and linearity to temperature variation, dependence
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

on loading conditions as well as practicality in real-time [10] Y. Avenas, L. Dupont, and Z. Khatir, “Temperature measurement of
power semiconductor devices by thermo-sensitive electrical parameters—
measurement.
A Review” IEEE Trans. Power Electron., vol. 27, no. 6, DOI:
Practical circuits for measurement of the identified TSEPs 10.1109/TPEL.2011.2178433, pp. 3081–3092, June 2012.
have been described, designed and implemented in a high- [11] N. Baker, M. Liserre, L. Dupont and Y. Avenas, "Junction temperature
resolution data acquisition board. The capabilities of the measurements via thermo-sensitive electrical parameters and their
application to condition monitoring and active thermal control of power
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converters," in Proc. IECON, Vienna, DOI:
converter operation have been demonstrated with extensive 10.1109/IECON.2013.6699260, Nov. 10-13, 2013, pp. 942-948.
experimental validation using a double-pulse test setup and a [12] N. Baker, M. Liserre, L. Dupont and Y. Avenas, "Improved Reliability of
commercial SiC module. Power Modules: A Review of Online Junction Temperature Measurement
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show potentially good sensitivity to temperature [13] H. Niu, R.D. Lorenz, "Evaluating different implementations of online
variation and linearity over a wide operating range. Relatively junction temperature sensing for switching power semiconductors",
lower sensitivity has been demonstrated for a TSEP based on Energy Conversion Congress and Exposition (ECCE) 2015 IEEE, DOI:
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the estimation of the internal gate resistance . Both and [14] D. Barlini, M. Ciappa, A. Castellazzi, M. Mermet-Guyennet, W. Fichtner,
show relative insensitivity to load current variation. Very “New technique for the measurement of the static and of the transient
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Appl., vol. 52, n. 2, DOI: 10.1109/TIA.2015.2497202, pp. 1677-1687, Jiabin Wang (SM’03) received the B.Eng. and
March/Apr. 2016. M.Eng. degrees from Jiangsu University,
[28] J.O. Gonzalez, O. Alatise, J. Hu, L. Ran, and P. Mawby, “Temperature Zhengjiang, China, in 1982 and 1986,
sensitive electrical parameters for condition monitoring in SiC power respectively, and the Ph.D. degree from the
MOSFETs,” in Proc. PEMD, Glasgow, UK, DOI: 10.1049/cp.2016.0267, University of East London, London, U.K., in 1996,
April 19-21, 2016, pp.1-6. all in electrical and electronic engineering.
[29] J.O. Gonzalez, O. Alatise, J. Hu, L. Ran, and P. Mawby, “An investigation Currently, he is a Professor in Electrical
of temperature sensitive electrical parameters of SiC power MOSFETs,” Engineering at the University of Sheffield,
IEEE Trans. Power Electron., Vol. 32, n.10, DOI: Sheffield, U.K. From 1986 to 1991, he was with
10.1109/TPEL.2016.2631447, pp. 7954-7966, Oct. 2017. the Department of Electrical Engineering at
[30] M. Roschke, F. Schwierz “Electron Mobility Models for 4H, 6H, and 3C Jiangsu University, where he was appointed a
SiC,” IEEE Trans on Electron Dev., Vol. 48, N. 7, DOI: Lecturer in 1987 and an Associated Professor in
10.1109/16.930664, pp. 1442-1447, July 2001. 1990. He was a Postdoctoral Research Associate at the University of
[31] T. T. Mnatsakanov, M. E. Levinshtein, L. I. Pomortseva1 and S. N. Sheffield, Sheffield, U.K., from 1996 to 1997, and a Senior Lecturer at
Yurkov, “Carrier mobility model for simulation of SiC-based electronic the University of East London from 1998 to 2001. His research interests
devices”, Semicond. Sci. Technol., vol. 17, pp. 974–977, 2002. range from motion control and electromechanical energy conversion to
[32] S. Potbhare, N. Goldsman, A. Lelis, J. M. McGarrity, F. B. McLean, and electric drives for applications in automotive, renewable energy,
D. Habersat, “A physical model of high temperature 4H-SiC MOSFETs”, household appliances and aerospace sectors.
IEEE Trans. Electron. Dev. Vol. 55, n. 8, I: 10.1109/TED.2008.926665, He is a fellow of the IET and a senior member of IEEE.
Aug. 2008, pp. 2029-2040.
[33] A. Alghassi, S. Perinpanayagam, M. Samie, and T. Sreenuch, Kalhana Colombage received the M.Eng.
“Computationally efficient, real-time embeddable prognostic techniques degree in electronic engineering with
for power electronics,” IEEE Trans. Power Electron. Vol. 30, n. 5, DOI: employment experience from the University of
10.1109/TPEL.2014.2360662, pp. 2623-2634, May 2015. Sheffield, Sheffield, U.K., in 2010, where he
[34] H. Luo, Y. Chen, P. Sun, W. Li, X. He, “Junction temperature extraction received the Ph.D. degree for his thesis “Design
approach with turn-off delay time for high-voltage high-power IGBT and control of on-board bidirectional battery
modules”, IEEE Trans. Power Electron. Vol. 31, no. 7, DOI: chargers with islanding detection for electric
10.1109/TPEL.2015.2481465, pp. 5122-5132, July 2016. vehicle applications” in 2015. He was a
[35] M. S. Raman, T. Kifle, E. Bhattacharya, and K. N. Bhat, “Physical model Postdoctoral Research Associate in the
for the resistivity and temperature coefficient of resistivity in heavily Electrical Machines and Drives Group, University
doped polysilicon”, IEEE Trans. on Electron Dev., Vol. 53, n. 8, DOI: of Sheffield, from October 2015 to May 2016. He is currently with
10.1109/TED.2006.878020, Aug. 2006, pp. 1885-1892. Malvern Instruments, Ltd., Malvern, U.K. His research interests include
single-phase grid converters, control systems, and digital electronics.

Antonio Griffo (M’13) received the M.Sc. degree Tamer Kamel (M’15) received the B.Sc. and
in electronic engineering and the Ph.D. degree in M.Sc. degrees in electrical engineering from
electrical engineering from the University of Cairo University, Giza, Egypt, in 2007 and 2010,
Napoli “Federico II,” Naples, Italy, in 2003 and respectively, and the Ph.D. degree in electrical
2007, respectively. From 2007 to 2013, he was a power engineering from the University of New
Research Associate with the University of Brunswick, Fredericton, NB, Canada, in 2015. He
Sheffield, Sheffield, U.K., and the University of is currently a Postdoctoral Research Associate
Bristol, Bristol, U.K. He is currently a Lecturer with the University of Sheffield, U.K. His research
with the Department of Electronic and Electrical interests include power electronics, power system
Engineering, University of Sheffield. His research protection, and artificial intelligence applications
interests include modeling, control and condition monitoring of electric in power systems.
power systems, power electronics converters, and electrical motor
drives, for renewable energy, automotive and aerospace applications.