STD 1703 L
STD 1703 L
STD 1703 L
STD1703L 30 V <0.05 Ω 17 A
■ TYPICAL RDS(on) = 0.038 Ω
■ APPLICATION ORIENTED 3
CHARACTERIZATION 1
DPAK
DESCRIPTION
This MOSFET is the latest development of STMi-
croelectronics unique “Single Feature Size™” INTERNAL SCHEMATIC DIAGRAM
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalance characteristics and
less critical alignment steps therefore a remark-
able manufacturing reproducibility.
APPLICATIONS
■ DC-DC CONVERTERS
ORDERING INFORMATION
SALES TYPE MARKING PACKAGE PACKAGING
STD1703LT4 D1703L DPAK TAPE & REEL
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 7.5 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
Tl Maximum Lead Temperature For Soldering Purpose 275 °C
ON (1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA 1 V
RDS(on) Static Drain-source On VGS = 10V, ID = 8.5 A 0.038 0.05 Ω
Resistance
VGS = 5 V, ID = 8.5 A 0.045 0.06 Ω
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS > ID(on) x RDS(on)max, 7 S
ID =11A
Ciss Input Capacitance VDS= 25V, f= 1 MHz, VGS= 0 330 pF
Coss Output Capacitance 90 pF
Crss Reverse Transfer 40 pF
Capacitance
2/10
STD1703L
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(off) Turn-off-Delay Time VDD = 15V, ID = 8.5A, 25 ns
tf Fall Time RG = 4.7Ω, VGS = 4.5V 22 ns
(see test circuit, Figure 3)
tr(off) Off-voltage Rise Time Vclamp =24V, ID =17A 22 ns
tf Fall Time RG = 4.7Ω, VGS = 4.5V 55 ns
tc Cross-over Time (see test circuit, Figure 5) 75 ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 17 A
ISDM (1) Source-drain Current (pulsed) 68 A
VSD (2) Forward On Voltage ISD = 17A, VGS = 0 1.5 V
trr Reverse Recovery Time ISD = 17A, di/dt = 100A/µs, 30 ns
Qrr Reverse Recovery Charge VDD = 15V, Tj = 150°C 18 nC
IRRM Reverse Recovery Current (see test circuit, Figure 5) 1.2 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3/10
STD1703L
4/10
STD1703L
5/10
STD1703L
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Fig. 4: Gate Charge test Circuit
Resistive Load
6/10
STD1703L
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
L2 0.8 0.031
P032P_B
7/10
STD1703L
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
e 2.30 0.091
8/10
STD1703L
9/10
STD1703L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
10/10