Computer Organization and Architecture - Unit 1 Chapter 1

CHAPTER 1

BASIC STRUCTURE OF COMPUTER

Computer Organization and Architecture mainly deals with the computer Hardware and
Computer Architecture.

Computer Hardware: Collection of Physical parts of a computer is termed as Computer

Hardware. Ex: Monitor, Keyboard, Mouse etc
It also includes storage media, electronic circuits like motherboard etc.

Computer Architecture: It specifies the functionality of computer systems, different

instruction sets and the hardware units that implements these instructions.

Computer ( Digital Computer): A computer is a fast electronic computing machine that

accepts digitized input information, processes it according to a list of internally stored
instructions and produces the resulting output information.

List of instructions are called programs & Internal storage is called computer memory.

Computer Types:

There are many types of computers based on the size, cost, computational power etc.

1. Personal computers: This is the most common type of computers found in homes,
schools, Business offices etc.
i. Desktop Computers:
Computer having a processing or a storage unit, visual display unit, audio unit, input units
that can all be located on a desk of a home or an office.

ii. Portable Notebook Computers:

These are compact version of personal computer with all kinds of devices of the desktop
that is being packaged in a single unit.

2. Work stations: These have high resolution input/output (I/O) graphics capability, but
with same dimensions as that of desktop computer. These are used in engineering
applications of interactive design work.
Example: GPUs, System used in medical applications like Ultrasound, CT Scan etc.

3. Enterprise systems and Servers: Enterprise systems are used for business data processing
in medium to large corporations that require much more computing power and storage
capacity than work stations.
Example: ATM Machine
Servers: These are the ones which can handle large volume of requests to handle data. Here,
the requests and responses both are transferred through network.
Example: File Servers, DB Servers

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4. Super Computers: These are used for large scale numerical calculations required in the
applications like weather forecasting etc.

FUNCTIONAL UNITS

A computer consists of 5 functionally independent main parts.

1) Input Unit
2) Memory Unit
3) Arithmetic and Logic Unit
4) Output Unit
5) Control Unit

A computer consists of five functionally independent main parts input, memory, arithmetic
logic unit (ALU), and output and control unit.

Input device accepts the coded information as source program i.e. high level language. This is
either stored in the memory or immediately used by the processor to perform the desired
operations. The program stored in the memory determines the processing steps. Basically the
computer converts one source program to an object program. i.e. into machine language.
Finally the results are sent to the outside world through output device. All of these actions are
coordinated by the control unit.

Information handled by the computer is termed as Instructions.

Set of Instructions is called Program.

Input unit:
Computers accept coded information through input units, which read the data. Whenever a
key is pressed, the corresponding letter or number is translated into its equivalent binary code
and transmitted over a cable to either memory or processor. Keyboard is the most well-
known input device. Joysticks, trackballs, mouse, scanners etc are other input devices.

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Memory unit: Its function is to store programs and data. The memory unit is broadly
classified into two classes.

1) Primary memory: - It is a fast memory that operates at electronic speeds. Programs must
be stored in this memory while they are being executed. The memory contains a large
number of semiconductors storage cells, each capable of storing one bit of information.
These are processed in a group of n bits called a word. To provide easy access to a word
in memory, an unique address is associated with each word location.

Addresses are numbers that identify memory location. Number of bits in each word is
called word length of the computer. Programs must reside in the memory during
execution. Instructions and data can be written into the memory or read out under the
control of processor.
The time required to access one word in called Memory Access Time.
Main memory is the largest and the slowest part of the primary memory and cache
memory is smaller and faster RAM unit which resides in the processor chip.

2) Secondary memory: - It is used when large amounts of data & programs have to be
stored, particularly information that is accessed infrequently. Examples: - Magnetic disks
& tapes, optical disks (i.e. CD-ROM’s), floppies etc.

Arithmetic logic unit (ALU):

Most of the computer operations like addition, subtraction, division, multiplication and
logical operations are executed in ALU of the processor. The operands are brought into the
ALU from memory and stored in high speed storage elements called registers. Each register
can store one word of data. Access Time to register is faster than access time to the cache
unit.

Output unit:
These actually are the counterparts of input unit. Its basic function is to send the processed
results to the outside world.
Examples: Printer, speakers, monitor etc.

Control unit:
It is effectively the nerve center that sends signals to other units and senses their states. The
actual timing signals that govern the transfer of data between input unit, processor, memory
and output unit are generated by the control unit. Timing signal are signals that determine
when a given action is to take place.

Basic Operational Concepts:

To perform a given task an appropriate program consisting of a list of instructions is stored in

the memory. Individual instructions are brought from the memory into the processor, which
executes the specified operations. Data to be used as operands are also stored in the memory.

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Example: - Add LOCA, R0

This instruction adds the operand at memory location LOCA, to operand in register R0 &
places the sum into register R0. This instruction requires the performance of several steps.

1. First the instruction is fetched from the memory into the processor.
2. The operand at LOCA is fetched and added to the contents of R0.
3. Finally the resulting sum is stored in the register R0.

The preceding Add instruction combines a memory access operation with an ALU
Operations. In some other type of computers, these two types of operations are performed by
separate instructions for performance reasons.

Load LOCA, R1

Add R1, R0

Transfers between the memory and the processor are started by sending the address of the
memory location to be accessed to the memory unit and issuing the appropriate control
signals. The data are then transferred to or from the memory.

The Fig 1.2 shows how memory & the processor can be connected. In addition to the ALU &
the control circuitry, the processor contains a number of registers used for several different
purposes.

The Instruction Register (IR): Holds the instruction that is currently being executed. Its
output is available for the control circuits which generates the timing signals that control the
various processing elements in one execution of instruction.

The Program Counter (PC): This is another specialized register that keeps track of
execution of a program. It contains the memory address of the next instruction to be fetched
and executed.

Besides IR and PC, there are n-general purpose registers R0 to Rn-1. The other two registers
which facilitate communication with memory are:
1. MAR (Memory Address Register): It holds the address of the location to be
accessed.
2. MDR (Memory Data Register): It contains the data to be written into or read out of
the address location.

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Operating steps are as follows:

1. Programs reside in the memory & usually got through the Input unit.
2. Execution of the program starts when the PC is set to point at the first instruction of
the program.
3. Contents of PC are transferred to MAR and a Read Control Signal is sent to the
memory.
4. The first instruction is read out and loaded into the MDR.
5. The contents of MDR are transferred to the IR & the instruction is ready to be
decoded and executed.
6. If the instruction involves an operation by the ALU, it is necessary to obtain the
required operands.
7. An operand in the memory is fetched by sending its address to MAR & Initiating a
read operation.
8. When the operand has been read from the memory to the MDR, it is transferred from
MDR to the ALU.
9. After one or two such repeated cycles, the ALU can perform the desired operation.
10. If the result of this operation is to be stored in the memory, the result is sent to MDR.
11. Address of location where the result is stored is sent to MAR & a write operation is
initiated.
12. The contents of PC are incremented so that PC points to the next instruction that is to
be executed.

Example 1: MOV LOCA, R0

1. Initially PC will be pointing to this instruction.

2. The contents of PC is transferred to MAR and Read control signal is sent.
3. The contents present at location pointed by MAR is read into MDR.
4. Contents of MDR is transferred to IR.

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5. Meanwhile, PC is incremented to point to next instruction.

6. Instruction is decoded at IR.
7. Since source operand is memory location, IR sends the address of LOCA to MAR.
8. Control Unit issues Read Control Signal.
9. Contents present at address pointed by MAR is loaded into MDR.
10. Since destination operand is a general purpose register, content of MDR is directly
transferred to the Register R0.

Example 2: MOV R0, LOCA

1. Initially PC will be pointing to this instruction.
2. The contents of PC is transferred to MAR and Read control signal is sent.
3. The contents present at location pointed by MAR is read into MDR.
4. Contents of MDR is transferred to IR.
5. Meanwhile, PC is incremented to point to next instruction.
6. Instruction is decoded at IR.
7. Since source operand is a general purpose register R0, the data in R0 is moved to
MDR.
8. Since, the destination operand is a memory location, IR sends the address of LOCA to
MAR.
9. Control Unit issues the Write Signal.
10. Contents of MDR is written into memory location pointed to by MAR.

Example 3: ADD R1,R2

1. Initially PC will be pointing to this instruction.
2. The contents of PC is transferred to MAR and Read control signal is sent.
3. The contents present at location pointed by MAR is read into MDR.
4. Contents of MDR is transferred to IR.
5. Meanwhile, PC is incremented to point to next instruction.
6. Instruction is decoded at IR.
7. Since both the operands are registers, transfer the contents of R1 and R2 to ALU.
8. Perform Addition operation in the ALU.
9. Transfer the result to register R2.

Example 4: SUB R0 , LOCA

1. Initially PC will be pointing to this instruction.
2. The contents of PC is transferred to MAR and Read control signal is sent.
3. The contents present at location pointed by MAR is read into MDR.
4. Contents of MDR is transferred to IR.
5. Meanwhile, PC is incremented to point to next instruction.
6. Instruction is decoded at IR.
7. Since the first operand is a general purpose register R0, the data in R0 is sent to ALU.
8. Since, the other operand is a memory location, IR sends the address of LOCA to
MAR.
9. Control Unit issues the Read Signal.

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10. Contents of the memory location LOCA is read into MDR.

11. From MDR, the operand value is sent to ALU for computation.
12. The subtraction operation is performed at ALU.
13. The result of subtraction has to be written to memory location LOCA.
14. The address of LOCA is sent to MAR and the result of ALU operation is sent to
MDR.
15. Control Unit issues a Write Signal.
16. The value in MDR is written to memory location LOCA.

BUS STRUCTURE

• A bus is a group of lines that serves as a connecting path for several devices.
• A bus may be lines or wires.
• There are three categories of Buses.
1. Data Bus : Data Bus carries the data.
2. Address Bus: Address Bus carries the address.
3. Control Bus: Control Bus carries the control signals.
• There are 2 types of Bus structures: 1) Single Bus Structure and 2) Multiple Bus
Structure.

Single Bus Structure

It is the simplest way to connect the units where all the units are connected to a single bus.

 Because the bus can be used for only one transfer at a time, only 2 units can actively
use the bus at any given time.
 Bus control lines are used to arbitrate multiple requests for use of the bus.

Advantages:
 Low cost
 Flexibility for attaching peripheral devices.
Disadvantages:
 No concurrency in operations

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Multiple Bus Structure

 Systems that contain multiple buses achieve more concurrency in operations.
 Two or more transfers can be carried out at the same time.

Advantage: Better performance.

Disadvantage: Increased cost.

The devices connected to a bus vary widely in their speed of operation. To synchronize their
operational-speed, buffer-registers can be used.

Buffer Registers
 Are included with the devices to hold the information during transfers.
 Prevents a high-speed processor from being locked to a slow I/O device during data
transfers.

PERFORMANCE

The most important measure of performance of a computer is how quickly it can execute
programs.

The speed of a computer is affected by the design of

1. Instruction-set.
2. Hardware & the technology in which the hardware is implemented.
3. Compiler: Because programs are usually written in a High level language,
performance is also affected by the compiler that translates programs into machine
language.

• For best performance, it is necessary to design the compiler, machine instruction set
and hardware in a co-ordinated way.

Let us examine the flow of program instructions and data between the memory & the
processor.

• At the start of execution, all program instructions are stored in the main-memory.

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• As execution proceeds, instructions are fetched into the processor, and a copy is
placed in the cache.
• Later, if the same instruction is needed a second time, it is read directly from the
cache.
• A program will be executed faster if movement of instruction/data between the main-
memory and the processor is minimized and this can be achieved by using the cache.

PROCESSOR CLOCK

• Processor circuits are controlled by a timing signal called a Clock.

• The clock defines regular time intervals called Clock Cycles.
• To execute a machine instruction, the processor divides the action to be performed
into a sequence of basic steps such that each step can be completed in one clock cycle.
• Let P = Length of one clock cycle and R = Clock rate.
• Relation between P and R is given by R=1/P.
• R is measured in cycles per second.
• Cycles per second is also called Hertz (Hz)

BASIC PERFORMANCE EQUATION

Let T be the Processor time required to be executed a program written in high level language.

Let N be the actual number of machine language instructions to be executed to complete the
program execution.

Let S be the average number of basic steps needed to execute one machine instruction.

Let R be the Clock rate in cycles per second.

The program execution time is given by

This is referred to as the Basic Performance Equation.

 To achieve high performance, the computer designer must reduce the value of T, which
means reducing N and S, and increasing R.
 The value of N is reduced if source program is compiled into fewer machine
instructions.
 The value of S is reduced if instructions have a smaller number of basic steps to
perform.
 The value of R can be increased by using a higher frequency clock.

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 Care has to be taken while modifying values since changes in one parameter may affect
the other.

CLOCK RATE

There are 2 possibilities for increasing the clock rate R.

1) Improving the Integrated Circuit Technology makes logic-circuits faster.

This reduces the time needed to compute a basic step. This allows the clock period P
to be reduced and the clock rate R to be increased.
2) Reducing the amount of processing done in one basic step also reduces the clock
period P. However, if the action that has to be performed by an instruction remains
the same, the number of basic steps needed may increase.

Hence, much of performance-gain expected from the use of faster technology. The value of T
will be reduced by same factor as R is increased because S & N are not affected.

PERFORMANCE MEASUREMENT

• Benchmark refers to standard task used to measure how well a processor operates.
• The Performance Measure is the time taken by a computer to execute a given
benchmark.
• SPEC selects & publishes the standard programs along with their test results for
different application domains. (SPEC - System Performance Evaluation Corporation).
• SPEC Rating is given by:

• SPEC rating = 50 indicate that the computer under test is 50 times as fast as reference-
computer.
• The test is repeated for all the programs in the SPEC suite. Then, the geometric mean
of the results is computed.
• Let SPECi = Rating for program ‘i' in the suite.

Overall SPEC rating for the computer is given by

where n = no. of programs in the suite.

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INSTRUCTION SET: CISC AND RISC

RISC (Reduced Instruction Set Computer) CISC (Complex Instruction Set Computer)

Simple Instructions taking one cycle Complex Instructions taking multiple cycles
Only load/store instructions refer to memory Any instruction refers to memory
Fixed format Instruction (fixed number of Variable format Instruction (variable no. of
bytes) bytes)
Supports small number of instructions Supports Large number of instructions
Supports More registers Supports Less registers
Fewer Addressing Modes Several Addressing modes
Highly pipelined Very less or not pipelined
Uses Hardwired Control Unit Uses micro-programmed Control Unit

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