UNIT-3

8051 Timers, Interrupts and Serial Communication

3.1 Timers/Counters: SFRs-TMOD, TCON, Timer/Counter Modes.
3.2 C programs for Timers/Counter.
3.3 Interrupts: Polling and Interrupts, IE and IP SFR, Simple C program on
interrupts.
3.4 Serial Communication: SFRs- SCON, SBUF, Modes of serial
communication.
3.5 8051 C programs on serial communication.
3.6 Serial Communication standard RS232, DB9 pin function, interfacing of
8051 microcontroller with MAX 232.
3.1 Timers/Counters: SFRs-TMOD, TCON, Timer/Counter Modes.

Introduction -

 There are many applications which require an accurate delay to be used.

 To generate accurate delay 8051 provides Timers/Counters.
 When used as timer, this section generates delay while when used as
counter, it counts the pulses applied on pins To and T1 of port 3.
 The 8051 has two counters/timers which can be used either as timer to
generate a time delay or as counter to count events happening outside
the microcontroller.
 The 8051 has two timers: timer0 and timer1. They can be used either as
timers or as counters. Both timers are 16 bits wide.

1
Timer/Counter Registers:
• The timer section itself has some registers which are:

TH/TL (Timer High/ Timer Low):

 This pair forms the timer/counter. There are two such type of pairs for timer
0 and timer 1 which are named as TH0 and TL0 for timer 0 and similarly
TH1 and TL1 for timer 1.
 Each register is 8 bits so a pair forms a 16-bit timer.
 While used as timer, these registers hold the starting point of timer whereas
in counter, it contains the final count.

Timer0 registers
Timer0 registers is a 16 bits register and accessed as low byte and high byte.
The low byte is referred as a TL0 and the high byte is referred as TH0. These
registers can be accessed like any other registers.

Timer1 registers
Timer1 registers is also a 16 bits register and is split into two bytes,
referred to as TL1 and TH1.

2
TMOD (timer mode) Register:

TMOD is timer mode register. As the name indicates, it is used to select the
mode of timer.

 This is an 8-bit register which is used by both timers 0 and 1 to set the
various timer modes.
 Both the timer’s timer 0 and timer 1 use the same register.
 In this TMOD register, lower 4 bits are set aside for timer0 and the upper
4 bits are set aside for timer1.
 In each case, the lower 2 bits are used to set the timer mode and upper 2
bits to specify the operation.

GATE:

 In upper or lower 4 bits, first bit is a GATE bit.

 Both the timers have this GATE bit. Every timer has a means of starting
and stopping. Some timers do by software, some by hardware, and some
have both software and hardware controls.

C/T (Counter/Timer):

 The second bit is C/T bit and is used to decide whether a timer is used as
a time delay generator or an event counter.
 If this bit is 0 then it is used as a timer and if it is 1 then it is used as a
counter.

M1, M0:
3
  In upper or lower 4 bits, the last bits third and fourth are known as M1
and M0 respectively. These are used to select the timer mode.

M1 M0 Mode Description
13-bit timer mode. (80-bit timer/counter THx with TLx as 5-bit
0 0 0
prescaler)

16-bit timer mode. 1-bit timer/counters THx and TLx are cascaded,
0 1 1
there is no prescaler.

8-bit auto reload. (8-bit auto reload timer/counter, THx holds a value
1 0 2
that is to be reloaded into TLx each time it overflows.

1 1 3 Split timer mode.

Mode 1-
• It is a 16-bit timer; therefore it allows values from 0000 to FFFFH to be
loaded into the timer’s registers TL and TH.
• After TH and TL are loaded with a 16-bit initial value, the timer must be
started. We can do it by “SETB TR0” for timer 0 and “SETB TR1” for
timer 1.

4
Mode0-
• Mode 0 is exactly same like mode 1 except that it is a 13-bit timer instead of
16-bit. The 13-bit counter can hold values between 0000 to 1FFFH in TH-
TL.

5
Mode 2-
• It is an 8 bit timer that allows only values of 00 to FFH to be loaded into the
timer’s register TH.
• After TH is loaded with 8 bit value, the 8051 gives a copy of it to TL. Then
the timer must be started. It is done by the instruction “SETB TR0” for timer
0 and “SETB TR1” for timer1. This is like mode 1.

Mode3-
• Mode 3 is also known as a split timer mode. Timer 0 and 1 may be
programmed to be in mode 0, 1 and 2 independently of similar mode for
other timer.
• This is not true for mode 3; timers do not operate independently if mode 3 is
chosen for timer 0.
 The hardware way of starting and stopping the timer by an external source is
achieved by making GATE=1 in TMOD register.

6
7
TCON Register

• Timer Control or TCON Register is used to start or stop the

Timers of 8051 Microcontroller. It also contains bits to
indicate if the Timers has overflowed. The TCON SFR also
consists of Interrupt related bits.

• TCON is an 8-bit addressable register used to control the

activities of timers like start, stop etc. The address of TCON
is 88H.

• Timer Control (TCON) Special Function Register Set

when timer rolls from all 1's to 0.

Extra - Which bit must be set in TCON register?

• TCON Register - TR0 bit to start 'Timer 0' in 'Mode 0' operation.

TF1: Timer 1 flag (TCON.7)

• This flag indicates the overflow of timer 1, when the value in

timer 1 (TH1 and TL1) rolls over from the maximum value
(e. g. FFFFH in mode 1) to 0000H, this flag is set.

8
TR1: Timer 1 run control (TCON.6TCON Register)

• This flag is used to start or stop the timer 1.

• When made 1, it starts the timer whereas 0 makes the timer 1

stop.

TF0: Timer 0 flag (TCON.5)

• This flag indicates the overflow of timer 0, when the value in

timer 0 (TH0 and TL0) rolls over from the maximum value
(e. g. FFFFH in mode 1) to 0000H, this flag is set.
TR0: Timer 0 run control (TCON.4)

This flag is used to start or stop the timer 0. When made 1, it

starts the timer whereas 0 makes the timer 0 stop.

IE1: External interrupt 1 edge flag (TCON.3)

• It is set by hardware when external interrupt edge is detected
(INT1).

• It is cleared by hardware when interrupt is processed.

IT1: Interrupt 1 type control (TCON.2)

• Is specifies the type of INT1 i. e. edge triggered or level

triggered.

• If it is 0, interrupt is level triggered and if it is 1, interrupt is

edge triggered.

IE0: External interrupt 0 edge flag (TCON.1)

9
 • It is set by hardware when external interrupt edge is detected
(INT0).

• It is cleared by hardware when interrupt is processed.

IT0: Interrupt 0 type control (TCON.0)

• Is specifies the type of INT0 i. e. edge triggered or level

triggered.

• If it is 0, interrupt is level triggered and if it is 1, interrupt is

edge triggered.

10