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    STC VLSI Brochure

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    yvkrishnareddy
    The document announces a six-day short-term course on modern VLSI design and EDA tools to be held in a hybrid format from November 2-8, 2023 at the National Institute of Technology Delhi. The course aims to provide exposure to fundamentals and advancements in VLSI design and tools, covering topics such as analog and digital VLSI design, machine learning approaches for IC design, and hands-on experience using Cadence and Mentor Graphics EDA tools. The course is open to faculty, industry professionals, researchers, and students, with an early registration deadline of October 31. A minimum 80% attendance is required to receive a certificate.

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    STC VLSI Brochure

    Uploaded by

    yvkrishnareddy
    80 views2 pages
    The document announces a six-day short-term course on modern VLSI design and EDA tools to be held in a hybrid format from November 2-8, 2023 at the National Institute of Technology Delhi. The course aims to provide exposure to fundamentals and advancements in VLSI design and tools, covering topics such as analog and digital VLSI design, machine learning approaches for IC design, and hands-on experience using Cadence and Mentor Graphics EDA tools. The course is open to faculty, industry professionals, researchers, and students, with an early registration deadline of October 31. A minimum 80% attendance is required to receive a certificate.

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    STC-VLSI-Brochure

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    The document announces a six-day short-term course on modern VLSI design and EDA tools to be held in a hybrid format from November 2-8, 2023 at the National Institute of Technology Delhi. The course aims to provide exposure to fundamentals and advancements in VLSI design and tools, covering topics such as analog and digital VLSI design, machine learning approaches for IC design, and hands-on experience using Cadence and Mentor Graphics EDA tools. The course is open to faculty, industry professionals, researchers, and students, with an early registration deadline of October 31. A minimum 80% attendance is required to receive a certificate.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    80 views2 pages

    STC VLSI Brochure

    Uploaded by

    yvkrishnareddy
    The document announces a six-day short-term course on modern VLSI design and EDA tools to be held in a hybrid format from November 2-8, 2023 at the National Institute of Technology Delhi. The course aims to provide exposure to fundamentals and advancements in VLSI design and tools, covering topics such as analog and digital VLSI design, machine learning approaches for IC design, and hands-on experience using Cadence and Mentor Graphics EDA tools. The course is open to faculty, industry professionals, researchers, and students, with an early registration deadline of October 31. A minimum 80% attendance is required to receive a certificate.

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    Six Days Short Term Course

    On
    Modern VLSI Design and EDA Tools Hands-on
    (2nd -8th November, 2023)
    Hybrid Mode
    Organized by

    Department of Electronics & Communication Engineering

    ABOUT NIT DELHI SCOPE OF THE SHORT-TERM COURSE (STC)

    NITD is one of the thirty-one NIT (s) established The course is designed to provide exposure to the
    in the year 2010 by an act of parliament and has fundamentals and advancements in VLSI design
    been declared an Institute of National and Tools. During this course, scientists,
    importance. NIT Delhi is an autonomous Institute academicians, and industry experts will discuss
    that functions under the aegis of the Ministry of the current and future scope of the
    Education, Government of India. It aims to aforementioned field. This STC will also provide
    provide instructions and research facilities in hands-on experience with VLSI design EDA tools:
    various disciplines of Engineering, Science and Cadence & Mentor graphics. Following topics
    Technology, Management, Social Sciences, and related to VLSI Design will be covered during six
    days of the program:
    Humanities for advanced learning and
    dissemination of knowledge. Currently, the
    ✓ Modern Analog VLSI Design
    institute offers B.Tech. programs in Computer
    Science and Engineering, Electronics and ✓ Modern Digital VLSI Design
    Communication Engineering, and Electrical and ✓ Machine Learning approach for IC
    Electronics Engineering. The institute also offers
    M.Tech. and Ph.D. and Post doctoral programs. Design
    NIT Delhi has been ranked 51 by NIRF. ✓ High-speed FPGA design
    ✓ Analytical Modelling of MOS Devices
    ABOUT THE DEPARTMENT OF ECE
    ✓ Low Power VLSI Design
    The Department of Electronics and
    ✓ Challenges and Recent Trends in Analog
    Communication Engineering was established in
    2010, immediately with the beginning of the Layout Design
    Institute under the ages of the Ministry of ✓ Hands-on Session using Mentor
    Education, Govt. of India. Currently, it is offering
    one Undergraduate (B. Tech) course and two Graphics Tool
    Post Graduate (M. Tech) courses in ECE and in ✓ Analog and Digital Design Flow Using
    VLSI Design. The Department offers Ph.D. PARTICIPANTS
    programs in areas like VLSI design, Computer Cadence Tool
    Architecture, Embedded Systems, Nanoscale Faculty members/Engineering professionals and
    Devices, Signal Processing, Communication persons from Industries, Research scholars, M.
    systems, Optical Fiber Communication and Tech., and B. Tech. students with an ambition to
    Optical Devices, Measurement and study in this exciting area.
    Instrumentation, Antenna Design, and
    Microwave Devices.
    LIST OF EXPERTS ORGANIZING COMMITTEE

    Prof. Sudebdas Gupta, IIT Roorkee, India PATRON

    Prof. R. K. Sharma, NIT Kurukshetra Prof. (Dr.) Ajay K Sharma


    Director, NIT Delhi
    Prof. Neeta Pandey, DTU, Delhi, India
    CONVENOR(s)
    Dr. Jasdeep Kaur, IGDTUW, Delhi, India
    Prof. (Dr.) Manoj Kumar
    Mr. Ashutosh, Synopsys, India
    National Institute of Technology Delhi
    Dr. Vikas Nehra, DCRUST, India
    Dr. Preeti Verma
    National Institute of Technology Delhi
    Dr. Ankur Kumar, IIIT Una

    Dr. Vikram Singh, SMVDU, J&K, India


    COORDINATOR(s)
    Mr. Anish Kumar, Entuple Tech. Pvt. Ltd., India
    Dr. Manisha Bharti
    Mr. Kamlesh, Entuple Tech. Pvt. Ltd., India National Institute of Technology Delhi

    Mr. Kumar Divya, CoreEL Tech. Pvt. Ltd. India Dr. D. Vaithiyanathan
    National Institute of Technology Delhi
    HOW TO APPLY

    Interested persons need to apply online. MEMBERS

    For Registration click on the following link: Prof. (Dr.) Jyoteesh Malhotra, Dept. of ECE, NIT Delhi
    Dr. Rikmantra Basu, Dept. of ECE, NIT Delhi
    https://forms.gle/haMs23cgPAW9QcT67
    Dr. Sandeep Kumar, Dept. of ECE, NIT Delhi
    The registration fee for the course is as follows:
    Dr. Baljit Kaur, Dept. of ECE, NIT Delhi
    Faculty/ Industry personals: INR 500 Dr. Nitin Singh Singha, Dept. of ECE, NIT Delhi
    UG/PG/PhD: INR 400
    UG/PG/PhD (NIT Delhi): INR 300 Dr. Sachin Agarwal, Dept. of ECE, NIT Delhi
    Dr. Dharmendra Kr. Jhariya, Dept. of ECE, NIT Delhi
    The candidates can deposit the registration fee
    online in the account details given below- Dr. Mahesh Kr. Singh, Dept. of ECE, NIT Delhi
    Dr. W. Vandana Devi, Dept. of ECE, NIT Delhi
    Account Holder’s Name-
    DIRECTOR NIT DELHI ENDOWMENT FUNDS AC
    Account Number- 30320100016539
    For any queries please contact:
    IFSC Code- BARB0NARELA
    Bank Name & Branch- Bank of Baroda
    Dr. Preeti Verma
    Last date for online registration: Assistant Professor, Dept. of ECE
    National Institute of Technology, Delhi
    October 31, 2023. Email: preetiverma@nitdelhi.ac.in
    Contact Number: +91 9717063730
    Selected participants will be notified via email by
    November 01, 2023.

    Note: Minimum 80% attendance is Mandatory to get


    Certificate.

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