PART-A

1. What are the components of a computer system?

The components of a computer system are
 Input Devices
 Output Devices
 Memory
 CPU or processor
 Network
2. Write different types of addressing modes.
 Immediate addressing mode
 Register addressing mode
 Base or displacement addressing mode
 PC-relative addressing mode
 Direct addressing mode
3. Brief about relative addressing mode with an example.
The PC-relative addressing mode is used to load a register with a
value stored in program memory which is a short distance away from the
current instruction. It can be seen as a special case of the "base plus offset"
addressing mode, one that selects the program counter (PC) as the "base
register".
Example: JNZ BACK
4. What do you mean by response time?
Response time or execution time is the total time required for the
computer to complete a task including disk accesses, memory accesses, I/O
activities, operating system overhead etc.
5. What is a Carry Look-ahead adder?
A carry look-ahead adder is a type of adder in digital logic. It
improves speed by reducing the amount of time required to determine the
carry bits.
6. Define floating point single and double precision standard.
The 32-bit standard representation (single-precision representation)
occupies a single 32-bit word. The 32-bits are divided into three fields as
shown below:
(Field 1) Sign 1 – bit
(Field 2) Exponent 8 – bits
(Field 3) Mantissa 23 - bits
The 64–bit standard representation (double – precision representation) occupies two
words. The 64-bits are divided into three fields as shown below:
(Field 1) Sign 1 – bit
(Field 2) Exponent 11 – bits
(Field 3) Mantissa 52 – bits
7. List the two division algorithms.
The two division algorithms are:

a. Restoring division algorithm

b. Non restoring division algorithm

8. What is arithmetic overflow?

Overflow in addition:
 Overflow occurs in addition when adding two
numbers that have the same sign. Overflow in
subtraction:
Overflow occurs in subtraction
 When a negative number is subtracted from a positive
number and a negative result is generated.
 When a positive number is subtracted from a negative
number and a positive result is generated.
9. Discuss the role of Booth’s algorithm in the design of fast multipliers.
To speed-up the multiplication process in the Booth’s algorithm a
technique called bit-pair recording is used. It is also called modified Booth’s
algorithm. It halves the maximum number of summands. In this technique, the
Booth-recorded multiplier bits are grouped in pairs. Then each pair is
represented by its equivalent single bit multiplier reducing total number of
multiplier bits to half.

PART- B
10. A.
Representing Instructions in the Computer

Instructions are kept in the computer as a series of high and low electronic signals and
may be represented as numbers. In fact, each piece of an instruction can be considered as an
individual number, and placing these numbers side by side forms the instruction.

Since registers are referred to by almost all instructions, there must be a convention to
map register names into numbers. In MIPS assembly language, registers $s0 to $s7 map onto
registers 16 to 23, and registers $t0 to $t7 map onto registers 8 to 15. Hence, $s0 means
register 16, $s1 means register 17, $s2 means register 18,…, $t0 means register 8, $t1 means
register 9, and so on. We’ll describe the convention for the rest of the 32 registers in the
following sections.

Translating a MIPS Assembly Instruction into a Machine Instruction

Example

Let’s do the next step in the refinement of the MIPS language as an example. We’ll
show the real MIPS language version of the instruction represented symbolically as

add $t0,$s1,$s2

first as a combination of decimal numbers and then of binary numbers.

Answer

The decimal representation is

 Each of these segments of an instruction is called a field. The first and last fields
(containing 0 and 32 in this case) in combination tell the MIPS computer that this instruction
performs addition. The second field gives the number of the register that is the first source
operand of the addition operation (17=$s1), and the third field gives the other source operand
for the addition (18=$s2). The fourth field contains the number of the register that is to
receive the sum (8=$t0). The fifth field is unused in this instruction, so it is set to 0. Thus, this
instruction adds register $s1 to register $s2 and places the sum in register $t0.

This instruction can also be represented as fields of binary numbers as opposed to

decimal:

This layout of the instruction is called the instruction format. As you can see from
counting the number of bits, this MIPS instruction takes exactly 32 bits—the same size as a
data word. In keeping with our design principle that simplicity favors regularity, all MIPS
instructions are 32 bits long.

Instruction Format A form of representation of an instruction composed of fields

of binary numbers.

To distinguish it from assembly language, we call the numeric version of instructions

machine language and a sequence of such instructions machine code.

Machine Language Binary representation used for communication within a

computer system.

It would appear that you would now be reading and writing long, tedious strings of
binary numbers. We avoid that tedium by using a higher base than binary that converts easily
into binary. Since almost all computer data sizes are multiples of 4, hexadecimal (base 16)
numbers are popular. Since base 16 is a power of 2, we can trivially convert by replacing
each group of four binary digits by a single hexadecimal digit, and vice versa. Figure 1.11
converts between hexadecimal and binary.

hexadecimal

Numbers in base 16.

 Figure 1.11 The hexadecimal-binary conversion table.Just replace one hexadecimal digit by
the corresponding four binary digits, and vice versa. If the length of the binary number is not a
multiple of 4, go from right to left.

Because we frequently deal with different number bases, to avoid confusion we will
subscript decimal numbers with ten, binary numbers with two, and hexadecimal numbers
with hex. (If there is no subscript, the default is base 10.) By the way, C and Java use the
notation 0xnnnn for hexadecimal numbers.

Binary to Hexadecimal and Back

Example

Convert the following hexadecimal and binary numbers into the other base:

eca8 6420hex

0001 0011 0101 0111 1001 1011 1101 1111two

Answer

Using Figure 2.4, the answer is just a table lookup one way:

And then the other direction:

MIPS Fields

MIPS fields are given names to make them easier to discuss:

 Here is the meaning of each name of the fields in MIPS instructions:

■ op: Basic operation of the instruction, traditionally called the opcode.

■ rs: The first register source operand.

■ rt: The second register source operand.

■ rd: The register destination operand. It gets the result of the operation.

■ shamt: Shift amount. (Section 2.6 explains shift instructions and this term; it will
not be used until then, and hence the field contains zero in this section.)

■ funct: Function. This field, often called the function code, selects the specific
variant of the operation in the op field.

Opcode The field that denotes the operation and format of an instruction.

A problem occurs when an instruction needs longer fields than those shown above.
For example, the load word instruction must specify two registers and a constant. If the
address were to use one of the 5-bit fields in the format above, the constant within the load
word instruction would be limited to only 2 5 or 32. This constant is used to select elements
from arrays or data structures, and it often needs to be much larger than 32. This 5-bit field is
too small to be useful.

Hence, we have a conflict between the desire to keep all instructions the same length
and the desire to have a single instruction format. This leads us to the final hardware design
principle:

Design Principle 3: Good design demands good compromises.

The compromise chosen by the MIPS designers is to keep all instructions the same
length, thereby requiring different kinds of instruction formats for different kinds of
instructions. For example, the format above is called R-type (for register) or R-format.

A second type of instruction format is called I-type (for immediate) or I-format and is
used by the immediate and data transfer instructions. The fields of I-format are
  The 16-bit address means a load word instruction can load any word within a
region of ±215 or 32,768 bytes (±213 or 8192 words) of the address in the base
register rs.
 Similarly, add immediate is limited to constants no larger than ±2 15. We see
that more than 32 registers would be difficult in this format, as the rs and rt
fields would each need another bit, making it harder to fit everything in one
word.

Although multiple formats complicate the hardware, we can reduce the complexity by
keeping the formats similar. For example, the first three fields of the R-type and I-type
formats are the same size and have the same names; the length of the fourth field in I-type is
equal to the sum of the lengths of the last three fields of R-type.

In case you were wondering, the formats are distinguished by the values in the first
field: each format is assigned a distinct set of values in the first field (op) so that the hardware
knows whether to treat the last half of the instruction as three fields (R-type) or as a single
field (I-type). Figure 1.12 shows the numbers used in each field for the MIPS instructions
covered so far.

Figure 1.12 MIPS instruction encoding.In the table above, “reg” means a register number
between 0 and 31, “address” means a 16-bit address, and “n.a.” (not applicable) means this field does
not appear in this format. Note that add and sub instructions have the same value in the op field; the
hardware uses the funct field to decide the variant of the operation: add (32) or subtract (34).

The BIG Picture

Today’s computers are built on two key principles:

1. Instructions are represented as numbers.

2. Programs are stored in memory to be read or written, just like numbers.

These principles lead to the stored-program concept; its invention let the computing genie
out of its bottle. Figure1.13 shows the power of the concept; specifically, memory can
contain the source code for an editor program, the corresponding compiled machine code, the
text that the compiled program is using, and even the compiler that generated the machine
code.
 Figure 1.13 The stored-program concept.

Stored programs allow a computer that performs accounting to become, in the blink of
an eye, a computer that helps an author write a book. The switch happens simply by loading
memory with programs and data and then telling the computer to begin executing at a given
location in memory. Treating instructions in the same way as data greatly simplifies both the
memory hardware and the software of computer systems. Specifically, the memory
technology needed for data can also be used for programs, and programs like compilers, for
instance, can translate code written in a notation far more convenient for humans into code
that the computer can understand.

One consequence of instructions as numbers is that programs are often shipped as

files of binary numbers. The commercial implication is that computers can inherit ready-
made software provided they are compatible with an existing instruction set. Such “binary
compatibility” often leads industry to align around a small number of instruction set
architectures.

B. Logical Operations

Although the first computers operated on full words, it soon became clear that it was
useful to operate on fields of bits within a word or even on individual bits. Examining
characters within a word, each of which is stored as 8 bits, is one example of such an
operation. It follows that operations were added to programming languages and instruction
set architectures to simplify, among other things, the packing and unpacking of bits into
words. These instructions are called logical operations. Figure 1.14 shows logical operations
in C, Java, and MIPS.
 Figure 1.14 C and Java logical operators and their corresponding MIPS instructions.MIPS
implements NOT using a NOR with one operand being zero.

 The first class of such operations is called shifts. They move all the bits in a
word to the left or right, filling the emptied bits with 0 s.
 The dual of a shift left is a shift right. The actual name of the two
MIPS shift instructions are called shift left logical (sll) and shift right logical
(srl).

Another useful operation that isolates fields is AND. AND is a bit-by-bit operation
that leaves a 1 in the result only if both bits of the operands are 1

 AND A logical bit-by-bit operation with two operands that calculates a 1

only if there is a 1 in both operands.

As you can see, AND can apply a bit pattern to a set of bits to force 0 s where
there is a 0 in the bit pattern. Such a bit pattern in conjunction with AND is
traditionally called a mask, since the mask “conceals” some bits.

 ORA logical bit-by-bit operation with two operands that calculates a 1 if there
is a 1 in either operand.
 NOT A logical bit-by-bit operation with one operand that inverts the bits;
that is, it replaces every 1 with a 0, and every 0 with a 1.

In keeping with the three-operand format, the designers of MIPS decided to include
the instruction NOR (NOT OR) instead of NOT. If one operand is zero, then it is equivalent
to NOT: A NOR 0=NOT (A OR 0)=NOT (A).

 NOR A logical bit-by-bit operation with two operands that calculates the
NOT of the OR of the two operands. That is, it calculates a 1 only if there is a
0 in both operands.

Constants are useful in AND and OR logical operations as well as in arithmetic

operations, so MIPS also provides the instructions and immediate (andi) and or immediate
(ori). Constants are rare for NOR, since its main use is to invert the bits of a single operand;
thus, the MIPS instruction set architecture has no immediate version of NOR.

11. A. Booth’s Algorithm

• Booth algorithm gives a procedure for multiplying binary integers in
signed 2’s complement representation in efficient way, i.e., less
number of additions/subtractions required. It operates on the fact
that strings of 0’s in the multiplier require no addition but just
shifting and a string of 1’s in the multiplier from bit weight 2^k to
weight 2^m can be treated as 2^(k+1 ) to 2^m.
• As in all multiplication schemes, booth algorithm requires examination of the
multiplier bits and shifting of the partial product. Prior to the shifting, the
multiplicand may be added to the partial product, subtracted from the partial
product, or left unchanged according to following rules:
• The multiplicand is subtracted from the partial product upon encountering
 the first least significant 1 in a string of 1’s in the multiplier
• The multiplicand is added to the partial product upon encountering the first 0
(provided that there was a previous ‘1’) in a string of 0’s in the multiplier.
• The partial product does not change when the multiplier bit is identical to
the previous multiplier bit.

11.B. Carry Look Ahead Adder

The ripple-carry adder, its limiting factor is the time it takes to propagate the carry. The
carry look-ahead adder solves this problem by calculating the carry signals in advance,
based on the input signals. The result is a reduced carry propagation time. To be able to
understand how the carry look-ahead adder works, we have to manipulate the Boolean
expression dealing with the full adder. The Propagate P and generate G in a full-adder,
is given as: Pi = Ai ⊕ Bi Carry propagate Gi = AiB i Carry generate
Notice that both propagate and generate signals depend only on the input bits and thus
will be valid after one gate delay. The new expressions for the output sum and the
carryout are given by: Si = Pi ⊕ Ci-1 Ci+1= Gi + PiCi
Let's apply these equations for a 4-bit adder: C1 = G0 + P0C0 C2 = G1 + P1C1 = G1 +
P1(G0 + P0C0) = G1 + P1G0 + P1P0C0 C3 = G2 + P2C2 = G2 + P2G1 + P2P1G0 +
P2P1P0C0 C4 = G3 + P3C3 = G3 + P3G2 + P3P2G1 + P3P2P1G0 + P3P2P1P0C0