EUP3412

1.5A/1.5MHz, Synchronous
Step-Down Converter with Soft Start
DESCRIPTION FEATURES
The EUP3412 is a synchronous current mode z High Efficiency up to 96%
step-down dc-dc converter, capable of driving 1.5A load
current with excellent line and load regulation. z 1.5A Available Load Current
Operating with an input voltage range between 2.7V z 300µA Typical Quiescent Current
and 5.5V, the device is ideal for portable applications z 1.5MHz Constant Switching Frequency
powered by a single Li-Ion battery cell or by 3-cell
z 2.7V to 5.5V Input Voltage Range
NiMH/NiCd batteries. The EUP3412 operates at a fixed
switching frequency of 1.5MHz and PWM operation z Adjustable Output Voltage as Low as 0.7V
provides very low output ripple voltage for noise z 100% Duty Cycle Low Dropout Operation
sensitive applications. The internal integrated z No Schottky Diode Required
synchronous switch increases efficiency while
eliminates the need for an external Schottky diode. The z Short Circuit and Thermal Protection
EUP3412 is available in the 10-pin MSOP and 10-pin z Excellent Line and Load Transient Response
TDFN package. z ＜1µA Shutdown Current
z Soft Start Function
z Available in MSOP-10 and TDFN-10 Package
z RoHS Compliant and 100% Lead(Pb)-Free

APPLICATIONS
z Cellular and Smart Phones
z Portable Media Players/ MP3 Players
z Digital Still and Video Cameras
z Portable Instruments
z WLAN PC Cards

Typical Application Circuit

Figure 1.

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 EUP3412
Pin Configurations

Package Type Pin Configurations Package Type Pin Configurations

MSOP-10 TDFN-10

Pin Description

Name MSOP-10 TDFN-10 DESCRIPTION

Chip enable pin. Forcing this pin above 1.5V enables the part. Forcing this
EN 1 1
pin below 0.3V shuts down the device. Do not leave EN floating.
VIN 2,3 2,3 Supply voltage input.
GND 4 4 Analog ground.
FB 5 5 Feedback pin.
Pulling the MODE pin high allows the device to be forced into fixed
MODE 6 6
frequency operation.
Switch node connection to inductor. This pin connects to the drains of the
SW 7,8 7,8
internal main and synchronous power MOSFET switches.
PGND 9,10 9,10 Power ground.

Block Diagram

Figure 2.

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 EUP3412
Ordering Information

Order Number Package Type Marking Operating Temperature Range

xxxxx
EUP3412MIR1 MSOP-10 -40 °C to +85°C
P3412
xxxxx
EUP3412JIR1 TDFN-10 -40 °C to +85°C
P3412

EUP3412 □ □ □ □
Lead Free Code
1: Lead Free 0: Lead

Packing
R: Tape & Reel

Operating temperature range

I: Industry Standard
Package Type
M: MSOP
J: TDFN

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 EUP3412
Absolute Maximum Ratings (1)
„ Input Supply Voltage ----------------------------------------------------------- -0.3V to 6V
„ EN, FB Voltages ---------------------------------------------------------------- -0.3V to VIN
„ P-Channel Switch Source Current (DC) ------------------------------------------ 1.7A
„ N-Channel Switch Sink Current (DC) ---------------------------------------------- 1.7A
„ Peak SW Sink and Source Current -------------------------------------------------- 2.6A
„ Junction Temperature ------------------------------------------------------------------- 125°C
„ Storage Temperature ------------------------------------------------------ -65°C to +150°C
„ Lead Temp (Soldering, 10sec) ------------------------------------------------------- 260°C

Recommend Operating Conditions (2)

„ Supply Voltage (VIN) ----------------------------------------------------------- 2.7V to 5.5V
„ Operating Temperature Range --------------------------------------------- -40°C to +85°C

Note (1): Stress beyond those listed under “Absolute Maximum Ratings” may damage the device.
Note (2): The device is not guaranteed to function outside the recommended operating conditions.

Electrical Characteristics
The ● denote the Spec. apply over the full operating temperature range, otherwise Spec. are TA=+25℃.
VIN=3.6V unless otherwise specified.
EUP3412
Symbol Parameter Conditions Unit
Min Typ Max.
VIN Input Voltage Range ● 2.7 5.5 V
UVLO Input Undervoltage Lockout ● 1.5 2.3 V
IFB Feedback Current 0 nA
TA=+25°C (Note 3) 0.49 0.5 0.51
VFB Regulated Feedback Voltage V
-40°C≤TA≤+85°C (Note 3) ● 0.485 0.5 0.515
∆VFB Reference Voltage Line Regulation VIN=2.7V to 5.5V 0.26 0.4 %/V
∆VOUT Output Voltage Line Regulation VIN=2.7V to 5.5V 0.26 0.4 %/V
VLOADREG Output Voltage Load Regulation ILOAD=0mA to 1500mA 0.1 %
IQ Quiescent Current VFB=0.45V, ILOAD=0A ● 300 400 µA
ISHDN Shutdown Current VEN=0V 0.1 1 µA
IPK Peak Inductor Current VIN=3.6V, VFB=0.45V 2.4 A
VFB=0.45V ● 1.2 1.5 1.8 MHz
fOSC Oscillator Frequency
VFB=0V 750 kHz
RPFET RDS(ON) of P-Channel FET ISW=200mA ● 132 210 mΩ
RNFET RDS(ON) of N-Channel FET ISW=200mA ● 126 210 mΩ
ILSW SW Leakage Current VEN=0V, VSW=0 or 5V, VIN=5V -1 1 µA
VEN EN Threshold ● 0.3 1.0 1.5 V
IEN EN Leakage Current 1 µA
Note (3): The EUP3412 is tested in a proprietary test mode that connects FB to the output of the error amplifier.

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 EUP3412
Typical Operating Characteristics

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 EUP3412
Typical Operating Characteristics (continued)

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 EUP3412
Typical Operating Characteristics (continued)

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 EUP3412
Application Information The DC current rating of the inductor should be at least
The EUP3412 uses a slope-compensated constant equal to the maximum load current plus half the ripple
frequency, current mode architecture. Both the main current to prevent core saturation. Thus, a 1800mA rated
(P-Channel MOSFET) and synchronous (N-channel inductor should be enough for most applications
MOSFET) switches are internal. During normal (1.5A+300mA).
operation, the EUP3412 regulates output voltage by The DC-resistance of the inductor directely influences
switching at a constant frequency and then modulating the efficiency of the converter. Therefore for better
the power transferred to the load each cycle using PWM efficiency, choose a low DC-resistance inductor.
comparator. The duty cycle is controlled by three CIN and COUT Selection
weighted differential signals: the output of error
In continuous mode, the source current of the top
amplifier, the main switch sense voltage and the
MOSFET is a square wave of duty cycle VOUT/VIN. The
slope-compensation ramp. It modulates output power by
primary function of the input capacitor is to provide a
adjusting the inductor-peak current during the first half
low impedance loop for the edges of pulsed current
of each cycle. An N-channel, synchronous switch turns
drawn by the EUP3412. A low ESR input capacitor sized
on during the second half of each cycle (off time). When
for the maximum RMS current must be used. The size
the inductor current starts to reverse or when the PWM
required will vary depending on the load, output voltage
reaches the end of the oscillator period, the synchronous
and input voltage source impedance characteristics. A
switch turns off. This keeps excess current from flowing
typical value is around 22µF.
backward through the inductor, from the output
The input capacitor RMS current varies with the input
capacitor to GND, or through the main and synchronous
switch to GND. voltage and the output voltage. The equation for the
maximum RMS current in the input capacitor is:
Soft-Start
The EUP3412 has an internal soft-start circuit that limits V  V 
the inrush current and output voltage overshoot during I =I × O × 1 − O 
RMS O V  V 
startup. The soft-start is implemented with a digital
IN  IN 
circuit increasing the switch current in steps.
Short-Circuit Protection The output capacitor COUT has a strong effect on loop
As soon as the output voltage drops below 50% of the stability.
nominal output voltage, the converter switching The selection of COUT is driven by the required effective
frequency as well as the current limit is reduced to 50% series resistance (ESR).
of the nominal value. ESR is a direct function of the volume of the capacitor;
Input Undervoltage Lockout that is, physically larger capacitors have lower ESR.
Once the ESR requirement for COUT has been met, the
The undervoltage lockout circuit prevents device RMS current rating generally far exceeds the IRIPPLE(P-P)
misoperation at low input voltages. It prevents the requirement. The output ripple ∆VOUT is determined by:
converter from turning on the switch or rectifier
MOSFET with undefined conditions.  
1
∆VOUT ≅ ∆IL  ESR + 
Inductor Selection  8fC 
The EUP3412 typically uses a 2.2uH output inductor.  OUT 
Larger or smaller inductor values can be used to
optimize the performance of the device for specific When choosing the input and output ceramic capacitors,
operation conditions. choose the X5R or X7R dielectric formulations. These
The output inductor is selected to limit the ripple current dielectrics have the best temperature and voltage
to some predetermined value, typically 20%~40% of the characteristics of all the ceramics for a given value and
full load current at the maximum input voltage. Large size.
value inductors lower ripple currents. Higher VIN or
VOUT also increases the ripple current as shown in
equation. A reasonable starting point for setting ripple
current is ∆IL=600mA (40% of 1.5A).

1  V 
∆IL = VOUT1 − OUT 
(f)(L)  VIN 


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 EUP3412
Output Voltage Programming PC Board Layout Checklist
The output voltage is set by a resistive divider according For all switching power supplies, the layout is an
to the following formula: important step in the design especially at high peak
currents and switching frequencies. If the layout is not
carefully done, the regulator might show stability
 R2  problems as well as EMI problems.
VOUT = 0.5V 1 + 
 R1  When laying out the printed circuit board, the following
guidelines should be used to ensure proper operation of
the EUP3412.
Choose R1 value 50kΩ for most applications.
The external resistive divider is connected to the output, 1. The input capacitor CIN should connect to VIN as
allowing remote voltage sensing as shown below. closely as possible. This capacitor provides the AC
current to the internal power MOSFETs.
2. The power traces, consisting of the GND trace, the
SW trace and the VIN trace should be kept short,
direct and wide.
3. The FB pin should connect directly to the feedback
resistors. The resistive divider R1/R2 must be
connected between the COUT and ground.
4. Keep the switching node, SW, away from the
sensitive FB node.

Thermal Considerations
To avoid the EUP3412 from exceeding the maximum
junction temperature, the user will need to do a thermal
analysis. The goal of the thermal analysis is to determine
whether the operating conditions exceed the maximum
junction temperature of the part. The temperature rise is
given by:

TR=(PD)(θJA)

Where PD=ILOAD2 × RDS(ON) is the power dissipated by

the regulator ; θJA is the thermal resistance from the
junction of the die to the ambient temperature.
The junction temperature, TJ, is given by:
TJ=TA+TR
Where TA is the ambient temperature.
TJ should be below the maximum junction temperature
of 125°C.

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 EUP3412
Packaging Information

MSOP-10

MILLIMETERS INCHES
SYMBOLS
MIN. MAX. MIN. MAX.
A - 1.10 - 0.043
A1 0.00 0.15 0.000 0.006
D 3.00 0.118
E1 3.00 0.118
E 4.70 5.10 0.185 0.201
L 0.40 0.80 0.016 0.031
b 0.17 0.33 0.006 0.013
e 0.50 0.020
D1 1.80 0.071
E2 1.66 0.065

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 EUP3412
TDFN-10

MILLIMETERS INCHES
SYMBOLS
MIN. MAX. MIN. MAX.
A 0.70 0.80 0.028 0.031
A1 0.00 0.05 0.000 0.002
D1 2.50 0.098
D 2.90 3.10 0.114 0.122
E1 1.70 0.067
E 2.90 3.10 0.114 0.122
L 0.30 0.50 0.012 0.020
b 0.18 0.30 0.007 0.012
e 0.50 0.020
D1 2.40 0.094

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