Datasheet 2
Datasheet 2
Datasheet 2
LM3200 Miniature, Adjustable, Step-Down DC-DC Converter with Bypass Mode for RF
Power Amplifiers
Check for Samples: LM3200
1FEATURES DESCRIPTION
•
2 2 MHz (typ.) PWM Switching Frequency The LM3200 is a DC-DC converter optimized for
powering RF power amplifiers (PAs) from a single
• Operates from a Single Li-Ion Cell (2.7V to Lithium-Ion cell. It steps down an input voltage of
5.5V) 2.7V to 5.5V to a variable output voltage of 0.8V to
• Variable Output Voltage (0.8V to 3.6V) 3.6V. The output voltage is set using an analog input
• 300 mA Maximum Load Capability (PWM ( VCON) for optimizing efficiency of the RF PA at
Mode) various power levels.
• 500 mA Maximum Load Capability (Bypass The LM3200 offers superior features and
Mode) performance for mobile phones and similar RF PA
applications. Fixed-frequency PWM mode minimizes
• PWM, Forced and Automatic Bypass Mode
RF interference. Bypass mode turns on an internal
• High Efficiency (96% Typ at 3.6VIN, 3.2VOUT at bypass switch to power the PA directly from the
120 mA) from Internal Synchronous battery. LM3200 has both forced and automatic
Rectification bypass modes. Shutdown mode turns the device off
• 10-pin DSBGA Package and reduces battery consumption to 0.1 µA (typ.).
The LM3200 is available in a 10-pin lead free DSBGA
• Current Overload Protection package. A high switching frequency (2 MHz) allows
• Thermal Overload Protection use of tiny surface-mount components. Only three
small external surface-mount components, an
APPLICATIONS inductor and two ceramic capacitors are required.
• Cellular Phones
• Hand-Held Radios
• RF PC Cards
• Battery Powered RF Devices
TYPICAL APPLICATION
VIN
2.7V to 5.5V
VCON COUT
PGND SGND
VCON 4.7 PF
0.267V to 1.20V
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2004–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM3200
SNVS319C – NOVEMBER 2004 – REVISED APRIL 2013 www.ti.com
CONNECTION DIAGRAMS
SGND SGND
A2 A2
FB C1 C3 SW SW C3 C1 FB
D2 D2
EN EN
PIN DESCRIPTION
Pin # Name Description
A1 VDD Analog Supply Input. A 0.1 µF ceramic capacitor is recommended to be placed as close to this pin as
possible. (Figure 33)
B1 VCON Voltage Control Analog input. VCON controls VOUT in PWM mode. Set: VOUT = 3 x VCON. Do not leave floating.
C1 FB Feedback Analog Input. Connect to the output at the output filter capacitor. (Figure 33)
D1 BYP Bypass. Use this digital input to command operation in Bypass mode. Set BYP low for normal operation.
D2 EN Enable Input. Set this digital input high after Vin >2.7V for normal operation. For shutdown, set low.
D3 PGND Power Ground
C3 SW Switching Node connection to the internal PFET switch and NFET synchronous rectifier.
Connect to an inductor with a saturation current rating that exceeds the maximum Switch Peak Current Limit
specification of the LM3200.
B3 PVIN Power Supply Voltage Input to the internal PFET switch and Bypass FET. (Figure 33)
A3 BYPOUT Bypass FET Drain. Connect to the output capacitor. (Figure 33) Do not leave floating.
A2 SGND Analog and Control Ground
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply specified performance limits. For specified performance limits
and associated test conditions, see the Electrical Characteristics table.
(2) All voltages are with respect to the potential at the GND pins.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(4) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150°C (typ.) and
disengages at TJ = 130°C (typ.).
(5) The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. (MIL-STD-883 3015.7) The machine
model is a 200 pF capacitor discharged directly into each pin. TI recommends that all integrated circuits be handled with Appropriate
precautions. Failure to observe proper ESD handling techniques can result in damage.
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply specified performance limits. For specified performance limits
and associated test conditions, see the Electrical Characteristics table.
(2) All voltages are with respect to the potential at the GND pins.
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
THERMAL PROPERTIES
Junction-to-Ambient Thermal 100°C/W
(1)
Resistance (θJA), YPA10 Package
(1) Junction-to-ambient thermal resistance (θJA) is taken from thermal measurements, performed under the conditions and guidelines set
forth in the JEDEC standard JESD51-7. A 1" x 1", 4 layer, 1.5 oz. Cu board was used for the measurements.
(1) All voltages are with respect to the potential at the GND pins.
(2) Min and Max limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most
likely norm.
(3) The LM3200 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where
requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should
be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V.
(4) Over-Voltage protection (OVP) threshold is the voltage above the nominal VOUT where the OVP comparator turns off the PFET switch
while in PWM mode.
(5) VIN is compared to the programmed output voltage (VOUT). When VIN–VOUT falls below VBYPASS− for longer than TBYP the Bypass FET
turns on and the switching FETs turn off. This is called the Bypass mode. Bypass mode is exited when VIN–VOUT exceeds VBYPASS+ for
longer than TBYP, and PWM mode returns. The hysterisis for the bypass detection threshold VBYPASS+ – VBYPASS− will always be
positive and will be approximately 200 mV(typ.).
(6) Shutdown current includes leakage current of PFET and Bypass FET.
(7) Electrical Characteristics table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current
limit is activated). Refer to Typical Performance Characteristics (Open/Closed Loop Current Limit vs Temperature curve) for closed loop
data and its variation with regards to supply voltage and temperature. Closed loop current limit is the peak inductor current measured in
the application circuit by increasing output current until output voltage drops by 10%.
(8) Bypass FET current limit is defined as the load current at which the FB voltage is 1V lower than VIN.
SYSTEM CHARACTERISTICS
The following spec table entries are specified by design if the component values in the typical application circuit are used.
These parameters are not specified by production testing.
Symbol Parameter Conditions Min Typ Max Units
TRESPONSE Time for VOUT to Rise VIN = 4.2V, COUT = 4.7 µF,
from 0.8V to 3.4V in RLOAD = 15Ω 25 µs
PWM Mode L = 2.2 uH
CCON VCON Input Capacitance VCON = 1V,
15 pF
Test frequency = 100 kHz
TON_BYP Bypass FET Turn On VIN = 3.6V, VCON = 0.267V,
Time In Bypass Mode COUT = 4.7 µF, RLOAD = 15Ω 30 µs
BYP = Low to High
(1)
TBYP Auto Bypass Detect
10 15 20 µs
Delay Time
(1) VIN is compared to the programmed output voltage (VOUT). When VIN–VOUT falls below VBYPASS− for longer than TBYP the Bypass FET
turns on and the switching FETs turn off. This is called the Bypass mode. Bypass mode is exited when VIN–VOUT exceeds VBYPASS+ for
longer than TBYP, and PWM mode returns. The hysterisis for the bypass detection threshold VBYPASS+ – VBYPASS− will always be
positive and will be approximately 200 mV(typ.).
No Load
VCON = 0.5V
3.0 IOUT = 200 mA
1.508
OUTPUT VOLTAGE (V)
2.0
VIN = 3.6V VIN = 4.2V IOUT = 50 mA
1.0 1.506
0.0
1.504
-1.0
IOUT = 150 mA IOUT = 300 mA
-2.0 VIN = 2.7V
1.502
-3.0
-4.0 1.500
-40 -20 0 20 40 60 80 100 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
1.508 3.262
OUTPUT VOLTAGE (V)
1.504 3.258
IOUT = 300 mA
IOUT = 300 mA
IOUT = 100 mA
1.502 3.256
1.500 3.254
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
TA = 85°C
850
VIN = 2.7V 0.4
825
VIN = 4.2V TA = -25°C
0.6
800
TA = 25°C
VIN = 2.7V VIN = 3.6V
0.8
775 Max Load ILIM-BYP
Capability
OPEN LOOP = 965 mA
500 mA
750 1.0
-40 -20 0 20 40 60 80 100 0 200 400 600 800 1000 1200
AMBIENT TEMPERATURE (oC) OUTPUT CURRENT (mA)
Figure 9. Figure 10.
1.0 0.4
VIN = 4.2V
0.5 0.2
IOUT = 200 mA RLOAD = 15:
0.0 0.0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.0 0.1 0.2 0.3 0.4 0.5
VCON VOLTAGE (V) VCON VOLTAGE (V)
Figure 11. Figure 12.
3.6 95
~Vbypass+
OUTPUT VOLTAGE (V)
EFFICIENCY (%)
3.4 ~Vbypass- 90
PWM Mode
RLOAD = 10:
3.2 85
3 80
Bypass Mode
2.8 VOUT = 3.25V 75
RLOAD = 15: VIN = 3.9V
2.6 70
5.5 5.0 4.5 4.0 3.5 3.0 2.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
INPUT VOLTAGE (V) OUTPUT VOLTAGE (V)
Figure 13. Figure 14.
90 90 VIN = 3.6V
EFFICIENCY (%)
EFFICIENCY (%)
80 80 VIN = 3.9V
VIN = 4.2V
70 VIN = 3.6V 70 VIN = 4.2V
60 60
50 50
40 40
0 50 100 150 200 250 300 350 0 50 100 150 200 250 300 350
OUTPUT CURRENT (mA) OUTPUT CURRENT (mA)
Figure 15. Figure 16.
IL
IL 200 mA 200 mA
250 mA 300 mA
IOUT IOUT
50 mA 100 mA
20 Ps/DIV 20 Ps/DIV
Figure 17. Figure 18.
2V/DIV
IL
IL
500 mA/DIV 200 mA/DIV
EN 5V/DIV EN
5V/DIV
VIN = 4.2V
VIN
1V/DIV VOUT 1V/DIV
VOUT VIN = 3V
VCON = 0.5V
VIN = 3.0V RLOAD = 15:
IL
200 mA/DIV
IL
200 mA/DIV
BYP 5V/DIV
VCON = 1.1V RLOAD = 15:
3.6V
VIN
3.0V VSW 2V/DIV
VOUT = 1.5V
IOUT = 200 mA
50 mV/DIV
VOUT
AC Coupled 3.25V
VOUT
VIN = 4.2V 1.5V
IL 200 mA/DIV RLOAD = 15:
1.08V
VCON
0.5V
VSW 2V/DIV
VSW
2V/DIV
VOUT 1V/DIV
VOUT 10 mV/DIV
AC Coupled
IL 200 mA/DIV
IL 500 mA/DIV
VIN = 3.6V
VOUT = 1.5V RLOAD = 15: VOUT = 1.5V IOUT = 200 mA
IL
200 mA/DIV 200 mA/DIV
IL
VIN = 4.2V
VOUT = 3.25V VIN = 3.57V
IOUT = 300 mA VOUT = 3.25V IOUT = 200 mA
RDSON RDSON
vs vs
Temperature (P-ch) Temperature (N-ch)
600 600
ISW = 500 mA ISW = - 200 mA
VIN = 2.7V
500 500
VIN = 3.6V
RDS(ON) (m:)
300 300
VIN = 4.2V
200 VIN = 3.6V 200
VIN = 4.2V
100 100
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
AMBIENT TEMPERATURE (oC) AMBIENT TEMPERATURE (oC)
Figure 29. Figure 30.
35
120 VIN = 2.7V
RDS(ON) (m:)
30
100 250
20
80
15
10
60 VIN = 4.2V
5
40 0
-40 -20 0 20 40 60 80 100 0 100 200 300 400 500
o
AMBIENT TEMPERATURE ( C) IOUT (mA)
Figure 31. Figure 32.
BLOCK DIAGRAM
VDD PVIN
BYPOUT
CURRENT
OSCILLATOR SENSE
ERROR
AMPLIFIER
FB
~
PWM
COMP
OVP
COMP MOSFET
VCON SW
CONTROL
LOGIC
SHUTDOWN
EN CONTROL
SGND PGND
OPERATION DESCRIPTION
The LM3200 is a simple, step-down DC-DC converter with a bypass switch, optimized for powering RF power
amplifiers (PAs) in mobile phones, portable communicators, and similar battery powered RF devices. It is
designed to allow the RF PA to operate at maximum efficiency over a wide range of power levels from a single
Li-Ion battery cell. It is based on current-mode buck architecture, with synchronous rectification for high
efficiency. It is designed for a maximum load capability of 300 mA in PWM mode and 500 mA in bypass mode.
Maximum load range may vary from this depending on input voltage, output voltage and the inductor chosen.
The device has three-pin selectable operating modes required for powering RF PAs in mobile phones and other
sophisticated portable device with complex power management needs. Fixed-frequency PWM operation offers
regulated output at high efficiency while minimizing interference with sensitive IF and data acquisition circuits.
Bypass mode (Forced or Automatic) turns on an internal FET bypass switch to power the PA directly from the
battery. Shutdown mode turns the device off and reduces battery consumption to 0.1 µA (typ).
DC PWM mode output voltage precision is +/-2% for 3.6VOUT. Efficiency is typically around 96% for a 120 mA
load with 3.2V output, 3.6V input. PWM mode quiescent current is 0.7 mA typ. The output voltage is dynamically
programmable from 0.8V to 3.6V by adjusting the voltage on the control pin without the need for external
feedback resistors. This ensures longer battery life by being able to change the PA supply voltage dynamically
depending on its transmitting power.
Additional features include current overload protection, over voltage protection and thermal shutdown.
The LM3200 is constructed using a chip-scale 10-pin DSBGA package. This package offers the smallest
possible size, for space-critical applications such as cell phones, where board area is an important design
consideration. Use of a high switching frequency (2 MHz) reduces the size of external components. As shown in
Figure 33, only few external components are required for implementation. Use of a DSBGA package requires
special design considerations for implementation. (See DSBGA PACKAGE ASSEMBLY AND USE) Its fine
bump-pitch requires careful board design and precision assembly equipment. Use of this package is best suited
for opaque-case applications, where its edges are not subject to high-intensity ambient red or infrared light. Also,
the system controller should set EN low during power-up and other low supply voltage conditions. (See
Shutdown Mode)
VIN
2.7V to 5.5V
C1* C4**
10 PF 0.1 PF VDD PVIN
BYPOUT
L1 VOUT
2.2 PH 0.8V to 3.6V
SYSTEM
CONTROLLER
BYP LM3200 SW
DAC VCON
C2
ON/OFF EN FB 4.7 PF
SGND PGND
*Place C1 close to PVIN.
**Place C4 close to VDD.
Circuit Operation
Referring to Figure 33, the LM3200 operates as follows. During the first part of each switching cycle, the control
block in the LM3200 turns on the internal PFET (P-channel MOSFET) switch. This allows current to flow from the
input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a
slope of around (VIN-VOUT)/L, by storing energy in a magnetic field. During the second part of each cycle, the
controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET (N-channel
MOSFET) synchronous rectifier on. In response, the inductor’s magnetic field collapses, generating a voltage
that forces current from ground through the synchronous rectifier to the output filter capacitor and load. As the
stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope
around VOUT/L. The output filter capacitor stores charge when the inductor current is going high, and releases it
when inductor current is going low, smoothing the voltage across the load.
The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the
load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and
synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter capacitor. The output
voltage is equal to the average voltage at the SW pin.
PWM Mode
While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant
frequency and then modulating the energy per cycle to control power to the load. Energy per cycle is set by
modulating the PFET switch on-time pulse width to control the peak inductor current. This is done by comparing
the signal from the PFET drain current to a slope-compensated reference current generated by the error
amplifier. At the beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to
ramp up. When the current sense signal ramps past the error amplifier signal, the PWM comparator turns off the
PFET switch and turns on the NFET synchronous rectifier, ending the first part of the cycle. If an increase in load
pulls the output down, the error amplifier output increases, which allows the inductor current to ramp higher
before the comparator turns off the PFET. This increases the average current sent to the output and adjusts for
the increase in the load. Before appearing at the PWM comparator, a slope compensation ramp from the
oscillator is subtracted from the error signal for stability of the current feedback loop. The minimum on-time of
PFET in PWM mode is 50 ns (typ).
Bypass Mode
The LM3200 contains an internal PFET switch for bypassing the PWM DC-DC converter during Bypass mode. In
Bypass mode, this PFET is turned on to power the PA directly from the battery for maximum RF output power.
When the part operates in the Bypass mode, the output voltage will be the input voltage less the voltage drop
across the resistance of the bypass PFET. Bypass mode is more efficient than operating in PWM mode at 100%
duty cycle because the resistance of the bypass PFET is less than the series resistance of the PWM PFET and
inductor. This translates into higher voltage available on the output in Bypass mode, for a given battery voltage.
The part can be placed in bypass mode by sending BYP pin high. This is called Forced Bypass Mode and it
remains in bypass mode until BYP pin goes low.
Alternatively the part can go into Bypass mode automatically. This is called Auto-bypass mode or Automatic
Bypass mode. The bypass switch turns on when the difference between the input voltage and programmed
output voltage is less than 250 mV (typ.) for more than the bypass delay time of 15 µs (typ.). The bypass switch
turns off when the input voltage is higher than the programmed output voltage by 450 mV (typ.) for longer than
the bypass delay time. The bypass delay time is provided to prevent false triggering into Automatic Bypass mode
by either spikes or dips in VIN. This method is very system resource friendly in that the Bypass PFET is turned on
automatically when the input voltage gets close to the output voltage, typical scenario of a discharging battery. It
is also turned off automatically when the input voltage rises, typical scenario of a charger connected. Another
scenario could be changes made to VCON voltage causing Bypass PFET to turn on and off automatically. It is
recommended to connect BYPOUT pin directly to the output capacitor with a separate trace and not to the FB
pin.
Shutdown Mode
Setting the EN digital pin low (<0.4V) places the LM3200 in a 0.1 µA (typ.) Shutdown mode. During shutdown,
the PFET switch, NFET synchronous rectifier, reference voltage source, control and bias circuitry of the LM3200
are turned off. Setting EN high (>1.2V) enables normal operation.
EN should be set low to turn off the LM3200 during power-up and under voltage conditions when the power
supply is less than the 2.7V minimum operating voltage. The LM3200 is designed for compact portable
applications, such as mobile phones. In such applications, the system controller determines power supply
sequencing and requirements for small package size outweigh the benefit of including UVLO (Under Voltage
Lock-Out) circuitry.
Current Limiting
A current limit feature allows the LM3200 to protect itself and external components during overload conditions. In
PWM mode, a 940 mA (max.) cycle-by-cycle current limit is normally used. If an excessive load pulls the output
voltage down to below approximately 0.375V, indicating a possible short to ground, then the device switches to a
timed current limit mode. In timed current limit mode, the internal PFET switch is turned off after the current
comparator trips, and the beginning of the next cycle is inhibited for 3.5 µs to force the instantaneous inductor
current to ramp down to a safe value. After the 3.5 µs interval, the internal PFET is turned on again. This cycle is
repeated until the load is reduced and the output voltage exceeds approximately 0.375V. Therefore, the device
may not startup if an excessive load is connected to the output when the device is enabled. The synchronous
rectifier is off in the timed current limit mode. Timed current limit prevents the loss of current control seen in
some products when the output voltage is pulled low in serious overload conditions.
A current limit is also provided for the NFET. This is approximately −500 mA. Both the NFET and the PFET are
turned off in negative current limit until the PFET is turned on again at the beginning of the next cycle. The
negative current limit inhibits buildup of excessive inductor current. In the Bypass mode, the bypass current limit
is 1000 mA(typ). The output voltage drops when the bypass current limit kicks in.
Application Information
INDUCTOR SELECTION
A 2.2 μH inductor with saturation current rating over 940 mA is recommended for almost all applications. The
inductor resistance should be less than 0.3Ω for better efficiency. Table 1 lists suggested inductors and
suppliers.
If a higher value inductor is used the LM3200 may become unstable and exhibit large under or over shoot during
line, load and VCON transients. If smaller inductance value is used, slope compensation maybe insufficient
causing sub-harmonic oscillations. The device has been tested with inductor values in the range 1.55μH to 3.1μH
to account for inductor tolerances.
For low-cost applications, an unshielded bobbin inductor can be used. For noise-critical applications, an
unshielded or shielded-bobbin inductor should be used. A good practice is to layout the board with footprints
accommodating both types for design flexibility. This allows substitution of an unshielded inductor, in the event
that noise from low-cost bobbin models is unacceptable. Saturation occurs when the magnetic flux density from
current through the windings of the inductor exceeds what the inductor’s core material can support with a
corresponding magnetic field. This can cause poor efficiency, regulation errors or stress to a DC-DC converter
like the LM3200.
CAPACITOR SELECTION
The LM3200 is designed to be used with ceramic capacitors. Use a 10 µF ceramic capacitor for the input and a
4.7 µF ceramic capacitor for the output. Ceramic capacitors such as X5R, X7R and B are recommended for both
filters. These provide an optimal balance between small size, cost, reliability and performance for cell phones
and similar applications. Table 2 lists suggested capacitors and suppliers.
The DC bias characteristics of the capacitor must be considered when making the selection. If smaller case size
such as 0603 is selected, the dc bias could reduce the cap value by as much as 40%, in addition to the 20%
tolerances and 15% temperature coefficients. Request dc bias curves from manufacturer when making
selection.The device has been designed to be stable with output capacitors as low as 3 μF to account for
capacitor tolerances.This value includes dc bias reduction, manufacturing tolerences and temp coefficients.
The input filter capacitor supplies AC current drawn by the PFET switch of the LM3200 in the first part of each
cycle and reduces the voltage ripple imposed on the input power source. The output filter capacitor absorbs the
AC inductor current, helps maintain a steady output voltage during transient load changes and reduces output
voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR
(Equivalent Series Resistance) to perform these functions. The ESR of the filter capacitors is generally a major
factor in voltage ripple.
ground, forming a second current loop. Routing these loops so the current curls in the same direction,
prevents magnetic field reversal between the two half-cycles and reduces radiated noise.
4. Connect the ground pins of the LM3200, and filter capacitors together using generous component side
copper fill as a pseudo-ground plane. Then connect this to the ground-plane (if one is used) with several
vias. This reduces ground plane noise by preventing the switching currents from circulating through the
ground plane. It also reduces ground bounce at the LM3200 by giving it a low impedance ground connection.
5. Use wide traces between the power components and for power connections to the DC-DC converter circuit.
This reduces voltage errors caused by resistive losses across the traces.
6. Route noise sensitive traces, such as the voltage feedback trace, away from noisy traces and components.
The voltage feedback trace must remain close to the LM3200 circuit and should be routed directly from FB
pin to VOUT at the output capacitor. A good approach is to route the feedback trace on another layer and to
have a ground plane between the top layer and the layer on which the feedback trace is routed. This reduces
EMI radiation on to the DC-DC converter’s own voltage feedback trace.
7. It is recommended to connect BYPOUT pin to VOUT at the output capacitor using a separate trace, instead of
connecting it directly to the FB pin for better noise immunity.
REVISION HISTORY
www.ti.com 8-Oct-2015
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
LM3200TL/NOPB ACTIVE DSBGA YPA 10 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -25 to 85 SCUB
& no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
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Addendum-Page 1
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2015
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 2
MECHANICAL DATA
YPA0010
0.600
±0.075 D
TLP10XXX (Rev D)
4215069/A 12/12
NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
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