NEW PWB24915 19 Nov 2019 New-Pages-10
NEW PWB24915 19 Nov 2019 New-Pages-10
NEW PWB24915 19 Nov 2019 New-Pages-10
BUS_CAMSBUS_CAMS
R2701
SVC_RIN0_P 0 SVC_RIN0_P_R
SVC_RIN0_P
BUS_SIP
BUS_SIP
FL2700
1 4 SVC_RIN0_P_R
DEPOP
2 3 SVC_RIN0_M_R
TP2718
VDDIO_1.8
DSER_BISTEN
CSI2_A0_CLK_M
CSI2_NC_CLK_P
CSI2_C0_LN0_M
CSI2_B0_LN0_P
CSI2_B1_LN1_M
CSI2_A1_LN1_P
CSI2_A2_LN2_M
CSI2_C1_LN2_P
CSI2_C2_LN3_M
CSI2_B2_LN3_P
DSER_INTB
ACM2012-900-2P-T1001
R2707 FB2700 1
DSER_PWRDN
CAM_I2C_SDA
CAM_I2C_SCL
49.9 600
DSER_LOCK
DSER_PASS
1% R2702 0.6
0402 0 SVC_RIN0_M_R
SVC_RIN0_M
1A
R2706
MPZ1608S601ATD25 C2706 C2727 33
100n 10nF Y2700 5%
16V 50V 0402
GND 10% 10% 4 3 CON_CAM2_REFCLK
VDD OUTPUT
0402
2 1
GND STAND_BY
TP2719
GND 25MEGHZ
MANUPART
1
R2700
10K
5%
0402
VDD11_D
Write Address : 0x68
DSER_PWRDN
Read Address : 0x69 VDDIO_1.8
Speed: 1MHz
R2703 0
TP2720
TP2711
TP2712
TP2713
CAM_I2C_SCL_R
0402
R2704 0 CAM_I2C_SDA_R
1
0402 1 1 1
10
11
12
1
2
3
4
5
6
7
8
9
I2C_SDA
I2C_SCL
VDD11_D
XOUT
XIN/REFCLK
BISTEN
VDDIO1
GPIO6
GPIO5
GPIO4
CSI_CLK0N
CSI_CLK0P
+1.8VSW
49
C2741 GND TAB_GND
47nF 48 13
VDD_1.8P LOCK CSI_D0N
50V 47 14
10% PASS CSI_D0P
+1.8VSW TP2702 VDD1.8_FPD SVC_RIN0_M_R 46 15
BLM18SG121TZ1D VDD_SEL CSI_D1N
L2700 VDD_1.8P 45 16
120 1 VDD18_P0 CSI_D1P
+1.8VSW 0402 44 17
0.025
DS90UB936
GND RES VDD18_CSI VDD1.8_CSI
43 18
WQFN
U2700
VDD11_FPD VDD11_FPD0 CSI_CLK1N
SVC_RIN0_M_C 42 19
C2728 C2729 RIN0- CSI_CLK1P
C2713 C2714 C2702 10nF 10nF SVC_RIN0_P_C 47nF 41 20
10uF 10uF 100n 50V 50V 50V RIN0+ VDD11_CSI VDD11_CSI
25V 25V 10% C2700 40 21
10% 10% 100nF 10% VDD1.8_FPD VDD18_FPD0 CSI_D2N
20% 20% 16V 0402 0402 TP2707 CAM2_CMLOUTN_C C2739 CAM2_CMLOUTN 39 22
0603 0603 50V CMLOUTN CSI_D2P
0402 10% 1
38 23
SVC_RIN0_P_R R2709 0402 CMLOUTP CSI_D3N
VREG_S4A_1P8 100 37 24
1% 47nF MODE CSI_D3P
Pin 31 Pin 40 0402 50V
VDD11_FPD1
VDD18_FPD1
0402
10%
GPIO3/INTB
GND
VDDIO_1.8
VDD18_P1
TP2700 TP2708 CAM2_CMLOUTP_C C2740 CAM2_CMLOUTP
BLM18SG121TZ1D
VDDIO2
L2701 VDDIO_1.8 1
GPIO0
GPIO1
GPIO2
VREG_S4A_1P8 +1.8VSW
RIN1+
RIN1-
VREG_S4A_1P8 120 0402
1
PDB
R2715
IDX
0.025
4.7K
5%
36
35
34
33
32
31
30
29
28
27
26
25
C2715 C2701 C2704 C2730 C2731
10uF 1uF 10nF 10nF R2719 0402
100n 78.7K VDD_1.8P
25V 16V 10% 50V 50V
20% 10% 10% CSI-2 Mode (synchronous backchannel) 1%
0603 16V 1
0603 0402 0402 0603
0402 TP2709 TP2717
1
C2708 R2720 +1.8VSW
Pin 7 Pin 29 100n 97.6K
1
TP2710
0.5% TP2716
0402 R2717 1
75K TP2715
BLM18SG121TZ1D TP2703 DNP 1%
L2703 VDD1.8_CSI 1 0402 1
120 1 TP2714
0.025
R2718
C2707 35.7K
C2716 C2732 1%
C2705 100n 0402
10uF C2717 10nF
25V 10uF 100n 50V
20% 25V 10% 10% VDD11_FPD
0603 20% 16V 0402 I2C address 0x34(7bit), 0x68(8 bit)
0603
0402
Pin 17 GND
POWER_SMPS_TPS62090_1V1SW
C2718
10uF C2719 C2703 C2733
25V 10uF 100n C2734 10nF
10nF DSER_PWRDN DSER_PWRDN
20% 25V 10% 50V
0603 20% 16V 50V 10%
0603 0402 10% 0402 R2710 C2726 VDDIO_1.8
0402 10K 10uF
5% 25V
0402 20%
0603
Pin 36 Pin 45 DEPOP
C2724
10uF
0.025
C2725
10uF
C2738
10nF
C2737
10nF
R2705
10K
5%
0402
100nF
50V
10%
R2716
20K
0.5%
0603
Visteon TITLE SCHEMATIC W601 MAIN-VP0
25V 25V 50V 50V
20% 20% 10% 10% R2711 +1.1VSW
0603 0603 0402 0402 10K
5% VISTEON CONFIDENTIAL
0402
Pin 34 Pin 43
R2712
10K THIS DRAWING AND ANY INTELLECTUAL
BLOCK 2000_DESERIALIZER
5% TP2721
DEPOP
0402
Jumpers to set to 1.4MHz EN or 2.8MHz GNDR2708 PROPERTY RIGHTS THEREIN ARE PROPERTY
10K
5%
+1.1VSW_PGOOD
OF VISTEON CORPORATION AND NO LICENSES
SHEET 10 OF 51 DATE 2019/10/21
0402
ARE GRANTED UNDER THOSE RIGHTS
BOOKSHELF
PWB # PWB24915 CIRCUIT ID